REF: BBONE_SRM 7.

12 Expansion Headers

BeagleBone System Reference Manual

RevA3_1.0

The expansion interface on the board is comprised of two 46 pin connectors. All signals on the expansion headers are 3.3V unless otherwise indicated. NOTE: Do not connect 5V logic level signals to these pins or the board will be damaged.
7.12.1 Expansion Header P8

Table 8 shows the default pinout of the P8 expansion header. Other signals can be connected to this connector based on setting the pin mux on the processor, but this is the default settings on power up. The SW is responsible for setting the default function of each pin.
Table 8. Expansion Header P8 Pinout

SIGNAL NAME
GPIO1_6 GPIO1_2 TIMER4 TIMER5 GPIO1_13 EHRPWM2B GPIO1_15 GPIO0_27 EHRPWM2A GPIO1_30 GPIO1_4 GPIO1_0 GPIO2_22 GPIO2_23 UART5_CTSN UART4_RTSN UART4_CTSN UART5_TXD GPIO2_12 GPIO2_10 GPIO2_8 GPIO2_6

PROC
GND R9 R8 R7 T6 R12 T10 U13 U12 U10 U9 U8 U7 U5 R5 V4 V3 V2 U1 T3 T1 R3 R1 1 3 5 7 9

CONN
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46

PROC
GND T9 T8 T7 U6 T12 T11 V13 V12 V9 V8 V7 V6 V5 R6 T5 U4 U3 U2 T4 T2 R4 R2

SIGNAL NAME
GPIO1_7 GPIO1_3 TIMER7 TIMER6 GPIO1_12 GPIO0_26 GPIO1_14 GPIO2_1 GPIO1_31 GPIO1_5 GPIO1_1 GPIO1_29 GPIO2_24 GPIO2_25 UART5_RTSN UART3_RTSN UART3_CTSN UART5_RXD GPIO2_13 GPIO2_11 GPIO2_9 GPIO2_7

11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45

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