8085Architecture& ItsAssemblylanguageprogramming

DrASahu DeptofComputerScience& Engineering IITGuwahati

Outline
8085
Blockdiagram(DataPath) InstructionSetof8085

Sampleprogramof8085 Counter&TimeDelay elay StackandSubRoutine Assignmenton8085 Introductionto8086and30x86architecture

8085MicroprocessorArchitecture
INTR INTA ReSeT6.5 RST5.5 RST7.5 TRAP SID SOD

InterruptControl Bus8Bit ACC tmp R Flag IDecode & M/C / Encoding

SerialI/OControl

MUX IR W B D H SP PC Z C E L

ALU
TimingandControl

Inc/Dec. I /D t ter Addlatch

AddBuff

Data/AddBuff

A15 A0

AddressBus(16bit)

Memory 8085 MPU

I/P O/P

D7 D0

DataBus(8bit) ControlBus(8bit)

Assumption
RAMMemoryisinterfaced Instructionsarestoredinmemory One O I/O /Odi display l porti isi interfaced f dtodi display l dataofACC

SimpleAssemblyProgram
MVIA,24H//loadReg ACCwith24H MVIB,56H//loadReg Bwith56H ADDB//ACC=ACC+B OUT01H//DisplayACCcontentsonport01H HALT//Endthep program g

Result:7A(AllareinHex) DAAoperationforDecimalAdjustA+6=10H

Flowcharttomultiplytwonumber
Start LDA2000//Loadmultiplicant toaccumulator MOVB,A//Movemultiplicant fromA(acc)toBregister LDA2001//Loadmultipliertoaccumulator MOVC,A//MovemultiplierfromAtoC MOVC,A//MovemultiplierfromAtoC MVIA,00 A 00//Loadimmediatevalue00toACC ADDB//AddB(multiplier)withA DCRC//DecrementC,itactasacounter

JNZL//JumptoLifC!=0 STA2010//Storeresultintomemory HLT//End

Codetomultiplytwonumber
LDA2000//Loadmultiplicant toaccumulator MOVB,A B A//M Movemultiplicant l i li f from A(acc) A( )toBregister i LDA2001//Loadmultipliertoaccumulator MOVC,A C A//MovemultiplierfromAtoC MVIA,00//Loadimmediatevalue00toa L:ADDB//AddB(multiplier) ( p )withA DCRC//DecrementC,itactasacounter JNZL//JumptoLifCreaches0 STA2010//Storeresultintomemory HLT//End

DelayofInstructions
Performance/delayofeachinstruction

F R MVIC C,FFH 7TState F LOOP:DCRC 4TState JNZLOOP 7/10TState F R R

PerformanceofotherINS F ADDR 4TState S F R ADDM 7TState S R R W W 18TState CALLaddr F=Fetchwith4State,S=Fetchwith6State, R=MemoryRead,W=MemoryWrite

TimeDelayLoop
Performance/delayofeachinstruction
MVIC, C FFH 7TState S F R LOOP:DCRC 4TState F JNZLOOP 7/10TState F R R

Timedelayinloop
TL=TxLoopTStatesxN10 whereT=Systemclockperiod N10=Equiv.decimalvalueofcountloadedtoC (14x255)=1.8ms ) (ignore (g 10TState) ) TL=0.5x106 x(

TimeDelay:NestedLoop
Performance/delayofeachinstruction MVIC, C FFH 7TState F R MVID,FFH 7TState F R LOOP1:DCRC 4TState F LOOP2:DCRD 4TState F JNZLOOP2 7/10TState F R R JNZLOOP1 7/10TState F R R TimedelayinNestedloop
TNL=N110 xTx(L1_TStates+L2_TStatesxN210 )

TrafficLightControl:Counter&Delay
TurnSignaltoRed LoadDelayRed y TimeDelay TurnSignaltoYellow LoadDelayYellow TimeDelay T Signal Turn Si lto t Green G LoadDelayGreen TimeDelay

LOOP: MVIA01H OUT01H LDBDELAY DELAY_RED RED CALLDELAY MVIA02H OUT01H LDBDELAY_YELLOW CALLDELAY MVIA03H OUT01H LDBDELAY_GREEN CALLDELAY JMPLOOP

StackPointer( (SP) )&StackMemory y

Thestackisanareaofmemoryidentifiedby theprogrammerfortemporarystorageof information. ThestackisaLIFOstructure structure. Thestacknormallygrowsbackwardsinto Memory memory memory.
Programmercandefinesthe bottomofthestack(SP) andthestackgrowsupinto reducingaddressrange.

TheStack grows backwards intomemory

Bottom ofthe Stack

StackMemory
Growsbackwardsintomemory Bettertoplace l the h b bottomof fthe h stack katthe h endofmemory Tokeepitasfarawayfromuserprogramsas possible. StackisdefinedbysettingtheSP(Stack )register. g Pointer)
LXI SP, FFFFH

ThissetsSPtolocationFFFFH(endofmemory for8085).

SavingInformationontheStack
SaveinformationbyPUSHing ontoSTACK RetrievedfromSTACKbyPOPing itoff off. PUSHandPOPworkwithregisterpairsonly. E Example l PUSHB
DecrementSP,CopyBto0(SP) Decrement D SP, SP Copy C Ctp 0(SP)
B
12

C
F3
FFFB FFFC FFFD FFFE FFFF

ExamplePOPB
Copy0(SP) ( )toC,IncrementSP Copy0(SP)toB,IncrementSP

F3 12

SP

Stack/LIFOuseinCALL/RET
Retrieveinformationbackintoitsoriginal location
TheorderofPUSHsandPOPsmustbeopposite

8085recognizes g oneadditionalregister g p pair

PSW(ProgStatusword)=ACCandFlag
BeforeanyroutineCALLdothis PUSH B PUSH D PUSH PSW AfterRETURNfromcalldothis POP PSW POP D POP B

Subroutines
A subroutine is a group of instructions
That is used repeatedly in different places of the program. Rather than repeat the same instructions several times It can be grouped into a subroutine and call from the different locations.

Instructionsfordealingwithsubroutines.
TheCALLinstructionisusedtoredirectp program g executiontothesubroutine. TheRETinstructionisusedtoreturntheexecutionto the h calling ll routine.

CALL/RETInstruction
YoumustsettheSPcorrectlybeforeusingCALL CALL5000H
PushthePCvalueontothestack Load L dPCwith ith16bitaddress dd supplied li dCALLins. i

RET:LoadPCwithstacktop;POPPC
PC
2000 CALL5000 2003 2003
FFFB FFFC FFFD FFFE FFFF
17

03 20

SP

CallbyReferences
IfSRperformsoperationsonthecontentsof theregisters Thesemodificationswillbetransferredback tothe h calling ll programuponreturningfrom f a subroutine. Ifthisisnotdesired,theSRshouldPUSH registersandPOPonreturn.

18

Stack/LIFOuseinCALL/RET
Retrieveinformationbackintoitsoriginal location
TheorderofPUSHsandPOPsmustbeopposite

8085recognizes g oneadditionalregister g p pair

PSW(ProgStatusword)=ACCandFlag
BeforeanyroutineCALLdothis PUSH B PUSH D PUSH PSW AfterRETURNfromcalldothis POP PWD POP D POP B

Factorialofanumber
LXISP,27FFH//Initializestackpointer LDA2200H//Getthenumber CPI02H//Check Ch kifnumber b is i greater t th than1 JCLAST MVID,00H//Loadnumberasaresult MOVE,A DCRA MOVC,A , //Loadcounteronelessthannumber CALLFACTO//CallsubroutineFACTO XCHG//GettheresultinHL//HLwithDE SHLD2201H//Storeresult//storeHLat0(16bit) JMPEND LXIH,000lH//Storeresult=01 SHLD2201H HLT

LAST: END:

SubRoutineforFACTORIAL
FACTO:LXIH,0000H MOVB,C//Loadcounter BACK: DADD//doubleadd;HL=HL+DE DCRB JNZBACK//Multiplybysuccessiveaddition XCHG//StoreresultinDE//HLwithDE DCR C C//Decrementcounter CNZFACTO//CallsubroutineFACTO RET//Returntomainprogram

AssignmentI
Writeandexecute8085assemblylanguage programtofindvalueofNth Fibonaccinumber (R (Recursive i version: i using i recursive i subroutine b ti call) 16bitcansupportupto65356>F24 Deadline Deadline:12th Aug2010, 2010 11.55Mid 11 55Midnight Afterdeadlinegrading:Max5outof10 Send S dTXTversion i of fprogramwith ithfile fil name RollNo.txttoasahu@iitg.ernet.in with Assignmentoneassubjectofemail Dontsubmitcopiedone:willgetNegativemarks

Introductionto 8086&i386processor
16bitMicroprocessor Allinternalregistersaswellasinternaland externaldatabuseswere16bitswide 4MainRegister,4IndexRegister,4Segment R i Register, Status S Reg, R Instr I P Ptr. Notcompatiblewith8085,butwithsuccessors TwoUnitworksinparallel:
BusInterfaceUnit(BIU) ( ) ExecutionUnit(EI)

8086Architecture
BusInterface Unit
SUM CBUS
Q6 Q5 Q4 Q3 Q2 Q1

CS(CodeSeg Reg) DS(DataSeg Reg ) ES(ExtraSeg Reg ) SS(StackSeg Reg) IP(Intr ( Ptr) ) Operand InDirect

Sequencer
ABUS

Execution Unit
AH BH CH DH AL BL CL DL

TempA TempB TempC

SI(SourceIdx ) DI(Dest ( (Dest. Idx) ) BP(BasePtr ) SP(StackPtr) Z(FlagReg)

ALU

8086Registers
AX theaccumulatorregister(dividedintoAH/AL) BX thebaseaddressregister(dividedintoBH/BL) CX thecountregister(dividedintoCH/CL) DX thedataregister(dividedintoDH/DL) AH AL BH BL CH CL DH DL SI(SourceIdx ) DI(Dest.Idx) BP(BasePtr ) SP(St kPt ) (Stack Ptr) Z(FlagReg) CS(CodeSeg Reg) DS(DataSeg Reg ) ES(ExtraSeg Reg ) SS(StackSeg Reg) IP(Intr Ptr)

SI sourceindexregister. i i i d register. i DI d destination index BP basepointer. SP stackpointer.

8086Architecture
ExecutionUnit:
ALUmaybeloadedfromthreetempregisters(TMPA,TMPB, TMPC) Executeoperationsonbytesor16bitwords. Theresultstoredintotempreg orregistersconnectedtothe internaldatabus.

BusInterfaceUnit
BIUisintendedtocomputetheaddresses. Twotemporary p yregisters g indirectaddressing foursegmentregisters(DS,CS,SSandES), Program g counter(IP ( InstructionPointer), ), A6byteQueueBuffertostoretheprefetchedopcodes anddata. ThisPrefetch Queueoptimizethebususage. Toexecuteajumpinstructionthequeuehastobeflushedsincethe prefetchedinstructionsdonothavetobeexecuted.

NextClassAgenda
Detailof8086Architecture Advanced32bitarchitecture(i386,Pentium,p4)
Iknowalittlebitofthis Myexpertiseareaofwork

Programmingmodelforx86architecture 8086Assemblylanguageprogramming MASM/TASM/NASM( (x86 86assembler) Ifyoumissthenextclass,willmissalot

Th k Thanks