Tutorial 6 Using the Spartan-3E Starter Board LCD Display With ISE 10 1

Introdu!tion
The LCD (Liquid Crystal Display) in question is included with the Spartan-3E Starter Board Kit sold by both Di ilent! LCD"s in eneral o##er a cheap and con$enient way to deli$er in#or%ation #ro% electronic de$ices! &ndeed' it is that $ery con$enience that has led to the LCD"s near ubiquity in today"s electronic world! ( detailed description o# the operation o# an LCD is #ar beyond the scope o# this docu%ent) howe$er' it is yet worthwhile to understand the eneral operation o# an LCD de$ice! Essentially' what a traditional blac* + white LCD does is to selecti$ely to le what are ter%ed pi,els in the display to allow or bloc* li ht #ro% passin ! These pi,els are abstractly considered to be the points that co%pose the display) o# course' in our particular case the pi,els the%sel$es are clearly $isible and are per#ect squares! &n any case' to enerate so%ethin li*e the letter -&"' the LCD would %erely to le the pi,els in a strai ht $ertical line! This lab will assu%e the co%pletion or understandin o# the %aterial in labs .' /' 3 and 0! There are two #unda%ental sections #or this lab! These consist o#1 .! The i%ple%entation o# hardware to control the onboard LCD! /! ( si%ulation o# the hardware to $eri#y #unctionality! The enterprisin reader %ay idly consider the #act that it is easier to si%ply pro ra% the board than $eri#y the hardware desi n in so#tware #irst! 2n#ortunately' that is only true o# $ery s%all pro3ects' as pro3ects beco%e lar er' so do the proble%s with no see%in source or solution! 4epeatedly pro ra%%in the board in trial and error #ashion will only waste ti%e!

LCD Controller: Sitronix ST7066U

"ele#ant $ins
There are two possible inter#aces to the LCD controller' one 5 bits wide and another 6 bits wide! The desi ners o# the Spartan-3E chose to use the #our bit inter#ace and share it with the onboard &ntel Strata7lash stora e de$ice to %ini%i8e pin count! This will sli htly co%plicate the procedure o# initiali8in and writin to the display! The #ollowin pin de#initions will be used in the 9uc#: constraints #ile (%anual p ! 63)! LCD;4< will be pulled low' as this application will not be readin data #ro% the display! Dri$in LCD;E low causes the LCD to i nore all inputs! ( hi h LCD;4S speci#ies a data write operation' whereas a low LCD;4S speci#ies a co%%and!

NET "LCD_E" LOC = "M18" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ; NET "LCD_RS" LOC = "L18" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ; NET "LCD_RW" LOC = "L17" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ; # The LCD four-bit data interface is shared with the StrataFlash. NET "SF_D<8>" LOC = "R15" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ; NET "SF_D<9>" LOC = "R16" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ; NET "SF_D<10>" LOC = "P17" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ; NET "SF_D<11>" LOC = "M15" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ;

LCD %e&ory %anage&ent

The LCD de$ice has three internal re ions o# %e%ory! The Data Display 4(= (DD 4(=)' which re#erences the data to be displayed on the screen' the Character >enerator 4(= (C> 4(=)' which stores user-de#ined patterns and the Character >enerator 4?= (C> 4?=)' which includes a nu%ber o# prede#ined patterns that correspond to (SC&& sy%bols! &n this tutorial only the DD-4(= and the C>-4?= will be used! To re#erence a $alue in the C>-4?=' the $alue in the #i ure . needs to be written into the DD-4(=! 7or e,a%ple' the character -S" #ro% the C>4?= would ha$e the $alue 9@.@.@@..: (%anual p ! 60)! (t least one Set DD-RAM Address co%%and should precede either one or %any Data Write operations!

&n addition' the #ollowin addresses are locations in the DD-4(= that physically correspond to the locations o# characters displayed on the LCD!

LCD Co&&and 'or&at

Each 5 bit co%%and to the LCD controller occurs o$er a 6 bit inter#ace' thus' each co%%and is deco%posed into two #our bit trans%issions spaced by .us! Subsequent co%%ands (each sequential 6 bit trans%ission) %ust be spaced #ro% the ne,t by at least 6@us! ( detailed description #ollows (%anual p ! 0@)!

Aote that the period o# the 0@=B8 onboard cloc* is /@ns! The ti%e between correspondin nibbles is .us' which is equi$alent to 0@ cloc* cycles! The ti%e between successi$e co%%ands is 6@us' which corresponds to /@@@ cloc* cycles! The delay a#ter a Clear Display co%%and is .!C6%s' rather than the usual 6@us and corresponds to 5/@@@ cloc* cycles! Setup ti%e (ti%e #or the outputs to stabili8e) is 6@ns' which is / cloc* cycles' the hold ti%e (ti%e to assert the LCD;E pin) is /3@ns' which translates to rou hly ./ cloc* cycles' and the #all ti%e (ti%e to allow the outputs to stabili8e) is .@ns' which translates to rou hly . cloc* cycle!

The #ollowin is the LCD co%%and set!

LCD Initiali(ation) Con*iguration and Display

There are three %ain steps in usin the display' the #irst bein the initiali8ation o# the #our bit inter#ace itsel#' the second bein the co%%ands to set the display options and the third bein the writin o# character data (%anual p ! 0.)!

Initiali(ation
.! /! 3! 6! <ait .0 %s or lon er' althou h the display is enerally ready when the 7D>( #inishes con#i uration! The .0 %s inter$al is E0@'@@@ cloc* cycles at 0@ =B8! <rite S7;DF..15G H @,3' pulse LCD;E Bi h #or ./ cloc* cycles! <ait 6!. %s or lon er' which is /@0'@@@ cloc* cycles at 0@ =B8! <rite S7;DF..15G H @,3' pulse LCD;E Bi h #or ./ cloc* cycles!

0! <ait .@@ Is or lon er' which is 0'@@@ cloc* cycles at 0@ =B8!

C! <rite S7;DF..15G H @,3' pulse LCD;E Bi h #or ./ cloc* cycles!

E! <ait 6@ Is or lon er' which is /'@@@ cloc* cycles at 0@ =B8!

5! <rite S7;DF..15G H @,/' pulse LCD;E Bi h #or ./ cloc* cycles!

J! <ait 6@ Is or lon er' which is /'@@@ cloc* cycles at 0@ =B8!

The second step in$ol$es the con#i uration and actual writin to the LCD ra%! To con#i ure the LCD' the #ollowin co%%ands will be i$en (%anual p ! 0.)!
Con*iguration

.! &ssue a Function Set co%%and' @,/5' to con#i ure the display #or operation on the Spartan-3E Starter Kit board! /! &ssue an Entry Mode Set co%%and' @,@C' to set the display to auto%atically incre%ent the address pointer! 3! &ssue a Display On/Off co%%and' @,@C' to turn the display on and disables the cursor and blin*in ! 6! 7inally' issue a Clear Display co%%and! (llow at least .!C6 %s (5/'@@@ cloc* cycles) a#ter issuin this co%%and! The third and last step in$ol$es the actual process o# writin data to the DD-4(=! Display .! Speci#y the start address with a Set DD-RAM Address co%%and! /! Display a character with a Write Data co%%and!

+,-e!ti#e
To use the S3E Starter Board"s LCD to display 97D>(:' and learn %ore about di ital lo ic desi n in the process!

Proces s

.! &%ple%ent hardware to control the LCD! /! Keri#y the hardware in so#tware (=?DELS&=)! 3! Dro ra% the S3E Starter Kit Board!

I&ple&entation
This pro3ect requires 3 state %achines! ?ne #or the power on initiali8ation sequence' one to trans%it co%%ands and data to the LCD and lastly' one to start the power on initiali8ation sequence' then con#i ure and write to the LCD! Aote that one will ha$e to %a*e sure that the state %achines are synchroni8ed properly' that is' that %ain state %achine re%ains in the 9&A&T: state until the initiali8ation state %achine is in the 9D?AE: state' and that subsequent co%%and states not chan e until the data is #ully trans#erred by the trans%ission state %achine! 7i ure 6 shows the %ain state %achine that controls the initiali8ation sequence and the trans%ission state %achines! Aote that each and e$ery co%%and i%plicitly requires the trans%ission state %achine!

7i ure 0 is the initiali8ation sequence state %achine! &t is only acti$ated when the %ain state %achine asserts 9init:! =a*e certain that there is a way to noti#y the %ain state %achine that the initiali8ation is o$er and the #our bit inter#ace is established!

This is the last state %achine' and potentially the %ost troubleso%e! The %ain state %achine will set the $alues o# LCD;4S and the $alues o# the hi h and low nibbles o# an LCD co%%and! This state %achine will si%ply $eri#y the strict ti%in constraints i$en abo$e #or an LCD co%%and' otherwise it would be totally unnecessary! ( ain' a co%%and will only be trans#erred once t,;init is asserted by the %ain state %achine!

7i ure E shows a si%ulation o# a properly wor*in i%ple%entation o# LCD controller hardware! This si%ulation de%onstrates the way the disparate state %achines wor* to ether! (s the initiali8ation sequence #inishes' the co%%and states o# the %ain state %achine be in!

Figure 7: Waveform of circuit

NOTE: ISE Simulator may cause a memory error due to lack of recources. The waveforms show are from !O"E#SI! $E

The #ollowin si%ulation wa$e#or%s show e,actly what happens with all three state %achines when the initiali8ation sequence ends' and the states o# the #unction;set co%%and!

--Written by Rahul Vora --for the University of New Mexico --rhlvora@gmail.com library I ! use I ."#$%&'(I)%**+,.-&&! use I ."#$%&'(I)%-RI#..-&&! use I ."#$%&'(I)%UN"I(N $.-&&! ---- Uncomment the following library /eclaration if instantiating ---- any 0ilinx 1rimitives in this co/e. --library UNI"IM! --use UNI"IM.V)om1onents.all! entity lc/ is 1ort2 cl34 reset 5 in bit! "6%$ 5 out bit%vector27 /ownto 89! &)$% 4 &)$%R"4 &)$%RW4 "6%) 8 5 out bit! & $ 5 out bit%vector2: /ownto 89 9! en/ lc/! architecture behavior of lc/ is ty1e tx%se;uence is 2high%setu14 high%hol/4 oneus4 low%setu14 low%hol/4 fortyus4 /one9! signal tx%state 5 tx%se;uence 5< /one! signal tx%byte 5 bit%vector2: /ownto 89! signal tx%init 5 bit 5< =8=! ty1e init%se;uence is 2i/le4 fifteenms4 one4 two4 three4 four4 five4 six4 seven4 eight4 /one9! signal init%state 5 init%se;uence 5< i/le! signal init%init4 init%/one 5 bit 5< =8=! signal i 5 integer range 8 to :>8888 5< 8! signal i? 5 integer range 8 to ?888 5< 8! signal i7 5 integer range 8 to @?888 5< 8! signal "6%$84 "6%$* 5 bit%vector27 /ownto 89! signal &)$% 84 &)$% * 5 bit! signal mux 5 bit! ty1e /is1lay%state is 2init4 function%set4 entry%set4 set%/is1lay4 clr%/is1lay4 1ause4 set%a//r4 char%f4 char%14 char%g4 char%a4 /one9! signal cur%state 5 /is1lay%state 5< init! begin & $ A< tx%byte! --for /iagnostic 1ur1oses "6%) 8 A< =*=! --/isable intel strataflash &)$%RW A< =8=! --write only --#he following BwithB statements sim1lify the 1rocess of a//ing an/ removing states. --when to transmit a comman/C/ata an/ when not to with cur%state select tx%init A< =8= when init D 1ause D /one4 =*= when others! --control the bus with cur%state select mux A< =*= when init4 =8= when others! --control the initialiEation se;uence with cur%state select init%init A< =*= when init4 =8= when others!

--register select with cur%state select &)$%R" A< =8= when function%setDentry%setDset%/is1layDclr%/is1layDset%a//r4 =*= when others! --what byte to transmit to lc/ --refer to /atasheet for an ex1lanation of these values with cur%state select tx%byte A< B88*8*888B when function%set4 B88888**8B when entry%set4 B8888**88B when set%/is1lay4 B8888888*B when clr%/is1lay4 B*8888888B when set%a//r4 B8*888**8B when char%f4 B8*8*8888B when char%14 B8*888***B when char%g4 B8*88888*B when char%a4 B88888888B when others! --main state machine /is1lay5 1rocess2cl34 reset9 begin if2reset<=*=9 then cur%state A< function%set! elsif2cl3<=*= an/ cl3=event9 then case cur%state is --refer to intialiEe state machine below when init <F if2init%/one < =*=9 then cur%state A< function%set! else cur%state A< init! en/ if! --every other state but 1ause uses the transmit state machine when function%set <F if2i? < ?8889 then cur%state A< entry%set! else cur%state A< function%set! en/ if! when entry%set <F if2i? < ?8889 then cur%state A< set%/is1lay! else cur%state A< entry%set! en/ if! when set%/is1lay <F if2i? < ?8889 then cur%state A< clr%/is1lay! else cur%state A< set%/is1lay! en/ if! when clr%/is1lay <F i7 A< 8! if2i? < ?8889 then cur%state A< 1ause! else cur%state A< clr%/is1lay! en/ if! when 1ause <F if2i7 < @?8889 then cur%state A< set%a//r! i7 A< 8!

else en/ if!

cur%state A< 1ause! i7 A< i7 G *!

when set%a//r <F if2i? < ?8889 then cur%state A< char%f! else cur%state A< set%a//r! en/ if! when char%f <F if2i? < ?8889 then cur%state A< char%1! else cur%state A< char%f! en/ if! when char%1 <F if2i? < ?8889 then cur%state A< char%g! else cur%state A< char%1! en/ if! when char%g <F if2i? < ?8889 then cur%state A< char%a! else cur%state A< char%g! en/ if! when char%a <F if2i? < ?8889 then cur%state A< /one! else cur%state A< char%a! en/ if! when /one <F cur%state A< /one! en/ case! en/ if! en/ 1rocess /is1lay! with mux select "6%$ A< "6%$8 when =8=4 --transmit "6%$* when others! --initialiEe with mux select &)$% A< &)$% 8 when =8=4 --transmit &)$% * when others! --initialiEe --s1ecifie/ by /atasheet transmit 5 1rocess2cl34 reset4 tx%init9 begin if2reset<=*=9 then tx%state A< /one! elsif2cl3<=*= an/ cl3=event9 then case tx%state is when high%setu1 <F --,8ns &)$% 8 A< =8=! "6%$8 A< tx%byte2: /ownto ,9! if2i? < ?9 then tx%state A< high%hol/! i? A< 8! else tx%state A< high%setu1!

en/ if!

i? A< i? G *!

when high%hol/ <F --?78ns &)$% 8 A< =*=! "6%$8 A< tx%byte2: /ownto ,9! if2i? < *?9 then tx%state A< oneus! i? A< 8! else tx%state A< high%hol/! i? A< i? G *! en/ if! when oneus <F &)$% 8 A< =8=! if2i? < >89 then tx%state A< low%setu1! i? A< 8! else tx%state A< oneus! i? A< i? G *! en/ if! when low%setu1 <F &)$% 8 A< =8=! "6%$8 A< tx%byte27 /ownto 89! if2i? < ?9 then tx%state A< low%hol/! i? A< 8! else tx%state A< low%setu1! i? A< i? G *! en/ if! when low%hol/ <F &)$% 8 A< =*=! "6%$8 A< tx%byte27 /ownto 89! if2i? < *?9 then tx%state A< fortyus! i? A< 8! else tx%state A< low%hol/! i? A< i? G *! en/ if! when fortyus <F &)$% 8 A< =8=! if2i? < ?8889 then tx%state A< /one! i? A< 8! else tx%state A< fortyus! i? A< i? G *! en/ if! when /one <F &)$% 8 A< =8=! if2tx%init < =*=9 then tx%state A< high%setu1! i? A< 8! else tx%state A< /one! i? A< 8! en/ if! en/ case! en/ if! en/ 1rocess transmit!

--s1ecifie/ by /atasheet 1ower%on%initialiEe5 1rocess2cl34 reset4 init%init9 --1ower on initialiEation se;uence begin if2reset<=*=9 then init%state A< i/le! init%/one A< =8=! elsif2cl3<=*= an/ cl3=event9 then case init%state is when i/le <F init%/one A< =8=! if2init%init < =*=9 then init%state A< fifteenms! i A< 8! else init%state A< i/le! i A< i G *! en/ if! when fifteenms <F init%/one A< =8=! if2i < :>88889 then init%state A< one! i A< 8! else init%state A< fifteenms! i A< i G *! en/ if! when one <F "6%$* A< B88**B! &)$% * A< =*=! init%/one A< =8=! if2i < **9 then init%stateA<two! i A< 8! else init%stateA<one! i A< i G *! en/ if! when two <F &)$% * A< =8=! init%/one A< =8=! if2i < ?8>8889 then init%stateA<three! i A< 8! else init%stateA<two! i A< i G *! en/ if! when three <F "6%$* A< B88**B! &)$% * A< =*=! init%/one A< =8=! if2i < **9 then init%stateA<four! i A< 8! else init%stateA<three! i A< i G *! en/ if! when four <F &)$% * A< =8=! init%/one A< =8=! if2i < >8889 then init%stateA<five!

else

i A< 8! init%stateA<four! i A< i G *!

en/ if! en/ 1rocess 1ower%on%initialiEe! en/ behavior!

en/ if! when five <F "6%$* A< B88**B! &)$% * A< =*=! init%/one A< =8=! if2i < **9 then init%stateA<six! i A< 8! else init%stateA<five! i A< i G *! en/ if! when six <F &)$% * A< =8=! init%/one A< =8=! if2i < ?8889 then init%stateA<seven! i A< 8! else init%stateA<six! i A< i G *! en/ if! when seven <F "6%$* A< B88*8B! &)$% * A< =*=! init%/one A< =8=! if2i < **9 then init%stateA<eight! i A< 8! else init%stateA<seven! i A< i G *! en/ if! when eight <F &)$% * A< =8=! init%/one A< =8=! if2i < ?8889 then init%stateA</one! i A< 8! else init%stateA<eight! i A< i G *! en/ if! when /one <F init%state A< /one! init%/one A< =*=! en/ case!

This tutorial was written by 4ahul Kora! 4ahul is an en ineerin student in the depart%ent o# Electrical and Co%puter En ineerin at the 2ni$ersity o# Aew =e,ico! Be can be reached at r$oraLun%!edu! This tutorial was updated and edited by Brian Mu#elt! Brian is an en ineerin student in the depart%ent o# Electrical and Co%puter En ineerin at the 2ni$ersity o# Aew =e,ico!