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--NAME: D VINOD --DATE: 12/2/14 --CLASS:3RD ECE-G --PROGRAM 7 --UP/DOWN COUNTER WITHOUT FLIPLOP library ieee; use ieee.std_logic_1164.all; use ieee.std_logic_arith.all; use ieee.std_logic_unsigned.all; entity updowncounter is port(clk,rst,control:in std_logic; ! x:inout std_logic_vector(3 downto 0)); end updowncounter;

architecture count1 of updowncounter is begin process (clk,rst,x,control) begin ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! end if rst='1' x<="0000"; then

elsif control='1' and rising_edge(clk) then ! ! ! ! x<=x+'1'; ! elsif control='0' and rising_edge{clk) then ! ! ! x<=x-'1'; !

if;

end process; end count1;