Gio trnh th nghim vi iu khin ng dng

BI 1 : XUT NHP I/O PORT:

I.MC CH TH NGHIM :
Kin thc sinh vin cn t c sau khi thc tp:
Lit k cc thanh ghi lin quan n vic x l tnh hiu s cc chn vi iu khin .
Khi to cc chn ca vi iu khin l ng ra , vo s .
Gii thch c cng dng ca hm _delay(n) , cch dng hm delay chng di cho
nt nhn.
Lp trnh iu khin led theo yu cu .
Gii thch u khuyt im ca ngt .
II.DNG C TH NGHIM :
Kt th nghim + cp USB.
My tnh .
Ngun 12V/1A.
III.C S L THUYT :
1.Thanh ghi qui nh tn hiu x l chn vi iu khin l tn hiu s hay tn hiu tng
t:

Nhng chn c k hiu ANX l nhng chn va c th x l tn hiu s va c th x l tn

hiu tng t . Do khi lm vic vi nhng chn ny ta cn ch n hai thanh ghi :

Gio trnh th nghim vi iu khin ng dng

Hai thanh ghi ny c tng cng 14bit t ANS0 n ANS13 , s quy nh tn hiu lm vic
ca cc chn t AN0 n AN13 l tn hiu s hay tn hiu analog .
ANSX=0 : Cho php chn ANX x l tn hiu s .
ANSX=1 : Cho php chn ANX x l tn hiu tng t .
Trong : X= 0 13
2.Chc nng ca thanh ghi TRIS :
Trong cc chn x l tn hiu s , hot ng ca chn c th l ng ra (lm cho led chp tt,
kch transistor , iu khin hot ng IC....) , hay c th l ng vo (c trng thi nt nhn , c
encoder , c tn hiu t cm bin s....). Nh vy , khi to cho cc chn l ng ra hay ng
vo tn hiu s , chng ta cn ch n thanh ghi TRISX (X=A,B,C,D,E):

TRISXY=0:Quy nh bit th Y ca PORTX l ng ra (0 = Output)

TRISXY=1:Quy nh bit th Y ca PORTX l ng vo (1=Input)
(Trong :X=A,B,C,D,E ; Y=0-7)
Ch : PORTE ch c 4 bit thp : TRISE0, TRISE1, TRISE2 ,TRISE3.
3. Chc nng ca thanh ghi PORT :
Trong trng hp x l tn hiu s v l ng ra , th c th l ng ra mc cao (in p chn
l VH) , hay ng ra l mc thp (in p l VL) s do bit RXY ca thanh ghi PORTX quy
nh .

RXY=0 : Quy nh chn th Y ca PORTX l mc thp(VL).

RXY=1: Quy nh chn th Y ca PORTX l mc cao(VH).
(Trong : X=A,B,C,D,E ; Y=0-7)

Gio trnh th nghim vi iu khin ng dng

Tm li ta c bng tm tt sau :
ANSX
TRISXY
0
0
0
0
0
1
0
1
1
x

RXY
0
1
0
1
x

Kt qu
Ng ra mc thp(0V)
Ng ra mc cao(+5V)
Tng tr cao (R=)
Ng vo , tc ng mc thp
X l tn hiu tng t .

4.Nhng thanh ghi c bit ch c ring PORTB:

4.1.Thanh ghi h tr in tr treo bn trong:
trnh trng thi th ni (tn hiu in p chn khng r rng) khi khi to PORTB l
ng vo s , PIC16f887 tch hp thm vo cho PORTB cc in tr ko ln (pull-up), s dng
cc in tr ny ta ch n thanh ghi :

WPUBy=0: Khng cho php in tr ko ln chn th y ca PORTB.

WPUBy=1: Cho php in tr ko ln chn th y ca PORTB.
Khi s dng in tr ko ln ngoi vic s dng thanh ghi WPUB cn phi khi to bit:
RBPU
in tr ko ln nn khi to khi PORTB l ng vo s , cc PORT khc khng c h
tr in tr treo trong , do nu c nhu cu s dng ta c th mc thm in tr bn
ngoi.
4.2.Ngt ngoi chn RB0:
x l c cc tn hiu tc ng tc thi , chn RB0 c h tr x l ngt (interrupt ) k
hiu chn l INT, khi to ngt ngoi chn RB0 ta cn ch n cc bit sau :
INTE(Interrupt enable ) : bit cho php ngt PORTB

Gio trnh th nghim vi iu khin ng dng

INTF(Interrupt flag): c ngt , bit ny t ng bng 1 khi c s kin ngt (cnh ln hay
cnh xung) xy ra chn RB0, ta phi xa bt ny trong khi lp trnh .
GIE(Global interrupt ) : bit cho php ngt ton cc.
INTEDG (interrupt edge select bit ) : Bit chn cnh tc ng sinh ra s kin ngt
PORTB.
INTEDG=1: Xy ra ngt khi c tn hiu cnh ln PORTB
INTEDG=0: Xy ra ngt khi c tn hiu cnh xung PORTB

Cc bc khi to ngt INT:

Bc 1 : Khi to chn RB0 l ng vo s , in tr treo.
Bc 2 : Khi to ngt INT
INTE=1;
//Cho php ngt hot ng
INTF=0;
//Xa c ngt th ngt ln tip theo mi c th xy ra.
INTEDG=....;
//Chn cnh tc ng ngt.
GIE=1;
//Cho php ngt ton cc .
4.3.Ngt on-change PORTB:
Ngoi ngt INT ch c duy nht chn RB0 , th c PORTB (t RB0 n RB7) cn h tr
ngt on-change , ngt on-change xy ra khi tn hiu logic chn ca PORTB thay i trng thi
logic.
S ngt on-change:

Gio trnh th nghim vi iu khin ng dng

Cc thanh ghi v cc bit iu khin ngt on-change :

IOCBX=0 : Khng cho php ngt on-change chn th X ca PORTB.

IOCBX=1 : Cho php ngt on-change chn th X ca PORTB.
Cc bit khi to khc :
RBIF : C ngt on-change PORTB, cn phi xa bt ny trong lp trnh.
RBIE : Bit cho php ngt on-change ca PORTB.
GIE : Bit cho php ngt ton cc.
Cc bc khi to ngt on-change :
Bc 1 : Khi to PORTB l ng vo s , c in tr treo.
Bc 2 : Khi to ngt on-change PORTB
IOCB=0xFF;
//khi to ton b PORTB ngt on-change(c th khi to
mt hay c PORTB).
RBIE=1;
//Cho php ngt xy ra .
RBIF=0;
//Xa c ngt
GIE=1;
//Cho php ngt ton cc
Ch : i vi ngt on-change , vic xa c ngt (RBIF=0) khng cho ln ngt
tip theo c thc hin , m cn phi thm iu kin c hoc vit vo thanh ghi PORTB.
V d :
unsigned char bien ;
bien = PORTB ;
//c thanh ghi PORTB.
hoc PORTB =5 ;
//vit vo thanh ghi PORTB
4.4.Bng so snh gia ngt INT v ngt on-change :
Ngt chn INT(RB0)
Ch c duy nht chn RB0
xy ra ngt th tn hiu logic l cnh ln
hoc cnh xung.
Cc bit khi to :
INTE , INTF , INTEDG , GIE
cho ln ngt tip theo c thc hin th
cn phi xa c ngt INTF.

Ngt on-change
Xy ra trn c PORTB
Ch cn tn hiu logic thay i l xy ra ngt,
khng phn bit cnh ln hay cnh xung.
Cc bit khi to :
IOCBx , RBIE , RBIF , GIE
cho ln ngt tip theo c thc hin th
cn phi xa c ngt INTF v c ( hoc ghi)
vo thanh ghi PORTB.

Gio trnh th nghim vi iu khin ng dng

IV.BI TP THC HNH :
Bi 1: Vit chng trnh iu khin led theo yu cu sau :
Nhn (khng gi) nt nhn ni vi chn RB0 : led RE1 v led RE2 chp tt xen k trong
thi gian T=0.2(s).
Nhn (khng gi) nt nhn ni vi chn RB1 : led RE1 v led RE2 cng chp tt trong
thi gian T=0.5(s).
Nhn (khng gi) nt nhn ni vi chn RB2 : led RE1 sng v led RE2 tt trong thi
gian T=0.1(s) , led RE1 tat v LED2 sng T=0.7(s).
S dng nh thi bng hm _delay(n) ; thch anh Fosc = 4 Mhz.
S phn cng :

*Bc 1: To mt project mi vi tn 01_01_MSSV .

*Bc 2: Nhp chng trnh sau vo my tnh v hon thnh cc du .
#include<htc.h>
__CONFIG(INTIO&WDTDIS&PWRTEN&MCLREN&UNPROTECT&DUNPROTECT&BO
RDIS&IESODIS&LVPDIS&FCMDIS);
void delay(unsigned char counter);
//Khai bo chng trnh con hm delay
void RB_0( );void RB_1( );void RB_2( );
char so_lan_nhan;
void main( )
//Chng trnh chnh
{
//Disable analog cc chn RE1,RE2,RB0,RB1,RB2
ANS6=ANS7=ANS12=ANS10=ANS8= .;
//Khi to cc chn RE1,RE2 l ng ra , ban u led tt
TRISE1=TRISE2= .; RE1=RE2= . ;
//Khi to chn RB0,RB1,RB2 l ng vo, tc ng mc thp
TRISB0=TRISB1=TRISB2= .; RB0=RB1=RB2= .;
//Khi to in tr ko ln cc chn RB0,RB1,RB2
WPUB0=WPUB1=WPUB2= .; RBPU= . ;
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Gio trnh th nghim vi iu khin ng dng

//(-------------1------------)
while(1)
{
//Xc nh trng thi cc nt nhn
if(!RB0)so_lan_nhan=0;
else if(!RB1)so_lan_nhan=1;
else if(!RB2)so_lan_nhan=2;
//Hin th led
if (so_lan_nhan==0)
else if(so_lan_nhan==1)
else if(so_lan_nhan==2)

//(------------2-----------)
//(------------3-----------)
//(------------4-----------)
RB_0( );//Chy chng trnh con RB_0
RB_1( ); //Chy chng trnh con RB_1
RB_2( ); //Chy chng trnh con RB_2

}
}
//(-------------5-----------)
void delay(unsigned char counter) //Chng trnh con lm tng thi gian delay
{
unsigned char value=0;
while(counter>value)
{
value++;
_delay(100000);
//tr 1ms vi Fosc = 4MHz
}
}
void RB_0( )
{
RE1^=1;RE2= .RE1;
// led RE1 v led RE2 chp tt xen k
delay(2);
//delay 0.2s
}
void RB_1( )
{
RE1^=1;RE2 .RE1;
// led RE1 v led RE2 cng chp tt
delay(5);
//delay 0.5s
}
void RB_2( )
{
RE1= .;RE2= .;
// led RE1 sng v led RE2 tt
delay(1);
//delay 0.1s
RE1= .;RE2= .;
// led RE1 tat v LED2 sng
delay(7);
//delay 0.7s
}
*Bc 3: Bin dch chng trnh, np xung kt th nghim , tin hnh nhn cc nt nhn v
quan st 2 led.
*Bc 4: Thay i chng trnh nh sau:
Thm vo dng : (-------------1------------) on code sau:
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Gio trnh th nghim vi iu khin ng dng

IOCB0=IOCB1=IOCB2=1;
//Cho php ngt onchange chn B0,B1,B2
RBIE=1;
//Cho php ngt onchange ton PORTB
RBIF=0;
//Reset c ngt
PEIE=1;
//Cho php ngt ngoi vi
GIE=1;
//Cho php ngt ton cc
Xa cc dng 2,3,4.
Thm vo dng: (-------------5-----------) on code sau:
void interrupt isr( )
//Chng trnh con x l tt c ngt
{
if(RBIE&&RBIF)
//Chng trnh con cho ngt on-change
{
if(!RB0)
so_lan_nhan=0;
//nhn RB0
else if(!RB1) so_lan_nhan=1;
//nhn RB1
else if(!RB2) so_lan_nhan=2;
//nhn RB2
RBIF=0;
//Reset c ngt
}
}
*Bc 5: Bin dch chng trnh, np xung kt th nghim , tin hnh nhn cc nt nhn v
quan st 2 led.
*Bc 6: Nhn xt s khc nhau v tc p ng khi nhn nt nhn trc v sau khi sa code,
gii thch, rt ra kt lun:
-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------

Gio trnh th nghim vi iu khin ng dng

Bi 2 : Vit chng trnh iu khin led theo yu cu sau :
Nhn (khng gi) nt nhn ni vi chn RB0 ln (2n+1) : 8 led dch t tri qua phi.
Nhn (khng gi) nt nhn ni vi chn RB0 ln (2n) : 8 led dch t phi qua tri.
n = 0,1,3,4,5k
S dng nh thi bng hm _delay(n) ; thch anh Fosc = 4 Mhz.
S phn cng :

*Bc 1: To mt project mi vi tn 01_02_MSSV.

*Bc 2 : Nhp chng trnh sau vo my tnh v hon thnh vo du .
#include<htc.h>
__CONFIG(INTIO&WDTDIS&PWRTEN&MCLREN&UNPROTECT&DUNPROTECT&BO
RDIS&IESODIS&LVPDIS&FCMDIS);
char count=0;
void display(char number);
void main( )
{
char i=0;
//Disable analog cc chn RE1,RE2,RB0,RB3,RB4,RB5
ANS6=ANS7=ANS9=ANS11=ANS12=ANS13=.;
//Khi to RE1 , RE2 l ng ra , trng thi ban u led tt
TRISE1=TRISE2=.; RE1=RE2=.;
//Khi to RB0 l ng vo , tc ng mc thp
TRISB0=.; RB0=.;
//Cho php in tr ko ln chn RB0;
IOCB0=.; RBPU=.;
//Khi to ngt ngoi chn RB0 .
INTEDG=..........; //cnh ln
INTE =.;
INTF =.;
GIE =.;
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Gio trnh th nghim vi iu khin ng dng

while(1)
{
while(count==1)
//Chng trnh dch t tri qua phi.
{
i++;
if(i>=9)
i=1;
display(i);
_delay(100000);
}
while(count==2)
//Chng trnh dch t phi qua tri.
{
i--;
if(i<=0)
i=9;
display(i);
_delay(100000);
}
}
}
void interrupt isr( )
{
if(INTE&&INTF)
{
count++;
if(count.3)count=1;
INTF=.;
}
}
void display(char number) //Chng trnh con hin th led khi nhn vo mt s tng ng
{
RE1=RE2=.;
//Tt led RE1, RE2
TRISB |= 0b00111000;
RB3=RB4=RB5=.;
//Khi to chn RB3 , RB4 , RB5 l tng tr cao
switch(number)
{
case 1:
RE2=.; //RE2 sng
break;
case 2:
RE1=.; //RE1 sng
break;
case 3:
//led D6 sng
TRISB3=0;RB3=.;TRISB4=.;RB4=0;
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Gio trnh th nghim vi iu khin ng dng

break;
case 4:
break;
case 5:
break;
case 6:
break;
case 7:
break;
case 8:

//led D7 sng
TRISB3=.;RB3=0;TRISB4=.;RB4=1;
//led D8 sng
TRISB4=.;RB4=1;TRISB5=.;RB5=0;
//led D9 sng
TRISB4=.;RB4=0;TRISB5=.;RB5=1;
//led D10 sng
TRISB5=0;RB5=.;TRISB3=0;RB3=.;
//led D11 sng
TRISB5=0;RB5=.;TRISB3=0;RB3=.;

break;
}
}
*Bc 3: Bin dch chng trnh , np xung kt th nghim , tin hnh nhn nt nhn v quan
st cc led.
*Bc 4:Tr li cu hi :
ra cc phng php x l khi ng vo tc ng mc cao :
----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------V.BI TP T GII :
Bi 3.Vit chng trnh c gi tr phm v hin th gi tr ln led 7 on theo s phn
cng sau : (To mt project mi vi tn 01_03_MSSV)
(Phm t 0-9 , led hin th s tng ng , phm * th hin ch S, phm # th hin ch
H, lc khng nhn th hin ch U ).

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Gio trnh th nghim vi iu khin ng dng

Bi 4.Vit chng trnh theo yu cu sau , 16 led kt ni vi PORTD, PORTC (tc ng
mc cao) , 8 nt nhn kt ni vi PORTB : (To mt project mi vi tn 01_04_MSSV)
Nhn nt RB0 :16 led dch t phi qua tri.
Nhn nt RB1:16 led dch t tri qua phi.
Nhn nt RB2:16 led chp tt xen k.
Nhn nt RB3:16 led sng dn t tri qua phi .
Nhn nt RB4 :16 led sng dn t phi qua tri.
Nhn nt RB5:16 led sng dn t trong ra ngoi.
Nhn nt RB6:16 led sng dn t ngoi vo trong .
Nhn nt RB7:16 led cng chp tt.
Bi 5.Vit chng trnh m s ln nhn nt (RB0) v hin th t 000 n 255 ln 3 led by
on theo s phn cng sau : (To mt project mi vi tn 01_05_MSSV)

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Gio trnh th nghim vi iu khin ng dng

BI 2 : ADC MODULE
I.MC CH TH NGHIM :
Kin thc sinh vin cn t c sau khi thc tp :
Gii thch c khi nim v chc nng ca in p tham chiu.
Thit lp c in p tham chiu trong v ngoi cho khi ADC ca vi iu khin.
Lit k c cc bc thit lp o ADC cho mt hoc nhiu knh.
Thit lp c cng thc tnh ADC 8-bit , v ADC 10-bit ch nh dng canh tri v
canh phi .
Tn ton c gi tr tn hiu tng t thu c thng qua gi tr ca thanh ghi ADRESL,
ADRESH.
Thit lp v khi to c mt project c lin quan LCD , thay i file LCD.h ph hp
vi cu hnh phn cng bn ngoi .
II.DNG C TH NGHIM:
Kt th nghim + cp USB.
Vt (vn bin tr).
My tnh .
Ngun 12V/1A.
III.C S L THUYT :
1.Tn hiu tng t v tnh hiu s :

Tn hiu tng t

Tn hiu s
th tn hiu analog v tn hiu s
Trong thc t , tn hiu cn x l xung quanh ta l tn hiu tng t , v d : vn tc , nhit
, m , cng nh sng , p sut v.v...Tuy nhin vi x l ch c th lm vic vi tn hiu
s (ch c hai trng thi 0 v 1) do x l c cc tn hiu tng t , th vi iu khin cn
phi c b chuyn i tn hiu tng t sang s ADC (Analog to Digital Converter).

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Gio trnh th nghim vi iu khin ng dng

B ADC c tch hp bn trong vi iu khin

Tn hiu s
255

VREF-

VREF+

Tn hiu tng t

th ca b chuyn i ADC 8-bit:

phn gii (Resolution) : T s trn ta thy b chuyn i ADC c phn gii 8bit th s c 255 gi tr dng cha cc gi tr in p t VREF- n VREF+ , nh vy nu b
chuyn i ADC c phn gii n bit th s c 2n-1 gi tr . phn gii c lin quan mt thit
n cht lng chuyn i ADC , phn gii cng cao th kt qu chuyn i cng chnh xc .
in p tham chiu (Reference voltage) : in p tham chiu l in p dng so snh
vi tn hiu in p analog cn o , VREF+ nn chn bng vi mc in p ln nht cn o ,
khng nn chn nh hn hay ln hn .
2.ADC ca vi iu khin PIC16F887:
2.1Cc chn vi iu khin c kh nng x l tn hiu analog :

Cc chn c th lm vic vi tn hiu analog

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Gio trnh th nghim vi iu khin ng dng

S khi b ADC trong vi iu khin PIC16F887.

2.2Cc thanh ghi iu khin hot ng chuyn i ca b ADC :

ADON : Bit cho php b ADC hot ng

ADON=1 : Cho php b ADC hot ng
ADON=0 : Khng cho php hot ng
GO/: Bit ch trng thi chuyn i , bit ny t ng bng 0 khi b ADC chuyn i xong,
mun cho ln chuyn i tip theo c thc hin , cn phi t bit ny ln bng 1 trong lp
trnh .

15

Gio trnh th nghim vi iu khin ng dng

CHS<3:0>: Dng chn knh cn chuyn i .

ADCS<1:0> : Bit la chn tn s chuyn i .

VCFG1 : Dng chn in p tham chiu VREF- .

VCFG1=1: khi VREF-= in p chn s 4 (VREF-)
VCFG1=0: khi VREF- = Vss
VCFG0 : Dng chn in p tham chiu VREF+.
VCFG0=1: khi VREF+= in p chn s 5 (VREF+)
VCFG0=0: khi VREF+= VDD

ADFM : bit dng la chn kiu nh dng kt qu chuyn i :

Sau khi chuyn i hon tt , kt qu s c lu theo mt trong hai kiu

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Gio trnh th nghim vi iu khin ng dng

Hai thanh ghi ADRESH v ADRESL l hai thanh ghi dng cha kt qu khi b ADC
chuyn i hon tt , b ADC ca vi iu khin PIC16F887 c phn gii 10-bit do cn hai
byte cha kt qu , tuy nhin kt qu c th lu theo hai kiu : canh tri (ADFM=0) v canh
phi (ADFM=1).
i vi nh dng kt qu bn tri : ADFM=0 th ta c th c kt qu nh sau :
phn gii 10-bit :
Kt qu = ADRESH*4+ADRESL >> 6
(1)
phn gii 8-bit :
Kt qu = ADRESH
(2)
i vi nh dng kt qu bn phi : ADFM=1 th ta c th c kt qu nh sau :
phn gii 10-bit :
Kt qu = ADRESH*256+ADRESL
(3)
phn gii 8-bit :
Kt qu = ADRESH*64+ADRESL>>2
(4)
R rng ta thy biu thc (1) v (4) gy kh khn trong vic lp trnh v thi gian cn tn
ton lu hn , do ta rt ra kt lun:
Khi cn c ADC 8-bit th cn nh dng kt qu bn tri(ADFM=0)
Khi cn c ADC 10-bit th cn nh dng kt qu bn phi(ADFM=1)
2.3 Ngt ADC :
Khi ADC cng c th to ra s kin ngt (ngt trong) , s kin ngt xy ra khi b ADC
chuyn i hon tt .

S khi to ngt ADC

ADIE : Bit cho php b chuyn i ADC.
ADIF : C ngt ADC , bit ny t ng bng 1 khi b ADC chuyn i hon tt , cho
ln chuyn i tip theo c thc hin , chng ta cn phi xa bt ny bng phm mm lp
trnh.
PEIE : Bit cho php ngt ngoi vi .
GIE : Bit cho php ngt ton cc.
2.4 Cc bc khi to b chuyn i ADC:
Bc 1:Chn tn hiu x l
Khi to chn l ng vo:
TRISxy=1;
//x:A,B,E , y:0-7
Khi to chn x l tn hiu tng t : ANSx=1;
//Trong : x=0-13
Bc 2:Khi to khi ADC
Chn tn s chuyn i
ADCS1=.........;ADCS0=........;
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Gio trnh th nghim vi iu khin ng dng

Chn in p tham chiu

VCFG1=......; VCFG0=.........;
Chn knh cn o .
CHS3=....;CHS2=.....;CHS1=.....;CHS0=.....;
Chn nh dng kt qu
ADFM=......;
Cho php module ADC
ADON=1;
Bc 3: Khi to ngt ADC(c th b qua bc ny nu khng s dng ngt):
Xa c ngt:
ADIF=0;
Cho php ngt ADC:
ADIE=1;
Cho php ngt ngoi vi:
PEIE=1;
Cho php ngt ton cc :
GIE=1;
Bc 4:Ch thi gian khi to.
Bc 5:Bt u cho php chuyn i .
GODONE=1;
Bc 6:Ch cho b ADC chuyn i hon tt bng cc du hiu sau :
Bit GODONE t ng xung 0 , ta c th s dng code sau thc hin vic ch:
while(GODONE) ;
Ngt ADC xy ra.(Nu bc 3 c thc hin)
Bc 7 : c kt qu
ADC 8-bit :
kt qu = ADRESH
//canh tri
ADC 10-bit :
kt qu = ADRESH*64+ADRESL //canh phi
Bc 8:Xa c ngt cho ln chuyn i tip theo (Nu bc 3 c thc hin)
ADIF=0;

3.Lm vic vi LCD 16x2 :

vi iu khin PIC16F887 giao tip c vi LCD i hi trong code chng trnh cn
phi c nhng dng lnh ph hp lcd , thng nhng yu cu lnh ny c quy nh bi chip
x l bn trong lcd , do chng trnh ngn gn v n gin , ta thng xy dng file lcd.c
v lcd.h l nhng file cha sn nhng chng trnh con c nhng cu lnh giao tip vi lcd , ta
ch cn khai bo hai file lcd.c v lcd.h th c th d dng giao tip vi lcd bng nhng cu lnh
bn trong file .Cc bc khi to v lm vic vi LCD :
Bc 1 : Kim tra phn cng , phi ph hp vi nhng khai bo trong file LCD.h
Bc 2 : Copy 2 file LCD.c v LCD.h vo th mc ca project ang lp trnh .
Bc 3 : Add hai file trn vo Header file v Source file .

18

Gio trnh th nghim vi iu khin ng dng

Bc 4 : Ti thiu cn phi khai bo 2 dng lnh sau (t en) trong chng trnh khi c
lin quan ti file LCD:
#include<htc.h>
__CONFIG(.);
#include lcd.h
void main( )
{
lcd_init( );

//khai bo th vin hm lcd.h

//lnh khi to lcd

//Cc lnh c s dng cho lcd c th tham kho trong file LCD.c v d :
lcd_gotoxy(x,y); //Lnh ny dng di chuyn con tr i n cc v tr trn mn
hnh lcd, trong x l gi tr ca hng ngang (x=[0,1]) , y l gi tr ca hng
dc(y=[0,15]).
lcd_putc(k t cn in); //Lnh ny dng in k t ln mn hnh lcd ti v tr con
tr .
lcd_puts(chui cn in); //Lnh ny dng in chui ln mn hnh lcd ti v tr con
tr , ch chui cn in nm gia hai du v k t cn in nm gia hai du
.
lcd_putc(\f) ; //xa mn hnh lcd , sau con tr tr v v tr (0,0).

while(1)
{
}
}
*Ngoi ra cn c th s dng hm printf nhng cn khai bo nh sau :
#include<htc.h>
#include<stdio.h> //khai bo th vin cho hm printf
__CONFIG(.);
#include lcd.h
//khai bo th vin hm lcd.h
void main( )
{
lcd_init( );
//lnh khi to lcd
char bien2=6;
float bien1=19.66667 ;
unsigned int bien3=60000;
printf(In ra man hinh );
printf(In ra \n man hinh );
printf(In gia tri :%d , bien2);
printf(In gia tri :%3d , bien2);
printf(In gia tri :%03d , bien2);
printf(In gia tri :%5.3d , bien2);

//Hin th chui In ra man hinh

//Hin th chui In ra
man hinh
//Hin th chui In gia tri :6
//Hin th chui In gia tri : 6
//Hin th chui In gia tri :006
//Hin th chui In gia tri : 006

printf(In gia tri :%f , bien1);

printf(In gia tri :%3.2f , bien1);

//Hin th chui In gia tri :19.6666

//Hin th chui In gia tri : 19.67

printf(In gia tri :%d , bien3);

//Hin th chui In gia tri :-5536

19

printf(In gia tri :%3d , bien2);

Gio trnh th nghim vi iu khin ng dng
printf(In gia tri :%03d , bien2);
printf(In gia tri :%5.3d , bien2);

//Hin th chui In gia tri : 6

//Hin th chui In gia tri :006
//Hin th chui In gia tri : 006

printf(In gia tri :%f , bien1);

printf(In gia tri :%3.2f , bien1);

//Hin th chui In gia tri :19.6666

//Hin th chui In gia tri : 19.67

printf(In gia tri :%d , bien3);

printf(In gia tri :%ld , bien3);

//Hin th chui In gia tri :-5536

//Hin th chui In gia tri :60000

while(1);
}
void putch(char ki_tu)
{
lcd_putc(ki_tu);
}
Ch : Khi vit chng trnh c lin quan lcd m phn cng thc t khng c lcd hay
lcd kt ni khng ng vi th vin lcd.h th con tr chng trnh s dng ngay lnh lcd_init();
IV.BI TP THC HNH :
Bi 1: Vit chng trnh c ADC 8 bit chn AN3 v thc hin theo yu cu sau :
Hin th gi tr thanh ghi ANSEL hng (0,0) ca LCD.
Hin th gi tr in p chn AN3 hng (0,1) ca LCD.
nh thi bng hm delay , in p tham chiu trong , Fosc = 4Mhz , giao tip LCD
bng th vin LCD.h
S phn cng :

20

Gio trnh th nghim vi iu khin ng dng

*Bc 1 : To mt project mi vi tn 02_01_ MSSV
*Bc 2: Nhp chng trnh sau vo my tnh v hon thnh vo du .
#include<htc.h>
#include<stdio.h> //th vin cho hm printf( );
__CONFIG(INTIO&WDTDIS&PWRTEN&MCLREN&UNPROTECT&DUNPROTECT&BO
RDIS&IESODIS&LVPDIS&FCMDIS);
#include"lcd.h";
void main( )
{
lcd_init( );
//Khi to LCD
ANS3=.;
//Enable analog chn RA3
TRISA3=.;RA3=.;
//Khi to RA3 l ng vo
VCFG0=VCFG1=.;
//Chn in p tham chiu trong
CHS3=CHS2=.;CHS1=CHS0=.; //Chn knh o l AN3
ADFM=.;
//nh dng d liu canh tri , bi v ch s dng ADC 8 bit
ADCS0=ADCS1=.;
//Tn s chuyn i
ADON=.;
//Enable module ADC hot ng
while(1)
{
GODONE=.;
//Cho php ADC bt u chuyn i
while(GODONE) .
//Ch b ADC chuyn i xong
lcd_gotoxy(0,0);
printf("\fADRESH :%d",ADRESH);
lcd_gotoxy(0,1);
printf("Dien ap :%3.2f",ADRESH*5.0/255.0);
_delay(100000);
}
}
void putch(char c)
//H tr cho hm printf in ra LCD
{
lcd_putc(c);
}
*Bc 3: Bin dch chng trnh , np xung kt th nghim , jum header 3 v tr POT , dng
vt vn bin tr v quan st kt qu trn LCD.
*Bc 4:Thit lp cng thc quan h gia in p v gi tr thanh ghi ADRESH .
---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------

21

Gio trnh th nghim vi iu khin ng dng

Bi 2: Vit chng trnh c ADC 10 bit hai knh AN3 , AN12 v thc hin theo yu cu
sau :
Hin th gi tr in p ti chn AN3 hng (0,0) ca LCD.
Hin th gi tr in p ti chn AN12 hng (0,1) ca LCD.
nh thi bng hm delay , in p tham chiu trong , Fosc = 4Mhz, giao tip LCD
bng th vin LCD.h
S phn cng :

*Bc 1 : To mt project mi vi tn 02_02_ MSSV

*Bc 2: Nhp chng trnh sau vo my tnh v hon thnh vo du .
#include<htc.h>
#include<stdio.h>
__CONFIG(INTIO&WDTDIS&PWRTEN&MCLREN&UNPROTECT&DUNPROTECT&BO
RDIS&IESODIS&LVPDIS&FCMDIS);
#include "lcd.h"
void main( )
{
unsigned char old_ADRESH;
lcd_init( );
ANS3= .;ANS12= .;
//Enable analog chn RA3 v chn RB0
TRISA3= .;RA3= .;TRISB0=1;RB0=1; //Khi to RA3,RB0 l ng vo
VCFG0=VCFG1= .;
//Chn in p tham chiu trong
ADFM= .;
//nh dng kt qu bn phi (ADC 10 bit)
ADCS0=ADCS1=0;
//Tn s chuyn i
ADON= .;
//Enable module ADC
while(1)
{
CHS3=CHS2= .;CHS1=CHS0= .; //Chn knh AN3
22

Gio trnh th nghim vi iu khin ng dng

GODONE= .;
while(GODONE);
lcd_gotoxy(0,0);
printf("\fAN3 la:%d",ADRESH*256+ADRESL);
_delay(100000);
CHS3=CHS2= .;CHS1=CHS0= .; //chon kenh AN12
GODONE= .;
while(GODONE);
lcd_gotoxy(0,1);
printf("AN12 la:%d",ADRESH*256+ADRESL);
_delay(100000);
}
}
void putch(char c)
{
lcd_putc(c);
}
*Bc 3 : Jum header 3 v tr BUTTON
Nhn gi nt nhn SW2 v quan st kt qu trn LCD v tr (0,0) tc l kt qu o knh
AN3.
Nhn gi nt nhn SW3v quan st kt qu trn LCD v tr (0,0) tc l kt qu o knh
AN3.
Nhn gi c hai nt SW2,SW3 v quan st kt qu trn LCD v tr (0,0) tc l kt qu
o knh AN3.
Da vo mch in nguyn l, chng minh c 3 kt qu quan st c .
-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------

23

Gio trnh th nghim vi iu khin ng dng

*Bc 4 : Quan st kt qu hng (0,1) ca lcd , tc l kt qu o c knh AN12 khi c
nhn nt RB0 v khi khng c nhn nt v nhn xt :
------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------V.BI TP T GII :
Bi 3 : Vit chng trnh s dng khi ADC ca vi iu khin PIC16F887 o nhit ca
5 phng v hin th ln LCD, s dng LM35 theo yu cu sau :
(To mt project mi vi tn 02_03_ MSSV)
Khi nhn (khng gi )RB0 th LCD hin th gi tr gi tr nhit ca phng 1.
Khi nhn (khng gi )RB1th LCD hin th gi tr gi tr nhit ca phng 2.
Khi nhn (khng gi )RB2 th LCD hin th gi tr gi tr nhit ca phng 3.
Khi nhn (khng gi )RB3 th LCD hin th gi tr gi tr nhit ca phng 4.
Khi nhn (khng gi )RB4 th LCD hin th gi tr gi tr nhit ca phng 5.

Tn s hot ng Fosc = 4MHz , phn cng LCD c kt ni vi PORTD ca Vi iu khin

theo s chn ca th vin lcd.h , in p tham chiu bn trong , s dng ADC 8 bit .

24

Gio trnh th nghim vi iu khin ng dng

Bi 4:Vit chng trnh c gi tr in p chn AN0 v hin th ln LCD 16x2 theo yu

cu sau : (To mt project mi vi tn 02_04_ MSSV)
Hin th gi tr hai thanh ghi ADRESH v ADRESL v tr (0,0) ca LCD.
Hin th gi tr in p o c v tr (0,1) ca LCD .

Tn s hot ng Fosc = 4MHz , phn cng LCD c kt ni vi PORTD ca Vi iu

khin theo s chn ca th vin lcd.h , in p tham chiu bn ngoi , s dng ADC 10 bit .
Bi 5 : Vit chng trnh dng vi iu khin PIC16F887 thc hin chc nng nh mt
my tnh theo s phn cng sau : (To mt project mi vi tn 02_05_ MSSV)

25

Gio trnh th nghim vi iu khin ng dng

BI 3 :TIMER
I.MC CH TH NGHIM :
Kin thc sinh vin cn t c sau khi thc tp :
Gii thch c nguyn tc hot ng ca timer0 , timer1 , timer 2.
Thit lp cng thc tnh nh thi ca tng timer .
Lit k cc bit iu khin tng hot ng ca timer .
Phn bit s khc nhau v ging nhau gia hai ch timer v counter trong timer 0 ,
timer1.
Gii thch chc nng ca b chia trong timer .
Khi to ngt cho timer0 , timer 1 , timer 2 .
II.DNG C TH NGHIM:
Kt th nghim + cp USB.
My tnh .
Ngun 12V/1A.
Oscilloscope
III.C S L THUYT :
Timer l khi hot ng c lp vi CPU , do nu trong lp trnh chng ta s dng timer
th s lm gim i thi gian x l , gip vi iu khin hot ng nhanh hn . ng dng ch yu
ca timer l nh thi trong khong thi gian ngn , m s lng xung clock bn ngoi cho cc
ng dng nh : m sn phm , c s xung encoder v.v... PIC16f887 c tch hp 3 timer : timer
0(8-bit), timer 1(16-bit), timer 2(8-bit).

S khi cc timer trong PIC16F887

26

Gio trnh th nghim vi iu khin ng dng

1.Nguyn tc hot ng ca timer :
Nguyn tc hot ng chung ca timer l tng gi tr ca thanh ghi m ln khi nhn c
mt xung clock ( qua b chia ) . Khi thanh ghi m n gi tr ln nht , nu c xung clock
tip tc tc ng th timer s xy ra s kin trn timer (overflow) , s kin ny c th xy ra
ngt.
V d : Thanh ghi TMR0 l thanh ghi 8-bit cha gi tr m ca timer 0 :
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 1
0 0 0 0 0 0 1 0
0 0 0 0 0 0 1 1
Trn timer

TMR0=0
+
TMR0=1
+
TMR0=2
+
TMR0=3
+

:
1 1 1 1 1 1 1 1

TMR0=255
+

Qu trnh hot ng ca mt timer

2.Timer 0 :
Timer 0 c nhng c tnh sau :
Thanh ghi 8-bit timer/counter (TMR0).
B chia prescaler 8-bit (dng chung vi Watchdog timer )
Hot ng vi xung clock bn trong hoc bn ngoi .
Hot ng vi vic la chn cnh ca xung clock bn ngoi .
Ngt trn timer .

S khi timer 0 v watchdog timer trong PIC16F887

27

Gio trnh th nghim vi iu khin ng dng

2.1 Cc thanh ghi khi to timer 0 :

T0CS : bit la chn ch hot ng ca timer 0

T0CS=1: Timer 0 hot ng vi ch m counter .(clock c cp t chn T0CKI)
T0CS=0:Timer 1 hot ng vi ch nh thi timer.(clock c cp t thch anh hot
ng ca vi iu khin ).
T0SE : Bit chn cnh tc ng khi timer hot ng vi ch m counter.
T0SE=1: Thanh ghi TMR0 tng khi c s kin cnh xung chn T0CKI.
T0SE=0: Thanh ghi TMR0 tng khi c s kin cnh ln chn T0CKI.
PSA : Dng la chn b chia Prescaler thuc v ca timer 0 hay ca Watchdog.
PSA=1:B chia prescaler thuc v Watchdog .
PSA=0: B chia prescaler thuc v Timer 0.
PS<2:0> : Chn t l cho b chia prescaler

2.2 Cng thc nh thi timer 0:

TMR0

255
Over flow

Thi gian hot ng ca timer0 (8-bit)

28

Gio trnh th nghim vi iu khin ng dng

T s trn ta thy thi gian nh thi ca timer 0 :
T=(255-TMR0)* =

(2550) 4

Do thay i thi gian nh thi T ta c th thay i mt trong cc thng s sau :

TMR0 : Gi tr ban u ca thanh ghi TMR0 cho timer 0 bt u m. Khi trong
lp trnh khng gn gi tr u cho thanh ghi TMR0 th timer bt u m l 0.
(TMR0=0).
Prescaler : T l b chia ca timer 0.
Fosc : Tn s hot ng ca vi iu khin.(t khi thay i thng s ny)
Ch : Trong qu trnh tnh ton tm ra thi gian nh thi T hp l , thng c sai s
xy ra , do chng ta chn Prescaler v TMR0 sao cho sai s t nht .
2.3 Ngt trong timer0 :
Timer 0 cng c th xy ra ngt , ngt timer 0 xy ra khi timer 0 trn (tc l thanh ghi
TMR0=255 ri sau tr v gi tr ban u).
S ngt timer 0 :

S ngt timer 0
T0IE : Bit cho php xy ra ngt timer 0 , ngt timer 0 xy ra th bit ny phi bng 1.
T0IF : C ngt timer 0 , khi ngt xy ra bt ny t ng bng 1 , chng ta cn phi xa (=0) bt
ny trong lp trnh .
GIE : GIE bit cho php ngt ton cc , ngt timer 0 xy ra th bit ny phi bng 1.
2.4 : Cc bc khi to timer 0:
2.4.1 : Khi to timer 0 hot ng vi ch nh thi timer:
T0CS=0;
//Clock cp cho timer 0 l Fosc (tn s hot ng ca vi iu khin)
PSA=0 ;
//B chia prescaler c s dng cho timer 0 .
PS<2:0>=....; //Chn t l b chia . Nu PSA=1 th c th b qua dng ny .
//Khi to ngt nu c s dng
INTE=1;
INTF=0;
GIE=1;
29

Gio trnh th nghim vi iu khin ng dng

2.4.2:Khi to timer 0 hot ng vi ch m counter :
//Khi to chn T0CKI l ng vo .
TRISA4=1;
RA4=1;
T0CS=1; // Clock cp cho timer 0 t chn T0CKI
PSA=0 ;
//B chia prescaler c s dng cho timer 0 .
PS<2:0>=....; //Chn t l b chia .Nu PSA=1th c th b qua dng ny .
//Khi to ngt nu c s dng
INTE=1;
INTF=0;
GIE=1;
3.Timer 1 :
Timer 1 c hai thanh ghi cha gi tr m , do c th m ln n 65535(2^16-1) mi xy
s kin trn timer , timer 1 thch hp nht cho vic m xung encoder tc cao , cng ging
nh timer 0 , timer 1 cng hot ng vi hai ch : ch nh thi v ch m counter.

S khi timer 1

30

Gio trnh th nghim vi iu khin ng dng

3.1 Cng thc nh thi timer 1 :

T=

[65535 (TMR 1H256+TMR 1L)]Prescaler 4

Fosc

Trong :
T thi gian nh thi timer 1
TMR1L , TMR1H : thanh ghi cha gi tr m ca timer 1
FOSC : tn s hot ng ca vi iu khin
Prescaler : t l b chia .
3.2Thanh ghi iu khin timer1 :

TMR1ON : Bit cho php timer1 hot ng

1: Cho php timer 1 (iu kin cn cho timer 1 hot ng , cha )
0: Timer 1 ngng hot ng .
TMR1CS :Bit la chn clock cho timer 1
1:Clock t bn ngoi (t chn T1CKI)
0:Clock bn trong (FOSC/4)
: Bit iu khin la chn ng b clock vo t bn ngoi ca timer 1
Nu TMR1CS =1:
1:Clock vo t bn ngoi khng c ng b
0:Clock vo t bn ngoi c ng b
Nu TMR1CS = 0:
Khng cn quan tm bit ny , timer 1 s dng clock bn trong .
T1OSCEN : Bit iu khin cho php dao ng LP
1: Dao ng LP c cho php cho clock timer 1 .
0: Tt dao ng LP .
T1CKPS<1:0> : Bit la chn t l b chia Prescale
11 = 1:8
10 = 1:4
01 = 1:2
00 = 1:1
TMR1GE : Bit cho php cng timer 1
Nu TMR1ON=0 : bit ny khng cn quan tm
Nu TMR1ON=1 :
1 : S m ln ca timer1 s c iu khin bi cng Timer 1
0 : Timer 1 c th m ln m khng cn quan tm n trng thi ca cng timer 1 .
T1GINV : Bit o cng timer1
31

Gio trnh th nghim vi iu khin ng dng

1 : Cng timer1 tc ng mc cao (Timer1 hot ng khi cng mc cao ).
0 : Cng timer 1 tc ng mc thp (Timer 1 hot ng khi cng mc thp).
3.3 Timer1 on :
Khng ging vi timer 0 , chng ta cn khi to mt s bit th timer 1 mi c th hot ng
c . T s trn ta c th thy vic bt/tt timer 1c hai dng :
Cho php timer 1 hot ng m khng cn tc ng t bn ngoi :
TMR1ON=1;
TMR1GE=0;
Cho php timer 1 hot ng khi c tn hiu logic chn T1G :
//Cho php in tr treo .
//Khi to chn T1G l ng vo .
ANS13=0;
TRISB5=1;
RB5=1;
TMR1ON=1;
TMR1GE=1;
T1GINV=.....;
//Ty theo mc logic chn T1G l mc cao hay thp.
T1GSS=1;
3.4 Ngt trong timer 1 :
Timer 1 cng c th to ra s kin ngt khi xy ra trn timer , cc bit khi to ngt ca
timer 1 :
TMR1IF : C ngt , bit ny t ng bng 1 khi c s kin trn timer .
TMR1IE :Bit cho php ngt trn timer .
PEIE
:Bit cho php ngt ngoi vi .
GIE
:Bit cho php ngt ton cc .

S ngt timer 1
3.5 Khi to timer 1 hot ng vi ch m counter :
//Khi to chn T1CKI l ng vo s
T1OSCEN=1;
TMR1CS=1;
T1CKPS1=..;
T1CKPS0=..;
T1SYNC=0;
//Cho php timer 1 on
//Khi to ngt nu c

32

Gio trnh th nghim vi iu khin ng dng

Ngoi ra , timer 1 cn c th hot ng vi ch timer s dng thch anh ngoi , c
lp vi tn s hat ng ca vi iu khin , thch anh ngoi ta c th kt ni vi hai chn :
OSC1 v OSC2 v khi to tng t nh trn .
3.6 Khi to timer 1 hot ng vi ch nh thi timer :
TMR1CS=0;
T1CKPS1=..;
T1CKPS0=..;
T1SYNC=1;
//Cho php timer 1 on
//Khi to ngt nu c
4.Timer 2 :
Khc vi timer 0 v timer 1 , timer 2 ch c th hot ng ch nh thi timer , tuy nhin
timer 2 c hai b chia v mt gi tr t do thi gian nh thi c th linh hot hn , v t sai
s trong tn ton .

S khi timer 2
Nguyn tc hot ng timer 2 :
Khi c xung clock tn s Fosc/4 qua b chia Prescaler i vo thanh ghi TMR2 , lm thanh
ghi TMR2 tng ln , khi thanh ghi TMR2 bng gi tr thanh ghi t PR2 th s c mt xung clock
i qua b chia Postscaler , ng thi thanh ghi TMR2 tr v v tr ban u , nu t l b chia
Postscaler c chn 1:1 th s xy ra s kin ngt timer 2 .
4.1 Cng thc tn nh thi timer 2 :

T=
Trong
T
PR2
TMR2
Prescaler
Postscaler
Fosc

PR 2TMR 2 Postscaler Prescaler 4

Fosc

:Thi gian nh thi timer 2

:gi tr thanh ghi t
: gi tr bt u m ca thanh ghi TMR0
: T l b chia prescaler
: T l b chia Postscaler
:Tn s hot ng ca vi iu khin .
33

Gio trnh th nghim vi iu khin ng dng

4.2. Thanh ghi iu khin timer 2 :

T2CKPS<1:0>: Bit la chn t l b chia Prescaler

00 : 1:1
01 : 1:4
1x : 1:16
TMR2ON : Bit cho php timer 2 hot ng
0:Khng cho php timer2 hot ng
1:Cho php timer 2 hot ng
TOUTPS<3:0>: Bit la chn t l b chia Postscaler

4.2.Khi to timer 2 hot ng vi ch nh thi timer :

//Tn ton la chn t l b chia Prescaler , Postscaler
//Chn t l b chia Prescaler
T2CKPS1=..; T2CKPS0=;
//Chn t l b chia Postscaler
TOUTPS3=.; TOUTPS2=.;
TOUTPS1=.; TOUTPS0=.;
//t gi tr ln nht cho gi tr thanh ghi m TMR2
PR2=;
//Cho php timer 2 hat ng
TMR2ON=1;
//Khi to ngt timer 2 nu c s dng :
TMR2IE=1;
TMR2IF=0;
PEIE=1;
GIE=1;
34

Gio trnh th nghim vi iu khin ng dng

IV.BI TP THC HNH :

Bi 1: Vit chng trnh c s ln nhn nt ti chn T0CKI(RA4) v hin th kt qu ln
LCD:
S phn cng :

*Bc 1: To mt project mi vi tn 03_01_ MSSV

*Bc 2: Nhp chng trnh sau vo my tnh v hon thnh vo du .
#include<htc.h>
#include<stdio.h>
__CONFIG(INTIO&WDTDIS&PWRTEN&MCLREN&UNPROTECT&DUNPROTECT&BO
RDIS&IESODIS&LVPDIS&FCMDIS);
#include "lcd.h";
void main( )
{
lcd_init( );
TRISA4=.; RA4=.; //Khi to chn T0CKI l ng vo
T0CS =.;
//Chn clock cp cho Timer0 l t chn T0CKI
T0SE =.;
//Chn cnh tc ng l cnh xung
PSA =.;
//Xung clock khng qua b chia (-------------1------------)
//(-------------2------------)
while(1)
{
lcd_gotoxy(0,0);
printf("\fSo lan nhan nut la:\r\n %d",TMR0);
_delay(100000);
}
}
void putch(char c)
{
lcd_putc(c);
}
*Bc 3:Nhn nt nhn kt ni vi chn T0CKI v quan st kt qu trn LCD.
35

Gio trnh th nghim vi iu khin ng dng

*Bc 4:Xa dng (-------------1------------)
*Bc 5:Thm vo dng (-------------2------------) on code sau :
PSA=0;
//Chn b chia thuc v timer
PS2=0;
//Chn t l chia
PS1=1;
PS0=1;
*Bc 6: Quan st kt qu khi nhn nt nhn.
*Bc 7: So snh hai kt qu trc v sau khi sa code , gii thch ? Nu chc nng ca b chia
trong timer 0:
--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------Bi 2: Vit chng trnh chp tt led RE1 , nh thi bng timer 0,tn s Fosc/4:
*Bc 1: To mt project mi vi tn 03_02_ MSSV
*Bc 2: Nhp chng trnh sau vo my tnh v hon thnh vo du .
#include<htc.h>
__CONFIG(INTIO&WDTDIS&PWRTEN&MCLREN&UNPROTECT&DUNPROTECT&BO
RDIS&IESODIS&LVPDIS&FCMDIS);
void insothuc(unsigned char old_ADRESH) ;
void main( )
{
ANS6=.;TRISE1=.;
//Khi to chn RE1 l digital output
T0CS=.;
//Chn xung clock cp cho timer 0 l t Fosc/4
PSA=.;
//Xung clock s i qua b chia
PS2=.; PS1=.; PS0=.; //T l b chia l 128
//Khi to ngt cho timer 0
T0IE=.;
//Cho php ngt timer 0
T0IF=.;
//Reset c ngt
GIE=.;
//Cho php ngt ton cc
while(1);
//Lp v tn
}
void interrupt isr()
{
if(T0IE&T0IF)
//Chng trnh con ngt cho timer0
{
RE1^=1;
//Chp tt led
TMR0=0;
//Khi to gi tr m ban u cho timer0(-------1--------)
36

Gio trnh th nghim vi iu khin ng dng

T0IF=0;

//Reset c ngt.

}
}
*Bc 3 : Bin dch chng trnh , np xung kt th nghim , quan st trng thi ca led .
*Bc 4:Tng gi tr TMR0 dng (-------1--------) t thp n cao(0-255) , bin dch chng
trnh v np xung kit th nghim , n lc mt khng cn nhn thy led RE1 chp tt , tnh
tn s ng vi gi tr thanh ghi TMR0 va tm c .
----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*Bc 5 : S dng oscillocope o tn s va tm c v so snh vi kt qu tnh ton , nhn
xt.
----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------Bi 3:Vit chng trnh hin th ng h ln LCD , s dng timer 1 nh thi , thch anh
ngoi 32.768KHz.
*Bc 1 : To mt project mi vi tn 03_03_ MSSV
*Bc 2: Nhp chng trnh sau vo my tnh v hon thnh vo du .
#include<htc.h>
#include<stdio.h>
__CONFIG(INTIO&WDTDIS&PWRTEN&MCLREN&UNPROTECT&DUNPROTECT&BO
RDIS&IESODIS&LVPDIS&FCMDIS);void insothuc(unsigned char old_ADRESH);
#include "lcd.h"
unsigned char hh,mm,ss;
//Khai bo bin cha gi , pht , giy
void main()
{
lcd_init();
//Khi to cc chn ng vo thch anh 32.768KHz
TRISC0=TRISC1=1;RC0=RC1=0;
T1OSCEN= .;
//Cho php timer 1 hot ng clock ngoi
TMR1CS=
.;
//Clock cp cho timer 1 l clock ngoi
T1CKPS1=T1CKPS0=.;
//T l b chia 1:8(-------1--------)
T1SYNC=
.;
//Qua khi ng b
//Cho php timer hot ng khng cn tc ng bn ngoi
37

Gio trnh th nghim vi iu khin ng dng

TMR1ON=
TMR1GE=
TMR1IE=
TMR1IF=
PEIE=
GIE=
while(1);

.;
.;
.;
.;
.;
.;

//Khi to ngt timer1

//Reset c ngt timer 1
//Cho php ngt ngoi vi
//Cho php ngt ton cc
//Lp v tn

}
void putch(char c)
//Chng trnh con cho hm printf( )
{
lcd_putc(c);
}
void interrupt isr( )
{
if(TMR1IE&&TMR1IF)
//Ngt trn timer 1
{
ss++;
if(ss==60)
{
ss=0;
mm++;
if(mm==60)
{
mm=0;
hh++;
}
}
lcd_gotoxy(0,0);
printf("\fBay Gio La :\r\n %02d:%02d:%02d",hh,mm,ss);
TMR1H=239;
//Khi to gi tr m ban u cho timer1 (-------2--------)
TMR1L=255;
//
(-------3--------)
TMR1IF=0;
}
}
*Bc 3 : Np chng trnh xung kit th nghim , jumper J1(XTAL).Quan st lcd , v so snh
kt qu vi ng h thc, nhn xt :
----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------Da vo cng thc nh thi ca timer 1, chng minh nhng thng s cc dng (1),(2),(3):
38

Gio trnh th nghim vi iu khin ng dng

----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------Bi 4: Vit chng trnh s dng timer 2 iu khin led RE1 chp tt vi chu k T=0.1s ,
s dng thch anh ngoi 20MHz.
*Bc 1 : To mt project mi vi tn 03_04_ MSSV
*Bc 2: Nhp chng trnh sau vo my tnh :
#include<htc.h>
#include<stdio.h>
__CONFIG(HS&WDTDIS&PWRTEN&MCLREN&UNPROTECT&DUNPROTECT&BORDI
S&IESODIS&LVPDIS&FCMDIS);
void main()
{
ANS6=.;TRISE1=.;RE1=.;
//Khi to chn RE1 l ng ra s
T2CKPS1=.;T2CKPS0=.;
//chn t l b chia prescaler 1:1
//Chn t l b chia postscaler 1:2
(-------1--------)
TOUTPS3=0;TOUTPS2=0;TOUTPS1=.;TOUTPS0=.;
PR2=.;
//Gi tr thanh ghi PR2
(-------2--------)
TMR2=.;
//Gi tr bt u m ca timer 2 (-------3--------)
//Cho php timer 2 hot ng
TMR2ON=.;
//Khi to ngt timer 2
TMR2IE=.;
TMR2IF=.;
PEIE=.;
GIE=.;
while(1)
{
}
}
void interrupt isr()
{
if(TMR2IE&&TMR2IF)
{
RE1^=1;
TMR2IF=.;
TMR2=. ;

//Cho php ngt trn timer 2

//Reset c ngt
//Cho php ngt ngoi vi
//Cho php ngt ton cc

//Xa c ngt Timer2

//Khi to gi tr bt u m timer2(-------4------)
39

Gio trnh th nghim vi iu khin ng dng

}
}
*Bc 3 : Tnh ton cc thng s dng (1),(2),(3),(4)
--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*Bc 4 : Hon thnh vo du .............v bin dch chng trnh , np xung kt th nghim ,
quan st led .
V.BI TP T GII :
Bi 5 : Vit chng trnh hin th tc ng c ln lcd theo s phn cng sau :
(To mt project mi vi tn 03_05_ MSSV)

40

Gio trnh th nghim vi iu khin ng dng

BI 4: KHI CCP
(CAPTURE-COMPARE-PWM)
I.MC CH TH NGHIM :
Kin thc sinh vin cn t c sau khi thc tp:
Gii thch nguyn tc hot ng v khi to ch Capture.
Gii thch nguyn tc hot ng v khi to ch Compare .
Gii thch nguyn tc hot ng v khi to ch PWM.
Phn bit s khc nhau v ging nhau gia hai khi CCP1 v CCP2.
Thit lp c tn s PWM v iu chnh rng xung PWM theo yu cu.
II.DNG C TH NGHIM:
Kt th nghim + cp USB.
ng c DC12V.
Oscillocope.
My tnh .
Ngun 12V/1A.
III.C S L THUYT :
Cc chn c s dng cho khi CCP:

Cc chn c s dng trong khi CCP

s dng khi CCP chng ta cn phi bit khi to v s dng thnh tho timer 0,1,2 bi
v mt mnh khi CCP khng th hot ng c mt ng dng m phi s dng kt hp vi
mt trong 3 timer , c th l :

41

Gio trnh th nghim vi iu khin ng dng

1.Thanh ghi khi to khi CCP1:
Khi CCP1 cn tch hp thm 4 chn mang k hiu : P1A, P1B, P1C, P1D h tr cho vic
iu khin cu H.

Cc chn CCP1 h tr iu khin cu H

P1M<1:0> : Bit khi to ng ra PWM

Nu khi CCP1 c khi to ch capture hoc compare th chn c k hiu P1A l
chn hot ng ch capture hoc compare , cn cc chn c k hiu P1B, P1C, P1D l cc
chn khng lin quan n khi CCP1 , chng ta c th gn cho chng chc nng I/O thng
thng .
Nu khi CCP1 c khi to ch PWM th 2 bit P1M<1:0> c 4 trng thi iu khin
cu H nh sau :
00:Ng ra n , P1A to xung , P1B , P1C, P1D hot ng vi chc nng I/O.
01:Ch Full Bridge thun , P1D to xung , P1A tc ng , P1B , P1C khng tc ng
10:Ch hafl Bridge , P1A ,P1B to xung , P1C, P1D hot ng vi chc nng I/O.
11: Ch Full Bridge nghch , P1B to xung , P1C tc ng , P1A , P1D khng tc
ng .
DC1B<1:0> : Hai bit mang trng s nh nht trong ch hot ng PWM10bit . ch
Capture v Compare th khng cn quan tm n hai bit ny.
CCP1M<3:0> : Bit la chn ch hat ng khi CCP1
0000: Capture/Compare/PWM off(reset khi CCP1)
0001: Khng s dng
0010: Ch Compare , o ng ra khi c s kin Compare (bit CCP1IF = 1).
0011: Khng s dng
0100: Ch Capture , s kin Capture xy ra khi chn CCP1 c 1 xung cnh xung .
0101: Ch Capture , s kin Capture xy ra khi chn CCP1 c 1 xung cnh ln .
0110: Ch Capture , s kin Capture xy ra khi chn CCP1 c 4 xung cnh ln .
0111: Ch Capture , s kin Capture xy ra khi chn CCP1 c 16 xung cnh ln .
42

Gio trnh th nghim vi iu khin ng dng

1000: Ch Compare , ng ra bng 1 khi c s kin Compare (bit CCP1IF = 1).
1001: Ch Compare , ng ra bng 0 khi c s kin Compare (bit CCP1IF = 1).
1010: Ch Compare , to ra s kin ngt ni (bit CCP1IF = 1 , chn CCP1 khng s
dng ).
1011: Ch Compare, to ra s kin trigger (CCP1IF =1; CCP1 resets TMR1 or
TMR2)
1100: Ch PWM , P1A , P1C tc ng mc cao , P1B , P1D tc ng mc cao
1101: Ch PWM , P1A , P1C tc ng mc cao , P1B , P1D tc ng mc thp
1110: Ch PWM , P1A , P1C tc ng mc thp , P1B , P1D tc ng mc cao
1111: Ch PWM , P1A , P1C tc ng mc thp , P1B , P1D tc ng mc thp
2.Thanh ghi khi to khi CCP2:
Khc vi khi CCP1 , khi CCP2 khng c chc nng h tr iu khin cu H , trong ch
PWM , khi CCP2 ch c chc nng to ra xung PWM 10 bt chn CCP2.

DC2B<1:0> : Hai bit mang trng s nh nht trong ch hot ng PWM-10bit , ch

Capture v Compare th khng cn quan tm n hai bit ny.
CCP2M<3:0> : Bit lc chn ch ha ng khi CCP1
0000: Capture/Compare/PWM off(reset khi CCP1)
0001:Khng s dng
0010:Ch Compare , o ng ra khi c s kin Compare (bit CCP1IF = 1).
0011:Khng s dng
0100:Ch Capture , s kin Capture xy ra khi chn CCP1 c 1 xung cnh xung .
0101:Ch Capture , s kin Capture xy ra khi chn CCP1 c 1 xung cnh ln .
0110:Ch Capture , s kin Capture xy ra khi chn CCP1 c 4 xung cnh ln .
0111:Ch Capture , s kin Capture xy ra khi chn CCP1 c 16 xung cnh ln .
1000: Ch Compare , ng ra bng 1 khi c s kin Compare (bit CCP1IF = 1).
1001: Ch Compare , ng ra bng 0 khi c s kin Compare (bit CCP1IF = 1).
1010: Ch Compare , to ra s kin ngt ni (bit CCP1IF = 1 , chn CCP1 khng s
dng ).
1011: Ch Compare, to ra s kin trigger (CCP1IF =1; CCP1 resets TMR1 or
TMR2)
1100:Ch PWM , P1A , P1C tc ng mc cao , P1B , P1D tc ng mc cao
1101:Ch PWM , P1A , P1C tc ng mc cao , P1B , P1D tc ng mc thp
1110:Ch PWM , P1A , P1C tc ng mc thp , P1B , P1D tc ng mc cao
1111:Ch PWM , P1A , P1C tc ng mc thp , P1B , P1D tc ng mc thp

43

Gio trnh th nghim vi iu khin ng dng

3.Capture :

S khi ch capture
3.1 Nguyn tc hot ng ca ch capture :
Khi c s kin (cnh ln , cnh xung , 4 cnh ln hoc 16 cnh ln ) chn CCPx (c th l
CCP1 hay CCP2 ty vo ta s dng khi CCP1 hay CCP2) th gi tr thanh ghi m ca timer 1
l TMR1H v TMR1L s c cp nht qua hai thanh ghi CCPRxH v CCPRxL ca khi CCPx.
ng thi c th xy ra ngt ni bng vic cho php c ngt CCPRxIF = 1 .(x=0,1)
3.2 Cc bc khi to ch capture :
Khi to chn CCPx l ng vo : TRISCx=1;RCx=1;
Khi to timer 1 hot ng .
Khi to khi CCPx hot ng vi ch capture :
CCPxCON = ......;
//Chn ch capture .
CCPRxH=CCPRxL=0;
//reset hai thanh ghi ca khi CCPx.
Khi to ngt (nu c s dng):
CCPxIE=1;
//Cho php ngt CCP
CCPxIF=0;
//Reset c ngt
PEIE=1;
//Cho php ngt ngoi vi
GIE=1;
//Cho php ngt ton cc .

44

Gio trnh th nghim vi iu khin ng dng

4.Compare :

S khi ch compare
4.1Nguyn tt hot ng ca ch compare :
Khi hai thanh ghi m TMR1H v TMR1L ca timer 1 m n gi tr ca hai thanh ghi
CCPRxH v CCPRxL th s xy ra mt trong cc s kin sau :
o trng thi ng ra ca chn CCPx.
To tn hiu chn CCPx ln bng 1 .
Xa tn hiu chn CCPx xung bng 0 .
To ra ngt .(CCPxIF =1 , chn CCPx khng s dng )
To ra s kin trigger .(CCP1IF=1,CCP1 reset timer 1 hoc timer 2,CCP2IF=1,CCP2
reset timer 1 v ADC bt u chuyn i nu khi ADC c cho php chuyn i , chn
CCP2 khng s dng ).
4.2Cc bc khi to ch compare:
Khi to chn CCPx l ng ra : TRISCx=0;
Khi to timer 1 hot ng .
Khi to khi CCPx hot ng vi ch compare :
CCPxCON = ......;
//Chn ch compare .
CCPRxH=....;CCPRxL=.....; //Chn gi tr t .
Khi to ngt (nu c s dng) :
CCPxIE=1;
//Cho php ngt CCP
CCPxIF=0;
//Reset c ngt
PEIE=1;
//Cho php ngt ngoi vi
GIE=1;
//Cho php ngt ton cc .
5.PWM(Pulse-Width Modulated) :
Ni n PWM th ta phi ni n hai c tnh c bn l : tn s (do timer 2 to ra ) v
rng xung (do thanh ghi CCPRxL:CCPxCON<5:4> to ra ).
S to xung PWM l s kt hp ca khi CCPx vi timer 2 :
45

Gio trnh th nghim vi iu khin ng dng

S iu ch PWM
5.1Nguyn tt hot ng ca ch PWM :
Thanh ghi m ca timer 2 l TMR2 m n gi tr thanh ghi CCPRxL:CCPxCON<5:4>
ca khi CCPx th trng thi logic chn CCPx b o , khi gi tr ca thanh ghi TMR2 n gi tr
PR2 th hon tt mt chu k to xung PWM .
Ch : T s trn ta thy to xung PWM th gi tr CCPRxL::CCPxCON<5:4>
phi nh hn hoc bng gi tr thanh ghi PR2 , v mun thay i rng xung ta ch cn thay
i gi tr thanh ghi CCPRxL::CCPxCON<5:4> trong lp trnh .
Cng thc tnh chu k PWM :

Cng thc tnh rng xung PWM :

6.Cc bc khi to chc nng PWM:

Bc 1 : Cho php chn PWM l ng vo:
TRISCx=1;
//x= 1 , 2
Bc 2 : Khi to tn s PWM bng vic nh gi tr thanh ghi PR2 ca timer 2:
PR2=....;
//Tnh ton c t cng thc chu k PWM
Bc 3: t khi CCP hot ng ch PWM
CCPxCON=0bxxxx11xx;
//x=0;1
Bc 4 : t rng xung ca khi PWM bng vic t gi tr cho thanh ghi CCPRxL
v 2 bit DCxB<1:0> ca thanh ghi CCPxCON
CCPRxL=.....; //C th iu chnh gi tr ny trong khi vi iu khin hot ng
thay i rng xung khi cn thit .
DCxB1=.....; //Nu s dng PWM 8 bit th c th b qua dng ny
46

Gio trnh th nghim vi iu khin ng dng

DCxB0=.....; //Nu s dng PWM 8 bit th c th b qua dng ny
Bc 5 : Khi to v cho php timer 2 hot ng :
TMR2IF=0;
//Xa c ngt TMR2IF ca thanh ghi PIR1
//Chn t l b chia ca timer 2 :
T2CKPS1=.....;
//Chn t l b chia Prescaler
T2CKPS0=.....;
TOUTPS3=....;
//Chon t l b chia Postscaler
TOUTPS2=....;
TOUTPS1=....;
TOUTPS0=....;
//Cho php timer 2 hot ng
TMR2ON=1;
Bc 6 : Cho php ng ta PWM sau khi chu k PWM mi c bt u :
while(TMR2IF);
// Ch cho n khi timer 2 trn (bit TMR2IF ca thanh ghi
PIR1 c bc ln 1)
TRISCx = 0 ;
//x = 1 , 2 .
IV.BI TP THC HNH :
Bi 1:Vit chng trnh to xung PWM c tn s 20KHz hai chn : CCP1(RC2) v
CCP2(RC1) vi rng xung CCP1 l 50% xung , CCP2 l 80% xung .
S phn cng :

*Bc 1 :To mt project mi vi tn 04_01_ MSSV

*Bc 2: Nhp chng trnh sau vo my tnh v hon thnh vo du .
#include <htc.h>
__CONFIG(INTIO&WDTDIS&PWRTEN&MCLREN&UNPROTECT&DUNPROTECT&BO
RDIS&IESODIS&LVPDIS&FCMDIS);
void main( )
{
//Khi to tn s 20Khz PWM (timer 2)
PR2=.;
//Chn tn s 20KHz
T2CKPS1=T2CKPS0=.;
//B chia Prescales 1:1
TOUTPS3=TOUTPS2=TOUTPS1=TOUTPS0=.;//B chia Postcales1:1
//Khi to khi CCP1
TRISC2=.;
//Disable ng ra ca chn CCP1
CCP1CON=0b00001100;
//(-------1--------)
CCPR1L=.;
//To PWM 50% xung chn CCP1(-------2--------)
TMR1IF=.;
//Xa c ngt ca khi CCP1
// Khi to khi CCP2
47

Gio trnh th nghim vi iu khin ng dng

TRISC1=.;
// Disable ng ra ca chn CCP1
CCP2CON=0b00001100;
// Khi to module CCP2 hot ng ch PWM
CCPR2L=.;
//To xung PWM 80% chn CCP2(-------3--------)
TMR2IF=.;
// Xa c ngt ca khi CCP2
//Cho php timer 2 hot ng bt u to xung PWM
TMR2ON
=.;
//Cho php timer 2 hot ng
TRISC2
=.;
//Cho php chn CCP1 l ng ra
TRISC1
=.;
//Cho php chn CCP2 l ng ra .
while(1);
}
*Bc 3 : Np chng trnh vo kit th nghim , dng oscillocope o tn hiu hai xung chn
CCP1 v CCP2 .
*Bc 4 : Thay i dng (-------1--------) thnh on code sau :
CCP1CON=0b00001111;
Bin dch chng trnh np vo kt , dng oscillocope o ng ra PWM chn CCP1 , quan
st xung c to ra , nhn xt s khc nhau gia xung trc v sau khi thay i code , v gii
thch s khc nhau .
--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*Bc 5 : Tnh ton gi tr thanh ghi CCPR1L cho CCP1 to ra PWM 90% .
Tnh ton gi tr thanh ghi CCPR2L cho CCP2 to ra PWM 10% .
Thay vo (-------2--------) v (-------3--------) , bin dch chng trnh , np xung kt
th nghim , s dng oscillocope o ng ra xung v hon thnh vo bng sau :
PWM 90%
PWM 10%
CCPR1L
CCPR2L

48

Gio trnh th nghim vi iu khin ng dng

Bi 2 : Vit chng trnh iu khin tc ng c s dng IC chuyn dng L298 theo

yu cu sau : (To mt project mi vi tn 04_02_ MSSV)
Nhn RB0 tc ng c tng dn (mi ln nhn tng 10% rng xung).
Nhn RB1 tc ng c gim dn(mi ln nhn gim 10% rng xung).
Nhn RB2 ng c o chiu quay .
Vi PWM tn s 10Khz , phn gii 8 bit , thch anh ni 4MHz.
Phn cng :

*Bc 1 :To mt project mi vi tn 04_02_ MSSV

*Bc 2 :Nhp chng trnh sau vo my tnh v hon thnh vo du .
#include <htc.h>
__CONFIG(INTIO&WDTDIS&PWRTEN&MCLREN&UNPROTECT&DUNPROTECT&BO
RDIS&IESODIS&LVPDIS&FCMDIS);
void main( )
{
ANSEL=ANSELH=.; //Tt chc nng x l analog tt c cc chn
TRISB=.; //Khi to PORTB l ng vo
PORTB=.;
WPUB=.; //Cho php in tr treo tt c PORTB
RBPU=.;
IOCB =.; //Cho php ngt on-change c PORTB
RBIE =.; //Enable ngt on-change PORTB
RBIF =.; //Xa c ngt on-change
GIE =.; //Cho php ngt ton cc
TRISE0=.;
RE0 =.;

//Khi to chn RE0 l ng ra , mc cao

T2CON = 0x04; //Timer 2 , prescaler 1:1 , postcaler 1:1 , TMR2ON=1

PR2
=.;
//tn s 10KHz
CCP1CON=0x0C; //Khi to ch PWM cho module CCP1
49

Gio trnh th nghim vi iu khin ng dng

CCP2CON=0x0C; //Khi to ch PWM cho module CCCP2
CCPR1L=0;
CCPR2L=0;
TRISC2=1;
TRISC1=1;
while(1)
{
}
}
void interrupt isr()
{
if(RBIE&&RBIF)
{
if(!RB0)
{
CCPR1L+=10;
CCPR2L+=10;
TMR2ON=1;
}
if(!RB1)
{
CCPR1L-=10;
CCPR2L-=10;
TMR2ON=1;
}
if(!RB2)
{
TRISC2^=1;
TRISC1=~TRISC2;
TMR2ON=1;
}
RBIF=0;
}
}
*Bc 3 : Jum header CCP2 (J2) , bin dch chng trnh np xung kt th nghim , kt ni
ng c v cp ngun cho L298 , tin hnh nhn nt v quan st kt qu .
V.BI TP T GII :
*Bi 3 : Vit chng trnh s dng chc nng capture o tn s chn CCP1(RC2) v hin th
gi tr ln LCD theo s phn cng sau (To mt project mi vi tn 04_03_ MSSV):

50

Gio trnh th nghim vi iu khin ng dng

*Bi 4 : Vit chng trnh to xung PWM 8 bit chn CCP2(RC1) vi tn s 15 KHz theo
yu cu sau (To mt project mi vi tn 04_04_ MSSV)::
Nhn nt nhn (khng gi ) chn RB0 ln 1 : rng xung 15% .
Nhn nt nhn (khng gi ) chn RB0 ln 2 : rng xung 30% .
Nhn nt nhn (khng gi ) chn RB0 ln 3 : rng xung 45% .
Nhn nt nhn (khng gi ) chn RB0 ln 4 : rng xung 60% .
Nhn nt nhn (khng gi ) chn RB0 ln 5 : rng xung 75% .
Nhn nt nhn (khng gi ) chn RB0 ln 6 : rng xung 90% .
Nhn nt nhn (khng gi ) chn RB0 ln 7 : Tr li trng thi nhn ln 1 .

*Bi 5 :Vit chng trnh theo yu cu sau (To mt project mi vi tn 04_05_ MSSV):
Nhn RB0 ng c quay cng chiu kim ng h , PWM 10Khz , rng xung 90%.
Nhn RB1 ng c quay ngc chiu kim ng h , PWM 15Khz , rng xung 70%.

51

Gio trnh th nghim vi iu khin ng dng

52

Gio trnh th nghim vi iu khin ng dng

BI 5:GIAO TIP NI TIP BT NG B (USART)

I.MC CH TH NGHIM :
Kin thc sinh vin cn t c sau khi thc tp:
Gii thch nguyn l truyn nhn tn hiu UART.
Trnh by c khi nim : baund , start bit , stop bit , frame truyn , parity .
Lit k c cc thanh ghi lin quan truyn nhn UART.
Thit lp cc bit cho vi iu khin truyn nhn d liu qua chun UART.
II.DNG C TH NGHIM:
Kt th nghim + cp USB.
ng c DC12V.
Oscillocope.
My tnh .
Ngun 12V/1A.
III.C S L THUYT :
Cc chn lin quan n chc nng giao tip ni tip :

Cc chn truyn nhn UART

1.Khi nim v giao tip ni tip bt ng b :
Cc thut ng trong truyn nhn ni tip bt ng b :
Thut ng USART trong ting anh gi l :Universal synchronous v Asynchronous serial
Receiver and Transmitter , ngha l b truyn ni tip ng b v bt ng b . USART hay
UART cn phi kt hp vi mt thit b chuyn i in p to nn mt chun giao tip no
.V d chun Rs232(COM Port ) trn my tnh l s kt hp ca chip UART v chip chuyn
i mc in p .Tn hiu t chip UART thng theo mc in p : mc high l +5V , mc slow
l 0V .Trong khi tn hiu theo chun RS232 trn my tnh thng l -12v cho mc high , v
+12v cho mc slow .

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Cu trc mt frame truyn

S in p trong giao tip RS232 .
Truyn thng ni tip :
Gi s mun truyn mt d liu 8-bit gia hai vi iu khin vi nhau , chng ta c th
ngh n cch n gin nht l kt ni mt PORT (8 bit) ca mi vi iu khin vi nhau ,
mi ng trn PORT s m nhim vic truyn/nhn mt bit d liu . y gi l cch
giao tip song song , cch ny n gin v truyn nhn d liu cng khng qua bt c mt
gii thut truyn nhn no , v tc truyn nhn cng rt nhanh .Tuy nhin , nhc im
ca cch truyn ny l s ng truyn nhiu , d liu truyn cng ln th s ng truyn
cng nhiu , do h thng truyn nhn song song thng rt cng knh v km hiu qu .
Ngc li trong truyn thng ni tip , d liu c truyn theo tng bit trn mt ng
truyn , chnh v vy d liu cho d c ln th chng ta cng ch cn c mt ng truyn
duy nht .

S truyn nhn 8 bit theo giao thc song song v ni tip .

Cc thng s c bn trong truyn nhn ni tip :
Baund rate (tc baund ): truyn nhn ni tip xy ra thnh cng th cc thit b
phi thng nht vi nhau v khong thi gian ginh cho mt bit truyn , hay ni cch khc
l tc truyn phi c ci t ging nhau , tc ny gi l tc baund .Tc

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Gio trnh th nghim vi iu khin ng dng

baund l s bit truyn trong 1 giy . V d nu tc baund l 9600 th thi gian ginh cho
mt bit truyn l 1/9600(s).
Frame (khung truyn ) : Khung truyn quy nh v s bit trong mi ln truyn , cc bit
bo nh start , stop , cc bit kim tra nh parity , ngoi ra s lng cc bit trong mt d liu
cng c quy nh bi khung truyn . Hnh trn m t v d v mt khung truyn theo
UART , khung truyn ny c bt u bng mt start bit , tip theo l 8 bit , sau l 1bit
parity dng kim tra d liu v cui cng l 2 bits stop .
Start bit : start bit l bit u tin c truyn trong mt frame , bit ny c nhim v bo
cho thit b nhn bit rng c mt gi d liu sp c truyn ti .Start bit l bit bt buc
phi c trong mt khung truyn .
Data : l s d liu m chng ta cn phi truyn nhn , data c th l gi 8 bit hay 9 bit
ty theo yu cu truyn nhn m ta quy nh .Trong truyn thng ni tip UART , bit c
trng s nh nht LSB(Least significant bit ) s c truyn trc , sau bit c trng s
ln nht s c truyn sau cng MSB(Most signnificant bit ).
Parity bit : parity dng kim tra d liu truyn c ng khng , c hai loi parity l
parity chn (event parity )v parity l (odd parity ) .
Stop bit : stop bit l mt hoc cc bit bo cho thit b rng cc bit c gi xong. Sau
khi nhn c stop bit , thit b nhn s tin hnh kin ra khung truyn m bo tnh
chnh xc ca d liu .Stop bit l bit bt buc xut hin trong khung truyn .
Cc thanh ghi iu khin truyn UART:

S khi b truyn UART

Nguyn tc hot ng :
D liu cn truyn c t vo thanh ghi TXREG , baund rate c to ra , khi bit TXEN
c gn bng mt , d liu t thanh ghi TXREG i vo thanh ghi TSR ng thi baund rate tc
ng n thanh ghi TSR , y d liu cn truyn ra b im , sau xut ra chn TX v i ra
ngoi .
Bit TXIF dng bo trng thi trong thanh ghi TXREG , nu c d liu trong thanh ghi
TXREG th bt ny s c tn hiu l 1 , ngc li sau khi d liu c truyn xung thanh ghi
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Gio trnh th nghim vi iu khin ng dng

TSR th bt TXIF c xa v khng .Tng t nh bit TXIF , bit TRMT dng bo trng thi
ca thanh ghi TSR .Qu trnh truyn cng c th to ra ngt truyn , mi khi d liu truyn
kt thc bng vic t bit TXIF=1.
Ngoi ra b truyn cn c th truyn vi ch 9 bit bng vic cho bit TX9 =1 , v d liu
ca bit th 9 do bit TX9D quy nh .
Thanh ghi quy nh ch truyn :

Cc bit lin quan n ch truyn nhn bt ng b.

TX9 :bit cho php truyn nhn ch 9-bit
1:Cho php hot ng vi ch 9 bit
0:Hot ng vi ch 8bit
TXEN:bit cho php truyn UART
1:Cho php truyn .
0:Khng cho php truyn .
SYNC :bit lc chn ch truyn .
1:Truyn nhn ch ng b.
0:Truyn nhn ch bt ng b.
BRGH: bit la chn ch baund rate
1: tc cao (bt ng b )
0:tc thp (bt ng b)
TRMT : bit hin th trng thi thanh ghi truyn
1:Thanh ghi TSR trng .
0:Thanh ghi TSR c d liu .
TX9D : D liu bit th 9 trong ch truyn 9 bit

Ngt truyn UART

Cc bit khi to ngt truyn UART :
TXIF : c ngt , sau khi thanh ghi TXREG truyn d liu xung thanh ghi TSR th bit ny t
ng bng 1 .
TXIE : bit cho php ngt truyn , to ra ngt truyn ta cn phi cho php bit ny bng 1 .
PEIE : bit cho php ngt ngoi vi .
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GIE : bit cho php ngt ton cc .
Cc bc khi to ch truyn UART :
*Bc 1 : Khi to thanh ghi SPBRGH , SPBRG v cc bit BRGH v BRG16 to ra baund
rate cn thit .
*Bc 2 : Cho php giao tip bt ng b :
SYNC=0;
SPEN=1;
*Bc 3 : Cho php ch 9 bit (nu s dng truyn nhn 9 bit ) :
TX9=1;
*Bc 4 : Cho php truyn :
TXEN=1;
*Bc 5 : Nu s dng ngt th cn phi khi to :
TXIE=1;
PEIE=1;
GIE=1;
*Bc 6: Gi d liu cn truyn ca bit th 9 (nu s dng truyn nhn 9 bit ):
TX9D=..;
*Bc 7 : Gi d liu cn truyn vo thanh ghi 8 bit:
TXREG=..;
Cc thanh ghi iu khin nhn UART:

S khi b truyn UART

Nguyn tc hot ng :
Khi c d liu c truyn ti chn RX , nu bit SPEN c cho php , th d liu s c
ng b vi khi to xung , v baund rate gia hai khi truyn nhn bng nhau, nn xung baund
mang d liu tng bit vo thanh ghi RSR , khi mt frame truyn hon tt (du hiu t bit stop) ,
th d liu c truyn xung thanh ghi RCREG , bit th 9 c truyn xung RX9D(nu s

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dng ch 9 bit) , nu trn ng truyn c li th cc bit OERR, FERR s c hin th
bo .
Qu trnh nhn cng c th to ra ngt sau khi kt thc mt frame truyn nhn, bng vic lm
cho bit RCIF =1 .
Thanh ghi quy nh ch nhn :

Cc bit lin quan n ch truyn nhn bt ng b.

SPEN : Bit cho php khi to cng ni tip :
1:Cho php cng ni tip
0: Khng cho php cng ni tip
RX9: Bit cho php nhn 9 bit
1: Ch nhn 9 bit
0: Ch nhn 8 bit
CREN : bit cho php nhn lin tc
1: Cho php .
0: Khng cho php .
ADDEN : bit cho php pht hin a ch (s dng ch truyn nhn bt ng b 9 bit )
1:Cho php pht hin a ch , cho php ngt v ti b m nhn khi RSR<8> c set.
0:Khng cho php pht hin a ch , tt c byte c nhn v bit th 9 dng lm bit
parity
FERR : bit bo li frame
1: C li
0:Khng c li .
OERR : li OVERRUN
1:C li (c th xa bng vic xa bt CREN)
0:Khng li .
RX9D : Bit cha d liu nhn ca bit th 9

Ngt nhn UART

Cc bit khi to ngt nhn UART :
RCIF : c ngt , sau khi thanh ghi RCREG nhn c d liu th bit ny t ng bng 1.
RCIE : bit cho php ngt nhn , to ra ngt nhn ta cn phi cho php bit ny bng 1 .
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PEIE : bit cho php ngt ngoi vi .
GIE : bit cho php ngt ton cc .
Cc bc khi to ch nhn UART :
*Bc 1 : Khi to thanh ghi SPBRGH , SPBRG v cc bit BRGH v BRG16 to ra baund
rate cn thit .
*Bc 2 : Cho php giao tip bt ng b :
SYNC=0;
SPEN=1;
*Bc 3 : Nu s dng ngt nhn :
RCIE=1;
PEIE=1;
GIE=1;
*Bc 4 : Cho php ch 9 bit bng (nu s dng truyn nhn 9 bit ) :
RX9=1;
*Bc 5 : Cho php nhn d liu :
CREN=1;
*Bc 6 : C ngt RCIF = 1 khi d liu chuyn i t RSR ti b im nhn . Ngt s c to
ra nu RCIE=1.
*Bc 7 : c thanh ghi RCSTA pht hin cc li trong qu trnh truyn nhn.
*Bc 8 : Nhn 8 bit d liu t b im nhn bng cch c thanh ghi RCREG.
*Bc 9 : Nu c li overrun xy ra , xa c OERR bng cch xa bit CREN.
Cng thc tnh tc baund rate :

Trong :
FOSC l tn s hot ng ca vi iu khin .
n=SPBRGH:SPBRG
V d : Tnh tc baund 9600 ,vi iu kin cc bit khi to nh sau :
SYNC=0 ; BRG16=1; BRGH=1; Fosc= 4Mhz
Khi theo bng ta c :

9600= 4(+1)
n=103
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Do : SPBRG=103 , SPBRGH=0;
IV:BI TP THC HNH :
Bi 1 :Vit chng trnh truyn nhn UART ca vi iu khin vi my tnh , iu khin
hot ng ca led theo yu cu sau :
Vi iu khin nhn mt s t my tnh v iu khin hai led RE1 va RE2 vi 4 trng thi
Nhn s 1: Hai led tt , gi ln my tnh chui "Number 1".
Nhn s 2: Hai led sng, gi ln my tnh chui "Number 2".
Nhn s 3:Led RE1 sng,RE2 tt ,gi li my tnh chui "Number 3".
Nhn s 4:Led RE1 tt ,RE2 sng ,gi li my chui "Number 4".
S khc :Hai led cng chp tt vi chu k _delay(100000);gi li my tnh chui "Other
numbers".
Vi iu khin s dng thch anh ni 4MHz , tc baund : 9600 , truyn nhn 8 bit .
Cu hnh phn cng :

*Bc 1 : To mt project mi vi tn 05_01_ MSSV

*Bc 2 : Nhp chng trnh sau vo my tnh v hon thnh vo du .
#include <htc.h>
#include <stdio.h>
__CONFIG(INTIO&WDTDIS&PWRTEN&MCLREN&UNPROTECT&DUNPROTECT&FC
MDIS&IESODIS&LVPDIS&BORDIS);
void send_string(char *s);
void send_char(char c);
char data ;
void main()
{
ANS6=ANS7=.;TRISE1=TRISE2=.; //Khi to RE1,RE2 l ng ra s
//Cu hnh truyn UART
TXEN=.;
//Cho php truyn
SYNC=.;
//Cu hnh nhn UART
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Gio trnh th nghim vi iu khin ng dng

SPEN =.;
//Cu hnh chn RX,TX ch truyn nhn UART
CREN=.;
//Khi to tc baund 9600=Fosc/(4*(n+1)) vi n=SPBRGH:SPBRG
BRG16=1;
//(--------1----------)
BRGH=1;
//(--------2----------)
SPBRG=103;SPBRGH=0;
//(--------3----------)
//Khi to ngt nhn
RCIE =.;
PEIE =.;
GIE =.;
while(1)
{
switch(data)
{
case 1:
RE1=RE2=.;send_string("Number 1\r");
//Hai led tt
break;
case 2:
RE1=RE2=.;send_string("Number 2\r");
//Hai led sng
break;
case 3:
RE1=0;RE2=.;
send_string("Number 3\r");
//RE1 tt , RE2 sng
break;
case 4:
RE1=.;RE2=.;
send_string("Numer 4\r");
//RE2 tt , RE1 sng
break;
default:
RE1^=.;RE2=RE1;
//Hai led cng chp tt.
send_string("Other numbers\r");
break;
}
_delay(100000);
}
}
void interrupt isr()
{
if(RCIF)
{
data=RCREG;
}
}

void send_char(char c)
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Gio trnh th nghim vi iu khin ng dng

{
while(!TXIF);
TXREG=c;
}
void send_string(char *s)
{
while(*s)
send_char(*s++);
}
*Bc 3 : Np chng trnh vo kt th nghim , kt ni my tnh vi kt th nghim bng cng
COM(Nu s dng Laptop th cn c cp USB>COM .
*Bc 4 : S dng chng trnh Terminal (chng trnh dng test cng COM) truyn nhn k t
xung kit th nghim , ng thi quan st 2 led trn kit th nghim .
*Bc 5 : Chng minh thng s ca dng (1) , (2), (3).
--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------Bi 2 : Lm li bi 1 vi tc baund 14400 (To mt project mi vi tn 05_02_ MSSV).
V.BI TP T GII :
Bi 3 : Vit chng trnh truyn nhn UART ca vi iu khin vi my tnh , hin th kt
qu ln lcd theo s phn cng sau (To mt project mi vi tn 05_02_ MSSV):
Yu cu : Truyn mt chui s (ti a 5 ch s xxxxx) t my tnh xung vi iu khin , vi iu
khin hin th s va nhn c t my tnh ln lcd , ng thi gi li my tnh s va nhn
cng thm 10.Thch anh 4Mhz , baund 9600 , truyn nhn 8-bit , phn cng kt ni lcd theo th
vin lcd.h .

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Bi 4 : Vit chng trnh truyn nhn gia vi iu khin v my tinh vi cc yu cu sau :

My tnh truyn xung vi iu khin k t S , ng c start.
My tnh truyn xung vi iu khin k t P , ng c stop.
My tnh truyn xung vi iu khin k t B-xxx , ng c quay thun ,vi xxx l
rng xung PWM 8 bit .
My tnh truyn xung vi iu khin k t F-xxx , ng c quay nghch , vi xxx l
rng xung PWM 8 bit .

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Bi 5 : Vit chng trnh truyn nhn gia my tnh v vi iu khin vi yu cu sau : my tnh
hin th vn tc ng c trn Terminal , baund 9600, Fosc = 4Mhz .

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Gio trnh th nghim vi iu khin ng dng

TI LIU THAM KHO :
[1] PIC16F882/883/884/886/887 Data Sheet
[2]Dogan lbrahim , Advanced PIC Microcontroller Projects in C
[3] http://www.picvietnam.com/forum/
[4] http://www.microchip.com/

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Ph Lc
I.Ca s chng trnh :

Thanh Menu

Thanh Cng C

Ca s vit
chng trnh

I.Khi to mt project mi :
1.To mt folder (A) cha tt c cc file chng trnh
2.Khi ng MPLAB : Chn Project , Project Wizard

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Gio trnh th nghim vi iu khin ng dng

3.Chn Next :

4.Chn dng PIC mun lp trnh , Next :

4

5.La chn cng c lp trnh ( y chn H-TECH) , Next:

Ch : Ch duy nht c dng H-TECH sau khi ci t thnh cng Hi-tech C.

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Gio trnh th nghim vi iu khin ng dng

6.Browse ti folder (A) , t tn cho bi lm (main), Next :

7.Nhn Next , chn Finish:

10

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Gio trnh th nghim vi iu khin ng dng

8.Chn NewFile thanh cng c , vit on chng trnh #include<htc.h> trong
MPLAB IDE Editor , chn Save :
11

13

12

9.t tn main.c (Ch : phi c .c v Save in th mc A) ,chn save :

14

15

16

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Gio trnh th nghim vi iu khin ng dng

10.Right click vo Source file ca s main.mcw chn Add files , Browse ti
main.c chn open :

17
18

11.Hon tt to mt project , tip tc vit chng trnh .

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