Switching

An Engineering Approach to Computer Networking An Engineering Approach to Computer Networking

What is it all about?
I I How do we move traffic from one part of the network to another? How do we move traffic from one part of the network to another?
I I Connect end-systems to switches, and switches to each other Connect end-systems to switches, and switches to each other
I I Data arriving to an input port of a switch have to be moved to Data arriving to an input port of a switch have to be moved to
one or more of the output ports one or more of the output ports
Types of switching elements
I I Telephone switches Telephone switches
N N switch samples switch samples
I I Datagram routers Datagram routers
N N switch datagrams switch datagrams
I I ATM switches ATM switches
N N switch ATM cells switch ATM cells
Classification
I I Packet vs. circuit switches Packet vs. circuit switches
N N packets have headers and samples dont packets have headers and samples dont
I I Connectionless vs. connection oriented Connectionless vs. connection oriented
N N connection oriented switches need a call setup connection oriented switches need a call setup
N N setup is handled in setup is handled in control plane control plane by switch controller
N connectionless switches deal with self-contained datagrams
Connectionless
(router)
Connection-oriented
(switching system)
Packet
switch
Internet router ATM switching system
Circuit
switch
Telephone switching
system
Other switching element functions
I I Participate in routing algorithms Participate in routing algorithms
N N to build routing tables to build routing tables
I I Resolve contention for output trunks Resolve contention for output trunks
N N scheduling scheduling
I I Admission control Admission control
N N to guarantee resources to certain streams to guarantee resources to certain streams
I I Well discuss these later Well discuss these later
I I Here we focus on pure data movement Here we focus on pure data movement
Requirements
I I Capacity of switch is the maximum rate at which it can move Capacity of switch is the maximum rate at which it can move
information, assuming all data paths are simultaneously active information, assuming all data paths are simultaneously active
I I Primary goal: Primary goal: maximize capacity maximize capacity
N N subject to cost and reliability constraints subject to cost and reliability constraints
I I Circuit switch must reject call if cant find a path for samples Circuit switch must reject call if cant find a path for samples
from input to output from input to output
N N goal: goal: minimize call blocking minimize call blocking
I I Packet switch must reject a packet if it cant find a buffer to store Packet switch must reject a packet if it cant find a buffer to store
it awaiting access to output trunk it awaiting access to output trunk
N N goal: goal: minimize packet loss minimize packet loss
I I Dont reorder Dont reorder packets packets
A generic switch
Outline
I I Circuit switching Circuit switching
I I Packet switching Packet switching
N N Switch generations Switch generations
N N Switch fabrics Switch fabrics
N N Buffer placement Buffer placement
N N Multicast switches Multicast switches
Circuit switching
I I Moving 8-bit samples from an input port to an output port Moving 8-bit samples from an input port to an output port
I I Recall that samples have no headers Recall that samples have no headers
I I Destination of sample depends on Destination of sample depends on time time at which it arrives at the at which it arrives at the
switch switch
N N actually, relative order within a actually, relative order within a frame frame
I I Well first study something simpler than a switch: a multiplexor Well first study something simpler than a switch: a multiplexor
Multiplexors and demultiplexors
I I Most trunks time division multiplex voice samples Most trunks time division multiplex voice samples
I I At a central office, trunk is demultiplexed and distributed to At a central office, trunk is demultiplexed and distributed to
active circuits active circuits
I I Synchronous multiplexor Synchronous multiplexor
N N N input lines N input lines
N N Output runs N times as fast as input Output runs N times as fast as input
More on multiplexing
I I Demultiplexor Demultiplexor
N N one input line and N outputs that run N times slower one input line and N outputs that run N times slower
N N samples are placed in output buffer in round robin order samples are placed in output buffer in round robin order
I I Neither multiplexor nor demultiplexor needs addressing Neither multiplexor nor demultiplexor needs addressing
information (why?) information (why?)
I I Can cascade multiplexors Can cascade multiplexors
N N need a standard need a standard
N N example: DS hierarchy in the US and Japan example: DS hierarchy in the US and Japan
Inverse multiplexing
I I Takes a high bit-rate stream and scatters it across multiple Takes a high bit-rate stream and scatters it across multiple
trunks trunks
I I At the other end, combines multiple streams At the other end, combines multiple streams
N N resequencing resequencing to accommodate variation in delays to accommodate variation in delays
I I Allows high-speed virtual links using existing technology Allows high-speed virtual links using existing technology
A circuit switch
I I A switch that can handle N calls has N logical inputs and N A switch that can handle N calls has N logical inputs and N
logical outputs logical outputs
N N N up to 200,000 N up to 200,000
I I In practice, input trunks are multiplexed In practice, input trunks are multiplexed
N N example: DS3 trunk carries 672 simultaneous calls example: DS3 trunk carries 672 simultaneous calls
I I Multiplexed trunks carry Multiplexed trunks carry frames frames = set of samples = set of samples
I I Goal: extract samples from frame, and depending on position in Goal: extract samples from frame, and depending on position in
frame, switch to output frame, switch to output
N N each incoming sample has to get to the right output line and the each incoming sample has to get to the right output line and the
right slot in the output frame right slot in the output frame
N N demultiplex demultiplex, switch, multiplex , switch, multiplex
Call blocking
I I Cant find a path from input to output Cant find a path from input to output
I I Internal blocking Internal blocking
N N slot in output frame exists, but no path slot in output frame exists, but no path
I I Output blocking Output blocking
N N no slot in output frame is available no slot in output frame is available
I I Output blocking is reduced in Output blocking is reduced in transit transit switches switches
N N need to put a sample in one of need to put a sample in one of several several slots going to the desired
next hop
Time division switching
I I Key idea: when Key idea: when demultiplexing demultiplexing, position in frame determines , position in frame determines
output trunk output trunk
I I Time division switching interchanges sample position within a Time division switching interchanges sample position within a
frame: time slot interchange (TSI) frame: time slot interchange (TSI)
How large a TSI can we build?
I I Limit is time taken to read and write to memory Limit is time taken to read and write to memory
I I For 120,000 circuits For 120,000 circuits
N N need to read and write memory once every 125 microseconds need to read and write memory once every 125 microseconds
N N each operation takes around 0.5 each operation takes around 0.5 ns ns => impossible with current => impossible with current
technology technology
I I Need to look to other techniques Need to look to other techniques
Space division switching
I I Each sample takes a different path Each sample takes a different path thoguh thoguh the the swithc swithc, ,
depending on its destination depending on its destination
Crossbar
I I Simplest possible space-division switch Simplest possible space-division switch
I I Crosspoints Crosspoints can be turned on or off
I For multiplexed inputs, need a switching schedule (why?)
I Internally nonblocking
N but need N
2
crosspoints
N time taken to set each crosspoint grows quadratically
N vulnerable to single faults (why?)
Multistage crossbar
I I In a crossbar during each switching time only one In a crossbar during each switching time only one crosspoint crosspoint per per
row or column is active row or column is active
I I Can save crosspoints if a Can save crosspoints if a crosspoint crosspoint can attach to more than can attach to more than
one input line (why?) one input line (why?)
I I This is done in a multistage crossbar This is done in a multistage crossbar
I I Need to rearrange connections every switching time Need to rearrange connections every switching time
Multistage crossbar
I I Can suffer internal blocking Can suffer internal blocking
N N unless sufficient number of second-level stages unless sufficient number of second-level stages
I I Number of crosspoints < N Number of crosspoints < N
2 2
I I Finding a path from input to output requires a depth-first-search Finding a path from input to output requires a depth-first-search
I I Scales better than crossbar, but still not too well Scales better than crossbar, but still not too well
N N 120,000 call switch needs ~250 million crosspoints 120,000 call switch needs ~250 million crosspoints
Time-space switching
I I Precede each input trunk in a crossbar with a TSI Precede each input trunk in a crossbar with a TSI
I I Delay samples so that they arrive at the right time for the space Delay samples so that they arrive at the right time for the space
division switchs schedule division switchs schedule
Time-space-time (TST) switching
I I Allowed to flip samples both on input and output trunk Allowed to flip samples both on input and output trunk
I I Gives more flexibility => lowers call blocking probability Gives more flexibility => lowers call blocking probability
Outline
I I Circuit switching Circuit switching
I I Packet switching Packet switching
N N Switch generations Switch generations
N N Switch fabrics Switch fabrics
N N Buffer placement Buffer placement
N N Multicast switches Multicast switches
Packet switching
I I In a circuit switch, path of a sample is determined at time of In a circuit switch, path of a sample is determined at time of
connection establishment connection establishment
I I No need for a sample header--position in frame is enough No need for a sample header--position in frame is enough
I I In a packet switch, packets carry a destination field In a packet switch, packets carry a destination field
I I Need to look up destination port on-the-fly Need to look up destination port on-the-fly
I I Datagram Datagram
N N lookup based on entire destination address lookup based on entire destination address
I I Cell Cell
N N lookup based on VCI lookup based on VCI
I I Other than that, very similar Other than that, very similar
Repeaters, bridges, routers, and gateways
I I Repeaters: at physical level Repeaters: at physical level
I I Bridges: at datalink level (based on MAC addresses) (L2) Bridges: at datalink level (based on MAC addresses) (L2)
N N discover attached stations by listening discover attached stations by listening
I I Routers: at network level (L3) Routers: at network level (L3)
N N participate in routing protocols participate in routing protocols
I I Application level gateways: at application level (L7) Application level gateways: at application level (L7)
N N treat entire network as a single hop treat entire network as a single hop
N N e.g mail gateways and e.g mail gateways and transcoders transcoders
I I Gain functionality at the expense of forwarding speed Gain functionality at the expense of forwarding speed
N N for best performance, push functionality as low as possible for best performance, push functionality as low as possible
Port mappers
I I Look up output port based on destination address Look up output port based on destination address
I I Easy for VCI: just use a table Easy for VCI: just use a table
I I Harder for datagrams: Harder for datagrams:
N N need to find need to find longest prefix match longest prefix match
! ! e.g. packet with address 128.32.1.20 e.g. packet with address 128.32.1.20
! ! entries: (128.32.*, 3), (128.32.1.*, 4), (128.32.1.20, 2) entries: (128.32.*, 3), (128.32.1.*, 4), (128.32.1.20, 2)
I I A standard solution: A standard solution: trie trie
Tries
I I Two ways to improve performance Two ways to improve performance
N N cache recently used addresses in a CAM cache recently used addresses in a CAM
N N move common entries up to a higher level (match longer strings) move common entries up to a higher level (match longer strings)
Blocking in packet switches
I I Can have both internal and output blocking Can have both internal and output blocking
I I Internal Internal
N N no path to output no path to output
I I Output Output
N N trunk unavailable trunk unavailable
I I Unlike a circuit switch, cannot predict if packets will block (why?) Unlike a circuit switch, cannot predict if packets will block (why?)
I I If packet is blocked, must either buffer or drop it If packet is blocked, must either buffer or drop it
Dealing with blocking
I I Overprovisioning Overprovisioning
N N internal links much faster than inputs internal links much faster than inputs
I I Buffers Buffers
N N at input or output at input or output
I I Backpressure Backpressure
N N if switch fabric doesnt have buffers, prevent packet from entering if switch fabric doesnt have buffers, prevent packet from entering
until path is available until path is available
I I Parallel switch fabrics Parallel switch fabrics
N N increases effective switching capacity increases effective switching capacity
Outline
I I Circuit switching Circuit switching
I I Packet switching Packet switching
N N Switch generations Switch generations
N N Switch fabrics Switch fabrics
N N Buffer placement Buffer placement
N N Multicast switches Multicast switches
Three generations of packet switches
I I Different trade- Different trade-offs offs between cost and performance between cost and performance
I I Represent evolution in switching capacity, rather than in Represent evolution in switching capacity, rather than in
technology technology
N N With same technology, a later generation switch achieves greater With same technology, a later generation switch achieves greater
capacity, but at greater cost capacity, but at greater cost
I I All three generations are represented in current products All three generations are represented in current products
First generation switch
I I Most Ethernet switches and cheap packet routers Most Ethernet switches and cheap packet routers
I I Bottleneck can be CPU, host- Bottleneck can be CPU, host-adaptor adaptor or I/O bus, depending or I/O bus, depending
Example
I I First generation router built with 133 MHz Pentium First generation router built with 133 MHz Pentium
N N Mean packet size 500 bytes Mean packet size 500 bytes
N N Interrupt takes 10 microseconds, word access take 50 Interrupt takes 10 microseconds, word access take 50 ns ns
N N Per-packet processing time takes 200 instructions = 1.504 s Per-packet processing time takes 200 instructions = 1.504 s
I I Copy loop Copy loop
register <- memory[read_ register <- memory[read_ptr ptr] ]
memory [write_ memory [write_ptr ptr] <- register ] <- register
read_ read_ptr ptr <- read_ <- read_ptr ptr + 4 + 4
write_ write_ptr ptr <- write_ <- write_ptr ptr + 4 + 4
counter <- counter -1 counter <- counter -1
if (counter not 0) branch to top of loop if (counter not 0) branch to top of loop
I I 4 instructions + 2 memory accesses = 130.08 4 instructions + 2 memory accesses = 130.08 ns ns
I I Copying packet takes 500/4 *130.08 = 16.26 s; interrupt 10 s Copying packet takes 500/4 *130.08 = 16.26 s; interrupt 10 s
I I Total time = 27.764 s => speed is 144.1 Total time = 27.764 s => speed is 144.1 Mbps Mbps
I I Amortized interrupt cost balanced by routing protocol cost Amortized interrupt cost balanced by routing protocol cost
Second generation switch
I I Port mapping intelligence in line cards Port mapping intelligence in line cards
I I ATM switch guarantees hit in lookup cache ATM switch guarantees hit in lookup cache
I I Ipsilon Ipsilon IP switching IP switching
N N assume underlying ATM network assume underlying ATM network
N N by default, assemble packets by default, assemble packets
N N if detect a flow, ask upstream to send on a particular VCI, and if detect a flow, ask upstream to send on a particular VCI, and
install entry in port install entry in port mapper mapper => implicit signaling => implicit signaling
Third generation switches
I I Bottleneck in second generation switch is the bus (or ring) Bottleneck in second generation switch is the bus (or ring)
I I Third generation switch provides parallel paths (fabric) Third generation switch provides parallel paths (fabric)
Third generation (contd.)
I I Features Features
N N self-routing fabric self-routing fabric
N N output buffer is a point of contention output buffer is a point of contention
! ! unless we unless we arbitrate arbitrate access to fabric access to fabric
N N potential for unlimited scaling, as long as we can resolve contention potential for unlimited scaling, as long as we can resolve contention
for output buffer for output buffer
Outline
I I Circuit switching Circuit switching
I I Packet switching Packet switching
N N Switch generations Switch generations
N N Switch fabrics Switch fabrics
N N Buffer placement Buffer placement
N N Multicast switches Multicast switches
Switch fabrics
I I Transfer data from input to output, ignoring scheduling and Transfer data from input to output, ignoring scheduling and
buffering buffering
I I Usually consist of links and Usually consist of links and switching elements switching elements
Crossbar
I I Simplest switch fabric Simplest switch fabric
N N think of it as 2N buses in parallel think of it as 2N buses in parallel
I I Used here for Used here for packet packet routing: routing: crosspoint crosspoint is left open long is left open long
enough to transfer a packet from an input to an output enough to transfer a packet from an input to an output
I I For fixed-size packets and known arrival pattern, can compute For fixed-size packets and known arrival pattern, can compute
schedule in advance schedule in advance
I I Otherwise, need to compute a schedule on-the-fly (what does Otherwise, need to compute a schedule on-the-fly (what does
the schedule depend on?) the schedule depend on?)
Buffered crossbar
I I What happens if packets at two inputs both want to go to same What happens if packets at two inputs both want to go to same
output? output?
I I Can defer one at an input buffer Can defer one at an input buffer
I I Or, buffer crosspoints Or, buffer crosspoints
Broadcast
I I Packets are tagged with output port # Packets are tagged with output port #
I I Each output matches tags Each output matches tags
I I Need to match N addresses in parallel at each output Need to match N addresses in parallel at each output
I I Useful only for small switches, or as a stage in a large switch Useful only for small switches, or as a stage in a large switch
Switch fabric element
I I Can build complicated fabrics from a simple element Can build complicated fabrics from a simple element
I I Routing rule: if 0, send packet to upper output, else to lower Routing rule: if 0, send packet to upper output, else to lower
output output
I I If both packets to same output, buffer or drop If both packets to same output, buffer or drop
Features of fabrics built with switching elements
I I NxN NxN switch with switch with bxb bxb elements has elements with elements has elements with
elements per stage elements per stage
I I Fabric is Fabric is self routing self routing
I I Recursive Recursive
I I Can be synchronous or asynchronous Can be synchronous or asynchronous
I I Regular and suitable for VLSI implementation Regular and suitable for VLSI implementation

logbN

N b /
Banyan
I I Simplest self-routing recursive fabric Simplest self-routing recursive fabric
I I (why does it work?) (why does it work?)
I I What if two packets both want to go to the same output? What if two packets both want to go to the same output?
N N output blocking output blocking
Blocking
I I Can avoid with a buffered Can avoid with a buffered banyan banyan switch switch
N N but this is too expensive but this is too expensive
N N hard to achieve zero loss even with buffers hard to achieve zero loss even with buffers
I I Instead, can check if path is available before sending packet Instead, can check if path is available before sending packet
N N three-phase scheme three-phase scheme
N N send requests send requests
N N inform winners inform winners
N N send packets send packets
I I Or, use several Or, use several banyan banyan fabrics in parallel fabrics in parallel
N N intentionally misroute and tag one of a colliding pair intentionally misroute and tag one of a colliding pair
N N divert tagged packets to a second divert tagged packets to a second banyan banyan, and so on to k stages , and so on to k stages
N N expensive expensive
N N can reorder packets can reorder packets
N N output buffers have to run k times faster than input output buffers have to run k times faster than input
Sorting
I I Can avoid blocking by choosing order in which packets appear Can avoid blocking by choosing order in which packets appear
at input ports at input ports
I I If we can If we can
N N present packets at inputs sorted by output present packets at inputs sorted by output
N N remove duplicates remove duplicates
N N remove gaps remove gaps
N N precede precede banyan banyan with a perfect shuffle stage with a perfect shuffle stage
N N then no internal blocking then no internal blocking
I I For example, [X, 010, 010, X, 011, X, X, X] -(sort)-> For example, [X, 010, 010, X, 011, X, X, X] -(sort)->
[010, 011, 011, X, X, X, X, X] -(remove [010, 011, 011, X, X, X, X, X] -(remove dups dups)-> )->
[010, 011, X, X, X, X, X, X] -(shuffle)-> [010, 011, X, X, X, X, X, X] -(shuffle)->
[010, X, 011, X, X, X, X, X] [010, X, 011, X, X, X, X, X]
I I Need sort, shuffle, and trap networks Need sort, shuffle, and trap networks
Sorting
I I Build sorters from merge networks Build sorters from merge networks
I I Assume we can merge two sorted lists Assume we can merge two sorted lists
I I Sort pairwise, merge, Sort pairwise, merge, recurse recurse
Merging
Putting it together- Batcher Banyan
I I What about trapped duplicates? What about trapped duplicates?
N N recirculate recirculate to beginning to beginning
N N or run output of trap to multiple or run output of trap to multiple banyans banyans ( (dilation dilation) )
Effect of packet size on switching fabrics
I I A major motivation for small fixed packet size in ATM is ease of A major motivation for small fixed packet size in ATM is ease of
building large parallel fabrics building large parallel fabrics
I I In general, smaller size => more per-packet overhead, but more In general, smaller size => more per-packet overhead, but more
preemption points/sec preemption points/sec
N N At high speeds, overhead dominates! At high speeds, overhead dominates!
I I Fixed size packets helps build synchronous switch Fixed size packets helps build synchronous switch
N N But we could fragment at entry and reassemble at exit But we could fragment at entry and reassemble at exit
N N Or build an asynchronous fabric Or build an asynchronous fabric
N N Thus, variable size doesnt hurt too much Thus, variable size doesnt hurt too much
I I Maybe Internet routers can be almost as cost-effective as ATM Maybe Internet routers can be almost as cost-effective as ATM
switches switches
Outline
I I Circuit switching Circuit switching
I I Packet switching Packet switching
N N Switch generations Switch generations
N N Switch fabrics Switch fabrics
N N Buffer placement Buffer placement
N N Multicast switches Multicast switches
Buffering
I I All packet switches need buffers to match input rate to service All packet switches need buffers to match input rate to service
rate rate
N N or cause heavy packet loses or cause heavy packet loses
I I Where should we place buffers? Where should we place buffers?
N N input input
N N in the fabric in the fabric
N N output output
N N shared shared
Input buffering (input queueing)
I I No speedup in buffers or trunks (unlike output queued switch) No speedup in buffers or trunks (unlike output queued switch)
I I Needs arbiter Needs arbiter
I I Problem: Problem: head of line blocking head of line blocking
N N with randomly distributed packets, utilization at most 58.6% with randomly distributed packets, utilization at most 58.6%
N N worse with worse with hot spots hot spots
Dealing with HOL blocking
I I Per-output queues at inputs Per-output queues at inputs
I I Arbiter must choose one of the input ports for each output port Arbiter must choose one of the input ports for each output port
I I How to select? How to select?
I I Parallel Iterated Matching Parallel Iterated Matching
N N inputs tell arbiter which outputs they are interested in inputs tell arbiter which outputs they are interested in
N N output selects one of the inputs output selects one of the inputs
N N some inputs may get more than one some inputs may get more than one grant grant, others may get none , others may get none
N N if >1 grant, input picks one at random, and tells output if >1 grant, input picks one at random, and tells output
N N losing inputs and outputs try again losing inputs and outputs try again
I I Used in DEC Used in DEC Autonet Autonet 2 switch 2 switch
Output queueing
I I Dont suffer from head-of-line blocking Dont suffer from head-of-line blocking
I I But output buffers need to run much faster than trunk speed But output buffers need to run much faster than trunk speed
(why?) (why?)
I I Can reduce some of the cost by using the Can reduce some of the cost by using the knockout knockout principle principle
N N unlikely that all N inputs will have packets for the same output unlikely that all N inputs will have packets for the same output
N N drop extra packets, fairly distributing losses among inputs drop extra packets, fairly distributing losses among inputs
Shared memory
I I Route only the header to output port Route only the header to output port
I I Bottleneck is time taken to read and write Bottleneck is time taken to read and write multiported multiported memory memory
I I Doesnt scale to large switches Doesnt scale to large switches
I I But can form an element in a multistage switch But can form an element in a multistage switch
Datapath: clever shared memory design
I I Reduces read/write cost by doing wide reads and writes Reduces read/write cost by doing wide reads and writes
I I 1.2 1.2 Gbps Gbps switch for $50 parts cost switch for $50 parts cost
Buffered fabric
I I Buffers in each switch element Buffers in each switch element
I I Pros Pros
N N Speed up is only as much as fan-in Speed up is only as much as fan-in
N N Hardware Hardware backpressure backpressure reduces buffer requirements reduces buffer requirements
I I Cons Cons
N N costly (unless using single-chip switches) costly (unless using single-chip switches)
N N scheduling is hard scheduling is hard
Hybrid solutions
I I Buffers at more than one point Buffers at more than one point
I I Becomes hard to analyze and manage Becomes hard to analyze and manage
I I But common in practice But common in practice
Outline
I I Circuit switching Circuit switching
I I Packet switching Packet switching
N N Switch generations Switch generations
N N Switch fabrics Switch fabrics
N N Buffer placement Buffer placement
N N Multicast switches Multicast switches
Multicasting
I I Useful to do this in hardware Useful to do this in hardware
I I Assume Assume portmapper portmapper knows list of outputs knows list of outputs
I I Incoming packet must be copied to these output ports Incoming packet must be copied to these output ports
I I Two Two subproblems subproblems
N N generating and distributing copes generating and distributing copes
N N VCI translation for the copies VCI translation for the copies
Generating and distributing copies
I I Either implicit or explicit Either implicit or explicit
I I Implicit Implicit
N N suitable for bus-based, ring-based, crossbar, or broadcast switches suitable for bus-based, ring-based, crossbar, or broadcast switches
N N multiple outputs enabled after placing packet on shared bus multiple outputs enabled after placing packet on shared bus
N N used in Paris and used in Paris and Datapath Datapath switches switches
I I Explicit Explicit
N N need to copy a packet at switch elements need to copy a packet at switch elements
N N use a use a copy copy network network
N N place # of copies in tag place # of copies in tag
N N element copies to both outputs and decrements count on one of element copies to both outputs and decrements count on one of
them them
N N collect copies at outputs collect copies at outputs
I I Both schemes increase blocking probability Both schemes increase blocking probability
Header translation
I I Normally, in-VCI to out-VCI translation can be done either at Normally, in-VCI to out-VCI translation can be done either at
input or output input or output
I I With multicasting, translation easier at output port (why?) With multicasting, translation easier at output port (why?)
I I Use separate port mapping and translation tables Use separate port mapping and translation tables
I I Input maps a VCI to a set of output ports Input maps a VCI to a set of output ports
I I Output port swaps VCI Output port swaps VCI
I I Need to do two lookups per packet Need to do two lookups per packet