#include <hidef.

h> /* for EnableInterrupts macro */

#include "derivative.h" /* include peripheral declarations */
#ifdef __cplusplus
extern "C"
#endif
void MCU_init(void); /* Device initialization function declaration */
unsigned int valor;
#define led1 PTCD_PTCD5
#define led2 PTCD_PTCD4
extern estado;
void lectura_adc(){
ADCSC1_ADCH =0;
while(ADCSC1_COCO == 0){}
valor = ADCR;
}
void ledactivo (){
if (valor>=128){
RTCMOD = 0x63;
while(valor>=128){
led1=1;
led2=estado;
lectura_adc();
}
}
else {
RTCMOD = 0x95;
while(valor<128){
led1=estado;
led2=1;
lectura_adc();
}
}
}
void main(void) {
MCU_init(); /* call Device Initialization */
/* include your code here */
led1=led2=1;
for(;;) {
ledactivo ();
}
}
/*
** ###################################################################
** This code is generated by the Device Initialization Tool.
** It is overwritten during code generation.
** USER MODIFICATION ARE PRESERVED ONLY INSIDE INTERRUPT SERVICE ROUTINES
** OR EXPLICITLY MARKED SECTIONS
**
** Project : DeviceInitialization
** Processor : MCF51QE128CLH
** Version : Component 01.010, Driver 01.08, CPU db: 3.00.080
** Datasheet : MCF51QE128RM, Rev. 3, 9/2007
** Date/Time : 2014-05-12, 15:22, # CodeGen: 7
** Abstract :
** This module contains device initialization code
** for selected on-chip peripherals.
** Contents :
** Function "MCU_init" initializes selected peripherals
**
** Copyright : 1997 - 2012 Freescale, Inc. All Rights Reserved.
**
** http : www.freescale.com
** mail : support@freescale.com
** ###################################################################
*/
/* MODULE MCUinit */
#include <mcf51qe128.h> /* I/O map for MCF51QE128CLH */
#include "MCUinit.h"
/* Standard ANSI C types */
#ifndef int8_t
typedef signed char int8_t;
#endif
#ifndef int16_t
typedef signed short int int16_t;
#endif
#ifndef int32_t
typedef signed long int int32_t;
#endif
#ifndef uint8_t
typedef unsigned char uint8_t;
#endif
#ifndef uint16_t
typedef unsigned short int uint16_t;
#endif
#ifndef uint32_t
typedef unsigned long int uint32_t;
#endif
/* pragma to disable "possibly unassigned ISR handler" message generated by comp
iler on definition of ISR without vector number */
#pragma warn_absolute off
/* User declarations and definitions */
/* Code, declarations and definitions here will be preserved during code gener
ation */
/* End of user declarations and definitions */
/*
** ===================================================================
** Method : __initialize_hardware (component MCF51QE128_64)
**
** Description :
** Initialization code for CPU core and a clock source.
** ===================================================================
*/
void __initialize_hardware(void)
{
/* ### MCF51QE128_64 "Cpu" init code ... */
/* PE initialization code after reset */
/* Common initialization of the write once registers */
/* SOPT1: COPE=0,COPT=1,STOPE=0,WAITE=1,RSTOPE=0,BKGDPE=1,RSTPE=0 */
SOPT1 = 0x52U;
/* SOPT2: COPCLKS=0,SPI1PS=0,ACIC2=0,IIC1PS=0,ACIC1=0 */
SOPT2 = 0x00U;
/* SPMSC1: LVDF=0,LVDACK=0,LVDIE=0,LVDRE=1,LVDSE=1,LVDE=1,BGBE=0 */
SPMSC1 = 0x1CU;
/* SPMSC2: LPR=0,LPRS=0,LPWUI=0,PPDF=0,PPDACK=0,PPDE=1,PPDC=0 */
SPMSC2 = 0x02U;
/* SPMSC3: LVDV=0,LVWV=0,LVWIE=0 */
SPMSC3 &= (unsigned char)~(unsigned char)0x38U;
/* Initialization of CPU registers */
/*lint -save -e950 Disable MISRA rule (1.1) checking. */
asm {
/* VBR: ADDRESS=0 */
clr.l d0
movec d0,VBR
/* CPUCR: ARD=0,IRD=0,IAE=0,IME=0,BWD=0,FSD=0 */
clr.l d0
movec d0,CPUCR
}
/*lint -restore Enable MISRA rule (1.1) checking. */
/* System clock initialization */
/*lint -save -e923 Disable MISRA rule (11.3) checking. */
if (*(unsigned char*far)0x03FFU != 0xFFU) { /* Test if the device trim value i
s stored on the specified address */
ICSTRM = *(unsigned char*far)0x03FFU; /* Initialize ICSTRM register from a n
on volatile memory */
ICSSC = (unsigned char)((*(unsigned char*far)0x03FEU) & (unsigned char)0x01U
); /* Initialize ICSSC register from a non volatile memory */
}
/*lint -restore Enable MISRA rule (11.3) checking. */
/* ICSC1: CLKS=0,RDIV=0,IREFS=1,IRCLKEN=0,IREFSTEN=0 */
ICSC1 = 0x04U; /* Initialization of the ICS control regi
ster 1 */
/* ICSC2: BDIV=1,RANGE=0,HGO=0,LP=0,EREFS=0,ERCLKEN=0,EREFSTEN=0 */
ICSC2 = 0x40U; /* Initialization of the ICS control regi
ster 2 */
while(ICSSC_IREFST == 0U) { /* Wait until the source of reference clo
ck is internal clock */
SRS = 0x00U; /* Reset watchdog counter */
}
/* ICSSC: DRST_DRS=0,DMX32=0 */
ICSSC &= (unsigned char)~(unsigned char)0xE0U; /* Initialization of the ICS st
atus and control */
while((ICSSC & 0xC0U) != 0x00U) { /* Wait until the FLL switches to Low ran
ge DCO mode */
SRS = 0x00U; /* Reset watchdog counter */
}
/* INTC_WCR: ENB=0,MASK=0 */
INTC_WCR = 0x00U;
}
/*
** ===================================================================
** Method : MCU_init (component MCF51QE128_64)
**
** Description :
** Device initialization code for selected peripherals.
** ===================================================================
*/
void MCU_init(void)
{
/* SCGC1: TPM3=1,TPM2=1,TPM1=1,ADC=1,IIC2=1,IIC1=1,SCI2=1,SCI1=1 */
SCGC1 = 0xFFU;
/* SCGC2: FLS=1,IRQ=1,KBI=1,ACMP=1,RTC=1,SPI2=1,SPI1=1 */
SCGC2 = 0xFFU;
/* Common initialization of the CPU registers */
/* PTASE: PTASE7=0,PTASE6=0,PTASE4=0,PTASE3=0,PTASE2=0,PTASE1=0,PTASE0=0 */
PTASE &= (unsigned char)~(unsigned char)0xDFU;
/* PTBSE: PTBSE7=0,PTBSE6=0,PTBSE5=0,PTBSE4=0,PTBSE3=0,PTBSE2=0,PTBSE1=0,PTBSE
0=0 */
PTBSE = 0x00U;
/* PTCSE: PTCSE7=0,PTCSE6=0,PTCSE5=0,PTCSE4=0,PTCSE3=0,PTCSE2=0,PTCSE1=0,PTCSE
0=0 */
PTCSE = 0x00U;
/* PTDSE: PTDSE7=0,PTDSE6=0,PTDSE5=0,PTDSE4=0,PTDSE3=0,PTDSE2=0,PTDSE1=0,PTDSE
0=0 */
PTDSE = 0x00U;
/* PTESE: PTESE7=0,PTESE6=0,PTESE5=0,PTESE4=0,PTESE3=0,PTESE2=0,PTESE1=0,PTESE
0=0 */
PTESE = 0x00U;
/* PTFSE: PTFSE7=0,PTFSE6=0,PTFSE5=0,PTFSE4=0,PTFSE3=0,PTFSE2=0,PTFSE1=0,PTFSE
0=0 */
PTFSE = 0x00U;
/* PTGSE: PTGSE3=0,PTGSE2=0,PTGSE1=0,PTGSE0=0 */
PTGSE &= (unsigned char)~(unsigned char)0x0FU;
/* PTHSE: PTHSE7=0,PTHSE6=0,PTHSE1=0,PTHSE0=0 */
PTHSE &= (unsigned char)~(unsigned char)0xC3U;
/* PTADS: PTADS7=0,PTADS6=0,PTADS5=0,PTADS4=0,PTADS3=0,PTADS2=0,PTADS1=0,PTADS
0=0 */
PTADS = 0x00U;
/* PTBDS: PTBDS7=0,PTBDS6=0,PTBDS5=0,PTBDS4=0,PTBDS3=0,PTBDS2=0,PTBDS1=0,PTBDS
0=0 */
PTBDS = 0x00U;
/* PTCDS: PTCDS7=0,PTCDS6=0,PTCDS5=0,PTCDS4=0,PTCDS3=0,PTCDS2=0,PTCDS1=0,PTCDS
0=0 */
PTCDS = 0x00U;
/* PTDDS: PTDDS7=0,PTDDS6=0,PTDDS5=0,PTDDS4=0,PTDDS3=0,PTDDS2=0,PTDDS1=0,PTDDS
0=0 */
PTDDS = 0x00U;
/* PTEDS: PTEDS7=0,PTEDS6=0,PTEDS5=0,PTEDS4=0,PTEDS3=0,PTEDS2=0,PTEDS1=0,PTEDS
0=0 */
PTEDS = 0x00U;
/* PTFDS: PTFDS7=0,PTFDS6=0,PTFDS5=0,PTFDS4=0,PTFDS3=0,PTFDS2=0,PTFDS1=0,PTFDS
0=0 */
PTFDS = 0x00U;
/* PTGDS: PTGDS7=0,PTGDS6=0,PTGDS5=0,PTGDS4=0,PTGDS3=0,PTGDS2=0,PTGDS1=0,PTGDS
0=0 */
PTGDS = 0x00U;
/* PTHDS: PTHDS7=0,PTHDS6=0,PTHDS5=0,PTHDS4=0,PTHDS3=0,PTHDS2=0,PTHDS1=0,PTHDS
0=0 */
PTHDS = 0x00U;
/* ### Init_COP init code */
SRS = 0xFFU; /* Clear WatchDog counter */
/* ### Init_RTC init code */
/* RTCMOD: RTCMOD=0x95 */
RTCMOD = 0x95U; /* Set modulo register */
/* RTCSC: RTIF=1,RTCLKS=0,RTIE=1,RTCPS=0x0B */
RTCSC = 0x9BU; /* Configure RTC */
/* ### Init_GPIO init code */
/* PTCD: PTCD5=0,PTCD4=0 */
PTCD &= (unsigned char)~(unsigned char)0x30U;
/* PTCDD: PTCDD5=1,PTCDD4=1 */
PTCDD |= (unsigned char)0x30U;
/* ### Init_ADC init code */
/* APCTL1: ADPC7=0,ADPC6=0,ADPC5=0,ADPC4=0,ADPC3=0,ADPC2=0,ADPC1=0,ADPC0=0 */
APCTL1 = 0x00U;
/* ADCCFG: ADLPC=0,ADIV1=0,ADIV0=0,ADLSMP=0,MODE1=0,MODE0=0,ADICLK1=0,ADICLK0=
0 */
ADCCFG = 0x00U;
/* ADCCV: ADCV11=0,ADCV10=0,ADCV9=0,ADCV8=0,ADCV7=0,ADCV6=0,ADCV5=0,ADCV4=0,AD
CV3=0,ADCV2=0,ADCV1=0,ADCV0=0 */
ADCCV = 0x00U;
/* ADCSC2: ADACT=0,ADTRG=0,ACFE=0,ACFGT=0 */
ADCSC2 = 0x00U;
/* ADCSC1: COCO=0,AIEN=0,ADCO=0,ADCH4=0,ADCH3=0,ADCH2=0,ADCH1=0,ADCH0=0 */
ADCSC1 = 0x00U;
/* ### */
/*lint -save -e950 Disable MISRA rule (1.1) checking. */
asm { /* Set Interrupt level 0 */
move.w SR,D0;
andi.l #0xF8FF,D0;
move.w D0,SR;
};
/*lint -restore Enable MISRA rule (1.1) checking. */
} /*MCU_init*/
/*lint -save -e765 Disable MISRA rule (8.10) checking. */
/*
** ===================================================================
** Interrupt handler : isr_default
**
** Description :
** User interrupt service routine.
** Parameters : None
** Returns : Nothing
** ===================================================================
*/
__interrupt void isr_default(void)
{
/* Write your interrupt code here ... */
}
/* end of isr_default */
/*
** ===================================================================
** Interrupt handler : isrVlvd
**
** Description :
** User interrupt service routine.
** Parameters : None
** Returns : Nothing
** ===================================================================
*/
__interrupt void isrVlvd(void)
{
/* Write your interrupt code here ... */
}
/* end of isrVlvd */
/*
** ===================================================================
** Interrupt handler : isrVadc
**
** Description :
** User interrupt service routine.
** Parameters : None
** Returns : Nothing
** ===================================================================
*/
__interrupt void isrVadc(void)
{
/* Write your interrupt code here ... */
}
/* end of isrVadc */
/*
** ===================================================================
** Interrupt handler : isrVrtc
**
** Description :
** User interrupt service routine.
** Parameters : None
** Returns : Nothing
** ===================================================================
*/
__interrupt void isrVrtc(void)
{
/* Write your interrupt code here ... */
RTCSC_RTIE = 0;
if(estado == 0){
estado = 1;
}else{
estado = 0;
}
RTCSC_RTIE = 1;
}
/* end of isrVrtc */
/*lint -restore Enable MISRA rule (8.10) checking. */
/*lint -save -e950 Disable MISRA rule (1.1) checking. */
/* Initialization of the CPU registers in FLASH */
/* NVPROT: FPS6=1,FPS5=1,FPS4=1,FPS3=1,FPS2=1,FPS1=1,FPS0=1,FPOPEN=1 */
static unsigned char NVPROT_INIT @0x0000040D = 0xFFU;
/* NVOPT: KEYEN1=0,KEYEN0=1,SEC1=1,SEC0=1 */
static unsigned char NVOPT_INIT @0x0000040F = 0x7FU;
/*lint -restore Enable MISRA rule (1.1) checking. */
typedef unsigned long far TStackPntr;
#ifdef __cplusplus
extern "C" {
#endif
extern void _startup(void);
extern TStackPntr _SP_INIT[];
#ifdef __cplusplus
}
#endif
/* Interrupt vector table */
#ifndef UNASSIGNED_ISR
#define UNASSIGNED_ISR isr_default /* unassigned interrupt service routine *
/
#endif
/*lint -save -e950 -e740 -e931 -e926 -e927 -e928 -e929 Disable MISRA rule (1.1,
1.2,11.4) checking. */
/*Address Lvl
Pri */
void (*const vector_0)(void) @INITSP = (void(*const )(void))_SP_INIT; /*0
x00000000 - - */
void (*const vector_1)(void) @INITPC = _startup; /*0x00000004 -
- */
void (*const vector_2)(void) @Vaccerr = UNASSIGNED_ISR; /*0x00000008 -
- */
void (*const vector_3)(void) @Vadderr = UNASSIGNED_ISR; /*0x0000000C -
- */
void (*const vector_4)(void) @Viinstr = UNASSIGNED_ISR; /*0x00000010 -
- */
void (*const vector_5)(void) @VReserved5 = UNASSIGNED_ISR; /*0x00000014 -
- */
void (*const vector_6)(void) @VReserved6 = UNASSIGNED_ISR; /*0x00000018 -
- */
void (*const vector_7)(void) @VReserved7 = UNASSIGNED_ISR; /*0x0000001C -
- */
void (*const vector_8)(void) @Vprviol = UNASSIGNED_ISR; /*0x00000020 -
- */
void (*const vector_9)(void) @Vtrace = UNASSIGNED_ISR; /*0x00000024 -
- */
void (*const vector_10)(void) @Vunilaop = UNASSIGNED_ISR; /*0x00000028 -
- */
void (*const vector_11)(void) @Vunilfop = UNASSIGNED_ISR; /*0x0000002C -
- */
void (*const vector_12)(void) @Vdbgi = UNASSIGNED_ISR; /*0x00000030 -
- */
void (*const vector_13)(void) @VReserved13 = UNASSIGNED_ISR; /*0x00000034 -
- */
void (*const vector_14)(void) @Vferror = UNASSIGNED_ISR; /*0x00000038 -
- */
void (*const vector_15)(void) @VReserved15 = UNASSIGNED_ISR; /*0x0000003C -
- */
void (*const vector_16)(void) @VReserved16 = UNASSIGNED_ISR; /*0x00000040 -
- */
void (*const vector_17)(void) @VReserved17 = UNASSIGNED_ISR; /*0x00000044 -
- */
void (*const vector_18)(void) @VReserved18 = UNASSIGNED_ISR; /*0x00000048 -
- */
void (*const vector_19)(void) @VReserved19 = UNASSIGNED_ISR; /*0x0000004C -
- */
void (*const vector_20)(void) @VReserved20 = UNASSIGNED_ISR; /*0x00000050 -
- */
void (*const vector_21)(void) @VReserved21 = UNASSIGNED_ISR; /*0x00000054 -
- */
void (*const vector_22)(void) @VReserved22 = UNASSIGNED_ISR; /*0x00000058 -
- */
void (*const vector_23)(void) @VReserved23 = UNASSIGNED_ISR; /*0x0000005C -
- */
void (*const vector_24)(void) @Vspuri = UNASSIGNED_ISR; /*0x00000060 -
- */
void (*const vector_25)(void) @VReserved25 = UNASSIGNED_ISR; /*0x00000064 -
- */
void (*const vector_26)(void) @VReserved26 = UNASSIGNED_ISR; /*0x00000068 -
- */
void (*const vector_27)(void) @VReserved27 = UNASSIGNED_ISR; /*0x0000006C -
- */
void (*const vector_28)(void) @VReserved28 = UNASSIGNED_ISR; /*0x00000070 -
- */
void (*const vector_29)(void) @VReserved29 = UNASSIGNED_ISR; /*0x00000074 -
- */
void (*const vector_30)(void) @VReserved30 = UNASSIGNED_ISR; /*0x00000078 -
- */
void (*const vector_31)(void) @VReserved31 = UNASSIGNED_ISR; /*0x0000007C -
- */
void (*const vector_32)(void) @Vtrap0 = UNASSIGNED_ISR; /*0x00000080 -
- */
void (*const vector_33)(void) @Vtrap1 = UNASSIGNED_ISR; /*0x00000084 -
- */
void (*const vector_34)(void) @Vtrap2 = UNASSIGNED_ISR; /*0x00000088 -
- */
void (*const vector_35)(void) @Vtrap3 = UNASSIGNED_ISR; /*0x0000008C -
- */
void (*const vector_36)(void) @Vtrap4 = UNASSIGNED_ISR; /*0x00000090 -
- */
void (*const vector_37)(void) @Vtrap5 = UNASSIGNED_ISR; /*0x00000094 -
- */
void (*const vector_38)(void) @Vtrap6 = UNASSIGNED_ISR; /*0x00000098 -
- */
void (*const vector_39)(void) @Vtrap7 = UNASSIGNED_ISR; /*0x0000009C -
- */
void (*const vector_40)(void) @Vtrap8 = UNASSIGNED_ISR; /*0x000000A0 -
- */
void (*const vector_41)(void) @Vtrap9 = UNASSIGNED_ISR; /*0x000000A4 -
- */
void (*const vector_42)(void) @Vtrap10 = UNASSIGNED_ISR; /*0x000000A8 -
- */
void (*const vector_43)(void) @Vtrap11 = UNASSIGNED_ISR; /*0x000000AC -
- */
void (*const vector_44)(void) @Vtrap12 = UNASSIGNED_ISR; /*0x000000B0 -
- */
void (*const vector_45)(void) @Vtrap13 = UNASSIGNED_ISR; /*0x000000B4 -
- */
void (*const vector_46)(void) @Vtrap14 = UNASSIGNED_ISR; /*0x000000B8 -
- */
void (*const vector_47)(void) @Vtrap15 = UNASSIGNED_ISR; /*0x000000BC -
- */
void (*const vector_48)(void) @VReserved48 = UNASSIGNED_ISR; /*0x000000C0 -
- */
void (*const vector_49)(void) @VReserved49 = UNASSIGNED_ISR; /*0x000000C4 -
- */
void (*const vector_50)(void) @VReserved50 = UNASSIGNED_ISR; /*0x000000C8 -
- */
void (*const vector_51)(void) @VReserved51 = UNASSIGNED_ISR; /*0x000000CC -
- */
void (*const vector_52)(void) @VReserved52 = UNASSIGNED_ISR; /*0x000000D0 -
- */
void (*const vector_53)(void) @VReserved53 = UNASSIGNED_ISR; /*0x000000D4 -
- */
void (*const vector_54)(void) @VReserved54 = UNASSIGNED_ISR; /*0x000000D8 -
- */
void (*const vector_55)(void) @VReserved55 = UNASSIGNED_ISR; /*0x000000DC -
- */
void (*const vector_56)(void) @VReserved56 = UNASSIGNED_ISR; /*0x000000E0 -
- */
void (*const vector_57)(void) @VReserved57 = UNASSIGNED_ISR; /*0x000000E4 -
- */
void (*const vector_58)(void) @VReserved58 = UNASSIGNED_ISR; /*0x000000E8 -
- */
void (*const vector_59)(void) @VReserved59 = UNASSIGNED_ISR; /*0x000000EC -
- */
void (*const vector_60)(void) @VReserved60 = UNASSIGNED_ISR; /*0x000000F0 -
- */
void (*const vector_61)(void) @Vunsinstr = UNASSIGNED_ISR; /*0x000000F4 -
- */
void (*const vector_62)(void) @VReserved62 = UNASSIGNED_ISR; /*0x000000F8 -
- */
void (*const vector_63)(void) @VReserved63 = UNASSIGNED_ISR; /*0x000000FC -
- */
void (*const vector_64)(void) @Virq = UNASSIGNED_ISR; /*0x00000100 -
- */
void (*const vector_65)(void) @Vlvd = isrVlvd; /*0x00000104 7
3 */
void (*const vector_66)(void) @Vtpm1ch0 = UNASSIGNED_ISR; /*0x00000108 -
- */
void (*const vector_67)(void) @Vtpm1ch1 = UNASSIGNED_ISR; /*0x0000010C -
- */
void (*const vector_68)(void) @Vtpm1ch2 = UNASSIGNED_ISR; /*0x00000110 -
- */
void (*const vector_69)(void) @Vtpm1ovf = UNASSIGNED_ISR; /*0x00000114 -
- */
void (*const vector_70)(void) @Vtpm2ch0 = UNASSIGNED_ISR; /*0x00000118 -
- */
void (*const vector_71)(void) @Vtpm2ch1 = UNASSIGNED_ISR; /*0x0000011C -
- */
void (*const vector_72)(void) @Vtpm2ch2 = UNASSIGNED_ISR; /*0x00000120 -
- */
void (*const vector_73)(void) @Vtpm2ovf = UNASSIGNED_ISR; /*0x00000124 -
- */
void (*const vector_74)(void) @Vspi2 = UNASSIGNED_ISR; /*0x00000128 -
- */
void (*const vector_75)(void) @Vspi1 = UNASSIGNED_ISR; /*0x0000012C -
- */
void (*const vector_76)(void) @Vsci1err = UNASSIGNED_ISR; /*0x00000130 -
- */
void (*const vector_77)(void) @Vsci1rx = UNASSIGNED_ISR; /*0x00000134 -
- */
void (*const vector_78)(void) @Vsci1tx = UNASSIGNED_ISR; /*0x00000138 -
- */
void (*const vector_79)(void) @Viicx = UNASSIGNED_ISR; /*0x0000013C -
- */
void (*const vector_80)(void) @Vkeyboard = UNASSIGNED_ISR; /*0x00000140 -
- */
void (*const vector_81)(void) @Vadc = isrVadc; /*0x00000144 3
5 */
void (*const vector_82)(void) @Vacmpx = UNASSIGNED_ISR; /*0x00000148 -
- */
void (*const vector_83)(void) @Vsci2err = UNASSIGNED_ISR; /*0x0000014C -
- */
void (*const vector_84)(void) @Vsci2rx = UNASSIGNED_ISR; /*0x00000150 -
- */
void (*const vector_85)(void) @Vsci2tx = UNASSIGNED_ISR; /*0x00000154 -
- */
void (*const vector_86)(void) @Vrtc = isrVrtc; /*0x00000158 2
2 */
void (*const vector_87)(void) @Vtpm3ch0 = UNASSIGNED_ISR; /*0x0000015C -
- */
void (*const vector_88)(void) @Vtpm3ch1 = UNASSIGNED_ISR; /*0x00000160 -
- */
void (*const vector_89)(void) @Vtpm3ch2 = UNASSIGNED_ISR; /*0x00000164 -
- */
void (*const vector_90)(void) @Vtpm3ch3 = UNASSIGNED_ISR; /*0x00000168 -
- */
void (*const vector_91)(void) @Vtpm3ch4 = UNASSIGNED_ISR; /*0x0000016C -
- */
void (*const vector_92)(void) @Vtpm3ch5 = UNASSIGNED_ISR; /*0x00000170 -
- */
void (*const vector_93)(void) @Vtpm3ovf = UNASSIGNED_ISR; /*0x00000174 -
- */
void (*const vector_94)(void) @VReserved94 = UNASSIGNED_ISR; /*0x00000178 -
- */
void (*const vector_95)(void) @VReserved95 = UNASSIGNED_ISR; /*0x0000017C -
- */
void (*const vector_96)(void) @VL7swi = UNASSIGNED_ISR; /*0x00000180 -
- */
void (*const vector_97)(void) @VL6swi = UNASSIGNED_ISR; /*0x00000184 -
- */
void (*const vector_98)(void) @VL5swi = UNASSIGNED_ISR; /*0x00000188 -
- */
void (*const vector_99)(void) @VL4swi = UNASSIGNED_ISR; /*0x0000018C -
- */
void (*const vector_100)(void) @VL3swi = UNASSIGNED_ISR; /*0x00000190 -
- */
void (*const vector_101)(void) @VL2swi = UNASSIGNED_ISR; /*0x00000194 -
- */
void (*const vector_102)(void) @VL1swi = UNASSIGNED_ISR; /*0x00000198 -
- */
/*lint -restore Enable MISRA rule (1.1,1.2,11.4) checking. */
/* END MCUinit */
/*
** ###################################################################
**
** This file was created by Processor Expert 10.0 [05.03]
** for the Freescale ColdFireV1 series of microcontrollers.
**
** ###################################################################
*/