IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 61, NO.

3, MARCH 2014 1269

A Z-Source Half-Bridge Converter
Guidong Zhang, Zhong Li, Bo Zhang, Member, IEEE,
Dongyuan Qiu, Member, IEEE, Wenxun Xiao, and Wolfgang A. Halang
AbstractApplying an LC network into a half-bridge con-
verter, a novel Z-source half-bridge converter is presented, in
which less LC components are needed compared to the conven-
tional one. This Z-source half-bridge converter can solve not only
the problems of the shoot-through and limited voltage but also the
problem of imbalance at the midpoint voltage of input capacitors.
Furthermore, it can generate a broader range of output voltage
values and much more kinds of waveforms, such as the varied
positive or negative output voltages and the varied time ratio
between positive and negative voltages, which are particularly
desirable for some special power supplies, like the electrochemical
power supply. Finally, the proposed converter is implemented in a
prototype, and the experimental results can verify the effectiveness
of the proposed converter.
Index TermsHalf-bridge converter, reduced number,
shoot-through, Z-source.
I. INTRODUCTION
C
ONVENTIONAL half-bridge converters have their
switches in series, as shown in Fig. 1, with which the
shoot-through can occur [1], which means that the strong
current owing through the switches makes them break down.
Moreover, the ac output voltage is limited below the dc voltage,
which is named the limited voltage problem, because, in prac-
tice, ac output voltage is sometimes desirable to be higher than
the dc voltage. Furthermore, an unbalanced midpoint of input
capacitors in conventional half-bridge converters leads to large
ripples [2], [3], making the system unstable.
To solve the unbalanced midpoint problem, Eloy-Garcia
et al. proposed an extended direct power control algorithm
to balance the midpoint voltage in multilevel neutral-point-
clamped (NPC) inverters [4], [5]. Although the method is
designed for three-phase inverters and multilevel NPC, it is also
applicable to a single-phase half-bridge converter. Additionally,
Manuscript received August 20, 2012; revised November 21, 2012 and
February 3, 2013; accepted March 20, 2013. Date of publication April 5, 2013;
date of current version August 23, 2013. This work was supported in part by
the Key Program of the National Natural Science Foundation of China under
Grant 50937001.
G. Zhang is with the School of Electric Power, South China University
of Technology, Guangzhou 510640, China, and also with the Faculty of
Mathematics and Computer Science, FernUniversitt in Hagen, 58084 Hagen,
Germany (e-mail: zgdscut@gmail.com).
Z. Li was with the Faculty of Mathematics and Computer Science,
FernUniversitt in Hagen, 58084 Hagen, Germany. He is now with the Faculty
of Engineering, University of DuisburgEssen, 47057 Duisburg, Germany
(e-mail: zhong.li@fernuni-hagen.de).
B. Zhang, D. Qiu, and W. Xiao are with the School of Electric Power,
South China University of Technology, Guangzhou 510640, China (e-mail:
epbzhang@scut.edu.cn; epdyqiu@scut.edu.cn; epxwx@yahoo.com.cn).
W. A. Halang is with the Faculty of Mathematics and Computer Science,
FernUniversitt in Hagen, 58084 Hagen, Germany (e-mail: Wolfgang.Halang@
fernuni-hagen.de).
Color versions of one or more of the gures in this paper are available online
at http://ieeexplore.ieee.org.
Digital Object Identier 10.1109/TIE.2013.2257146
Fig. 1. Conventional half-bridge converter.
Win et al. and Tanaka et al. proposed a half-bridge-converter-
based active power quality compensator with a dc voltage
balancer to balance voltages of two dc capacitors [6], [7].
To solve the limited voltage problem, adding a boost circuit
instead of the source or adding a step-up transformer in parallel
with the output part has been proposed [8], where the output
voltage is xed due to the xed turn ratio of the transformer.
In order to solve the shoot-through problem, a shoot-through
protection scheme has been proposed [9], but it is only applica-
ble to specially designed switches. In addition, a novel control
strategy based on a digital signal processor [10] has also been
proposed, which is like traditional methods focusing on control
design instead of redesigning the main circuit. Redesigning the
main circuit not only can reduce the complexity and cost but
also can enhance the stability of the system.
To solve the limited voltage problem and the shoot-through
problem better, Peng has rst used an LC network, which is
named a Z-network as shown in Fig. 2, to couple with the dc
source in the converters and, thus, proposed a novel source,
which is different from the voltage source and the current
source and is named as a Z-source (see Fig. 2) [11]. Since then,
the Z-source technology has greatly advanced. For example,
Peng et al. have proposed some novel Z-source circuits [12],
[13] and corresponding control methods [14], [15]. Following
Pengs work, new Z-source circuits and control methods have
also been proposed, such as the algorithms for controlling both
the dc boost and ac output voltage of Z-source inverters [16] and
dual-inputdual-output Z-source inverters [17]; moreover, the
Z-source technology has been applied in practice, for instance,
in fuel cell systems [18], motor drives [19], distributed power
generations [20], photovoltaic systems [21], and battery hybrid
electric vehicles [22]. The Z-source converter can work in
the shoot-through mode, and its output voltage can reach a
broader range than that of the conventional ones. However,
the range of the output voltage is not broad enough for some
special applications, like electrochemical power supply [23],
which requires a much broader range of output voltage [24] and
abundant waveforms in various shapes [25], [26].
0278-0046 2013 IEEE
1270 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 61, NO. 3, MARCH 2014
Fig. 2. Z-source half-bridge converter with two Z-networks.
Applying Pengs Z-source concept into half-bridge convert-
ers [11] results in a Z-source half-bridge converter, in which an
LC Z-network should be parallelized to the power source. It
is known that two input capacitors in the half-bridge converter
play the role of two dc sources; therefore, two LC Z-networks
are needed to couple with the capacitors, as shown in Fig. 2
[27], [28]. Although the characteristics of the Z-source may be
obtained, many additional devices, such as LC elements, are
used in the circuit, which increase the cost, size, and weight of
the converter.
Here, a novel Z-source half-bridge converter is proposed,
in which, instead of putting two LC Z-networks to couple
with the capacitors, only one LC Z-network is required to
be placed between the input capacitors and the switches. This
proposed Z-source half-bridge converter not only can solve the
limited voltage and the shoot-through problems but also can
solve the unbalanced midpoint voltage problem. Furthermore,
it can generate a much broader range of output voltages and
more abundant waveforms than the conventional Z-source con-
verter. It is also remarked that it has higher efciency than
conventional half-bridge converters, where an additional dcdc
boost converter is needed to obtain such desired outputs as
the proposed converter can, as it is stated in [11] that The
Z-source inverter can generate boostbuck voltage, minimize
component count, increase efciency, and reduce cost and
For applications where over drive is desirable and the available
dc voltage is limited, an additional dcdc boost converter is
needed to obtain a desired ac output. The additional power
converter stage increases system cost and lowers efciency.
A typical application of the Z-source half-bridge converter
is in the electrochemical power supply, whose output voltages
are requested to be varied, including varied positive or negative
output voltages and the varied time ratio between positive
and negative voltages. These characteristics, desired in elec-
trochemical power supply, are the very ones of the proposed
converter. For example, in order to realize the smooth electro-
plating products, the current densities and directions should be
varied according to the requests of electroplating technology
[25], [26]. Traditionally, the engineer had to compose sev-
eral cascaded subcircuits and use complex control methods
to generate an overlapped waveform of multioutput voltages
[23], [24]. However, the disadvantages lie in that it is hard to
control and regulate the output voltages, and the use of cascaded
subcircuits not only increases the cost and size but also leads to
a more complex bulky structure and instability of the system.
Fig. 3. Diagram of electroplating.
Electroplating is a kind of electrochemical process, whose
fundamental operation diagram and operation principle are
shown in Fig. 3 and described in the following.
The electroplating process is a redox reaction, with funda-
mental components: two electrodes (+ and ), a dc source
(V
d
), and the solution, as shown in Fig. 3. The purpose of the
electroplating is to make the metal ions cover the surface of the
negative electrode evenly and smoothly. However, due to
the nonuniformity of the solution, the dc-voltage direction and
the current density should be changed from time to time, which
requires complicated designs according to different products
and processes [25], [26].
With the rapid growth of the demand on electroplating prod-
ucts with very different voltages and duties, there are more
stringent requirements on the electrochemical power supplies
to provide a broad range of outputs, asymmetrical positive and
negative voltages, step waves, recurrent pulses, square waves,
triangular waves, and saw-tooth waves [24], which can be quite
well fullled by the proposed converter.
The rest of this paper is organized as follows. Section II
gives the system design and analysis. Then, in Section III,
the midpoint balances of input capacitors in the traditional
converter and the proposed converter are compared to show that
the proposed converter is more stable. The parameter design
of the Z-network is discussed in Section IV. In Section V,
simulations via Simulink software are conducted to verify the
analysis. In Section VI, a prototype is designed to illustrate the
performance of the proposed converter. Finally, a conclusion is
drawn in Section VII.
II. SYSTEM DESIGN AND ANALYSIS
The proposed converter is depicted in Fig. 4, in which an LC
Z-network, consisting of capacitors C
1
and C
2
and inductors
L
1
and L
2
, is integrated into a traditional half-bridge converter,
consisting of capacitors C
d1
and C
d2
, switches S
1
and S
2
, and
diode D, which is used to prevent the current from owing back
to the source. Therein, the use of the inductors in the Z-network
is to avoid strong current in the circuit when the switches are in
the shoot-through state.
ZHANG et al.: Z-SOURCE HALF-BRIDGE CONVERTER 1271
Fig. 4. Z-source half-bridge converter.
For simplicity, the following conditions are assumed: 1) All
the components are ideal; 2) the dead time in the driven pulses
is ignored; 3) L
1
= L
2
and C
1
= C
2
in the Z-network; 4) C
1
,
C
2
, C
d1
, and C
d2
are large enough; and 5) the freewheeling
diodes of the switches are ignored in the analysis since the load
characteristic of the electrochemical solution is resistance or
resistance with a small capacitance.
Denote the duties of the switches S
1
and S
2
by D
1
and
D
2
, respectively. The proposed converter performs differently
in two cases: D
1
+D
2
1 and D
1
+D
2
> 1.
A. Case 1: D
1
+D
2
1
In this case, S
1
and S
2
are not switched on at the same time;
then, the circuit is in the non-shoot-through state.
There are three modes corresponding to the states of the
switches. In the rst mode, Fig. 5(a) shows an equivalent circuit
for the mode when the S
1
is on and S
2
is off, in which the cur-
rent ows out of the source, through the diode, the Z-network,
and S
1
, and then back to the source. The arrows indicate the
current directions. In the second mode, Fig. 5(b) shows an
equivalent circuit of that when S
1
and S
2
are off, in which the
current also ows out of the source, through the diode and the
Z-network, and back to the source; there is no output here. In
the third mode, Fig. 5(c) shows an equivalent circuit of that
when S
2
is on and S
1
is off, in which the diode suffers a neg-
ative voltage and, thus, turns off. The current ows out of the
source, through the load, S
2
, and the Z-network, and then back
to the source. Furthermore, the current direction is also indi-
cated. The operation process for this case is similar to the tradi-
tional one for half-bridge converters, which is not detailed here.
B. Case 2: D
1
+D
2
> 1
In this case, the behavior of the switches in the circuit leads
to three modes within a switch period T, which correspond to
three linear equivalent circuits: Mode 1, when S
1
and S
2
are
on; Mode 2, when S
1
is on and S
2
is off; and Mode 3, when S
1
is off and S
2
is on, as shown in Fig. 6(a)(c), respectively.
Denote t
0
as the beginning of one period, t
1
as the mode
transition instant from mode 1 to mode 2, i.e., t
1
= t
0
+ (D
2
+
D
1
1)T, t
2
as the mode transition instant from mode 2 to
mode 3, i.e., t
2
= t
1
+ (1 D
2
)T, and t
3
= T as the end of
the period.
Fig. 5. Equivalent circuits in case 1. (a) S
1
on and S
2
off. (b) S
1
off and
S
2
off. (c) S
1
off and S
2
on.
In the steady state of the converter, its operation process in
a switch period is analyzed in the following, and the output
voltage v
o
will be deduced in each mode.
1) Mode 1: t [t
0
, t
1
]: As shown in Fig. 6(a), in loops 1
and 2, capacitors C
1
and C
2
discharge the energy to inductors
L
1
and L
2
; thereafter, i
L
1
and i
L
2
increase. Thus, L
1
and L
2
store the energy, and one has

v
L
1
= v
C
1
v
L
2
= v
C
2
(1)
where i
L
1
, i
L
2
, v
L
1
, v
L
2
, v
C
1
, and v
C
2
are the currents of L
1
and L
2
and the voltages of L
1
, L
2
, C
1
, and C
2
, respectively.
The voltage of diode D is (v
C
1
+v
C
2
V
d
), so D un-
dertakes negative voltage stress and, thus, turns off. The en-
ergy of C
2
is delivered to the load R
L
and C
d2
through the
C
2
R
L
C
d2
loop, so C
d2
charges and C
d1
discharges.
1272 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 61, NO. 3, MARCH 2014
Fig. 6. Equivalent circuits in case 2. (a) Mode 1: S
1
on and S
2
on. (b) Mode 2:
S
1
on and S
2
off. (c) Mode 3: S
1
off and S
2
on.
In terms of the C
2
R
L
C
d2
loop, the output voltage of the
converter reads
v
o
= v
C
2
v
C
d2
(2)
where v
C
d2
is the voltage of C
d2
.
2) Mode 2: t [t
1
, t
2
]: As shown in Fig. 6(b), S
1
is on, and
S
2
is off. In loop 1, the source V
d
and L
1
discharge the energy
to C
2
, so that v
C
2
increases. In loop 2, the source V
d
and L
2
discharge the energy to C
1
; thereafter, v
C
1
increases. Then, the
energy of C
2
is delivered to the load R
L
and C
d2
through the
C
2
R
L
C
d2
loop, so C
d2
charges and C
d1
discharges. From
loop 1, one has
v
L
1
= V
d
v
C
2
. (3)
In terms of the C
2
R
L
C
d2
loop, the output voltage of the
converter is the same as that in (2).
Mode 3: t [t
2
, t
3
]: In Fig. 6(c), S
1
is off, and S
2
is on.
In loop 1, the source V
d
and L
1
discharge the energy to C
2
;
thus, v
C
2
increases. Similarly, in loop 2, V
d
and L
2
discharge
the energy to C
1
; thus, v
C
1
increases. The energy of L
2
and
C
d2
is delivered to R
L
through the L
2
C
d2
R
L
loop, so C
d2
discharges and C
d1
charges. In terms of loop 1, one has the
same equation as (3).
In terms of the V
d
DC
1
R
L
C
d2
loop, the output volt-
age is
v
o
= (v
C
d2
+v
C
1
V
d
). (4)
As a result, v
o
can be deduced as follows.
The voltagesecond characteristic of L
1
leads to

T
0
v
L
1
dt = 0. (5)
Substituting (1) and (3) into (5) leads to
(D
2
+D
1
1)Tv
C
1
+(2D
2
D
1
)T(V
d
v
C
2
)=0. (6)
Assume that L
1
= L
2
, C
1
= C
2
, and C
1
and C
2
are large
enough. Due to the structural symmetry of the Z-network, (6)
can be rewritten as
v
C
1
v
C
2
=
2 D
1
D
2
3 (D
1
+D
2
)
V
d
. (7)
The amperesecond property of C
d2
implies that

T
0
i
C
d2
dt = 0 (8)
where i
C
d2
is the current of C
d2
.
Denote the voltage and current of C
d1
by v
C
d1
and i
C
d1
, re-
spectively. It is known from Fig. 6 that v
C
d1
+v
C
d2
=V
d
. Denote
the errors of v
C
d1
and v
C
d2
by v
C
d1
and v
C
d2
, respectively.
Due to V
d
being a constant, one has v
C
d1
=v
C
d2
, and
straightforwardly, i
C
d1
=i
C
d2
in terms of i =Cdu/dt.
Moreover, from i
o
= i
C
d1
+i
C
d2
, one has i
C
d2
= i
o
/2,
where i
o
is the current of the load; thereafter, (8) can be
rewritten as
(v
C
2
v
C
d2
)
2R
L
D
1
T +
(v
C
2
+v
C
d2
V
d
)
2R
L
(1D
1
)T =0 (9)
and it follows that
v
C
d2
= (2v
C
2
V
d
)D
1
v
C
2
+V
d
. (10)
When switch S
1
is on, substituting (7) and (10) into (2)
results in the positive output of the converter v
p
as
v
p
= v
o
= v
C
2
v
C
d2
=
(1 D
1
)
3 2(D
1
+D
2
)
V
d
. (11)
When the switch S
2
is on and S
1
is off, substituting (7) and
(10) into (4) leads to the negative output of the converter v
n
as
v
n
= v
o
= v
d
v
C
2
v
C
d2
=
D
1
3 2(D
1
+D
2
)
V
d
. (12)
ZHANG et al.: Z-SOURCE HALF-BRIDGE CONVERTER 1273
Fig. 7. Relationship gure of D
1
, D
2
, and v
o
/V
d
.
Fig. 8. Zooming in of Fig. 7.
According to (11) and (12), the relationships of D
1
, D
2
, and
v
o
/V
d
are drawn in Fig. 7. Therein, v
o
/V
d
increases dramati-
cally as D
1
+D
2
is about 1.5, which is zoomed in in Fig. 8.
It is remarked from Figs. 7 and 8 that the novel converter can
generate abundant output voltages by adjusting D
1
and D
2
.
When v
o
/V
d
< 1, the converter functions as a buck con-
verter; otherwise, the converter acts as a boost converter. There-
fore, it is a buckboost converter. By controlling the duty of
the switches, special output voltages can be obtained, including
the buckboost voltages, asymmetric and symmetric voltages,
positive and negative peak output voltages, and the time ratio
between positive and negative voltages.
Additionally, according to (11) and (12), the values of v
p
and
v
n
are not equal when D
1
= 0.5, but they are equal when D
1
=
0.5, which will be explained hereinafter.
First, when D
1
= 0.5, the key waveforms of the Z-source
half-bridge converter in case 2 are drawn in Fig. 9 according to
the analysis for three modes, where Q
S
1
and Q
S
2
stand for the
driving voltages of switches S
1
and S
2
, respectively; i
d
is the
current of diode D; i
L
1
and i
L
2
are the currents of inductances
L
1
and L
2
, respectively; v
C
1
, v
C
2
, v
C
d1
, and v
C
d2
are the
voltages of the capacitances C
1
, C
2
, C
d1
, and C
d2
, respectively;
and v
o
is the output voltage. Additionally, modes 1, 2, and 3 are
distinguished in red, blue, and green colors, respectively. The
limited output voltages of the traditional half-bridge converter
Fig. 9. Key waveforms of the Z-source half-bridge converter in case 2 when
D
1
= 0.5 and D
2
= 0.7.
V
d
/2 and V
d
/2 are marked at the output voltage waveform
v
o
, and it is shown that the output voltages of the proposed
converter can exceed the limited one.
Second, the corresponding waveforms for D
1
= 0.5 are
shown in Fig. 10. It is remarked that the output voltage v
o
in
Fig. 10 is quite different from that in Fig. 9; the positive and
negative values of v
o
in Fig. 9 are symmetrical, but they are
asymmetrical in Fig. 10. This means that the proposed converter
generates many kinds of output voltages, fullling the require-
ments of the electrochemical power supply, such as various
positive or negative output voltages, and the regulated duration
at negative or positive output voltage, which has prominent ad-
vantages over traditional methods by using complicated control
methods and multiple cascaded subcircuits.
Moreover, the efciency of the converter is given by
=
P
out
P
in
=
D
1
v
2
p
R
+ (1 D
1
)
v
2
n
R
V
d
I
av
=
D
1
v
2
p
+ (1 D
1
)v
2
n
RV
d
I
av
=
D
1
(1 D
1
)V
d
(3 2(D
1
+D
2
))
2
RI
av
(13)
where P
out
= D
1
v
2
p
+ (1 D
1
)v
2
n
/R, P
in
= V
d
I
av
, and I
av
are the output power, the input power, and the average input
current, respectively. Here, the conduction and switching loss
is taken into account, which is indicated in P
in
P
out
.
1274 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 61, NO. 3, MARCH 2014
Fig. 10. Waveforms of the Z-source half-bridge converter in case 2 when
D
1
= 0.7 and D
2
= 0.5.
III. MIDPOINT BALANCE OF INPUT CAPACITORS
The stability of the midpoint voltage in the converter plays a
key role for the systems stability. The midpoint voltages of the
input capacitors in the conventional converter and the proposed
converter will be analyzed and compared in this section.
A. Midpoint Voltage in Conventional Half-Bridge Converters
In conventional half-bridge converters, there are always some
problems caused by the midpoint imbalance of the input capaci-
tor voltage. In this section, the midpoint voltage in conventional
half-bridge converters will be analyzed, and the uctuation
equation of the midpoint voltage will be deduced.
Fig. 11 shows the equivalent circuits of that in Fig. 1.
In a switching period, S
1
is on and S
2
is off as t [0, D
1
T],
while S
1
is off and S
2
is on as t [D
1
T, T].
Denote the initial voltage of C
d2
by V
C
d2
0
. In terms of
the Kirchhoffs voltage law (KVL), v
C
d2
can be derived in
frequency domain as
v
C
d2
(s) =
V
d
s

V
d
V
C
d2
0
s +
1
C
d2
R
. (14)
Employing Laplace inverse transformation to (14) results in
v
C
d2
(t) = V
d
(V
d
V
C
d2
0
)e

t
C
d2
R
. (15)
Denote the maximal and the minimal voltages of v
C
d2
by
v
C
d2
max
and v
C
d2
min
, respectively, and the maximal uctua-
Fig. 11. Equivalent circuits of the conventional half-bridge converter.
(a) Mode 1: S
1
on and S
2
off. (b) Mode 2: S
1
off and S
2
on.
tion of v
C
d2
by V . Following (15), one has
V =v
C
d2
max
v
C
d2
min
=(V
d
V
C
d2
0
)

1 e

D
1
T
C
d2
R

. (16)
In the high-frequency power supply, T is always very small,
the input capacitance C
d2
is always quite large, particularly
in electrochemical application, and its load is very large.
Thus, D
1
T is much smaller than C
d2
R, and (16) can be
approximated by
V
D
1
t
C
d2
R
(V
d
V
C
d2
0
). (17)
B. Midpoint Voltage in Z-Source Half-Bridge Converters
It is described in [29] that the input part can be regarded as a
dc voltage source or a dc current source due to the Z-network.
Similarly, the output part of the Z-network can be treated as a
dc current source. Hence, the equivalent circuits are derived as
follows.
The differential equation of the circuit shown in Fig. 12(a)
can be described as
C
d2
dv
C
d2
dt
= I
p
(18)
where I
p
is the current of the constant current source.
Integrating both sides of (18) leads to
v
C
d2
(t) = V
C
d2
0
+

I
p
C
d2
dt. (19)
Denote the maximal uctuation of v
C
d2
as shown in Fig. 12
by V
Z
. Then, from (19), one has
V
Z
=v
C
d2
max
v
C
d2
min
=

D
1
T
0
I
p
C
d2
dt = D
1
T
I
p
C
d2
. (20)
ZHANG et al.: Z-SOURCE HALF-BRIDGE CONVERTER 1275
Fig. 12. Equivalent circuits of the Z-source half-bridge converter. (a) Mode 1:
S
1
on and S
2
off. (b) Mode 2: S
1
off and S
2
on.
I
p
can be derived by Kirchhoffs current law (KCL) as
I
p
=
V
d
V
C
d2
0
V
I
p
R
(21)
where V
I
p
is the voltage of the constant current source.
Substituting (21) into (20) leads to
V
Z
= D
1
T
V
d
V
C
d2
0
V
I
p
C
d2
R
. (22)
Therein, the ratio of V
Z
to V can be derived from (17) and
(22) as
V
Z
V
=
V
d
V
C
d2
0
V
I
p
V
d
V
C
d2
0
100%. (23)
It is obvious that V
Z
< V , if V
I
p
is positive; the smaller
the V
Z
/V is, the smaller the ripple in the proposed con-
verter is and, consequently, the more stable the proposed con-
verter is. V
Z
/V will become very small, or even zero, if
V
I
p
is very close to the value of V
d
V
C
d2
0
, and V
I
p
can be
designed by the parameters of the Z-network.
It is remarked that the proposed converter is more stable
than the traditional one with regard to the problem of the input
capacitor stability.
IV. PARAMETER DESIGN
The parameters of the Z-network are designed in this section,
including capacitor and inductance parameter design.
A. Parameter Design of the Capacitor in the Z-Network
Normally, the design of the capacitor is to determine the rated
voltage and capacitance with a permitted uctuation range x
C
%
(x
C
is preassigned), a given output voltage V
o
, a given output
current I
o
, and a given switching period T.
From (7), (11), and (12), one has
v
C
2
=
2D
1
D
2
D
1
V
o
, when (S
1
)=(on) (24)
v
C
2
=
2D
1
D
2
1D
1
V
o
, when (S
1
, S
2
)=(off, on). (25)
In terms of KCL, the equations of the connected nodes
of L
2
C
1
S
2
in Fig. 6(a), L
1
C
2
S
1
in Fig. 6(b), and
L
2
C
1
S
2
in Fig. 6(c) can be derived as

i
L
2
= i
C
1
+i
o
, when (S
1
, S
2
) = (on, on)
i
L
1
= i
C
2
+i
o
, when (S
1
, S
2
) = (on, off)
i
L
2
= i
o
i
C
1
, when (S
1
, S
2
) = (off, on).
(26)
Denote the rms currents of L
2
and C
2
by I
L
2
and I
C
2
,
respectively. Then, from (26), one has
I
C
2
I
L
2
=
I
o
2
. (27)
1) Determination of the Rated Voltage: The range of v
C
2
is determined by (24) and (25). Thereby, the rated voltage of
C
2
can be determined by the maximal V
C
2
M
. Considering the
safety margin, the rated voltage of C
2
is normally set between
1.5V
C
2
M
and 2V
C
2
M
.
2) Determination of the Rated Capacitance: The ripples
of the capacitors have great inuence on the stability of the
converter, whose permitted uctuation range can be used to
design the capacitance.
Then, the capacitors in the Z-network can be designed ac-
cording to the differential equation of capacitors
C
2
=
i
C
2
dt
dv
C
2
. (28)
The high harmonic frequency of the capacitance is nearly
equal to the switching frequency of the converter, as shown in
Fig. 9, namely,
dt (D
1
+D
2
1)T. (29)
Denote the permitted error of V
C
2
M
by dv
C
2
, according to
the permitted uctuation range x
C
%; dv
C
2
is expressed as
dv
C
2
= x
C
%V
C
2
M
. (30)
Substituting (27), (29), and (30) into (28) leads to
C
2
=
I
o
(D
1
+D
2
1)T
2x
C
%V
C
2
M
. (31)
1276 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 61, NO. 3, MARCH 2014
Therein, the range of the capacitance can be calculated, and the
maximum is taken as the rated capacitance.
B. Parameter Design of the Inductor in the Z-Network
Similar to the parameter design of the capacitor, the param-
eter design of the inductor is to determine the rated current
and capacitance with a permitted uctuation range x
L
% (x
L
is
preassigned), a given output voltage V
o
, a given output current
I
o
, and a given switching period T.
1) Determination of the Rated Current: I
L
2
can be deter-
mined by (27). Considering the safety margin, the rated current
of L
2
is normally taken as 2I
L
2
.
2) Determination of the Rated Inductance: The ripples of
the inductors also have great inuence on the stability of the
converter; therefore, the inductance can be designed in terms of
the permitted ripples.
The inductances in the Z-network can be designed according
to the differential equation of inductances
L
2
=
v
L
2
dt
L
di
L
2
. (32)
In the L
1
C
2
L
2
C
1
loop, the KVL equation can be ex-
pressed as v
L
2
+v
C
1
= v
L
1
+v
C
2
. In the Z-network, the rms
voltages of C
1
, C
2
, L
1
, and L
2
are denoted by V
C
1
, V
C
2
, V
L
1
,
and V
L
2
, respectively, and one has v
C
1
V
C
2
and V
L
2
V
L
1
.
Thereby, the maximum of v
L
2
is derived as
V
L
2
M
V
C
2
M
. (33)
The high harmonic frequency of the inductance is nearly
equal to the switching frequency of the converter, as shown in
Fig. 9, so the time interval dt
L
in (32) can be obtained as
dt
L
(D
1
+D
2
1)T. (34)
Denote the permitted error of I
L
2
by di
L
2
. According to the
permitted uctuation range x
L
%, di
L
2
is expressed as
di
L
2
= x
L
%I
L
2
. (35)
Substituting (24), (25), (27), and (33)(35) into (32) leads to
the inductance of L
2
L
2
=
2V
C
2
M
(D
1
+D
2
1)T
x
L
%I
o
. (36)
V. SIMULATION RESULTS
To verify the feasibility and validity of the proposed con-
verter, Simulink software is applied for the simulation of the
converter.
The preassigned parameters are as follows: x
C
% = 1%,
x
L
% = 10%, V
d
= 48 V, V
o
= 100 V, I
o
= 10 A, and T =
20 s. According to the design, the parameters of the con-
verter can be calculated: C
1
= C
2
= 482.5 F and L
1
= L
2
=
105.5 H. However, in practice, the parameters can be chosen
as follows: C
1
= C
2
= 470 F and L
1
= L
2
= 100 H.
Fig. 13. Simulation waveforms when D
1
= 0.5 and D
2
= 0.7.
Fig. 14. Simulation waveforms when D
1
= 0.7 and D
2
= 0.5.
The simulation results are shown in Figs. 13 and 14, which
are consistent to the theoretical analyses shown in Figs. 9
and 10.
VI. EXPERIMENT RESULTS
A prototype of the Z-network converter is built as shown
in Fig. 15, and the parameters are chosen as follows: C
d1
=
C
d2
= 470 F, C
1
= C
2
= 470 F, L
1
= L
2
= 100 H, R =
100 , and T = 20 s.
The main circuit is in the left side in Fig. 15, composed of L
1
,
L
2
, C
1
, C
2
, switches (type: IRFP450), and the resistive load
R, while the driving circuit is in the right side, composed of
ZHANG et al.: Z-SOURCE HALF-BRIDGE CONVERTER 1277
Fig. 15. Prototype of the proposed converter.
Fig. 16. Experimental waveforms in shoot-through case (D
1
= 0.5 and
D
2
= 0.7).
two SG3525 ICs being applied to generated two synchronous
overlapped driving signals and TLP250 ICs being used to
drive the switches, whose working frequency and duties can be
adapted by the adjustable resistors.
The waveforms of the converter at D
1
= 0.5 and D
2
= 0.7
with an input voltage of 40 V are shown in Fig. 16. Therein,
the upper waveform refers to V
GS
(gatedrain voltage) of the
switch S
1
, the middle one is V
SD
(sourcedrain voltage) of
the switch S
2
, which is not but can be synchronized to the
driving waveform of S
2
, and the lower one is the output voltage
of the load R, whose negative and positive output voltages
are symmetric, and they are all about 50 V. This veries the
analytical and simulation results.
Fig. 17 shows the experimental waveforms of the converter
when D
1
= 0.7 and D
2
= 0.5. Therein, the negative and pos-
itive output voltages are asymmetric; the positive one is about
20 V, which is nearly equal to V
d
/2 and has a width of D
1
T,
while the negative one is 40 V, which is much larger than V
d
/2.
The experimental results are also consistent with the simulation
results.
In order to verify that the proposed converter has a balanced
midpoint voltage, the experimental result is shown in Fig. 18.
Therein, the ripples of v
C
d2
in the proposed converter have
maximal peak-to-peak values just about 98.4 mV.
The start-up waveforms with the start-up time of about 80 ms
are shown in Fig. 19.
The efciency is obtained through an experiment and the
calculation according to (13), with regard to the resistance
Fig. 17. Experimental waveforms in shoot-through case (D
1
= 0.7 and
D
2
= 0.5).
Fig. 18. Ripple experiment waveform of v
C
d2
in the proposed converter.
Fig. 19. Start-up output waveforms.
Fig. 20. Comparison between the experimental and estimation efciencies.
increasing from 1 to 10 at a step length of 1 , as shown
in Fig. 20. It is remarked that, as the resistance increases,
the power reduces and the efciency decreases; moreover, the
output voltages can be regulated.
1278 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 61, NO. 3, MARCH 2014
VII. CONCLUSION
Inspired by the Z-source converter, this paper has proposed
a novel Z-source half-bridge converter that can output buck
boost voltages. Different from the Z-source converter, it needs
only one LC Z-network between the input capacitors and the
switches. Additionally, the novel converter is more stable than
the conventional one according to the analysis of the midpoint
balance of input capacitors.
Moreover, the converter has been analyzed in two differ-
ent states, including the shoot-through and non-shoot-through
states. Furthermore, the feature of the proposed converter
owning abundant outputs under an appropriate control is very
desirable for requirements of the electrochemical power supply.
Finally, simulations and experiments have been carried out to
verify the effectiveness of the proposed converter.
ACKNOWLEDGMENT
The rst author would like to thank F. Xie for his help in
conducting a part of the experiments.
REFERENCES
[1] B. Zhao, Q. G. Yu, Z. W. Leng, and X. Y. Chen, Switched Z-source
isolated bidirectional DCDC converter and its phase-shifting shoot-
through bivariate coordinated control strategy, IEEE Trans. Ind. Elec-
tron., vol. 59, no. 12, pp. 46574670, Dec. 2012.
[2] Y. C. Hung, F. S. Shyu, C. J. Lin, and Y. S. Lai, New voltage balance
technique for capacitors of symmetrical half-bridge converter with current
mode control, in Proc. PEDS, 2003, pp. 365369.
[3] Z. Liu, B. Liu, S. Duan, Y. Kang, and K. N. J. Soon, Anovel DCcapacitor
voltage balance control method for cascade multilevel STATCOM, IEEE
Trans. Power Electron., vol. 27, no. 1, pp. 1427, Jan. 2012.
[4] J. Eloy-Garcia, S. Arnaltes, and J. L. Rodriguez-Amenedo, Extended
direct power control for multilevel inverters including DC link middle
point voltage control, IET Elect. Power Appl., vol. 1, no. 4, pp. 571580,
Jul. 2007.
[5] J. Eloy-Garcia, S. Arnaltes, and J. L. Rodriguez Amenedo, Extended
direct power control of a three-level neutral point clamped voltage
source inverter with unbalanced voltages, in Proc. IEEE PESC, 2008,
pp. 33963400.
[6] T. S. Win, Y. Baba, M. Okamoto, E. Hiraki, and T. Tanaka, A half-
bridge inverter based active power quality compensator with a DC voltage
balancer for electried railways, in Proc. IEEE PEDS, Dec. 2011,
pp. 185190.
[7] T. Tanaka, K. Ishibashi, N. Ishikura, and E. Hiraki, A half-bridge inverter
based active power quality compensator for electried railways, in Proc.
Int. Power Electron. Conf., 2010, pp. 15901595.
[8] M. Kamli, S. Yamamoto, and M. Abe, A 50150 kHz half-bridge inverter
for induction heating applications, IEEE Trans. Ind. Electron., vol. 43,
no. 1, pp. 163172, Feb. 1996.
[9] D. Boroyevich, D. Zhang, and P. Ning, A shoot-through protection
scheme for converters built with SiC JFETs, IEEE Trans. Ind. Appl.,
vol. 46, no. 6, pp. 24952500, Nov./Dec. 2010.
[10] Z. L. Yao, L. Xiao, and Y. G. Yan, Strategy for series and parallel output
dual-buck half bridge inverters based on DSP control, IEEE Trans. Power
Electron., vol. 24, no. 2, pp. 434444, Feb. 2009.
[11] F. Z. Peng, Z-source inverter, IEEE Trans. Ind. Appl., vol. 39, no. 2,
pp. 504510, Mar./Apr. 2003.
[12] B. M. Ge, Q. Lei, W. Qian, and F. Z. Peang, A family of Z-source
matrix converters, IEEE Trans. Ind. Electron., vol. 59, no. 1, pp. 3546,
Jan. 2012.
[13] J. C. Rosas-Caro, F. Z. Peng, H. Cha, and C. Rogers, Z-source-converter-
based energy-recycling zero-voltage electronic loads, IEEE Trans. Ind.
Electron., vol. 56, no. 12, pp. 48944902, Dec. 2009.
[14] M. S. Shen, J. Wang, A. Joseph, F. Z. Peng, L. M. Tolbert, and
D. J. Adams, Constant boost control of the Z-source inverter to minimize
current ripple and voltage stress, IEEE Trans. Ind. Appl., vol. 42, no. 3,
pp. 770778, May/Jun. 2006.
[15] Y. Li, S. Jiang, J. G. Cintron-Rivera, and F. Z. Peng, Modeling and
control of quasi-Z-source inverter for distributed generation applica-
tions, IEEE Trans. Ind. Electron., vol. 60, no. 4, pp. 15321541,
Apr. 2013.
[16] Q. V. Tran, T. W. Chun, J. R. Ahn, and H. H. Lee, Algorithms for
controlling both the DC boost and AC output voltage of Z-source in-
verter, IEEE Trans. Ind. Electron., vol. 54, no. 5, pp. 27452750,
Oct. 2007.
[17] S. M. Dehghan, M. Mohamadian, A. Yazdian, and F. Ashrafzadeh, A
dual-inputdual-output Z-source inverter, IEEE Trans. Power Electron.,
vol. 25, no. 2, pp. 360368, Feb. 2010.
[18] M. S. Shen, A. Joseph, J. Wang, F. Z. Peng, and D. J. Adams, Comparison
of traditional inverters and Z-source inverter for fuel cell vehicles, IEEE
Trans. Power Electron., vol. 22, no. 4, pp. 14531463, Jul. 2007.
[19] F. Z. Peng, A. Joseph, J. Wang, M. Shen, L. H. Chen, Z. G. Pan,
E. Ortiz-Rivera, and Y. Huang, Z-source inverter for motor drives, IEEE
Trans. Power Electron., vol. 20, no. 4, pp. 857863, Jul. 2005.
[20] D. Vinnikov and I. Roasto, Quasi-Z-source-based isolated DC/DC con-
verters for distributed power generation, IEEE Trans. Ind. Electron.,
vol. 58, no. 1, pp. 192201, Jan. 2011.
[21] F. Bradaschia, M. C. Cavalcanti, P. E. P. Ferraz, F. A. S. Neves,
E. C. dos Santos, and J. H. G. M. da Silva, Modulation for three-phase
transformerless Z-source inverter to reduce leakage currents in photo-
voltaic systems, IEEE Trans. Ind. Electron., vol. 58, no. 12, pp. 5385
5395, Dec. 2011.
[22] F. Z. Peng, M. S. Shen, and K. Holland, Application of Z-source inverter
for traction drive of fuel cell-battery hybrid electric vehicles, IEEE Trans.
Power Electron., vol. 22, no. 3, pp. 10541061, May 2007.
[23] W. M. Zhang, M. H. Deng, Y. Q. Pei, and Z. A. Wang, Design and
optimization of high current power supply for electrochemistry, in Proc.
IPEC, 2010, pp. 8691.
[24] P. J. Stout and D. Zhang, High-power magnetron Cu seed deposition on
3-Ddual inlaid features, IEEE Trans. Plasma Sci., vol. 30, no. 1, pp. 116
117, Feb. 2002.
[25] X. Hu, Z. Y. Ling, X. H. He, and S. S. Chen, Controlling trans-
mission spectra of photonic crystals under electrochemical oxidization
of aluminum, J. Electrochem. Soc., vol. 156, no. 5, pp. C176C179,
2009.
[26] X. Hu, Z. Y. Ling, T. L. Sun, and X. H. He, Tuning optical properties
of photonic crystal of anodic alumina and the inuence of electrodeposi-
tion, J. Electrochem. Soc., vol. 156, no. 11, pp. D521D524, 2009.
[27] P. C. Loh, F. Blaabjerg, and C. P. Wong, Comparative evaluation of
pulsewidth modulation strategies for Z-source neutral-point-clamped in-
verter, IEEE Trans. Power Electron., vol. 22, no. 3, pp. 10051013,
May 2007.
[28] P. C. Loh, F. Gao, F. Blaabjerg, S. Y. C. Feng, and K. N. J. Soon,
Pulsewidth-modulated Z-source neutral-point-clamped inverter, IEEE
Trans. Ind. Electron., vol. 43, no. 5, pp. 12951308, Sep./Oct. 2007.
[29] X. P. Ding, Z. M. Qian, S. T. Yang, B. Cuil, and F. Z. Peng, A direct peak
DC-link boost voltage control strategy in Z-source inverter, in Proc. 22nd
Annu. IEEE APEC, Mar. 2007, pp. 648653.
Guidong Zhang was born in Guangdong, China,
in 1986. He received the B.Sc. degree in electri-
cal engineering and automation from the School
of Automation and Information Engineering, Xian
University of Technology, Xian, China, in 2008. He
has been working toward the Ph.D. degree in power
electronics and electric transmission, by taking suc-
cessive postgraduate and doctoral programs, in the
School of Electric Power, South China University
of Technology, Guangzhou, China, since September
2010. He has also been working toward the Ph.D.
degree at the Faculty of Mathematics and Computer Science, FernUniversitt
in Hagen, Hagen, Germany, since 2011.
His research interests include power electronics topology and applications.
ZHANG et al.: Z-SOURCE HALF-BRIDGE CONVERTER 1279
Zhong Li received the B.Sc. degree from Sichuan
University, Chengdu, China, in 1989, the M.Sc. de-
gree from Jinan University, Guangzhou, China, in
1996, the Ph.D. degree from the South China Uni-
versity of Technology, Guangzhou, in 2000, and the
D.Sc. (Habilitation) degree from the FernUniversitt
in Hagen, Hagen, Germany, in 2007.
He was an Adjunct Professor with the FernUni-
versitt in Hagen. He is currently with the Fac-
ulty of Engineering, University of DuisburgEssen,
Duisburg, Germany. His research interests include
fuzzy logic and fuzzy control, chaos theory and chaos control, intelligent
computation and control, complex networks, and swarm intelligence. He serves
as Associate Editor for six international journals and has published three books
with Springer-Verlag, 18 book chapters, 53 journal papers, and 38 conference
papers.
Bo Zhang (M03) was born in Shanghai, China, in
1962. He received the B.Sc. degree in electrical engi-
neering from Zhejiang University, Hangzhou, China,
in 1982, the M.Sc. degree in power electronics from
Southwest Jiaotong University, Chengdu, China, in
1988, and the Ph.D. degree in power electronics from
the Nanjing University of Aeronautics and Astronau-
tics, Nanjing, China, in 1994.
He is currently the Vice Dean of the School of
Electric Power, South China University of Technol-
ogy, Guangzhou, China, where he is also a Professor.
He has authored or coauthored more than 330 papers and is the holder of 30
patents. His current research interests include nonlinear analysis and control of
power supplies and ac drives.
Dongyuan Qiu (M03) was born in China in 1972.
She received the B.Sc. and M.Sc. degrees from the
South China University of Technology, Guangzhou,
China, in 1994 and 1997, respectively, and the Ph.D.
degree from the City University of Hong Kong,
Kowloon, Hong Kong, in 2002.
She is currently a Professor with the School of
Electric Power, South China University of Technol-
ogy, Guangzhou. Her main research interests include
design and control of power converters, fault diag-
nosis, and sneak circuit analysis of power electronic
systems.
Wenxun Xiao was born in Hainan, China, in 1979.
He received the B.Sc., M.Sc., and Ph.D. degrees in
electrical engineering from the South China Uni-
versity of Technology, Guangzhou, China, in 2002,
2005, and 2008, respectively.
Since 2008, he has been with the School of Elec-
trical Power, South China University of Technology,
where he is currently an Associate Professor. His
research interests include topology and control meth-
ods of switching power supplies, and multiphysics
coupling of power electronics equipment.
Wolfgang A. Halang received the Ph.D. degree
in mathematics from Ruhr-Universitt Bochum,
Bochum, Germany, in 1976, and the Ph.D. degree
in computer science from the Universitt Dortmund,
Dortmund, Germany, in 1980.
He worked both in industry (Coca-Cola GmbH
and Bayer AG) and in academia (King Fahd Uni-
versity of Petroleum and Minerals, Dhahran, Saudi
Arabia, and the University of Illinois at Urbana
Champaign, Urbana, IL, USA), before he was
appointed as the Chair of Applications-Oriented
Computing Science and the Head of the Department of Computing Science,
University of Groningen, Groningen, The Netherlands. Since 1992, he has been
the Chair of Computer Engineering with the Faculty of Electrical and Computer
Engineering, FernUniversitt in Hagen, Hagen, Germany, where he was the
Dean from 2002 to 2006. He was a Visiting Professor with the University of
Maribor, Maribor, Slovenia, in 1997, and the University of Rome II, Rome,
Italy, in 1999. His research interests comprise all major areas of hard real-time
computing with special emphasis on safety-related systems. He is the Founder
and was the European Editor-in-Chief of the journal Real-Time Systems, is a
Member of the Editorial Boards of four other journals, was a Codirector of the
1992 North Atlantic Treaty Organization Advanced Study Institute on Real-
Time Computing, has authored 12 books and some 350 refereed book chapters,
journal publications, and conference contributions, has edited 20 books, is
the holder of 12 patents, and has given some 80 guest lectures in more than
20 countries.
Dr. Halang is active in various professional organizations and technical
committees as well as being involved in the program committees of some
180 conferences. In the International Federation of Automatic Control, he
chaired the Technical Committee on Real-Time Software Engineering before
he became a Member of the Technical Board from 2002 to 2008 chairing the
Coordinating Committee on Computers, Cognition, and Communication for
Control.