TRNG I HC KHOA HC T NHIN TRNG I HC KHOA HC T NHIN

KHOA IN T KHOA IN T -- VIN THNG VIN THNG

PHN 3: LP TRNH VI CCS (tt)
1
ng ng L L Khoa Khoa
CHNG 4: NGT V NG DNG
Nguyn tc hot ng ca ngt
Cc hm dng cho ngt
Cc loi ngt Cc loi ngt
V d
2
Nguyn tc hot ng ca ngt
ng dng trong lp trnh u tin
Khi c 1 ngt xy ra, VK s hon tt lnh
ang thc hin v chy chng trnh phc
v ngt v ngt
Cp ngt: ngt 1 cp v ngt 2 cp
3
Ngt 1 cp
Trn PIC 14 , 12 ,10 ,tt c cc ngt ch c 1 cp
u tin .
Khi ngt no ang c phc v th khng th
b ngt bi 1 ngt khc xy ra . b ngt bi 1 ngt khc xy ra .
Khi ngt xy ra chng trnh nhy n a ch
ngt , thng l 004h , sao lu thanh ghi W,
STATUS , PCLATCH , FSR th nhy n hm
phc v ngt .
Thc hin xong th phc hi tt c thanh ghi trn
thot ngt .
4
Ngt 1 cp
Bit cho php ngt ton cc ( GIE ) b kha t
ng khi c ngt.
Dng #priority xc nh u tin ngt. Ngt u
tin nht s lun c hi vng trc .Sau khi tin nht s lun c hi vng trc .Sau khi
xc nh c ngt cn phc v, n s thc thi
hm ngt tng ng .Xong th xo c ngt
v thot ngt . Phc v ngt no xong th ch
xo c ngt .
5
Ngt 2 cp
Ch c trn PIC 18 ( v dsPIC ) . C 2 khi nim:
ngt u tin thp (low priority) v ngt u tin
cao ( high priority ).
2 vector thc thi ngt tng ng thng l 2 vector thc thi ngt tng ng thng l
0008h (high) v 0018h ( low ).
Mt ngt thp ang c phc v s b ngng
v phc v ngt cao 0008h nu ngt cao xy
ra. Ngc li, ngt cao ang xy ra th khng
bao gi b ngt bi ngt thp.
6
Ngt 2 cp
Nu vit hm ngt bnh thng, khng i hi
u tin g th CCS sinh m tt c hm ngt
u l ngt u tin cao. Quy trnh thc hin ngt
s nh ngt 1 cp trn.
s dng ngt 2 cp, khai bo #device phi
c high_ints=true . V hm ngt no mun u
tin cao th thm FAST theo sau ch th tin x l
hm .
Ch c duy nht 1 ngt c u tin cao.
7
Khai bo ngt
Mi dng VDK c s lng ngt khc nhau :
PIC 14 c 14 ngt , PIC 18 c 35 ngt
#DEVICE HIGH_INTS= Khai bo ngt c
mc u tin cao. mc u tin cao.
#INT_XXX fast y l ch th bo cho trnh bin
dch mt ngt c mc u tin cao.
Cch khai bo:
#INT_XXX
8
Khai bo ngt
Sau y l danh sch 1 s ngt vi chc nng
tng ng :
#INT_GLOBAL : ngt chung
#INT_AD : chuyn i A /D hon tt
#INT_EXT : ngt ngoi
#INT_EXT1 : ngt ngoi 1 #INT_EXT1 : ngt ngoi 1
#INT_EXT2 : ngt ngoi 2
#INT_RB : bt k thay i no trn chn B4 n B7
#INT_RC : bt k thay i no trn chn C4 n C7
#INT_RDA : data nhn t RS 232 sn sng
#INT_RTCC : trn Timer 0
#INT_TBE : b m chuyn RS 232 trng
#INT_TIMER0 : mt tn khc ca #INT_RTCC
#INT_TIMER1 : trn Timer 1
#INT_TIMER2 : trn Timer 2
#INT_TIMER3 : trn Timer 3
#INT_TIMER5 : trn Timer 5
#INT_PWMTB : ngt cu PWM time base
9
Relevant Functions:
disable_interrupts()Disables the specified
interrupt.
enable_interrupts() Enables the specified
interrupt.
ext_int_edge() Enables the edge on which ext_int_edge() Enables the edge on which
the edge interrupt should trigger. This can be either
rising or falling edge.
clear_interrupt() This function will clear
the specified interrupt flag. This can be used if a
global isr is used, or to prevent an interrupt from
being serviced.
10
cho php ngt hot ng phi dng lnh
enable_interrupts ( int_xxxx) v enable_interrupts
( global ) .
Kho FAST theo sau #int_xxx cho ngt l Kho FAST theo sau #int_xxx cho ngt l
u tin cao , ch c 1 ngt thi , ch c PIC
18 v dsPIC .
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enable_interrupts ( level )
level l tn cc ngt cho trn hay l GLOBAL
cho php ngt cp ton cc.
Mi ngt ca VDK u c 1 bit c ngt, 1 bit cho php
ngt. Khi c ngt th bit c ngt b set =1, nhng ngt c
hat ng c hay khng tu thuc bit cho php ngt
. enable_interrupts (int_xxx ) s bt bit cho php ngt . . enable_interrupts (int_xxx ) s bt bit cho php ngt .
Nhng tt c cc ngt u khng th thc thi nu bit cho
php ngt ton cc = 0
VD : cho php ngt timer0 v timer1 hot ng:
enable_interrupts (int_timer0);
enable_interrupts (int_timer1 ) ;
enable_interrupts ( global ); // ch cn dng 1 ln tr
//phi mun c thay i c bit
12
disable_interrupts ( level )
level ging nh trn.
Hm ny v hiu 1 ngt bng cch set bit cho php ngt
= 0.
disable_interrupts ( global ) set bit cho php ngt ton
cc =0, cm tt c cc ngt . cc =0, cm tt c cc ngt .
Khng dng hm ny trong hm phc v ngt v khng
c tc dng, c ngt lun b xo t ng.
13
clear_interupt ( level )
level khng c GLOBAL .
Hm ny xo c ngt ca ngt c ch
nh bi level .
14
ext_int_edge ( source , edge )
Hm ny thit lp ngun ngt ngoi EXTx l
cnh ln hay cnh xung.
source : ngun ngt . Trn PIC 18 c 3 ngun
ngt trn 3 chn EXT0 , EXT1 , EXT2 ng vi ngt trn 3 chn EXT0 , EXT1 , EXT2 ng vi
source = 0 ,1 , 2. Cc PIC khc ch c 1 ngun
EXT nn source = 0 .
edge : chn cnh kch ngt , edge = L_TO_H
nu chn cnh ln ( t mc thp chuyn ln
mc cao ) hay H_TO_L nu chn cnh xung
15
Relevant Interrupts:
#int_default This directive specifies that the following
function should be called if an interrupt is triggered but no
routine is associated with that interrupt.
#int_global This directive specifies that the following
function should be called whenever an interrupt is triggered. function should be called whenever an interrupt is triggered.
This function will replace the compiler generated interrupt
dispatcher.
#int_xxx This directive specifies that the following
function should be called whenever the xxx interrupt is
triggered. If the compiler generated interrupt dispatcher is
used, the compiler will take care of clearing the interrupt flag
bits.
16
VD: Chng trnh c d liu t port b xut ra port D khi c s thay i t
RB4 RB7
#include <16F877.h>
#device *=16
#use delay (clock=20000000)
#byte portb = 0x06
#byte portd = 0x08
#INT_RB
Void RB_LED ()
{
portd=portb;
}
void main ()
{ set_tris_b(0xFF);
set_tris_d(0x00);
enable_interrupts(INT_RB);
enable_interrupts(GLOBAL);
while(true)
{
}
}
17
VD: Vit chng trnh m nh phn v khi c s thay i t RB4 n RB7 th mch m
s reset
#include <16F877.h>
#device *=16
#use delay (clock=20000000)
#byte portb = 0x06
#byte portc = 0x07
#byte portd = 0x08
#INT_RB
RB_LED ()
{
portd=portb;
portc = 0; portc = 0;
}
void main ()
{ set_tris_b(0xF0);
set_tris_c(0x00);
set_tris_d(0x00);
enable_interrupts(INT_RB);
enable_interrupts(GLOBAL);
portc=0;
while(true)
{
portc=portc+1;
delay_ms(500);
}
}
18
VD: Vit chng trnh m nh phn v khi RB0 chuyn t cao xung thp th mch m s reset
#include <16F877.h>
#device *=16
#use delay (clock=20000000)
#byte portc = 0x07
#byte portd = 0x08
#INT_EXT
void RB_EXT ()
{
portc=0x0;
}
void main () void main ()
{ set_tris_b(0xFF);
set_tris_c(0x00);
set_tris_d(0x00);
enable_interrupts(INT_EXT);
enable_interrupts(GLOBAL);
ext_int_edge(0,H_TO_L);
portc =0;
while(true)
{
portc+=1;
delay_ms(500);
}
}
19
VD: Chng trnh thc hin cng vic sau:
- c d liu t port B xut ra port D khi c s thay i t bit RB4-RB7
- Nu bit RB0 = 0 xut ra port C=0x0f ngc li thc hin mch m
#include <16F877.h>
#device *=16
#use delay (clock=20000000)
#byte portb = 0x06
#byte portc = 0x07
#BIT id = portb.0
#byte portd = 0x08
void main ()
{ set_tris_b(0xFF);
set_tris_d(0x00);
set_tris_c(0x00);
enable_interrupts(INT_RB);
enable_interrupts(GLOBAL);
portc=0; #byte portd = 0x08
#INT_RB
Void RB_LED ()
{
portd=portb;
portc=0;
}
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portc=0;
while(true)
{
if(id ==0) portc=0x0f;
else
{
portc +=1;
delay_ms(2000);
}
}
}
VD: Chng trnh nhn d liu t cng COM hin th ln port B v dch Led
port D
#include <16F877.h>
#device *=16 ADC=8
#use delay (clock=20000000)
#byte portb = 0x06
#byte portd = 0x08
#use rs232 (uart1, baud=9600,parity=n,xmit=pin_c6, rcv=pin_c7 )
#INT_RDA
uart_handler()
{
portb=getc();
}
void main ()
{
set_tris_b(0x00);
set_tris_d(0x00);
enable_interrupts(INT_RDA);
enable_interrupts(GLOBAL);
portd=0;
while(true)
{
portd=portd + 1;
delay_ms(1000);
}
}
21
VD: Chng trnh c d liu t ADC
xut ra port C dng ngt
xut ra port D khng dng ngt
#include <16F877.h>
#device *=16
#use delay (clock=20000000)
#byte portb = 0x06
#byte portc = 0x07
#BIT id = portb.0
#byte portd = 0x08
void main ()
{ set_tris_b(0xFF);
set_tris_d(0x00);
set_tris_c(0x00);
enable_interrupts(INT_AD);
enable_interrupts(GLOBAL);
setup_adc(ADC_CLOCK_INTERNAL); #byte portd = 0x08
#INT_AD
Void TEST_AD ()
{
portc=read_adc();
}
22
setup_adc(ADC_CLOCK_INTERNAL);
setup_adc_ports(ALL_ANALOG);
set_adc_channel(0);
portd=0;
while(true)
{
portd=read_adc();
delay_ms(2000);
}
}
CHNG 5: TIMER V NG DNG
Nguyn tc hot ng ca Timer
Cc hm dng cho Timer
ng dng Timer ng dng Timer
V d
23
It is very easy to make a digital counter using
ip-ops. Counters can be made which count
up, count down, which can be cleared back to
zero, pre-loaded to a certain value, and which zero, pre-loaded to a certain value, and which
by the provision of an overow output can be
cascaded with other counters.
24
A digital counter made of eight ip-
ops
25
The counter as timer
26
Timer 0 module
27
The internal clock is approximately 800 kHz and the
instruction cycle rate (Fosc/4) is therefore200 kHz, or
a period of 5 s. Now with this clock frequency,
Timer 0 would count up to its maximum value (255)
in 255 5 s, or 1275 s, and would overow on the in 255 5 s, or 1275 s, and would overow on the
next cycle, i.e. after 1280 s.
We can, however, make use of the prescaler here. If
the incoming signal is divided by 4 (i.e. PS2, PS1, PS0
set to 001), then Timer 0 will overow after 256 4
5 s, or 5.120ms
28
setup_timer_0(mode)
Sets the source, prescale etc for timer0
set_timer0(value) or set_rtcc(value)
- Initializes the timer0 clock/counter. Value may be a 8 bit or 16 bit
depending on the device. depending on the device.
value=get_timer0
Returns the value of the timer0 clock/counter
29
Relevant Interrupts :
INT_TIMER0 or INT_RTCC
- Interrupt fires when timer0 overflows
30
31
32
Cch tnh gi tr np vo
Timer
B1: Tnh chu k lnh
Vi Fosc : tn s thch anh
B2: Tnh tc t trn ca Timer
4
I
OSC
T
F
=
B2: Tnh tc t trn ca Timer
T=s chia*T
I
B3: S ln trn
n=T
OV
/T
Vi T
OV
l thi gian trn
B4: Gi tr np Timer=256-n
33
#include <16F877.h>
#device *=16 ADC=8
#use delay (clock=4000000)
#bit bit_co=0x0b.2
#byte portd = 0x08
#bit bit0=portd.0
void main ()
{
set_tris_d(0x00);
VD: Vit chng trnh to sng vung ti chn
RD0 vi tn s
set_tris_d(0x00);
setup_timer_0 (RTCC_INTERNAL|RTCC_DIV_4);
set_timer0(0);
bit0=1;
while(true)
{
if (bit_co==1)
{
set_timer0(0);
bit_co=0;
bit0=!bit0;
}
}
} 34
VD: Vit chng trnh dng ngt v Timer to
xung vung c chu k 1s
#include <16F877.h>
#device *=16 ADC=8
#use delay (clock=4000000)
#bit bit_co=0x0b.2
#byte portd = 0x08
#bit bit0=portd.0
#INT_TIMER0
void main ()
{
set_tris_c(0x00);
set_tris_d(0x00);
setup_timer_0
(RTCC_INTERNAL|RTCC_DIV_4|RTCC_8_BIT);
set_timer0(131);
enable_interrupts(GLOBAL);
void int_timer()
{
bit_co=0;
bit0=!bit0;
set_timer0(131);
}
35
enable_interrupts(GLOBAL);
enable_interrupts(INT_TIMER0);
bit0=1;
while(true)
{
}
}
Cc bi thc hnh
1. Gii thiu
2. I/O
3. I/O
4. ADC
5. Ngt
6. Timer
7. Ngt + Timer
8. PWM
9. Bi tp tng hp
10. n tp thi
36