1

I.

II. -
III.
IV.
V.

VI.
VII. CMP

W. Y. Choi, B.-G. Park, and J. D. Lee, Fundamentals of Silicon IC Processes

I.
1.
1) :
contact, interconnection, connection to outside
2) IC :
yield, reliability
3) system
(1)
(2)
(3)

2.
1)
(1) : , , ,

W. Y. Choi, B.-G. Park, and J. D. Lee, Fundamentals of Silicon IC Processes

(2) :
(3)
(4) : ,
(5) bondability :
2)
(1) : Pt-Si, Al
(2) :
(3) ( 3,000 4,000 ppm/)

Al

Cu

Au

Mo

2.8

1.7

2.44

5.7

Pt

Ag

Ta

10.5 1.46 13.0

Ti

55

5.5

3)
(1) step coverage, electromigration
(2) corrosion, oxidation, ,
W. Y. Choi, B.-G. Park, and J. D. Lee, Fundamentals of Silicon IC Processes

3.
1) Al : electromigration, corrosion
2) Al + 2% Si
3) Al + 2% Si + 4% Cu
4) Pt - Si
5) Pt(700) : Si - Ti(1000) - Pt(2000) - Au(1mil)
Pt (700)
Pt-Si (sintering)
Pt
Ti (1000)
Pt (2000)
Au (1mil)
6) Mo, Ta, W-Au, Cu-Au, Ti-Au,
W. Y. Choi, B.-G. Park, and J. D. Lee, Fundamentals of Silicon IC Processes

< >
properties

Al

Au

deposition

evap.

evap.

compatibility

adherence

delineation

bondability

contact resistance

conductivity

2.7

2.44

5.4

10.5

27

5.5

surface coverage

Mo

Pt

Ta

sputter or CVD from fluorides

depends on deposition condition

electromigration resistance

corrosion resistance

stability

500

800

800

800

process temperature()

: G(good), N(no), Y(OK), D(difficult), H(high), B(best), F(fair)

W. Y. Choi, B.-G. Park, and J. D. Lee, Fundamentals of Silicon IC Processes

II. -
1.
1) Schottky
2) Ohmic : tunneling

2.
1) n

<n >
W. Y. Choi, B.-G. Park, and J. D. Lee, Fundamentals of Silicon IC Processes

2) M-O-S

q M = 4.1 eV

E FM

q ox = 0.95eV
Ec
q Si = 4.15 eV
qs = 5 eV

Eg 8 eV

Ec
EFSi

Ev

Ev

aluminum

silicon oxide

silicon

< Na=21015/cm3 p Al
>
W. Y. Choi, B.-G. Park, and J. D. Lee, Fundamentals of Silicon IC Processes

3) doping

2 Si (B VR )

W =
qN

1
2

for step junction

1
1 q Si N 2
Si

C=
=
W
2 B VR
1
2
(B VR )
2=
C q Si N

, Si :
B :
VR :
N :
B N ?
W. Y. Choi, B.-G. Park, and J. D. Lee, Fundamentals of Silicon IC Processes

3.
1) N<1017/cm3 :

I TE = I o [exp(qVF / kT ) 1]

I o = RAT 2 exp( qB / kT )

VF :
Io :
R : Richardson
A :
< >

W. Y. Choi, B.-G. Park, and J. D. Lee, Fundamentals of Silicon IC Processes

10

(1) Schottky diode I-V

<Al/n-Si Schottky I-V>

W. Y. Choi, B.-G. Park, and J. D. Lee, Fundamentals of Silicon IC Processes

11

(2) Schottky diode I-V

Schottky diode
(IR=10-6 A): Si step junction
60%

< Al/n-Si Schottky I-V >

W. Y. Choi, B.-G. Park, and J. D. Lee, Fundamentals of Silicon IC Processes

12

<n Schottky diode I-V >

W. Y. Choi, B.-G. Park, and J. D. Lee, Fundamentals of Silicon IC Processes

13

2) 51017/cm3 < N < 1019/cm3 :

3) N>1019/cm3 : tunneling current Ohmic contact
(1) :

Rc = A

dV
1
1
exp exp

dI v0
W
N

(2) Al-silicon

W. Y. Choi, B.-G. Park, and J. D. Lee, Fundamentals of Silicon IC Processes

14

<p Al
(STH)

<n Al
(STH)

W. Y. Choi, B.-G. Park, and J. D. Lee, Fundamentals of Silicon IC Processes

15

III.
1. (CVD)
1)
2)
3)
4)

better uniformity, better step coverage

Al : 600 500
90 CVD : W, Mo
Al CVD

2.
1) : filament, e-beam, RF, flash, sputtering
(1)
- :
1 torr 710-6 cm (for N2)
10-3 torr 5 cm (for N2)
0.5 (for electron)
-
- 10-6 torr
W. Y. Choi, B.-G. Park, and J. D. Lee, Fundamentals of Silicon IC Processes

16

(2)
filament , RF
e-beam , flash
(3) filament

< >
W. Y. Choi, B.-G. Park, and J. D. Lee, Fundamentals of Silicon IC Processes

17

heater : W, Ta, Mo, Pt( )

heater
<< heater
mutual solubility
heater
(4) RF ( )
:
.
RF space .
(5) e-beam

10 keV 60 m Al .
(15 m )
W. Y. Choi, B.-G. Park, and J. D. Lee, Fundamentals of Silicon IC Processes

18

tight beam diffuse beam

<
Al >

pure metal refractory metal

alloy
x-ray
(6)
alloy
wire feeding
,
e-beam 20%
W. Y. Choi, B.-G. Park, and J. D. Lee, Fundamentals of Silicon IC Processes

19

2)
(1)

chamber
step coverage (Ar 1-10 mtorr)

cleaning

(2) : ,
(DC )

W. Y. Choi, B.-G. Park, and J. D. Lee, Fundamentals of Silicon IC Processes

20

3.
1) in-situ thickness monitor
(1) crystal monitor

K
1 M
f :
f =
, P= =
M
f
K
M:
K:
1
P = M
P:
K
D:
M
M = DV = DAT T =
T:
DA
A:
(2) interferometer : laser

W. Y. Choi, B.-G. Park, and J. D. Lee, Fundamentals of Silicon IC Processes

21

2)
(1) .
(2) .
(3) .
(4) .
(5) 510-6 torr .
(6) .
(7) .
(8) .
(9) .

W. Y. Choi, B.-G. Park, and J. D. Lee, Fundamentals of Silicon IC Processes

22

3)
(1) : , , , , ,
grain, roughness,
(2) : stylus
(3) : 4-point probe
4) Na+ : HTB C-V

W. Y. Choi, B.-G. Park, and J. D. Lee, Fundamentals of Silicon IC Processes

23

IV.
1.
RG T
P
2) Al2O3 : T>250, 10-810-5 torr

1) grain size

< >

< >

W. Y. Choi, B.-G. Park, and J. D. Lee, Fundamentals of Silicon IC Processes

24

< >
W. Y. Choi, B.-G. Park, and J. D. Lee, Fundamentals of Silicon IC Processes

25

3) hillock
(1) :
(2) hillock : edge, flat-topped, spike hillock
(3) : Al stress strain
stress
: Si (3.3 ppm/), Al (23.6 ppm/)
(Te) (Ta) strain

W. Y. Choi, B.-G. Park, and J. D. Lee, Fundamentals of Silicon IC Processes

26

(4) hillock
self-diffusion rate : Sn, Cd, In
site : Si
hillock :

Te()

Ta()

Dcycled(/cm2)

Duncycled (/cm2)

23

430

8.7107

4.0 107

200

430

1.5 106

5.0 105

400

430

3.4 104

6.0 103

27

223

6.0 106

3.2 106

200

179

5.2 105

2.8 105

400

237

1) uncycled : RT Ta ,

2) cycled : RT Ta

W. Y. Choi, B.-G. Park, and J. D. Lee, Fundamentals of Silicon IC Processes

27

2.
1) : 10-5 cm2/2525 m2
2) :

500, 10 min. 450, 30 min.

3) : Al (2.65 cm), Al-Si (1%) (3.0 cm)

4) > 0.002 ( 51019 dopants/cm3 ) rectifying contact

<n >

<p >

W. Y. Choi, B.-G. Park, and J. D. Lee, Fundamentals of Silicon IC Processes

28

(cm)

( cm)

Au

2.35

Al-Ni(1%)

2.75

Al

2.65

Al-Si(1%)

3.0

Mo

5.7

Al-Ti(1%)

5.53

Pt

10.6

Al-Cr(1%)

5.78

Ti

55.0

Al-Pt(1%)

2.9

Cu

1.7

Au-Ni(10%)

10.2

3.
1) : O2, H2O, H2, N2, CH4
2) : H2O, O2
2Al + 3O2 = 2Al2O3

3
1
( Al 2O 3 H 2O ) + H 2
2
2
3) :
3SiO2 + 2Al 2Al2O3 + 3Si ( Al alloy )
Al + 2H 2O =

W. Y. Choi, B.-G. Park, and J. D. Lee, Fundamentals of Silicon IC Processes

29

< >
oxide

heat of formation
(kcal/mole)

oxide

heat of formation
(kcal/mole)

Ta2O5

-500

WO3

-200

Al2O3

-399

MoO3

-180

V 2 O3

-290

Cu2O

-40

Cr2O3

-270

Ag2O

-7

TiO2

-218

Au2O3

+19

SiO2

-205

W. Y. Choi, B.-G. Park, and J. D. Lee, Fundamentals of Silicon IC Processes

30

4. Coverage
1) shadowing : slope, geometric, self shadowing

shadow :

> arctan { D/ (0.5L X o ) }

1
h
= ( L Xo )
2
D
< >
W. Y. Choi, B.-G. Park, and J. D. Lee, Fundamentals of Silicon IC Processes

31

2) shadowing

deposition system

biaxial planetary
source
source-substrate

<bixial plenetary:
>
W. Y. Choi, B.-G. Park, and J. D. Lee, Fundamentals of Silicon IC Processes

32

5. Adhesion
1) SiO2
2) : tape(3M)
< >
materials

shearing force (108dynes/cm2)

adherence to SiO2

FeSi

37

weak

CoSi

120

strong

CoSi2

70

intermediate

PtSi2

170

very strong

Al

170

very strong

Ti

170

very strong

Au

very weak

Co

54

intermediate

Mo

113

strong

W. Y. Choi, B.-G. Park, and J. D. Lee, Fundamentals of Silicon IC Processes

33

6.
1) : , low cost, high conductivity
, good adhesion,
easy patterning, low contact resistance
Al-Si alloy , good bondability,
.
2) : difficult CVD deposition,
electromigration, corrosion, hillock formation
Al-Au
Si into Al grain boundary reliability
silicon stress,
W. Y. Choi, B.-G. Park, and J. D. Lee, Fundamentals of Silicon IC Processes

34

V.
1. Double metal

< >
W. Y. Choi, B.-G. Park, and J. D. Lee, Fundamentals of Silicon IC Processes

35

1)
(1) 1st metal
Al, Al-Si, Al-Cu, Al-Si-Cu

Al : e-beam, sputtering
Al-Si : double gun e-beam, sputtering
Al-Si-Cu : flash, sputtering
(2) 1st insulator
SiO2, Si3N4, Al2O3, Ta2O5, WO2, PSG
: CVD, sputtering
(3) 2nd metal
Al 1st metal
(4) passivation
PSG : 3% , 0.8~1m ,
85 /sec : 35 /sec for PSG : CVD ()
W. Y. Choi, B.-G. Park, and J. D. Lee, Fundamentals of Silicon IC Processes

36

2)
(1) sharp edge :
1st & 2nd metal short
2nd metal crack reliability
(2) hillock
Al deposition (380)
PSG deposition (200) , alloy (450)
(3) SiO2 : chamber , Al film .
(4) (rework)

< >
W. Y. Choi, B.-G. Park, and J. D. Lee, Fundamentals of Silicon IC Processes

37

(5) sharp edge

: hard baking etch

Al

hillock : , Al-Si
PECVD SiO2 deposition : CVD system SiO2
contamination .
(6)

: polymide plasma etching

W. Y. Choi, B.-G. Park, and J. D. Lee, Fundamentals of Silicon IC Processes

38

2.
1)

< >

<H3PO4 Al >

2) : (, , )
(, )

(, )
W. Y. Choi, B.-G. Park, and J. D. Lee, Fundamentals of Silicon IC Processes

39

3)
(1) : ,
5000
(2) : , ,
m
(1 Al 1.65 Al2O3)
4)

< Al2O3
>

W. Y. Choi, B.-G. Park, and J. D. Lee, Fundamentals of Silicon IC Processes

40

(1) :
(2)
(3) Faraday
MQ
dV
dH M dQ dH
M
,
=S
=

,
=J
V=
Fm
dt
dt Fm dt
dt
Fm
V:, :, F : 96500 C/mole, m=6, S:, H:
M : mole , Q : , : , J :
<25, 10mA/cm2 >

electrolyte
operating voltage
barrier layer thickness()

high voltage

low voltage

4 % H3PO4

4 % H2SO4

133

20

1,500

250

W. Y. Choi, B.-G. Park, and J. D. Lee, Fundamentals of Silicon IC Processes

41

VI.
1. -
1) eutectic point 577 1.6%
2) 350 0.1%
3) Al spike
alignment packaging
(111) (110) 36

<Si Al >

W. Y. Choi, B.-G. Park, and J. D. Lee, Fundamentals of Silicon IC Processes

42

4) spike
(1) : step coverage trade off
(2) Al
(3) 200
(4) barrier metal : Ti, W, Ta, Ti-W - trade off
(5)
(6) Al-2% Si

< >

<
>

W. Y. Choi, B.-G. Park, and J. D. Lee, Fundamentals of Silicon IC Processes

43

2.
1) : bipolar
MOS
2) : Na+
barrier (Si3N4, Al2O3, PSG)

< >

<
Al2O3 >

W. Y. Choi, B.-G. Park, and J. D. Lee, Fundamentals of Silicon IC Processes

44

3. Electromigration
1)
q :
q* :
: q* = 20 30q

2)

N
+ NE = NE
X
D kT
J = E, = *
q
D = D0exp[ Ws /kT] : self diffusion of Al into Al

F = D

F = NE = q*

JN
D0exp( Ws /kT)
kT

W. Y. Choi, B.-G. Park, and J. D. Lee, Fundamentals of Silicon IC Processes

45

3)
(1) : temperature gradient
(2) diffusion: surface diffusion
grain boundary diffusion
bulk diffusion
(3) : grain ,
: Do, Ws, J
step current crowding
4) Electromigration MTF
(1) MTF



W
A
WT
MTF exp( /L ) =
exp( /L ) exp( s )
F
Jn
kT
W. Y. Choi, B.-G. Park, and J. D. Lee, Fundamentals of Silicon IC Processes

46

, W : Al
T : Al
n : 1 (contact) 2~3()
(2) MTF
grain size: large (>3 m)
small (<1 m)
surface coating:Al2O3(anodized)
SiO2(CVD)
additives to Al : (1~2)% Si

MTF

Ws(eV)

2~3

0.5 ~ 0.6

0.3 ~ 0.4

10 ~ 14

0.6 ~ 0.65

1~2
1

(4~6)% Cu, Mg, Cr 10 ~ 100

0.7 ~ 0.8

W. Y. Choi, B.-G. Park, and J. D. Lee, Fundamentals of Silicon IC Processes

47

VII. CMP
1.
1)

2) 1980 ,
3) , MOSFET

4)

W. Y. Choi, B.-G. Park, and J. D. Lee, Fundamentals of Silicon IC Processes

48

2. CMP
1)
2)

3)
()
()
4) nm

(planarization)

(Damascene)

W. Y. Choi, B.-G. Park, and J. D. Lee, Fundamentals of Silicon IC Processes

49

3. CMP
1)
: ,

: ,
:
:
:
slurry
dispenser
polishing pad

spindle
chuck
wafer

platen

CMP
W. Y. Choi, B.-G. Park, and J. D. Lee, Fundamentals of Silicon IC Processes

50

2)


: um

W. Y. Choi, B.-G. Park, and J. D. Lee, Fundamentals of Silicon IC Processes

51

3)

: +
:
pH:
: SiO2, Al2O3, CeO2
CMP : + Al2O3
CMP

W. Y. Choi, B.-G. Park, and J. D. Lee, Fundamentals of Silicon IC Processes

52

4) CMP
: , , ,
: , , , , pore ,

5) CMP

W. Y. Choi, B.-G. Park, and J. D. Lee, Fundamentals of Silicon IC Processes

53

4. CMP
1)
->

SiO2: SiO2 -> Si(OH)4
W: W -> WO3
Cu: Cu -> Cu2O

2)
:
:
:

k=
k p 1/ (2 E )
p Pv

kp ( ), P ( ), v (
), E (Young )
W. Y. Choi, B.-G. Park, and J. D. Lee, Fundamentals of Silicon IC Processes

54

5. CMP
1)

STI
Si3N4

(stopping layer)
W. Y. Choi, B.-G. Park, and J. D. Lee, Fundamentals of Silicon IC Processes

55

4) Thermal Oxidation

STI
1) Trench Definition: Buffer Oxide Growth, Nitride Deposition,
Isolation Lithography
5) CVD Oxide Fill

2) Trench Etch: Nitride Etch, Oxide Etch, Silicon Etch

6)Chemical Mechanical Polish

3) Photoresist Strip

7) Nitride Etch

W. Y. Choi, B.-G. Park, and J. D. Lee, Fundamentals of Silicon IC Processes

56

2)
CMP: (contact) (via) (plug)
CMP:
CMP
7

W. Y. Choi, B.-G. Park, and J. D. Lee, Fundamentals of Silicon IC Processes

57

6.
1) :

(ITRS 2010)
Year

2010

2013

2016

2019

2022

MPU/ASIC Metal 1 (1/2 pitch)

45

27

18.9

13.4

9.5

1.9~2.1

1.7~1.9

1.5~1.7

Dielectric Constant (ILD)

2.3~2.5 2.1~2.3

W. Y. Choi, B.-G. Park, and J. D. Lee, Fundamentals of Silicon IC Processes

58

2)
SiO2 (k > 2.7):

(k < 2.7): tetramethoxysilane(TMOS)

tetraethoxysilane(TEOS)
-
: (air gap)
3)
, / ,
, , CMP
, , ,
, ,
,
W. Y. Choi, B.-G. Park, and J. D. Lee, Fundamentals of Silicon IC Processes

59

7.
1)
: , ,



2)
: (1.7ucm),
electromigration, ,
,
: ,
,
,


W. Y. Choi, B.-G. Park, and J. D. Lee, Fundamentals of Silicon IC Processes

60

3)
:
: via filling
4) : via trench

.
.
.
(adhesion) (barrier) .
.
.
CMP .

W. Y. Choi, B.-G. Park, and J. D. Lee, Fundamentals of Silicon IC Processes

61

. (a) , (b) ,
(c) , (d) , (e) CMP
W. Y. Choi, B.-G. Park, and J. D. Lee, Fundamentals of Silicon IC Processes