LOCKED ANTIPHASE MODE (0% =REV, 50%=BRAKE, 100%=FWD) SIGN MAGNITUDE MODE (0% =BRAKE, 100% =FULL DIR) SHUNT BRAKING: PWM_IN=1 (or PWM BRAKE SPEED) , BRAKE=1 COAST/NEUTRAL: PWM_IN =0, BRAKE =1 BATTERY BRAKE: BRAKE=0, DIR IN OPPOSITE DIRECTION OF MOVEMENT BATTERY BRAKE: BRAKE=0, DIR IN OPPOSITE DIRECTION OF MOVEMENT SHUNT BRAKING: PWM_IN=X , BRAKE=1 ISOLATED IMPUT VDSTH IS MINIMUMVOLTAGE DROP INAN FULLY OPEN MOSFET NEEDEDTO NOT RAISE THE FET SHORT CIRCUIT FLAG HERE I HAVE SET IT TO 10A* RDS CONNECT VDSTHTO 5V TO DISABLE THE SHORT FLAG RESET ( POWER) PIN: NORMAL: H RESET: L THEN H (LESS THAN 0.1 us) SLEEP: HOLDL (MORE THAN 3.5us) ^LSS TRANSIENT PROTECTION CAN GO HERE SUPPLY PROT ? RESET NOT(BRAKE) DIR =1, CURRENT GOES A TO B, DIR=0 B TO A PWM =1, CURRENT GOES A TO B, PWM=0 B TO A N O T ( D I R ) N O T ( B R A K E ) N O T ( P O W E R ) DIR MAY USE INVERTING LIE DRIVER BETWEEN LOGIC BOARD AND H BRIDGE BOARD LOGIC IS SOURCED PWM A3941INTERNAL RESISTANCE: HIGH : 12Ohms LOW: 4Ohms USE ONLY ONE KE51ANS MOVE IT IN PARRALEL OF THE DIODE / CAPACITOR HERE ? FAST OPTO IS OPTIONAL BUT THEN THE SLOWEST PART OF THE BOARD WILL BE THE OPTO RG AS CLOSE AS POSSIBLE TO THE FET IF RG IS 4.7WORTH HAVING THE DIODE ? LSS, SxAND GH/LxAS SHORT AS POSSIBLE (WIRING INDUCTANCE) SEPARATE TRACE FOR OPTO GROUND AND QUIET GROUND (RDEAD) WHAT RATING POWER FOR RG ? =1K PULLUP / PULLDOWN RES IF TOO FAR FROM V5CAP USE BYPASS CAP >0.1uF BETWEEN V+AND GND IRF2907ZPbF IRF2907ZPbF IRF2907ZPbF IRF2907ZPbF 0.1uF 0.47uF 10uF ( >20*BOOT) 4.7 0.47uF (Qg*1.25) 0.47uF (Qg*1.25) 1N5817-T 4.7 1N5817-T 4.7 1N5817-T 4.7 1N5817-T 10uF (>100nF) 1 N 5 4 0 1 1 . 5 K E 5 1 C A 1 . 5 K E 5 1 C A 3 0 K T D E A D
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1
u s e c 2 0 K 1 K 0.1uF 4.7 6N137 TCET4100 TCET4100 TCET4100 TCET4100 7 4 A C 5 4 0 N 680uF (63V) 0.47uF (100V) 2X Zener 15V 2X Zener 15V 2X Zener 15V 2X Zener 15V VDRAIN P$1 LSS P$2 GLB P$3 SB P$4 GHB P$5 CB(BOOT) P$6 VREG_ P$8 VREG P$7 CA(BOOT) P$9 GHA P$10 SA P$11 GLA P$12 VBB P$13 VBB_ P$14 CP2(PUMP) P$15 CP1(PUMP) P$16 GND_ P$17 GND P$18 PHASE(DIR) P$19 V5(REG) P$20 SR(RECT) P$21 PWML P$22 PWMH P$23 RESET P$24 FF1(FAULT) P$25 FF2(FAULT) P$26 RDEAD P$27 VDSTH P$28 QHA QHB QLA QLB LOGIC_SUPPLY(100V) PUMP(25V) PUMP_STORAGE(25V) RG BOOTA(CERAMIC,25V) BOOTB(CERAMIC,25V) D1 RG1 D2 RG2 D3 RG3 D4 CV5 D 5 D _ T V S 1 D _ T V S 2 R D E A D R 2 R 3 C_SNUB1(100V) R_SNUB1 2 3 6 8 5 7 OK1 1 2 15 16 OK2A 3 4 13 14 OK2B 5 6 11 12 OK2C 7 8 9 10 OK2D G 1 1 A 1 2 A 2 3 A 3 4 A 4 5 A 5 6 A 6 7 A 7 8 A 8 9 Y 8 1 1 Y 7 1 2 Y 6 1 3 Y 5 1 4 Y 4 1 5 Y 3 1 6 Y 2 1 7 Y 1 1 8 G 2 1 9 C1 C2 F F 2 F F 1 R E S E T P W M H P W M H P W M L P W M L S R S R P H A S E P H A S E P H A S E 5 V G N D P H A S E S R P W M L P W M H PWM_IN PWM_IN 5V 5V GND GND GND GND DIR_IN DIR_IN NOT(BRAKE_IN) NOT(BRAKE_IN) I N P U T _ 5 V N O T ( P W M ) I N T E R N A L 5 V I N T E R N A L _ G N D 5V GND GND A B C D E 1 2 3 4 5 6 7 8 A B C D E 1 2 3 4 5 6 7 8 V- V+ M+ M- V+ V- A B