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  • Communication Synchronous Scheme For Mpsoc

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    Bruce Martin
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    This document discusses two schemes - mailbox and packet switching - for inter-processor communication synchronization in multi-processor system-on-chip (MPSoC). It analyzes these schemes in a network on chip based MPSoC. Experimental results show that the mailbox based scheme has low latency but is not feasible for large numbers of clusters, while the packet based scheme has more latency but greater scalability and feasibility.

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    This document discusses two schemes - mailbox and packet switching - for inter-processor communication synchronization in multi-processor system-on-chip (MPSoC). It analyzes these schemes in a network on chip based MPSoC. Experimental results show that the mailbox based scheme has low latency but is not feasible for large numbers of clusters, while the packet based scheme has more latency but greater scalability and feasibility.

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    11 views2 pages

    Communication Synchronous Scheme For Mpsoc

    Uploaded by

    Bruce Martin
    This document discusses two schemes - mailbox and packet switching - for inter-processor communication synchronization in multi-processor system-on-chip (MPSoC). It analyzes these schemes in a network on chip based MPSoC. Experimental results show that the mailbox based scheme has low latency but is not feasible for large numbers of clusters, while the packet based scheme has more latency but greater scalability and feasibility.

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    © All Rights Reserved
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    Communication Synchronous Scheme for MPSoC

    ABSTRACT
    Inter-Processor communication synchronization in multi-processor
    system-on-chip (MPSoC) is one of the key factors for the whole chip
    performance. It can not only affect the efficiency of task-level parallelism,
    but also has high dependency on MPSoC hardware architecture. Two
    synchronization mechanisms, i.e. mailbox and packet switching, are
    discussed in this seminar. It is analyzed in Network on chip based MPSoC.
    Two schemes are implemented and verified, and analyzed with
    communication latency, communication bandwidth. Experimental results
    show that the mailbox based synchronization scheme has low latency, but it
    is not feasible for large number of clusters due to the physical limitation.
    Although the packet based scheme has more latency, it has more scalability
    and feasibility.
    Communication Synchronous Scheme for MPSoC
    ABSTRACT
    Inter-Processor communication synchronization in multi-processor
    system-on-chip (MPSoC) is one of the key factors for the whole chip
    performance. It can not only affect the efficiency of task-level parallelism,
    but also has high dependency on MPSoC hardware architecture. Two
    synchronization mechanisms, i.e. mailbox and packet switching, are
    discussed in this seminar. It is analyzed in Network on chip based MPSoC.
    Two schemes are implemented and verified, and analyzed with
    communication latency, communication bandwidth. Experimental results
    show that the mailbox based synchronization scheme has low latency, but it
    is not feasible for large number of clusters due to the physical limitation.
    Although the packet based scheme has more latency, it has more scalability
    and feasibility.

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