1689 Thiet Ke He PLC

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vn
i Hc S Phm K Thut Hng yn Thit k h PLC
L Thnh Sn
1

Phn I:
gii thiu chung v iu khin
logic v thit b plc

http://www.ebook.edu.vn
L Thnh Sn
2
Trong phn ny chng ta i tm hiu v khi nim iu khin lgic v cc
kin thc v PLC.
1.1. Khi nim iu khin logic.
Trong thc t cng ngh c nhiu i lng vt l cn i khin v quan tm
n gi tr ca n ti mt thi im c th l ln hay nh qu trnh iu gi l
iu khin qa trnh. Nhng ngoi ra cn c mt iu khin khc trong qu trnh
sn xut cn quan tm ti l vic ng b qu trnh lm vic ca ton b h
thng. Khi ta ch quan tm n trng thi ca cc thit b ang lm vic hay
ngh qu trnh ny gi l iu khin lgic.
iu khin lgic xut pht t thc t ngoi vic thit b lm vic nh th no
ngi ta cn phi quan tm ti vic khi no cho thit b lm vic, khi no cho
thit b ngh t c hiu qu cao trong qu trnh iu khin.
Vy trong iu khin lgic ta cn quan tm ti 2 trng thi do v mt tn
hiu ngi ta quan tm n 2 trng thi: Trng thi cao(High) v trng thi thp
(low).Thng thng trong thit k iu khin logic ngi ta ngm qui c thit
b ang lm vic c trng thi Logic 1 hay trng thi cao cn khi thit b ang
ngh th mc lgic 0 hay trng thi thp. Tuy nhin vic quy c trn ch l
tng i m tu theo thit b iu khin m tng ng vi 0 l im ngh v l
iu khin lm vic hoc ngc li cn nu con ngi ch ng p t 1 l lm
vic th chn thit b cho ph hp v c th t ngc li.
Trong iu khin lgic ta cn quan tm n cc bin u vo gia cng
theo hm logic to nn gi tr u ra. Quan h gia u ra v u vo nh
chng trnh phn mm hay phn cng iu khin. Cc bin u vo c to
nn t cc nt n, cng tc cc gi tr ny ph thuc vo ngi vn hnh hay
trnh t ca cng ngh. Ngoi ra cc bin vo khc Sensor logic ca cc thit b
do lng cc i lng vt l m ta cn iu khin nh tn hiu ra ca cc cng
tc hnh trnh, Rle in p, Rle p lc, Rle nhit
Hm Logic u ra a ti iu khin cc i tng c th l nhm cc thit
b nh cc cun ht cc thit b ng ct hay ng c ca my sn xut

L Thnh Sn
3
1.2. Khi nim chung - ng dng ca PLC.
1.2.1. Khi nim v PLC.
PLC (Programable Logic Controller) l mt thit b iu khin logic lp trnh
c. Thit b ny c cc u vo logic sau qu trnh x l theo chng trnh bn
trong n cho u ra l cc mc logic c quan h vi cc u vo thng qua
chng trnh bn trong thit b PLC c ng dng rng ri v dn khng th thiu
c trong cc dy truyn sn xut hin i. Chc nng iu khin ca PLC rt
a dng n c th thay th cho 1 mng rle hn th vic m rng PLC ging nh
mt my tnh n c th lp trnh c. Chng trnh ca PLC thay i n gin
r rng bng mt my lp trnh cm tay hay mt my tnh c nhn c phn mm
tr gip. Khi c th mt nhn vin vn hnh cng c th lp trnh c. S d
PLC c vai tr quan trng ti mc khng th thiu c trong cc giy truyn
sn xut hin i chnh l bi tnh mm do v tin dng c ng dng trong
mi lnh vc v quy lut iu khin ca n hon ton thay i c mt cch r
rng.
1.2.2. Cu trc chung ca 1 b PLC.
Mt b PLC c cu trc chung nh sau:

Khi nghin cu ti PLC iu u tin l s lng cc u vo v u ra
(Input, Output) i vi mt PLC th s u vo ra c th l 6 hoc 8 hay nhiu
hn. S lng u vo v u ra cho bit mc qun l c nhiu thit b.
IN
0
IN
1
IN
K
B iu
khin
theo
chng
trnh.

Out
0
Out
1
Out
m
Cc
u
vo
logic
c
lp.

Cc
u ra
logic
c
lp.

L Thnh Sn
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Vn ny c bit quan trng khi ng dng PLC cho mt dy truyn sn xut
phc tp cn gia cng nhiu bin u vo.
Cc bin u vo c ly t cc cng tc ng ct thng thng, cng tc
v tr hay cc Sensor logic t cc gi tr logic u vo. Cc u vo ny
thng c mc in p cao tng tin cy khi cu truyn xa. V bn trong
ca PLC l mt b vi iu khin vi vi iu khin khng lm vic vi mc in
p cao v vy cn mt mch chuyn mc in p v mc chun vi mc logic 1
l +5 v mc logic 0 l 0V. Khi PLC (b iu khin bn trong) s qut cc
cng vo ly d liu sau mt qu trnh x l bn trong bng chng trnh
phn mm sau d liu u ra dng s vi mc logic 1 l +5V mc logic 0 l
0V qua mch chuyn mc ta c cc mc ra in p cao hn p ng yu cu
iu khin.
Cc u ra ni vi cc cun ht ng ct rle, ng c my sn xut, ng
m cc van
Vi PLC th b vi iu khin MCU (Micro Controller Unit) l ht nhn
ca c h. B vi iu khin m nhim tt c cc cng vic t thu nhp d liu
u vo, x l cc d liu v a ra u ra PLC lm vic nh mt my tnh
nhn d liu u vo dng s v a d liu ra dng s v qu trnh hot ng l
hon ton t ng.
Ngoi ra cc u vo ra logic th PLC cn c cc u vo cp ngun
thng thng ngun nui PLC l mt in p xoay chiu qua x l ngun to ra
in p 1 chiu ph hp nui b vi iu khin v cc mch in t khc.
1.2.3. ng dng v u nhc im ca b iu khin logic c kh
nng lp trnh (PLC).
S ra i ca PLC p ng c yu cu cn thit ca vic iu khin
cc dy truyn sn xut v mt lot cc yu cu khc m cc thit b iu khin
logic trc n khng th p ng hoc p ng hn ch.
n c vic ng dng PLC thay th cho 1 mng rle. Trong cc h
thng khng ch - iu khin logic truyn thng qa trnh ny c thc hin
bng mng cc rle - cng tc t v sau ny cn c thay th bng cc mch IC
L Thnh Sn
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s r rng thc hin qu trnh iu khin ny hon ton thc hin bng phn
cng v vy m mi mt yu cu iu khin th li phi i xy dng 1 phn cng
p ng yu cu trn m vic xy dng bng phn cng nh vy l cc k kh
khn v mt k thut, chi ph tn km v mt kinh t v c bit l mt rt nhiu
thi gian khi xy dng cng nh khi c yu cu thay i hay hiu chnh th phi
cho h thng dng v tho ra lp li hon ton bng phn cng v vy m tng
chi ph cho qu trnh ny l rt ln. c bit vi cc dy truyn yu cu iu
khin phc tp th mch ny chim mt th tch ng k v tin cy khng cao.
Vic a PLC vo thay th cho qu trnh iu khin logic em li
nhng u im ni bt.
Vi mt h thng ln th chi ph cho mt b PLC l rt nh. Mt PLC rt
gn nh m mc iu khin l v cng ln. Cc tip im trong mch iu
khin logic bng cun dy rle c thay th bng cu lnh v vy s lng
tip im l khng hn ch.
c im tnh mm do trong iu khin m ta c th thay th lut iu
khin rt n gin v nhanh gn m hu nh khng phi chi ph ti chnh trong
khi h thng ang lm vic bng mt my lp trnh cm tay (HPC) hay mt my
tnh c nhn (PC) ta hon ton c th gi chng trnh ra sa cha. Vic lp
t PLC rt n gin nhanh gn ch cn xc nh cc u vo v u ra vic lp
trnh cho PLC hon ton thc hin c bng phn mm do nh sn xut cung
cp, cc nh sn xut .
Cc nh sn xut PLC c th sn xut theo phng php sn xut hng
lot tu theo ng dng m khi vit chng trnh s to ra cc quy lut u khc
nhau v vy m lm gim gi thnh ca PLC.
Vy cc u im khi dng PLC.
- Thi gian lp t cng trnh ngn.
- D dng thay i m khng gy tn tht n ti chnh.
- C th d dng tnh ton chnh xc gi thnh.
- Cn t thi gian hun luyn
- D dng thay i phm mm.
L Thnh Sn
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- Phm vi ng dng rng.
- D dng bo tr, x l s c d nhanh hn.
- tin cy cao.
- Chun ho c phn cng iu khin.
- Thch ng trong mi trng khc nghit.
Tuy nhin vi mc qun l v iu khin rng th PLC li khng ph
hp vi nhng h thng nh, n gin v khi s khng tn dng c kh
nng lm vic ca thit b ny.
Cc ng dng chnh ca PLC.
iu khin gim st.
a. Thay cho iu khin rle.
b. To b m thi gian.
c. Thay cho cc Panell iu khin mch in.
d. iu khin t ng, bn t ng cc qa trnh.
iu khin dy.
a. Cc php ton s hc.
b. Cung cp thng tin
c. iu khin lin tc (nhit , p sut).
d. iu khin PID.
e. iu khin ng c chp hnh.
f. iu khin ng c bc.
iu khin mm do.
a. iu khin qa trnh bo ng.
b. Pht hin li iu hnh.
c. Ghp ni my tnh vi RS 232 / RS 242.
d. Ghp ni my in.
e. Mng t ng ho x nghip.
f. Mng cc b.
g. Mng m rng.
h. FA, EMF, CIM.
L Thnh Sn
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Nh vy ng dng PLC trong k thut l v cng phong ph trong rt nhiu
lnh vc t iu khin n x l thng tin v vy cng thy vai tr ca n.
1.3. B vi iu khin v ng dng ca b vi iu khin
trong h PLC.
Trong thi i cng ngh thng tin v ng dng mnh m ca n vo i
sng v k thut th nhng kin thc v vi iu khin (Micro Controller) v ng
dng ca n cng tr nn cn thit.
1.3.1. Gii thiu tng quan v b vi iu khin.
1.3.1.1. nh ngha vi iu khin.
B vi iu khin MC (Micro Controller) l mt mng tch hp rt cao trn
mt chip v c th lp trnh c dng iu khin h thng.
B vi iu khin sut hin t vic a b VXL vo qu trnh iu khin v
vy c th hiu b vi iu khin nh b vi x l song song sc x l thng
khng ln nh nhng b vi x l ln.
Khi nghin cu vi iu khin ta quan tm n cc vn nh sau:
- Kch thc bit x l.
- Tc x l.
- Kh nng vo ra.
- Tng thch vi my tnh c nhn (PC).
- Phn tch ng dng.
- Ngoi ra cn quan tm n gi thnh ca thit b.
1.3.1.2. Nguyn l hot ng.
Nguyn l hot ng ca b vi iu khin nh mt b vi x l
Vi mi mt b vi iu khin ngoi cc phn t ph nh cc rc cm cc
mch m v lng mc in p cho ph hp yu cu th vi mi h vi iu khin
u cha cc phn t c bn nh sau:
- Chp vi x l y din ra cc qu trnh x l thng tin nh cc php
ton s hc v logic, cc thao tc vo ra d liu mi qu trnh ny theo mt
L Thnh Sn
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chng trnh c lp sn to ra quan h gia u vo v u ra theo yu
cu.
- ROM (Read Only Memory) l mt b nh ch c thng lu tr h iu
hnh gip chp vi x l tin hnh cc thao tc khi to khi dng v 1 s qu
trnh vo ra d liu.
- RAM (Ramdom Access Memory) l b nh va c kh kh nng c v
ghi vi b nh ny thng dng lu tr d liu trong qu trnh lm vic hoc c
th dng RAM nh mt ROM khi cc thao tc chung nhp vo RAM nh
vic c chng trnh ROM.
S ca mt h vi iu khin vi cc phn t chnh nh sau:

Ban u khi to vi x l c chng trnh trong ROM l chng trnh
iu hnh n qut v kim tra ton b h thng v a trng thi c h trng
thi sn sng ri chy chng trnh chnh khi s c qu trnh qut ly tn hiu
vo theo yu cu ca chng trnh ri tin hnh x l, gia cng a ra iu
khin cc thit b theo yu cu. Cc tn hiu iu khin ny c th l dng s
c lu tr bng mt vi mch m cht v c th chuyn mc iu khin theo
yu cu. Nu i tng iu khin l tn hiu tng t th t tn hiu s qua b
chuyn i D/A to ra tn hiu tng t lm tn hiu iu khin.
RAM
d
a
a
d
RoM
a
d
Ngoi vi
Xung nhp
Tn hiu ngt
Reset
RXD TXD
Cng truyn
ni tip
VXL
L Thnh Sn
9
Tng t nh u ra, u vo cng c th chuyn mc chun v thng
cc tn hiu s ly t Sensor logic v yu cu truyn xa nn c mc in p
khng ph hp vi yu cu lm vic ca vi x l nu u vo l mt tn hiu
tng t th cn mt b bin i A/D a tn hiu s vo vi x l.
Nh vy vi iu khin nh mt my tnh m ng dng ca n l to ra cc
tn hiu iu khin h thng bng chng trnh phn mm.
1.3.1.3. ng dng ca vi iu khin.
S ln mnh khng ngng ca cc thit b vi iu khin (chip x l trung
tm) phn no ni ln vai tr quan trng ca h vi iu khin trong thc t. Vo
nhng nm 1970 do s pht trin ca k thut vi in t da trn k thut MOS
(Metal Oxire Semicon Ductor) vi tch hp ngy cng cao. Vi mch MSI
(Mundium Size Integration) c tch hp c 10
3
Tranzito trn mt chp, vi
mch LSI (Large Size Integretion) c tch hp c 10
4
Trangito trn mt chp
v vi mch VLSI (Verry LSI) c tch hp 10
5
Tranzito trn chp nhng s bit
x l cn nh. Nm 1971 b vi x l Intel 4004 loi 4 bit ra i c cha 2250
Tranzito n nm 1975 hng Intel c ra i chp x l 8 bit 8080 v 8085. Nm
1978 hng Intel cho ra i vi x l 16bit 8086 c 29.000 Tranzito v hng
Motorola cho ra vi x l 68.000 vi 70.000 Tranzito v vi x l 32bit ca
Henlet packand c 40.000 Tranzito.
Vy t nm 1947 n nm 1984 s Tranzito tch hp trn mt chp tng
100 ln. n nm 1983 hng Intel cho ra vi x l 8286 dng cho my tnh AT
(Advaned Tecchnology) dng cc ng I/0 16bit v c 24 ng a ch v
khng gian nh a ch thc l 16MB v nm 1987 vi x l 80386 x l 32bit
nm 1989 hng Intel cho ra i chip x l 80486 pht trin trn c s 80386 c
thm b nh n v mch tnh ton du phy ng.
Nm 1992 Intel cho ra 80586 cn gi l Pentium 64bit c 4 triu Tranzito.
Cc b vi x l ny pht trin theo hng ngy cng tng chc nng v
tch hp.
T cc con s trn ta thy c s pht trin mnh m lnh vc vi iu
khin, ring chip vi iu khin 8051 mi nm bn ra trn th trng c 1,5 t b.
L Thnh Sn
10
ng dng ca b vi iu khin rt rng ri trong cc thit b thng minh bng
vic lp trnh to chng trnh iu khin v vy m tnh mm do ca n rt
cao, thay i chng trnh iu khin n gin c bit vi cc b m thi gian
lp trnh c cng tng tnh ng dng ca n.
Trong cng nghip dng h vi iu khin trong cnh tay robt, cc h
thng iu khin dy truyn hay tng hp thng k cc thng tin ca qu trnh
sn xut nh my hay dng trong vic bo v v t ng iu khin cc Camera
quan st.
Vic kt hp gia h vi iu khin v cc cm bin to nn cc h iu
khin thng minh c ng dng trong cc my git, qut gi, iu ho nhit d,
u a, ti vi, in thoi di ng
c bit c th tiu chun ho phn cng m ng dng trong cng nghip
sn xut hng lot.
Vy ng dng ca thit b vi iu khin l rt phong ph trong mi lnh
vc nh kh nng lp trnh cao ca thit b.
1.3.2. ng dng b vi iu khin trong PLC.
Vi iu khin trong b PLC l ht nhn iu hnh v kim sot mi thao
tc t c d liu u vo ri x l v iu hnh qu trnh a d liu ra. Thit b
PLC c to ln t h vi iu khin v cc mch in cht, chuyn mc in p
v mt cng truyn RS232 c ra v a vo chng trnh iu khin. Nh
vy b vi iu khin trong PLC quyt nh mi s hot ng ca PLC.
Kt lun: phn I ny chng ta i tm hiu mt s khi nim chung v
mt s kin thc c lin quan ti PLC v b vi iu khin. tm hiu v xy
dng c th b vi iu khin v thit b PLC s c cp phn sau.

L Thnh Sn
11

Phn II:
GII thiu h vi iu khin mcs-51

L Thnh Sn
12
Vi iu khin 8031 c nhng tnh cht c trng nh: n v x l trung
tm 8bit c ti u ho p ng cc chc nng iu khin.
- Khi logic x l theo bit thun thin cho cc php ton Boolear.
- B to giao ng gi nhp bn trong ( n 12 MHZ).
- Tp lnh rt phong ph.
- Giao din ni tip c kh nng hot ng song song ng b (UART).
16(32) ng dn vo/ra 2 hng v tng ng dn c th c nh a ch 1
cch tch bit.
- Nm ngun ngt vi hai mc u tin.
- Dung lng b nh chng trnh bn ngoi ( ROM) c th n 64 KB.
- Dung lng b nh d liu ( RAM ) bn ngoi n 64KB.
- Dung lng b nh RAM trong 128byte.
- Hai b m nh thi 16 bit.
- Bus v khi nh thi tng thch vi cc khi ngoi vi ca b vi x l
8085/88.
- Tt c cc vi iu khin ca dng vi iu khin MCS - 51 u c chung
b lnh. Nu ln ca chng trnh va trong mt chip ROM v nu Ram
trong y th vi iu khin 8031 khng yu cu thm logic thi hnh kt
thc iu khin h thng.

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2.1. Cu to chung ca h vi x l 8031.
Vi x l 8031 l vi x l thuc h 8051 do hng Intel ch to c s
chn chun nh sau:

*

1 40
2 39
3 38
4 37
5 36
6 35
7 34
8 33
9 32
10 31
11 30
12 29
13 28
14 27
15 26
16 25
17 24
18 23
19 22
20 21
Vcc
P0.0 ADO
P0.1 AD1
P0.2 AD2
P0.3 AD3
P0.4 AD4
P0.5 AD5
P0.6 AD6
P0.7 AD7
EA / Vpp
ALE / PROG
PSEN
P2.7 A15
P2.6 A14
P2.5 A13
P2.4 A12
P2.3 A11
P2.2 A10
P2.1 A 9
P2.0 A 8
P1.0
P1.1
P1.2
P1.3
P1.4
P1.6
P1.6
P1.7
RST
RXD P3.0
TXD P3.1
INTO P3.2
INT1 P3.3
TO P3.4
T1 P3.5
WR P3.6
RD P3.7
XTAL2
XTAL1
Vss
MCS 8031 .DIP40
L Thnh Sn
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Chn K hiu Chc nng
1
8
P1.0
P1.7
Cng gi 2 hng (quasi - biderectional)P1
T do s dng
9 Reset Ni vo RST, khi hot ng mc Hight
10
17
P3.09
P3.7
Cng gi 2 hng P3. Xp xp tt c cc chc nng c bit.
18
19
20
XTAL2
XTAL1
Vss
Li ra ca b giao ng thch anh bn trong
Li vo ca b giao ng thch anh bn trong
Ni t.
21
28
P2.0
P2.7
Cng gi 2 hng P.2. Chc nng c bit: cc ng dn a
ch A8.A15
29
PSEN
Progam strobe Enable, xut ra cc xung c dng cho b nh
ca chng trnh bn ngoi
30 ALE Address Latch Enable, xut ra cc xung iu khin lu tr
khng gian cc a ch.
31
EA
External Access: mc Low th lm vic vi b nh chng
trnh bn ngoi.
32
39
P0.7
P0.1
Cng 2 hng cc mng h PO hoc Bus d liu hng dng
cho Ram, Ram v thit b ngoi vi bn ngoi. Cng chuyn
giao c 8 bit pha di ca a ch A
0
- A
7

40 Vcc Ngun nui +5V

L Thnh Sn
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2.2. Cu trc bn trong ca 8031.

cc ngt ngoi cc s kin cn m

NGuN
NGt
TRONG

xtal1 xtal2 psen ale D liu, a ch
a ch mc cao
mc thp.

Phn chnh ca vi mch l n v x l trung tm ( CPU: Central processing
Unit), n v ny c cha:
+. Thanh ghi tch ly ( k hiu l A).
+. Thanh ghi tch lu ph (B) dnngcho php nhn v chia.
+. n v logic (ALU: Arithmetic Logical Unit)
+. T trng thi chng trnh ( PSW: Progam Status Word)
+. Bn bng thanh ghi.
Ram trong
128
byte
ram
thanh
ghi
sfr

timer
o

timer
1

iu
khin
ngt

cpu

b
dao
ng

qun
l
bus
p
0
r
t
0
p
0
r
t
2
p
0
r
t
1
txd
rxd
p
0
r
t
3

cng
ni
tip

L Thnh Sn
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+. Con tr ngn xp (SP) cng nh con tr d liu nh a ch cho b
nh d liu ngoi.
+. Ngoi ra y cn c: B m chng trnh (PC), b gii m lnh, b
iu khin thi gian v logic.
n v x l thng tin nhn trc tip xung nhp t b to dao ng c
lp thm vo, linh kin ph tr c thm l mt khung dao ng bng vt liu
gm hoc mt cng hng bng thch anh.
Chng trnh ang chy c th dng li nh mt khi logic ngt bn
trong. Cc ngun ngt c th l: Cc bin c bn ngoi, s trn b m/ nh
thi hoc cng c th l giao din ni tip.
B vi x l 8031 nhn c chng trnh iu hnh ca n t mt b nh
chng trnh bn ngoi, 8031 c 128 bytes RAM bn trong c th xp xp
cc d liu v thng tin iu khin. 8031 c 2 b nh thi 16 bit, chng cng
c x dng nh l b m s kin.
8031 c 4 cng rng 8 bit, c lp vi nhau, cng P.0 dng truyn na
di ca cc a ch v cng dng cho cc d liu 8 bit. Cng P.2 truyn na
trn ca cc a ch. cng P.3 cng c thm cc ng dn iu khin dng
trao i tin vi b nh ngoi, u ni giao din ni tip cng nh cc ng
dn ngt bn ngoi.
Giao din ni tip c cha mt b truyn v mt b nhn khng ng b,
lm vic c lp vi nhau. Bng cch u ni vi cc b m thch hp, ta c th
hnh thnh mt cng ni tip RS - 232 n gin. Tc truyn qua cng ni tip
c th c t trong mt vng rng v c n nh bng mt b nh thi.
2.3. Hot ng vi b nh chng trnh bn ngoi ca
VXL 8031.
Hnh v sau ch ra mt s nguyn tc cu trc mt mch in dng vi
b VXL 8031 v b nh chng trnh bn ngoi cng vu b cht ( latch) 8 bit.

L Thnh Sn
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ROM: Read Only Memorry
Mt vi vi x l h MCS 8051 c nh ROM trong,nhng 8031 khng c b
nh chng trnh bn trong do hot ng c th 8031 phi lm vic vi b
nh chng trnh ngoi(ROM ngoi). Khi lm vic vi b nh chng trnh
ngoi chn EA ca vi x l 8031 phi c ni Mass.VXL8031 c th a ch
ho c 64KB b nh chng trnh ngoi.
Khi ly d liu t ROM vi x l 8031 thc hin cc bc sau:
- a a ch byte thp (A
0
A
7
) ln bus d liu.
- Cht cc a ch bng mch ngoi. Vic ny thc hin bng cch lp
xung cht qua chn ALE cho mch cht ngoi.
a a ch byte cao n ROM (nu cn) cho php ROM a d liu ln
bus d liu . Khi c d liu t ROM vi x l s a chn PSEN sung mc
thp.
Vi x l 8031 c th a ch ho c 64KB b nh chng trnh ngoi nn
ta c th cho ROM 64KB. in hnh l loi 2764 gm cc chn nh sau:
- A
0
A
12
l cc chn a ch
- D
0
D
7
cc chn d liu.
- OE (Out Enable) chn cho php d liu ra khi chn OE mc thp
th ROM cho d liu ln bus d liu ca vi x l.
P2
P1
P3
CHT
ALE
D0..D7
A0..A7
ROM
A8..A15
OE
8031
Psen
EA
P0
L Thnh Sn
18
2.4. Truy nhp ln b nh chng trnh ca 8031.
Hnh v sau y ch ra din bin mt qu trnh truy nhp ln b nh
chng trnh ca 8031.

B lnh ca VXL 8031 nhn bit 2 di lnh khc nhau. Phn ln cc
lnh c VXL trong phm vi ca mt chu trnh my, s t cc lnh cn li cn
c 2 chu trnh my, Mt chu trnh my bng 12 chu k dao ng ca tn hiu
gia nhp.
Trong mt chu trnh my, ng dn iu khin ALE c 2 ln chuyn
trng thi c kch hot, ngay c khi do c lnh ang c thc hin nn ch
cn c mt chu trnh. Ch s truy nhp vit hoc c ln b nh d liu bn
ngoi, ni khng cn n mt chu trnh ALE l mt trng hp ngoi l. Khng
c b nh d liu bn ngoi, tn s ALE cng l hng s ( OSC/6). Tn hiu
ALE trong trng hp ny c th s dng lm tn hiu gi nhp cho cc mch
bn ngoi.
Trong chu trnh ALE c kch hot mc Hight, b VXL t trong
ng dn a ch pha di truy nhp ln b nh chng trnh bn ngoi ln
Bus chung dng cho d liu v a ch. Sau khi c sn dc xung trn xung
tn hiu ALE th ni dung ca a ch thp ny c chuyn vo b nh trung
gian.
A0..A7 A0..A7I
ALE
PSEN
INST
P0
INST INST
A8..A15 P2 A8..A15 A8..A15
L Thnh Sn
19
Bng vic xp xp cc a ch pha di vo Bus d liu, cc ng dn
a ch A
8
n A
15
c xp vo cng P2 mc cu cc ng dn ny gi nguyn
n nh cho n khi kt thc chu trnh truy nhp lnh.
Khi xung tn hiu ca ALE c on dc xung th b VXL t ng dn
iu khin PSEN ca n vo mc Low. Sau mt vi chu trnh gi nhp, b nh
chng trnh bn ngoi cn phi sp xp cc d liu( cc lnh) ca n ln Bus d
liu v Bus a ch chung. Sau bng sn dc ln ca PSEN b VXL n
nhn cc d liu ang c xp cng P0.
2.5. Qu trnh truy nhp ln b nh d liu ca VXL 8031.
Hnh v di y minh ho din bin ca mt qu trnh truy nhp c
b nh d liu bn ngoi:

Ging nh khi c b nh chng trnh bn ngoi, trc ht 8 ng dn
dn 8 a ch thy cng P0 v c xp ln Bus chung dng cho d liu v a
ch thp chuyn vo b nh trung gian dng cho a ch bng sn dc xung
cu tn hiu ALE. tip theo l s kch hot ca ng dn RD, iu khin qu
trnh c d liu bn ngoi. Ngay trc khi ng dn RD tr v vi mc High,
b x l n nhn cc d liu ang c xp bus. Do , vi nhiu ng dng
ng dn RD c ni tip hoc qua mt b gii m a ch vi chn OE ca
thit b ngoi vi.
A0..A7 Data in A0..A7
A8..A15 P2
P0
RD
ALE
L Thnh Sn
20
VXL 8031 nhn bit mt qu trnh truy nhp d liu bn ngoi 8 v 16 bit,
khi truy nhp d liu 8 bit, ni dung ca cng P2 gi nguyn khng thay i.
ging nh khi vit, cc a ch c truy nhp c xut ra Bus chung dng cho
d liu v a ch, t suy ra rng mt vng a ch ln nht l 256 Byte c th
trao i c. Cn khi sy ra qu trnh truy nhp 16 bit, b x l xut ra 8 bit a
ch gi tr cao hn qua cng P2. Bng cch ny c th truy nhp trc tip ln b
nh d liu bn ngoi n 64 KB.
Hnh v gin sau y biu din din bin ca mt qu trnh vit ln b
nh d liu bn ngoi ca VXL 8031.

Vic sp xp cc a ch gi tr thp A
0
n A
7
din ra ging nh trong qu
trnh truy nhp c, tip theo cc d liu cn vit c xut ra cng P0. Mt
xung Low c t ln ng dn WR. Thng thng th khi xut hin sn dc
ln ng dn tn hiu ny, khi ngoi vi c ni vo Bus d liu s n nhn
cc thng tin c sp xp trn Bus d liu.
Vi qu trnh truy nhp vit, ging nh khi c cc qu trnh truy nhp
8 hoc 16 bit ln thit b ngoi vi bn ngoi l hon ton c th. Khi truy nhp 8
bit, cng P2 cng gi nguyn khng thay i, trong khi qu trnh truy nhp 16
bit cc a chgi tr cao hn c sp xp.
Khi hot ng vi b nh bn ngoi, cc cng 0,2 v i khi c cng 3
u c sp xp dng cho vic nh a ch v truyn d liu, mt b nh Ram
A0..A7
Data in A0..A7
P0
P2
WR
ALE
A8..A15
L Thnh Sn
21
ngoi s dng cng Bus a ch v Bus d liu ging nh b nh chng trnh
ngoi. nhng chng cn trao i vi cc ng dn iu khin IOR v IOW,
trong khi b nh chng trnh ngoi c kch hot bng tn hiu PSEN .
2.6. Vi iu khin 8031.
Phn trc ta tm hiu nhng nt c bn v h VXL MCS -51 i din
l VXL 8031. C th ni b VXL 8031 ca hng INTEL l th h k tip ca
VXL 8048 sau khi c ci tin v m rng thm nhiu v phn cng. Hin
nay b VXL ny l mt b VXL c dng thng dng nht. B VXL 8031 nh
a ch nh d liu v chng trnh n 64 Kbyte. V phn cng trong 8031
c b xung phi k n mt giao din ni tip v mt b nh thi b xung
lm n gin ho c nhng ng dng phc tp. Ngoi ra tc lm vic ca
8031 cng tng ln. Mt b to tn hiu gi nhp vi tn s c xo nh bi b
cng hng thch anh u bn ngoi, xc nh lm vic ca VXL. Cc lnh
c thc hin ti mc tn s bng 1/12 tn s ring ca b dao ng thch anh.
Khi tn s ring ca b dao ng thch anh bng 12 MHz th mt lnh mt byte
cn ng mt Micro giy. Khi cc lnh c thm s cn tra cu trong b nh
chng trnh th cn c thi gian di gp i.
2.6.1. B m chng trnh ca 8031.
B m chng trnh c dng ch m byte lnh tip theo s c
c. N khng b nh hng trc tip nhng s b thay i bng nhng lnh r
nhnh nh lnh Jump hoc Call. N cng c th dng nh a ch c s cho ch
s a ch khi c t b nh chng trnh.
Khi Ram trong ca 8031t [ 0h.....1Fh] c dng cho cc thanh ghi. C 4
bank vi 8 thanh ghi trong mi Bank t R0 n R7.
Bank thanh ghi 0: T 00h n 07h ( R0 dn R7).
Bank thanh ghi 1: T 08h n 0Fh
Bank thanh ghi 2: T 10h n 17h
Bank thanh ghi 3: T 18h n 1Fh
L Thnh Sn
22
chn a ch cc thanh ghi, u tin cc thanh ghi Bank phi c kch
hot (Active). Vic la chn c lm bi c trong t trng thi chong trnh
PSW. Sau khi c chn thanh ghi 1 c k hiu l RI.
V d:
Mov a , R5 s chuyn ni dung thah ghi s 5 vo thanh ghi A, thanh
ghi ph thuc vo thanh ghi Bank hin ti c chn, c th l byte s 5,
0Dh, 15h hoc 1Dh ca Ram trong. Cc thanh ghi Bank thng c dng dnh
cho chng trnh con ( Subroutine) hoc chong trnh con phc v ngt ( Interup
Service Routine).
2.6.2. Nhng thanh ghi chc nng c bit: SFR ( Special Function
Registers).
Trong phn trn ca vng a ch Ram bn trong ca VXL 8031 c t v
s cc thanh ghi c chc nng c bit ( SFR) qua c th trao i vi cc
b phn ngoi vi bn trong ca b VXL 8031.
SFR bao gm cc thanh ghi d liu v cc thanh ghi iu khin chng
nm trong cc cng, time, hoc l cc thanh ghi iu khin ngt....
Cng ni tip c iu khin bi SFR Scon, trong khi d liu vo ra cng
ny i qua thanh ghi SFR SBUF. Nhng bit ring l ca Scon xc lp nhng ch
khc nhau ca cng ni tip. Scon c th c xem nh thanh ghi iu khin
v SBUF c gi l thah ghi d liu.
SFR c byte a ch trong khong ( 80h...FFh) ( tip theo phn a ch ca
Ram trong t 00h....07h nh ni trn). 8031 c th truy nhp Ram v SFR
bng ch a ch gin tip thanh ghi.
V d:
Mov A,80h: Chuyn gi tr lu tr trong SFR 80h vo thah ghi A
Mov A, @ RO: RO c t 80h, s chuyn ni dung ca Ram vo
trong thah ghi A.
SFR bao gm c thanh ghi A, thanh ghi B v t trng thi chng trnh
PSW bao gm c c h thng nh c Carry c 2 bit kch hot thanh ghi Bank.
Sau y l danh sch cc thanh ghi c chc nng c bit SFR ca 8031:
L Thnh Sn
23
Stt Register Address Mnemonic Internal
1 Port O Latch PO 80h
2 Stack Pointer SP 81h
3 Data Pointer Low Byte DPL 82h
4 Data Pointer High Byte DPH 83h
5 Power Control PCON 87h
6 Timer/ Counter Control TCON 88h
7 Timer/ Counter Low Byte TLO 8Ah
8 Timer/ Counter Mode Control TMOM 89h
9 Timer/ Counter 1 Low Byte TL1 8Bh
10 Timer/ Counter 0 High Byte TH0 8Ch
11 Timer/ Counter 1 High Byte TH1 8Dh
12 Port 1 Latch P1 90h
13 Serial Port Control SCON 98h
14 Serial Data Port SBUF 99h
15 Port 2 Latch P2 A0h
16 Interrupt Enable IE A8h
17 Port 3 Latch P3 B0h
18 Interrupt Priority Control IP B8h
19 Progam Status Word PSW D0h
20 Accumalator Acc or A E0h
21 B Register B F0h

Tt c nhng SFR c b xung, na byte a ch gi tr thp ca n c gi
tr bng 0 hoc bng 8 ( cc a ch byte 80h, 88h... cho n F8) l nh a ch
c theo bit. Bi v phn ln cc SFR bao gm t nhng bit ring l vi cc
chc nng c lp, nn s rt thun li khi cn t v t ra cc bit iu khin
ring l.

L Thnh Sn
24
2.6.3. RAM trong ca 8031.
RAM trong ca 8031 bao gm c cc thanh ghi v ccc thanh ghi c th lp
trnh v xo tng bit nh l Ram a mc ch. Ram c dng nh l vng lm
vic a nng. Ram on chip c a ch t 00h n 7Fh.
B VXL 8031 qun l cc a ch tch ri nhau dng cho b nh Ram bn
trong bng 128 byte ( 8032 l 256 byte), cho b nh chng trnh v b nh d
liu bn ngoi ( nu nh c u vo). Cng a ch c th xut hin ng
thi 3 ln. Mt c im ca 8031 l kh nng truy nhp nhng lnh c bit ln
cc bit ring l cho b nh Ram bn trong. Vng b nh Ram 29h n 2Fh c
s dng 1 cch t do l c th truy nhp ti bng cc a ch bit 0 n 7Fh.
B nh Ram bn trong cho php xp t trong vng pha ri 4 dy thanh
ghi c lp vi mi dy 8 thanh ghi. Sau mi ln t li ( Reset), ngn xp bt
u a ch 08 v tng dn ln pha trn vi mi ln gi chng trnh con.
c th x dng nhng Bank thanh ghi cao hn, con tr ngn xp phi t ln
mt gi tr thch hp ch bt u ca mt chng trnh.
Ch th Mov chuyn d liu n Ram hoc t Ram i cho php dng c 2
ch trc tip v gin tip a ch.
V d:
Mov A,35h; S chuyn ni dung ca byte 35h ca Ram trong ca thanh ghi A.
Lnh ca 8031 s dng k hiu # ch ra l hng s.
Mov A,# 35h; Chuyn 35h vo thanh ghi A.
Mov A,@ RO; Chuyn ni dung cu byte nh Ram trong c a ch
c cha trong thanh ghi Ro vo thanh ghi A.( Cc thanh ghi c dng c th
t 0 n 7).
8031 c 128 bye b nh, do c thanh ghi Ro cha gi tr t 00h n
7hH. V ch c thanh ghi R0,R1 ca nhng bank thanh ghi c chn hin thi
c th dng ch gin tip a ch.
B nh Ram bn trong ca 8031:

L Thnh Sn
25

7FH
30H
S dng t do v ngn xp
2FH
20H
Cc a ch bit 0.....7Fh
1FH
18H
Bank thanh ghi 3
17H
10H
Bank thanh ghi 2
0FH
08H
Bank thanh ghi 1
07H
00H
Bank thanh ghi 0

2.6.4. ROM B nh ch c.
B VXL 8031 c 4 cng vo ra song song ( Parallel Input/Output Port).
Khi cng c dng l cng ra, d liu c trong SFR tng ng. Gi tr
c vit n SFR tng ng s c cht vo v pht ra tn hiu sau khi qu
trnh ghi kt thc. Gi tr ca cng ra thay i khi gi tr mi c cht.
Khi cng c dng l cng vo, u tin gi tr FFh s c ghi ln
cng, sau tt c cc cng vo lm cho chn in th thp s c t bng 0.
Vic c cc SFR tng ng s c gi tr ca cng. B cht ca ra s iu
khin chn cng ln mc logic 1 nu khng dng in ca mch ngoi h xung
trn chn. Mc d cng 1 SFR ang c dng, nhng bn trong vn c 2 thao
tc c tin hnh khi cng ang c c v c ghi. Cc thao tc c tin
hnh khi cng ang c c v c ghi. Cc thao tc c thc hin hon ton
bng phn cng, bo v gip ngi dng t vic gi hng khi d liu c
chuyn.
L Thnh Sn
26
Mt iu ch na l mc d tt c cc thao tc c m c gi tr t
chn cng, C mt vi thao tc vn c ngm c gi tr ca cng cht, gi l
thao tc Read Modify Wite.
V d:
INC P1 s c ni dung cu cng, tng gi tr v ghi kt qu tr li cng.
Nhng thao tc c tin hnh hon ton bng phn cng. nhng ch th read
Modify Wite l ANL, ORL, XRL khi m ton hng ch l c bit ca cng SFR,
cn thao tc JBC v CPL c dng khi ton hng ch l cc bit ca cng SFR.
INC, DEC, MOV, CLR v SET, DJNZ c dng khi ton hng th nht l cng
SFR.
V d:
MOV P1.0,c chuyn gi tr ca c Carry vo bit 0 ca Port 1. thao tc ny
c tin hnh bng phn cng, chia lm 2 phn: Port 1 c c t cht sau
bit 0 ca n s b thay i v s c ghi tr li cht.
Tng cng c 4 cng, nhng khi dng b nh ngoi th 3 cng trong s
c s dng hon ton hoc mt phn. Ch cn li cng P1 c 8 li ra vo
c s dng t do. Chng c gi l cc cng gi hai hng (Quasi bidirectional),
bi v trng thi tnh ca cng ny l cao v c in tr cao, ngoi ra chng c
th ng vai tr nh cc li vo. trng thi thp chng c in tr thp v c
th m trc tip cho cc LED. Cng 0,2,3 c cc chc nng thay i, nhng
chn cng ny c th c dng nh l nhng ng vo ra s liu chung, hoc
c th dng cho nhng chc nng th hai ca chng. Chc nng th hai ca cng
0 v 2 l giao tip vi b nh ngoi. Cng 3 c cc chc nng th hai nh sau:
Bit Alternate Function Mnemonic/ Designation
0 Serial Input Port RxD
1 Serial Output Port TxD
2 External Interrupt 0 0 INT
3 External Interrupt 1 1 INT
4 Timer/ Counter 0 External Input T0
5 Timer/ Counter 1 External Input T1
L Thnh Sn
27
6 External Memory Write Strobe WR
7 External Memory Read Strobe RD
tin hnh la chn cc chc nng th mt hay hai ca cc cng th cc
SFR tng ng phi c thit lp.
2.6.5. Cng ni tip ca 8031.
Giao din ni tip bn trong ca VXL 8031 cho php ghp ni bVXL
vi mt my tnh PC mt cch rt n gin. Bi v giao din c thc hin nh
b UART hot ng c lp( Autonomous), nn b VXL hon ton t do i vi
cc nhim v khc. Cng ni tip c iu khin vi thanh ghi c chc nng
c bit (SFR) SCON. khi to giao din thanh ghi SCON cn phi c np
bng cc tham s thch hp.
SCON: ( SFR 98h)
SM0 SM1 SM2 REN TB8 RB8 TI RI
7 6 5 4 3 2 1 0

MSO MS1 Ch
0 0 0
0 1 1
1 0 2
1 1 3
SMO, SM1: Cc bit ch ni tip 1 v 2 chn loi hot ng.
Ch 0: Cng ni tip dng nh mt thanh ghi dch v tc dch bng
mt chu k my hay bng 1/12 dao ng tinh th thch anh
Ch 1: Dng Timer 1 pht ra tc Baud truyn v nhn 8 bit d
liu.
Ch 2: Dng cng ni tip 9 bit vi tc d baud l 1/32 hay 1/64 dao
ng tinh th thch anh.
Ch 3: Dng ni tip 9 bit vi tc baud c quyt nh bi Timer 1.
SM2 dng trong ch 2 hoc 3 a x l c d dng.
L Thnh Sn
28
REN: c xc lp bng phn mm cho php nhn ni tip nu b xo
d liu s nhn theo tng khi.
TB8: c lp v xo bng phn mm v bit th 9 s c truyn trong
Mode 2 v Mode 3.
RB8: Ph thuc vo ch hot ng ca ch lm vic. Nu ang lm
vic ch 2 hoc 3 th s nhn 9 bit d liu v bit cui cng c a vo
RB8.
TI: c xc lp bi phn cng bo hiu vic truyn kt thc. N
phi c xo bng phn mm cho php truyn d liu tip theo.
RI: c xc lp bng phn cng bo hiu vic nhn hon thnh. N
cng c xo bng phn mm lc c byte d liu t SBUF cho php nhn
d liu tip theo.
Thanh ghi d liu ca giao dch ni tip l SBUF (SFR 99h) d liu vo v
ra cng ni tip u i qua SFR SBUF. Thc t pha sau thanh ghi SBUF l hai
thanh ghi c th l thanh ghi d liu truyn v thanh ghi d liu nhn. Qu trnh
c truyn m u bng cch n gin bng cch truy nhp ghi ln thanh
ghi SBUF. Ngc li, mt byte c nhn c th c c t SBUF. Trong
ch 9 bit, mi mt bit th 9(TB 8 hoc TR 8) trong thanh ghi SMOD cn phi
c ch n. ngi ta hay dng ch hot ng loi 1 v nh vy c 1 b
UART 8 bit, tc Baud bng b nh thi 1. Dng d liu 8 bit c m u
bng 1 bit Start kt thc bng 1 bit Stop. Tc Baud bng 1/16(SMOD =1)
hoc 1/32 (SMOD=0) ca tc trn ca b nh thi 1. SMOD l bt c gi tr
cao nht trong thanh ghi SCON ( SFR 87h).
SMOD: 1 bng tc Baud thp, bng 0 tc baud cao.
GF1, GF2: C c s dng t do.
PD: Ch Power Down (ch loi CMOS 80C31).
IDL: Ch chy khng (IDLE).
2.6.6. Timer/ Counter ca 8031.
Vic to ra mt tn hiu gi nhp dng cho giao din ni tip i hi trc
ht l vic lp trnh cho b nh thi 1. 8031 c 2 Timer/ Counter, c hai b nh
L Thnh Sn
29
thi ny u c hai thanh ghi m 8 bit trn mi b. Cc thanhghi ny c th
c np v c c ra. Time / Counter 0 l thanh ghi TH0 v TL0, Timer/
Counter 1 l TH1 v TL1. Khi hot ng, mi khi c xung t no th s m
xong lu trong 1 hoc 2 chn ca cng 3 (XTAL1, XTAL2). S xung hin ti
ca Timer/ Counter c th c t TL0 v TL 1 hoc TH0 v TH1. Timer/Counter
cng pht ra ngt vi iu kin l nhng ngt khng b IE chn, khi b m
b trn ( v li quay v 0) th ngt c pht ra. Trng thi ca cc ngt c
quan st qua SFR TCON.

Hot ng ca Timer/ Counter c iu khin bi b xung ngu nhin t
ngun ti thanh ghi m d liu. Ngun d liu s ti thanh ghi d liu ca
Timer 0 nu iu kin l (Gate hoc INTO) v TR0. Gate l bit iu khin
Timer 0 ca TMOD. 8031 coi bit iu khin l Gate. Tuy nhin khi Timer/
Counter hot ng trong lc Gate ang mc logic thp th s ging nh trn
chng t bit iu khin l Gate. TR0 cng l bit iu khin ca Timer 0 trong
TMOD
GT C/T M1 M0
TI1 TR1 TI0 TR0
TCON
P3.2(INT0)
P3.4(T0)
Illator Frequenry
UP DATE
TH0, TL0
MODE
SElECT
S khi ca Timer/Counter
L Thnh Sn
30
thanh ghi TMOD, INTO ca 80331 ( chn 12 ca 8031). iu kin trn ch r
rng nhng thanh ghi d liu ca Timer 0 c cp nhp ngun khi bit iu
khin TR0 c thit lp v c bit iu khin Gate b xo hoc INT0 ca 8031
mc 1.
Thng thng ngi ta chia ch lm vic ca b nh thi ra lm 3 phn:
+. Ngun vo
+. iu khin hot ng.
+. Cp nhp ch lm vic.
Ngun vo c th l 1/12 tn s dao ng hoc xung nhn c chn T0
(T1)ca cng P3 bi Timer 0 (Timer 1).
Ngun vo c chn bi bit iu khin C?T ca thanh ghi TMOD. Trn
thc t c 2 bit iu khin, mi bit cho 1 Timer.
Nh ni trn to ra tn hiu gi nhp cho Timer/ Counter 1. Cc
tnh cht ca b nh thi c iu khin qua thanh ghi TCON ( SFR 88h) v
TMOD ( SFR 89h). Trong loi hot ng c thit lp qua TMOD.
B nh thi 1 hoc 0 m cc xung nhp bn trong ca 8031 nh l b
m lin tc t do. V th n c a vo nh l mt b nh thi trong ch
hot ng loi 2. Khi c mi ln trn th mt trng thi c t trc b
m li ti lp trong b m. Mi mt b m c khi ng qua bit TR ca n
trong thanh ghi TCON, TCON cng c cha cc c trn ca 2 b nh thi v 4
bit iu khin iu khin ngt qua cc chn 0 INT v 1 INT .
i vi ch hot ng nh l my pht tc Baud, y ch cn bit
chy ( Rn bit) TR1 phi c t. Mun th phi nh a ch c ti bit l t
ti c a ch 8Eh. Nhng trc ht, khi b m c lm dng th tc b
chia tn cn phi c thit lp. loi hot ng 2, byte b m c gi tr cao
nht TH1 c cha gi tr np li, gi tr m c mi ln trn li c np vo
thanh ghi b m. i vi vn tc truyn 9600 Baud, bit SMOD c t
cn c gi tr tn s b cng hng thch anh bng 11,0592 MHz phi la chn
mt s chia bng 6.
11059,2 KHz/12/6/16 = 9,6 KHz.
L Thnh Sn
31
Khi np gi tr b m bng 256 - 6 = 250 = FAh th h s chia bng 6 v
b m y m theo hng tin.
Timer/ Counter c 4 ch hot ng, hot ng ca c 2Timer/ Counter
c quyt inh bi SFR TMOD. 4 bit thp ca TMOD iu khin 0,4 bit cao
ca TMOD iu khin Timer 1.
TMOD Register(89h) :
7 6 5 4 3 2 1 0
Gate C/T M1 M0 Gate C/T M1 M0
B m 1 B m 0

Gate: Mi mt b m c cho php qua chn INTO hoc 1 INT . Khi TR0
(RT1) ca TCON c thit lp Gate s xo Timer/ Counter hot ng. Nu
Gate v TR0 ( TR1) cng c thit lp th cho phpTimer/ Counter hot ng
nu INTO (IMT1) c kch hot Low.
C/T (Counter/Timer Select): 0: Timer
1: Counter.
B m s tng khi xung vo TO ( T1) cng 3 ch Timer mi khi c
xung ( qua) th 12 th b m s tng.
M1 v M0 : Chn ch lm vic.
0 0 : Mode 0 b m/ b pht thi gian 13 bit. Trong ch ny
ngt c pht ra khi c 2
13
= 8192 xung vo.
0 1 : Mode 1 b m/ b pht thi gian 16 bit. Trong ch ny
ngt c pht ra khi c 2
16
= 65536 xung vo.
1 0 : B m/ b pht thi gian 8 bit, t ng np li khi bt ngun
nui.
1 1 : Mode 3 ch dng cho b m 0 : Hai b m 8 bit tch ri
nhau.

L Thnh Sn
32
TCON Register ( SFR 88h).
7 6 5 4 3 2 1 0
TF1 TR1 TF0 TR0 IE1 IT1 IE0 IT0

TF1: C trn dng cho Timer 1. TF1 c thit lp bng phn cng khi
Timer/Counter b trn. TF1 b xo khi c x l r nhnh n chng trnh con,
phc v ngt, TF1 v IE1 c th iu khin bng phn mm quyt nh trng
thi ca Timer 1.
TR1: ng mch Timer 1: Timer/Counter 1 khng hot ng khi bit ny
b xo, bit ny cn thit c lp nhng khng cho php Timer/Counter
hot ng. TR1 iu khin hon ton bng phn mm.
TF0: C trn dng cho Timer 0.
TR0: ng mch Timer 0.
IE1: Ngt INT1 vi kch chuyn bng sng xung. c thit lp bng
phn mm khi ngt ngoi c xc nh, bit ny s b xo khi lnh Return c
thc hin ( Return From Interrupt).
IT1: C ngt dng cho INT1. Ngt 1 ngoi nhn qua chn P3.3 ca
cng 3. Xa IT1 th ngt s pht ra khi tn hiu ngoi l thp. Nu tn hiu ngoi
vn mc thp INT1 s c pht ra nu INT1 b xo v s khng pht ra nu
INT1 c lp. INT1 c iu khin bng phn mm.
IE0: Ngt INT0 vi kch chuyn bng sn xung.
IT0: C ngt dng cho INT0.
2.6.7. iu khin ngt.
8031 c 5 ngt: TF0, TF1, INT0, INT1 v kt qu ca cng ni tip. TF0
v TF1 ca cc thanh ghi TCON to ra 2 ngt, Timer/Counter to ra ngt khi b
m b trn. INT0 v INT1 to ra 2 ngt ngoi, nhng ngt do tn hiu ngoi
nhn c qua 2 chn P3.2 v P3.3 ca cng 3. Phn cng iu khin ngt c th
lp trnh tr li mi khi c sn xung ca tn hiu ngoi hoc mc thp ca
tn hiu ngoi. S l chn ny s quyt nh bi bit iu khin INT0 v INT1 ca
SFR TCON. Ngt cui cng l t cng ni tip, c ngt RT v TI ca SCON kt
L Thnh Sn
33
hp bi cng OR do c thp c th pht ra ngt. l nhim v ca 2 c TI
v RI xc nh nguyn nhn gy ra ngt.
C 2 SFR iu khin ngt: Thanh ghi cho php ngt IE dng che cc
ngt ring l v thanh ghi u tin ngt IP nh ra nhng ngt c u tin. Khi c 2
ngt cng c lp trnh cng mt mc u tin th mc u tn s nh sau:
IE0 l ngt c u tin cao nht sau l TF0, IE1, TF1 v RI, TI l thp
nht. Vi iu kin khng c chn( Not Masked). VXL chp nhn ngt v r
nhnh chng trnh n ni trong b nh chng trnh c gi bi lnh Lcall.
Trong trng hp ny t trng thi chng trnh khng c ct vo Stack. Sau
y l a ch cc Vect ngt:
Interrupt Service Rountine Address Defal Priority
IE0 3h 1 ( Highest)
TF0 3Bh 2
IE1 13h 3
TF1 1Bh 4
RI or TI 13h 5( Lowest)
IE Register:
7 6 5 4 3 2 1 0
EA ES ET1 EX1 ET0 EX0

EX0 (Enable Extenal Interrupt 0): c thit lp bng phn mm cho
php ngt 0 ngoi, xo v 0 l khng cho php.
ET0 ( Enable Timer/Counter Interrupt 0): Thit lp bng phn mm cho
php Timer/Counter trn Interrupt 0, xo v 0 l khng cho php.
EX1: c thit lp bng phn mm cho php ngt 1 ngoi, xo v 0 l
khng cho php.
ET1: Thit lp bng phn mm cho php Timer/Counter trn Interrupt 1,
xo v 0 l khng cho php.
ES: (Enable Serial Port Interrupt ): c thit lp bng phn mm cho php
cng ni tip ngt 1, xo v 0 khng cho php.
L Thnh Sn
34
EA( Enable All): Khi bit ny b xo tt c cc ngt ny u b xo v khi
c lp s cho php ph thuc vo bit iu khin.
IP Register:
7 6 5 4 3 2 1 0
PS PT1 PX1 PT0 PX0

PX0 ( Priority of Enable Interrupt 0): Khi c thit lp ngt 0 ngoi nhn
c s mc u tin cao.
PT0 ( Priority of Timer/Counter Interrupt 0 ): Khi bit ny lp ngt 0 ngoi
Timer/Counter nhn c s mc u tin cao.
PX1: Tng t PX0 nhng cho ngt 1 ngoi.
PT1: Tng t PT0 nhng cho ngt 1 ngoi nhn c.
PS: ( Priority of Serial Port Interrupt ): Ngt cng ni tip nhn c mc
u tin cao khi bit ny c lp.
2.6.8. B pht dao ng.
8031 c mt b pht dao ng dng thch anh bn ngoi. B to dao
ng tn s ging nh tn s ca tinh th thch anh v c chia cho 12, n c
th c dng lm u vo ca Timer.
Dng b pht dao ng 12 MHz th u vo ca Timer s l 1 MHz. 8031
c 12 chu k dao ng trn mt chu k my. N c 255 thao tc nhng nhm
m lnh, tng ng 111 ch th.
V d:
C 15 m thao tc c th ph thuc vo byte ch, byte ngun v ch
a ch. Thm vo , c 2 lnh dch chuyn bit v mt lnh dch chuyn Word,
lnh dch chuyn 16 bit vo con tr d liu ( Data Poiter). Trong 255 m thao
tc ,159 thao tc ht mt chu k my, 51 thao tc cn 2 chu k my, 43 thao
tc cn 3 chu k my v 2 thao tc cn 4 chu k my. Tr khi c nhiu thao tc
ch cn c mt chu k my, 8031 xem xt n kh nng c th thc hin hng
triu lnh trong mt giy. Rt nhiu h thng 8031 dng dao ng tinh th thch
L Thnh Sn
35
anh 11,0582 MHz, S d c s la chn ny v thc t n c th pht ra tc
Baud rt cao. Dao ng tinh th 11,0592 MHz tc c th ln ti 19200 Baud.
Sau khi xung Reset tc ng, vi x l c khi to li ta c ni dung ca
cc thanh ghi c bit (SFR) nh sau:

L Thnh Sn
36

2.6.9. Bn ca b nh.
Khi nh trong khong {20h...2Fh} gm 16 byte = 128 bit c th nh a
ch theo tng bit. Mt bit c mt a ch t 0h n 7Fh. Bit 0 ca 20 l bit a ch
0 v bit 7 ca byte 2Fh l bit a ch 7Fh.

STT Tn K hiu Ni dung
1 Accumulator A 00h
2 B Register B 00h
3 Program Status Word PSW 0000 0000b
4 Stack Pointer SP 07h
5 Date Pointer Low byte DPL 00h
6 Date Pointer High byte DPH 00h
7 Program Counter PC 0000h
8 Port 0 Latch P0 1111 1111b
9 Port 1 Latch P1 1111 1111b
10 Port 2 Latch P2 1111 1111b
11 Port 3 Latch P3 1111 1111b
12 Interrupt Priority IP xxx0 0000b
13 Interrupt Enable IE 0xx0 0000b
14 Timer/Counter Mode TMOD 0000 0000b
15 Timer/Counter Control TCON 0000 0000b
16 Timer/Counter 0 Low Byte TL0 00h
17 Timer/Counter 0 High Byte TH0 00h
18 Timer/Counter 1 Low Byte TL1 00h
19 Timer/Counter 1 High Byte TH1 00h
20 Serial Date Buffer SBUF Khng X
21 Serial Control SCON 00h
22 Power Control PCON 0xx0 0000b
L Thnh Sn
37
V d:
Mov C,13h chuyn ni dung boolean ca bit 13h vo thanh ghi c. Bit 13h
l bit s 3 ca byte v tr 22h ca Ram trong. Ta cng c th vit nh sau:
Mov C,22.3h cng cho mt kt qu. Cc SFR khc cng c th nh a
ch theo tng bit, nhng bit a ch nm trong khong t { 80h... FFh}.

2FH

2.7. cc ch a ch v b lnh ca 8031.
2.7.1. Ch a ch.
- Ch a ch tc th ( Immediate Addressing Mode). Trong ch ny
ton hng ch l 1 thanh ghi, ton hng ngun l mt hng s.
V d:
Mov a, # 1; Chuyn 1 vo thanh ghi a.
Mov PSW, # 0; Chn Regiser Bank 0.
Mov 0,# 1; Chuyn 1 vo thanh ghi 0 ca thanh ghi Bank 0.
- Ch a ch trc tip ( Direct Addressing Mode). Trong ch ny
ton hng ngun v ch l cc thanh ghi hoc cc SFR.

80h
7Fh
FFh
a ch ca cc SFR.
30h
2Fh
S Dng t do v ngn xp
00h
20h
1Fh
16 BYTE nh a ch theo bit
4 Bank thanh ghi 32 byte
Bn b nh RAM trong 8031.
L Thnh Sn
38
V d:
90h l a ch ca cng 1 ( Port1), ghi vo a ch 990h c ngha l gi d
liu ra Port 1.
Mov a, 70h; chuyn ni dung ca thanh ghi a ch 70h vo thanh ghi a.
Mov 90h, a; Chuyn ni dung thanh ghi a vo Port 1.
- Ch a ch thanh ghi (Register Addressing Mode). Ton hng ngun
hoc ton hng ch l 1 trong 8 thnh ghi ca Bank thanh ghi c chn.
V d:
Mov PSW,#2 : Chn thanh ghi Bank 2.
Mov R0, a: Chuyn ni dung thanh ghi a vo R0.
Mov R2,b: Chuyn ni dung thanh ghi B vo R2.
- Ch a ch gin tip thanh ghi. Trong ch ny ton hng ngun
hay l ch l mt nh c a ch cha trong mt thanh ghi ca thanh ghi Bank
c chn.
V d:
Mov PSW, #0: Chn thanh ghi Bank 0.
Mov R0, #a:
Mov @ R0,#1: Chuyn 1 vo nh c a ch cha trong R0.
- Ch a ch s thanh ghi (Register Indexed Addressing Mode). Trong
ch ny ton hng ngun hay ton hng ch c ly bng cch cng gi tr
ca thanh ghi a vi a ch c s. a ch c s c th l DPTR ( Data Poiter)
hoc PC (Progam Counter).
V d:
Mov DPTR, # 800h: Chuyn a ch bng c s vo data.
Mov a, #0 : Pointer.
Mov a, @ + DPTR : a:= ( a+ DPTR),ROM.
Ngoi nhng ch a ch trn 8031 cn c cc ch a ch lm vic
vi Stack, lm vic theo tng bit v c lnh hon i tng bit ca 1 byte.
V d:
Mov SP, #SFR: Khi to Stack Pointer.
L Thnh Sn
39
Mov a, # 45h :
Push acc : Ct thanh ghi a vo Stack.
Mov b, # 0 : Xo thanh ghi B.
Pop B : Chuyn ni dung t nh Stack (45h) vo thanh ghi B.
Cc lnh hon i ca 8031 rt tin li khi lm vic vi cc s BCD. Ni
dung ca thanh ghi a, Cc thanh ghi khc c th hon i cho nhau m khng
cn bin trung gian.
V d :
Mov a, # 0ah: Khi to thanh ghi a.
Mov b, # 0bbh: Khi to thanh ghi a.
Xch a,b : Hon i a,b.
Xch a,b : Tr li gi tr cho thanh ghi a,b.
Xch a,b : Hon i 4 bit thp ca a,b
+. Tt c cc bit trong khong 20h n 2Fh c th c x l ng thi
tng byte hay tng bit v ta cng c th x l tng bit ca cng.
V d:
Mov C,P1.0
Mov P1.1,C.
2.7.2. B lnh 8031.
2.7.2.1. Lnh np trc tip.
Lnh M gi nh Nhp Chc nng
14 CLR A 1 A: = 0
74 Mov A, # Data 2 A: = d liu
78...7F Mov R, # Data 2 R0...R7: = d liu
76,77 Mov @R, # Data 2 R0,R1: = d liu, b nh
Ram trong.
75 Mov adr, # Data 2 adr: = d liu, b nh
Ram trong.
90 Mov DPTR, adr 16 2 DPTR: = adr 16.
L Thnh Sn
40
2.7.2.2. Lnh di chuyn d liu.
E8EF Mov A,R 1 A: = R0...R7
F8FF Mov A,R 1 R0...R7: = A
E6,E7 Mov A,@R 1 A: = (R0,R1), Ram trong
D6,F7 Mov @R,A 1 R0,R1: = A, Ram trong
F5 Mov adr,A 1 Adr:= A, Ram trong
E5 Mov A,adr 1 A: = Adr , Ram trong
A8AF Mov A,adr 2 R0...R7: = adr, Ram trong
888F Mov R,adr 2 adr: = R0...R7, Ram trong
86 87 Mov adr,@R 2 adr: = (R0,R1), Ram trong
A6AF Mov @R,adr 2 R0,R1: = adr, Ram trong
86 Mov adrl, adr2 2 adrl: = adr2, Ram trong
C0 PUSH adr 2 Stack: = adr, Ram trong
D0 Pop adr 2 adr: = stack, Ram trong
E2,E3 Mov A, @R 2 A: =(R0,R1), Ram ngoi
F2,F3 Mov @R,A 2 (R0,R1): = A, Ram ngoi
E0 Mov A, @DPTR 2 A: = DPTR, Ram ngoi
F0 Mov @DPTR,A 2 DPTR: = A, Ram ngoi
93 MovC A@A+DPTR 2 A: = ( A+ DPTR), Rom
E3 Mov P3 A@A+PC 2 2 A: = (A + PC), Rom
- Lnh hon v ( trao i d liu):
C8...CF XCH A,R 1 A < > ( R0....R7)
C6,C7 XCH A,@R 1 a < > (R0....R1),b nh Ram trong.
D6,D7 XCHDA,@R 1 a(1..3),< > R0,R1(1..3),b nh
Ram trong, 4bit di.
C4 SWAp A 1 A(1..3) < > A (4...7).
2.7.2.3.Qun l Bit (Manipulation).
58..5F ANL A,R 1 A: = A and R0..R7.
L Thnh Sn
41
48..4F ORL A,R 1 A: = A or R0..R7.
68..6F XRL A,R 1 A: = A EX0R R0..R7.
56,57 ANL A,@R 1 A: = A and (R0,R1),Ram trong
46,47 ORL A,@R 1 A: = A or (R0,R1),Ram trong
66,67 XRL A,@R 1 A: = A EX0R (R0,R1),Ram trong
54 ANL A,# data 2 A: = A and data
44 ORL A,# data 2 A: = A or data
64 XRL A,# data 2 A: = A EX0R data
55 ANL A,adr 2 A: = A and (adr)
45 ORL A,adr 2 A: = A or (adr)
65 XRL A,adr 2 A: = A EX0R (adr)
52 ANL adr,A 2 A: = (adr) and A
42 ORL adr,A 2 A: = (adr) or A
62 XRL adr,A 2 A: = (adr) EX0R A
53 ANL adr, #data 2 A: = (adr) and data
43 ORL adr, #data 2 A: = (adr) or data
63 XRL adr, #data 2 A: = (adr) EX0R data
F4 CPL A 1 A: = Not A
2.7.2.4.Cc lnh ca php cng.
28...2F ADD A,R 1 A: = A+ R0...R7
38...3F Addc A,R 1 A: = A+ R0...R7 + C
26,27 Add A, @R 1 A: = A + ( R0,R1), Ram trong
36,37 Addc A, @R 1 A: = A + ( R0,R1) + C, Ram trong
24 ADD A,# data 1 A: = A + data
34 ADDC A,# data 1 A: = A + data + C
25 ADD A, adr 1 A: = A + (adr), Ram trong
35 ADDC A, adr 1 A: = A + (adr) + C, Ram trong
57 DA A 1 Hiu chnh thp phn.

L Thnh Sn
42
2.7.2.5. Cc lnh ca php tr.
98..9F SUBB A,R 1 A: = A R0...R7 C
96,97 SUBB A,@R 1 A: = ( R0,R1) C, Ram trong
94 SUBB A, # data 1 A: = A data C
95 SUBB A, adr 1 A: = ( adr) C, Ram trong
2.7.2.6. Php nhn v chia.
A4 MUL AB 4 A: = A*B;B: = Byte cao
84 DIV AB 4 A: = div B,B: = Rest
2.7.2.7. Tng v gim gi tr.
08...0F INC R 1 R0..R7: = R0...R7 + 1
18...1F DEC R 1 R0..R7: = R0...R7 - 1
04 INC A 1 A: = A+1
14 DEC A 1 A: = A-1
06,07 INC,@R 1 (R0,R1): = (R0,R1)+1, Ram trong
16,17 DEC,@R 1 (R0,R1): = (R0,R1)-1, Ram trong
05 INC adr 1 (adr): = ( adr) +1
15 DEC adr 1 (adr): = ( adr) -1
03 RR A 1 Dch chuyn bit Acc sang phi
33 RLC A 1 Dch chuyn bit sang tri qua C
13 RRC A 1 Dch chuyn bit sang phi qua C
2.7.2.8. X l Bit.
C3 CLR C 1 C: = 0
B3 CPL C 1 C: = Not C
D3 SET BC 1 C: = 1
C2 CLR bit 1 ( bit): = 0
B2 CPL bit 1 ( bit): = Not ( bit)
D2 SET B bit 1 ( bit): = 1
A2 Mov C, bit 1 C: = (bit)
92 Mov bit,C 1 (bit): =C
L Thnh Sn
43
82 ANL C, bit 1 C: = C and ( bit)
82 ANL C,/ bit 1 C: = C and not( bit)
72 ORL C, bit 1 C: = C or ( bit)
A0 ORL C,/ bit 1 C: = C or not ( bit)
2.7.2.9. Lnh nhy.
02 MP adr 2 Nhy ti adr( 16 bit)
01...E1 MP adr 2 Nhy ti adr( 11 bit)
80 SJMP rel 2 Nhy tng i ( 127 bytes)
73 JMP@A+ DPTR 2 Nhy sau khi ( A+ DPTR)
60 JZ rel 2 Nhy tng i, Khi A= 0
70 JNZ rel 2 Nhy tng i, khi A> 0
B4 CJNEA,# data,rel 2 Nhy tng i khi A < > data
B5 CJNEA,adv ,rel 2 Nhy tng i khi A < > Adr
B8...BF CJNE,# data,rel 2 Nhy tng i khi R0..R7 < >data
B6,B7 CJNE@R,#data,rel 2 Nhy tng i khi (R0,R1) < >data
D8...DF DJNZ R,rel 2 R0...R7 - 1, Nhy khi 0
D5 DJNZ adv,rel 2 ( adv) -1, Nhy khi 0
12 LCALL adv 2 Gi C.trnh conadv ( 16-bit)
11...F1 ACALL adv 2 Gi C.trnh conadv ( 11-bit)
22 RET 2 Nhy tr li chng trnh con.
2.7.2.10. iu khin b x l.
00 N0P 1 Lnh ch mt nhp

L Thnh Sn
44

Phn III:
Thit k mch iu khin logic
c lp trnh

L Thnh Sn
45

3.1. Xy dng s khi ca h PLC.
Qu trnh xy dng s khi ca h PLC hon ton ph thuc vo cc
yu cu k thut v cc yu cu chc nng ca h .
Vi h PLC c cc yu cu c th nh sau:
- C mt b x l tn hiu theo chng trnh lm vic c lp vi chng
trnh c lu trong b nh .
- Vic chng trnh c thc hin bng cng ni tip theo tiu chun
truyn RS232 vi my tnh PC hay my lp trnh cm tay .yu cu c ra v lu
li chng trnh mt cch r rng .
- C kh nng m rng vic iu khin v giao tip vi my tnh hay cc
Modul ph qua cng m rng.
- C cc phm iu khin trng thi dng (Stop), chy (Run) v chy th
(Term)cng cc LED bo trng thi ng vi ba trng thi trn.
- C kh nng ly tn hiu vo mc Logic cao, ri chuyn trng thi v m
u vo.
- u ra ng, ct tip im Rle.
Ngoi ra cn c khi to ngun nui c ly trc tip t li in vi yu
cu di lmvic rng vi in p v tn s .
l nhng yu cu chnh ca h PLC t cc yu cu ny ta i xy dng s
khi

L Thnh Sn
46

Thuyt minh hot ng ca s khi v chc nng ca cc khi.
PLC lm vic th trc ht phi c phn mm iu khin cc thao tc khi
to v qu trnh vo ra d liu cng nh to trng thi dng ngoi ra cn chng
trnh chnh .
Tt c cc chng trnh a vo PLC qua cng truyn ni tip RS232.
Khi
u
Vo

m

m
Cht
Khi
u
ra
Cng
M
Rng
D
7
D
0
D
0..
D
7 D
0..
D
7 D
0..
D
7
Rom
64K
VXL
RAm
64K
A
0..
A
12
A
0..
A
12 INT0 A
0..
A
15
RXD TXD
Bn
Phm

MAX
Mch
Gii m
a ch
S khi ton b h thng.
Khi
Ngun
L Thnh Sn
47
Khi c chng trnh PLC sn sng lm vic. Ban u PLC c chng
trnh iu hnh t ROM khi to sau qut bn phm xc nh trng thi
c th l Stop, Run hay Term.
Nu phm Stop th PLC ngng mi thao tc v ch tn hiu iu khin t
bn phm khi c phm Run th vi x l c chng trnh chnh trong RAM v ly
tn hiu vo theo yu cu chng trnh .
Sau khi x l, vi x l s a tn hiu ln Bus m cht v a tn hiu ra
ngoi ng, ct thit b c iu khin .
Ngoi ra c yu cu lm vic vi ngoi vi qua cng m rng th tn hiu
c trao i vi vi x l qua cng vo ra hai chiu 74LS245.
Khi gii m a ch nhn a ch t vi x l ng vi mt gi tr a ch c
mt vi mch c chn lm vic trnh ngn mch Bus .
Khi to ngun nui cho h vi cc mc yu cu in p: +5v; -5v; +12v;
+24v.
3.2. Thit k chi tit tng khi.
3.2.1. Vi mch gii m 74LS138:
H vi x l l s phi ghp gia CPU vi cc b nh v cc thit b ngoi vi
ghp ni vi CPU phi c CPU kim sot mt cch cht ch khi thc hincc
thao tc c ghi , iu c ngha l thnh phn trn phi c cho mt a ch
hay mt vng i ch xc nh nm trong khng gian a ch tng th ca CPU
vic truy nhp n thnh phn no thc cht ca vic gn a ch cho mt
thnh phn (vi mch) c th no nm trong mch ngha l vi a ch nht
nh s a ra tn hiu chn v t b gii m n chn chn v (CS ) ca vi
mch.
Ti mt thi im th VXL ch c th truy cp n mt a ch c th no
.Do vi mch gii m cng cn tho mn ti mt thi im ch c mt u ra
c chn. Trong mch ta s dng vi mch gii m a ch 74LS138 l vi mch
gii m a ch c 8 u ra, 3 u vo chn v3 u vo iu khin.
S chn ca vi mch ny nh sau:
L Thnh Sn
48

Trong :

0
Y ..
7
Y l cc u ra ca74LS138. Khi u ra c chn mc thp. Cn
cc u ra khng c chn mc cao .
A,B,C l 3 u vo chn vic thay i cc gi tr ny s thay i cc u
ra c chn.
G1, A G2 , B G2 l cc u vo iu khin chn chip ca vi mch. IC ny
ch lm vic khi cc tn hiu:G1=1, A G2 = 0 v B G2 = 0. Cn mt trong cc
iu kin trn khng tho mn th vi mch khng c lm vic. Khi cc u
ra u trng thi tr khng cao. hiu r nguyn l hot ng ca vi mch
74LS138 ta xt bng trng thi ca74LS138.

/Y
0
/Y
1
/Y
2
/Y
3
/Y
4
/Y
5
/Y
6
/Y
7
A

1
2
3
B

C

G1
/G2B

/G2A

74LS138
4
5
6
15
14
13
12
11
10
9
7
L Thnh Sn
49
iu khin u vo chn Cc u ra ca b gii m
G1 G2 G2B C B A

0 x x x x x
HiZ HiZ HiZ HiZ HiZ HiZ HiZ HiZ
X 1 x x x x
X x 1 x x x
1 0 0 0 0 0 0 1 1 1 1 1 1 1
1 0 0 0 0 1 1 0 1 1 1 1 1 1
1 0 0 0 1 0 1 1 0 1 1 1 1 1
1 0 0 0 1 1 1 1 1 0 1 1 1 1
1 0 0 1 0 0 1 1 1 1 0 1 1 1
1 0 0 1 0 1 1 1 1 1 1 0 1 1
1 0 0 1 1 0 1 1 1 1 1 1 0 1
1 0 0 1 1 1 1 1 1 1 1 1 1 0
Bng trng thi ca 74LS138.
X: Trng thi bt k (c th 0 hay 1)
HiZ: Trng thi tr khng cao (h mch).
Trong s ca chng ta mch gii m dng cho cc b nh, cc vi mch
vo ra d liu. Do mch gi m s hot ng trong sut qu trnh lm vic
ca vi x l tc l t khi h thng c cp ngun th 74LS138 s ch vi x l
iu khin. tho mn c iu kin lm vic ta xy dng c mch gii
m a ch.
74LS138 hot ng c ngay khi cp ngun cho h thng th ta phi
tho mn cc iu kin ca u vo iu khin, G1 mc cao, A G2 , B G2 mc
thp.
y 3 u vo chn ly t cc bit a ch A13, A14, A15 t vi x l.
Cc u ra ca vi mch gii m a ch c a ti chn b nh v cc
vi mch khc.

L Thnh Sn
50
3.2.2. Vi mch m cht.
trong mch ca chng ta cn s dng cc vi mch m cht m cht
d liu ra ca vi x l. Trong s ca chng ta vi mch m cht c dng
cho cc chc nng sau.
- m cht cc bit a ch cho cc b nh ROM, RAM.
- m cht cc d liu t vi x l ra ngoi.
Trong mch ny ta s dng mch m cht 74LS373 .
74LS373 l vi mch m ct 8 bit d liu (a ch) s chn ca n nh
sau:

D
0
D
7
l 8 bit u vo ca vi mch m cht a.
Q
0
Q
7
l 8 bit u ra ca b mch m cht.
Chn E (Enable) l chn cho php ca 74LS373 khi c chn mc
thp. Chn OE (Output Enable) cho php ra khi mch lm vic OE mc thp.
hiu r ta nghin cu bng trng thi ca vi mch:
OE E D
n
Q
n+1
1
0
0
0
X
0
1
1
X
X
0
1
Hi-Z
Q
n

0
1
Bng trng thi 74LS373

74LS373
Q
0
Q
1
Q
2
Q
3
Q
4

Q
5

Q
6
Q
7
Vcc
GND
D
0
D
1
D
2
D
3
D
4
D
5
D
6
D
7
E
OE
2
5
6
9
12
15
16
19
20
10
2
5
6
9
12
15
16
19
20
10
L Thnh Sn
51
X: Trng thi bt k (c th 0 hay 1).
H
i
-Z: Trng thi tr khng cao.
xy dng mch m cht ta xt cu trc bn trong ca vi mch
74LS373.

Vi mch m cht 74LS373 c 8 u vo d liu v 8 u ra tng ng
c m t nh s cu trc trn. Hot ng ca mch c iu khin bi hai
tn hiu a ti: OE v E (hayOC v G). trong E l chn cho php (Enable),
chn OE l chn iu khin ra (Out Enable).
- Khi chn OE c chn mc cao c ngha l cng 3 trng thi khng
lm vic v trng thi tr khng cao (H
i
-Z) m khng ph thuc vo cc tn
OE
D
0 D
G
D
G
D
G
D
G
D
G
D
G
D
G
D
G
D
1
D
2
D
3
D
4
D
5
D
6
D
7
E

Q
0
Q
1
Q
2
Q
3
Q
4
Q
5
Q
6
Q
7
L Thnh Sn
52
hiu cho php E mc cao th cng 3 trng thi lm vic ch m d liu,
d liu u ra ging d liu u vo.
- Khi E mch mc thp th u ra mch m cht l gi nguyn trng
thi trc m khng ph thuc vo d liu u vo.
3.2.3. Thit k khi ghp ni.
Khi ghp ni c nhim v ghp ni gia my tnh v cc khi vi x l.
Vic truyn d liu thc hin qua khi ghp ni. Khi ghp ni thc cht l mt
cng giao din ni tip trong n ny ta dng chun truyn tin RS232
truyn l vi mch Max 232. S d ta dng cng giao din ni tip l do truyn
ni tip s tit kim ng truyn v gim c nhiu trn ng truyn. Khi
ghp ni theo tiu chun RS232 s chuyn mc t TTL thnh mc RS232 v
ngc li chuyn mc RS232 thnh mc TTL do vi mch Max RS232 chuyn
i mc TTL ni vo thnh mc +10V hoc -10V pha truyn v cc mc
+3V n +15V hoc -3V n -5V thnh mc 0V v +5V pha nhn.
S chn ca Max 232:

16 +Vcc

MAX232
15 GND

14 T
1
Out
13 R
1
In
9 R
2
Out
12 R
1
Out
11 T
1
In
10 T
2
In
C
1
+ 1
C
1
- 3
C
2
+ 4
V+ 2
C
2
- 5
V- 6
T
2
Out 7
R
2
In 8
L Thnh Sn
53
S cu trc ca Max232:

Vi mch Max232 s c t gia cng ni tip ca vi x l v cm ly
ra ca cng RS232. Ta chn cm loi DB9 c s b tr chn nh sau:

cm DB9 (nhn t ngoi).
S nguyn l mc vi mch Max232 vi cm DB9 v vi x l nh sau:

+5V-5V DTR
+10V-10V DSRS
+5V
Li vo
Li vo
Li ra
Li ra
DCD
RXD
TXD
DTR
GND
DSR
RTS
CTS
RI
1
5
6
9
L Thnh Sn
54

Bng chc nng cc chn cm trong cm DB9:

Chn Chc nng (Tn) Li (Vo, Ra)
1
2
3
4
5
6
7
8
9
DCD - Data Carrier Detect
RXD Read Data
TXD Transmiter Data
DTR Data Teminal Ready
GND Ground
DSR Data Set Ready
RTS Requert To Send
CTS Clear To Send
RI- Ring Indication
Li vo
Li vo
Li ra
Li ra
Mass
Li ra
Li ra
Li vo

3.2.4. Khi c bn phm v hin th trng thi.
Khi ny c chc nng to gi tr phm c n. Cn vic c gi tr vo
ca bn phm l do mt chng trnh con trong VXL c d liu vo c tnh chu
k sau khi kt thc mt chu k lm vic ca PLC. Sau x l mch hin th nhn
gi tr hin th trng thi t vi x l l kt qu ca phm n v to trng thi
mi cho PLC.
Cc phm gm:
- Phm Stop (phm dng).
- Phm Run (phm chy).
RXD Out
1
5
9
6
RXD
TXD
TXD Out
TXD In
RXD In
VXL
MAX232
L Thnh Sn
55
- Phm Term (Phm nhn v chy th chng trnh trn PLC khi ly chng
trnh t my tnh hoc my lp trnh kim tra kt qu).
ng thi l hin th LED tng ng vi 3 trng thi ca thit b.
S nguyn l ca khi nh sau:

S nguyn l ca khi c bn phm v hin th trng thi PLC.
Nguyn l hot ng ca s :
Gi s ban u thit b PLC ang trng thi chy(Run) th trc phm
Run c n .Cc phm n y l cng tc ba v tr ti mt thi im ch c
mt v tr c ng. Khi PLC ang ch c lm vic, bo trng thi ny
trn Bus d liu ca PLC c gi tr LED Run sng v vi mch 74LS373 s
T gii m a ch
T gii m a ch
Stop Run Term
R
R
R
R
R
+5V
+5V
OC
GND
GND
G
G
DIR
Ucc
Ucc
+5V
BUS d liu
D
0
.
.
.
.
D
7
Q
0
.
.
.
.
Q
7
D
0
.
.
.
.
D
7
Q
0
.
.
.
.
Q
7
74LS245
74LS373
TERM
STOP
RUN
K
L Thnh Sn
56
cht d liu ny trong sut qu trnh lm vic vi gi tr 20h. Khi u ra Q1
mc cao cn cc u ra khc mc thp v LED ni vo Q2 s pht sng,bo
trng thi PLC ang lm vic.
Gi s ta chuyn sang v tr Stop (cho dng h thng). n ht chu k lm
vic VXL s cho chy chng trnh c bn phm.Khi VXL s nhn trng
thi mi ca bn phm(trng thi dng) VXLa h thng v trng thi dng.
Khi VXL chy chng trnh con c bn phm th d liu vo c truyn qua vi
mch m 74LS245 vo Bus VXL c v x l, kt qu ca qu trnh ny s
c a ln Bus m cht 74LS373 nhn v a ra hin th bo trng thi .
Vi phm Stop gi tr a ra l 01h, khi c h thng s dng v cc u ra ca
PLC u mc Logic thp tc l cc thit b sau n s b ct .
Nguyn l hot ng ca khi ny hon ton tng t khi phm Term c
n nhng gi tr trng thi VXL a ra l 04h .
VXL c phm vi cc gi tr :
- Phm Stop l F1h .
- Phm Run l F2h .
- Phm Term l F4h.
Khi lp trnh VXL s bit ng vi gi tr th phm no c ng.
3.2.5 Vi mch m vo ra hai chiu 74LS245.
Vi mch ny m nhim vic trao i vo ra hai chiu 8Bit c s chn
v bng trng thi nh sau:

20 +Vcc
19 E
18 Q
0

17 Q
1

16 Q
2

15 Q
3

14 Q
4

13 Q
5

12 Q
6

11 Q
7

DIR 1
D
0
2
D
1
3
D
2
4
D
3
5
D
4
6
D
5
7
D
6
8
D
7
9
GND 10
74LS245
L Thnh Sn
57

E
DIR Chiu tn hiu
1
0
0
X
1
0
H
i
-Z
QD
DQ

Q
0
Q
1
Q
2
Q
3
Q
4
Q
5
Q
6
Q
7
E
D
0
D
1
D
2
D
3
D
4
D
5
D
6
D
7
DIR

L Thnh Sn
58
- D
0
..D
7
, Q
0
..Q
7
l cc u vo ra liu.
- DIR, E l cc tn hiu iu khin .
- Cc chn ngun: GND, +Ucc.
T s cu trc ta thy vi mch ny to nn t cc cng ba trng thi
mc ngc nhau gm c 16 phn t ba trang thi vi mch c chn khi tn hiu
E (Enable) mc thp .Khi E mc cao th u vo ra ca vi mch 74LS245
trng thi tr khng cao (H
i
-Z). Khi u vo c tch khi u ra .
Khi E c t mc thp th trng thi vo, ra ph thuc vo mc
Logic ca chn DIR.
+ Nu DIR mc Logic thp th d liu c truyn t D sang Q.
+ Nu DIR mc Logic cao th d liu c truyn t Q sang D.
Khi thit k mch tu theo yu cu s dng m vi mch 74LS245 c th
l vo ra hai chiu ,khi chn DIR c chn mc 0 v 1. Khi yu cu tn
hiu vo ra mt chiu th tu vic chn tn hiu vo hay ra m chn DIR s c
ni Mass ng vi mc Logic thp v ni dng ngung ng vi mc Logic cao.
Khi tn hiu iu khin ch ph thuc vo tn hiu cho php E
(Enable).
Trong n ny vi mch 74LS245 c dng hai trng hp khi tn hiu
vo ra theo 2 chiu v tn hiu vo mt chiu .
Ngun cp cho IC l ngun nui +5v v ni Mass chn GND .
3.2.6. B nh chng trnh: ROM.
V VXL 8031 s dng trong n khng c ROM trong nn ta s dng
b nh chng trnh bn ngoi, v yu cu ca PLC a chng trnh iu khin
vo bng ng truyn ni tip v theo yu cu xo v ghi chng trnh n gin
nn chng trnh iu khin s khng nm trong ROM .
M ROM ch l tr chng trnh h iu hnh. Chng trnh trong ROM
s dng khi khi to h thng lc ROM c nhim v a ra chng trnh
kim tra phn cng v to trng thi ban u cho cc u ra ca h. X l ngt
khi c tn hiu ngt th VXL truy nhp vo ROM v chy chng trnh x l
L Thnh Sn
59
ngt c cc thao tc cho VXL tin hnh. Ngoi ra ROM cha chng trnh to
nn trng thi dng v iu khin qu trnh np chng trnh t cng ni tip vo
trong RAM y ta chn ROM 2764 v VXL c th qun l c b nh chng
trnh ngoi ti 64KB, vi mch ny c dung lng nh 64KB cn 13 ng a
ch v tn hiu c ra khi c tn hiu chn chip CE (Chip Select) mc thp, 13
ng a ch v tn hiu cho php ra OE (Out Enable).
+ A
0
..A
12
l cc chn a ch.
+ D
0
..D
7
l cc chn d liu.
+ OE (Out Enable) cho php ra.
3.2.7. RAM - B nh d liu v chng trnh.
i vi VXL vic c d liu hay chng trnh thc VXL ch nhn bit
c cc mc Logic nh vy chng trnh c VXL nhn c nh d liu.
V trong PLC yu cu vic np v xo chng trnh nhiu ln m thao tc
n gin, lm vic ny ta khng th tho ROM np m ta s dng ROM
iu khin VXL np chng trnh vo RAM. Khi chng trnh nm trong
Ram c VXL coi nh d liu. Nh vy m qu trnh c vit tr nn n gin
. Khi cn c chng trnh th tin hnh c bnh thng nh trong ROM .
Ta chn RAM l RAM tnh SRAM (Static RAM) 6264 RAM ny c dung
lng 64KB, cn 13 ng a ch v cc tn hiu iu khin WE, OE , 1 CE , CE2
cng 8 ng d liu.

1
2
3
4
5
6
7
8
9
10
11
12
13
14
NC
A
12
A
7
A
6

A
5

A
4

A
3

A
2

A
7

A
0

D
0

D
1

D
2

GND
Vcc
WE

CE
2
A
8

A
9

A
11

OE
A
10

1
CE
D
7

D
6

D
5

D
4

D
3

28
27
26
25
24
23
22
21
20
19
18
17
16
15
SRAM 6264
L Thnh Sn
60
S chn ca SRAM 6264 nh sau :
- Cc chn A
0
..A
12
l cc chn a ch.
- Cc chn D
0
..D7 l cc chn d liu.
- Cc chn 1 CE , CE2 (Chip Enable) l cc tn hiu chn chip vi 1 CE ng
vi mc thp v CE2 ng vi mc cao. Khi ng thi 2 tn hiu ny tho mn th
SRAM6264 c chn.
- Chn OE (Out Enable) chn cho php d liu ra (c) tch cc mc
thp .
- Chn WE (Write Enable) chn cho php vit mc tch cc mc thp.
- Chn Vcc cp ngun +5V v chn GND ni Mass.
Khi cc tn hiu iu khin tho mn th VXL s a ra gi tr a ch
ti u vo a ch ca SRAM ly d liu .Khi c v a a ch ri d liu
np cho RAM khi ghi.
V theo yu cu ca PLC m RAM c chia lm hai vng mt vng
32KB c vng a ch thp dng lu tr chng trnh chy PLC cn mt vng
32KB c vng a ch cao trao i d liu trong qu trnh x l d liu ca
PLC. Bn b nh RAM ngoi nh sau:
B nh c 13Bit a ch v vng a ch l t 0000h1FFFh. Khi vng
a ch thp l 0000h0FFFh v vng a ch cao l 1000h1FFFh.
Bn RAM nh sau:

1FFFh
0FFFh
0000h
Dng nh d liu
Dng nh chng trnh
L Thnh Sn
61
3.2.8. H vi x l.
H vi x l c thit k da trn c s ca VXL8031 c th dng b nh
ngoi ln ti 64KB vi Bus d liu 8 bit h thng giao tip vi my tnh thng
qua chun truyn tin RS 232. B phi ghp dng vi mch Max 232 vi b ghp
ni ny h ch giao tip vi my tnh khong 30m tr li. Khi cn truyn xa phi
c b khuych i ng truyn b xung. VXL 8031 c 16 ng a ch vi 8
bt a ch thp v 8 bt d liu truyn trn 1 cng bng dng b dn knh, ngoi
ra cn vi mch gii m a ch chn chip 74LS138 v vi mch m cht
74LS373.

L Thnh Sn
62

S nguyn l ca h VXL.

L Thnh Sn
63
Cc linh kin trong s c nghin cu cc phn trc y ta
nghin cu nguyn l hot ng ca s . h lm vic t qu trnh ly
chng trnh bn ngoi th ban u trong ROM phi c chng tnh iu hnh.
Khi chng trnh iu khin c t my tnh qua cng truyn ni tip
vo VXL v c ROM iu hnh a vo d liu trong RAM. y l iu khc
c bn gia cc h VXL v RAM ngoi lu chng trnh vng na a ch cao
th na vng a ch thp lu chng trnh.
Khi chng trnh lu trong RAM khi c yu cu chy th VXL phn bit
chong trnh iu hnh v chng trnh iu khin tn hiu PSEN kt hp vi
gi tr a ch c th khi c chng trnh iu hnh trong ROM th VXL a ra
tn hiu PSEN mc thp v gi tr a ch vng t 0000h n 1FFFh. Khi
ROM c chn v gi tr a ch vo a ta chng trnh iu khin.
Chng trnh trong ROM l cc dng chng trnh khi to v to trng
thi ban u cc u ra. Cc chng trnh x l ngt v chng trnh nhn
chng trnh t cng ni tip chuyn vo RAM v ly chng trnh trong RAM
khi cn.
Khi VXL chy chng trnh chnh trong RAM th VXL cng a ra PSEN
v gi tr a ch nhng trong vng t 2000h n 3FFFh khi VXL s lm vic
vi chng trnh trong RAM.
V 8 bit a ch thp cng u ra vi 8 bit d liu theo kim dn knh nn
phi cn b nh trung gian m vai tr ny do 74LS373 m nhim lu gi tr
8 Bit a ch thp khi truy nhp.
3.2.9. Thit k khi u vo v khi u ra.
Hai khi ny l cc l cc vt a tn hiu vo v ra di dng 2 mc logic
r rt. V cc mc logic ny do yu cu ny do yu cu truyn xa, chng nhiu
hay yu cu iu khin m mc in p thng cao hn mc in p chun ca
vi mch x l bn trong v cn yu cu cch ly v in gia b x l v cc
ng truyn tn hiu bn ngoi nhm bo v tng an ton cho PLC.

L Thnh Sn
64
Ta c s nguyn l ca khi u vo v khi u ra ca h PLC:

S nguyn l mch ly tn hiu vo c chuyn mc in p.

S nguyn l mch da tn hiu ra theo kiu ng ct Rle.
Nguyn l hot ng ca khi ly tn hiu vo:
Mc Logic 1 y thng cao vi PLC 57-200 l +24V v vy m cn c
chuyn mc v cch ly in p vo v mch VXL.
Khi u vo mc 0 (thp) l 0V khi in p t ln LED trong Opto
l 0V nn Opto kho v d liu u ra l 0V ng vi mc thp v LED1 khng
sng bo mc logic l mc 0.
3.2.10 Thit k ngun nui cho ton mch.
Trong mch ta s dng cc vi mch:
- Vi mch m cht 74LS373.
+ +5V
R
1
R
3
OP
R
u
Mnh m 3 trng thi
Tn hiu vo
LED1
Tn hiu vo
Tn hiu ra
LED
+12V

R
1
R
2
D

RL

T

R
3
L Thnh Sn
65
- Vi mch vo ra ba trng thi 74LS245.
- Vi mch gii m 74LS138.
- Vi mch MAX 232.
- Vi x l 8031.
- B nh chng trnh EPROM 2764.
- B nh d liu RAM 6264.
- Ngoi ra cn cn ngun cho cc Sensor Logic v cun dy Rle .
Nn ton b ngun yu cu l: +24V, +12V, +5V v -5V.
S nguyn l ca mch to ngun nui nh sau:

7805
7905
7812
7824
2200
2200
2200
2200
2200 2200
2200 2200
104
104
104 104
104
104
104
104
+5V
-5V
+12V
+24V
~ 220V
~ 9V
~ 9V
~ 15V
~ 27V
S nguyn l ngun nui cho ton
L Thnh Sn
66

Phn IV:
Thit k mch ghp ni vi my tnh
lp trnh cho plc

L Thnh Sn
67
H vi iu khin logic lp trnh PLC cn phi thc hin c cc thao tc
trc tin l giao tip vi my tnh hoc h VXL khc. H vi iu khin hin nay
x dng rt nhiu lnh vc o lng v iu khin. Nh th i hi phi ghp ni
my tnh, ton b qu trnh hot ng c thc hin bng phn mm iu
khin.Vi h iu khin logic chng ta cn np chng trnh vo trc tip t
my tnh vo VXL v VXL s lu gi chng trnh trong b nh. Vic trao i
thng tin gia PLC v my tnh c thc hin qua cng ni tip RS232 (cng
COM1 hoc COM2) ca my tnh thng qua h thng cp truyn. Ch ny
gi l ch trao i thng tin theo chng trnh bng phng php truyn ni
tip khng ng b.
Cc ch chng trnh: S dng cc lnh vo ra (In, Out) cc lnh chuyn
d liu gia cc thanh ghi (MOV) chuyn d liu ca my tnh vo b nh
ngoi ca PLC hoc ngc li .
4.1. Gii thiu v truyn tin ni tip ca my tnh PC.
4.1.1. Truyn tin ng b v khng ng b :
Trong k thut truyn d liu gia hai my tnh ngi ta s dng mt
trong hai phng thc truyn: ng b v khng ng b
Vi ch truyn khng ng b, k t c truyn i theo tng khung,
trong mi khung c:
- Bit Start
- Cc bit d liu c truyn
- Bit chn l kim tra li ng truyn
- Bit Stop
Th tc truyn khng ng b ch c 2 trng thi 0 v 1 hay thp hoc
cao. Khi khng c k t no c truyn, knh truyn s mc cao, nu sau
knh h xung thp th bn thu s pht hin rng sp c d liu c truyn ti.
Tu theo quy c m c 5..8 d liu. Nu knh mc thp trong khi truyn th
c ngha l bit 0 ang c truyn, cn knh mc cao th bit 1 ang c
truyn. Bit thp c truyn trc bit cao c truyn sau.
L Thnh Sn
68
Sau d liu ca k t l bit chn l, dng pht hin li khi truyn.
Ngi ta phn bit bit Parity chn v bit Parity l. Bit Parity chn ngha l bit
Parity c thit lp sao cho tng s bit ca mt k t v bit Parity l chn. Bit
Parity l ngha l bit Parity c thit lp sao cho tng s bit1 ca mt k t v
bit Parity l l.
Cui cng l bit STOP, bit ny thng bo kt thc vic truyn d liu ca
1 k t. Bit Stop c th l 1,1,5, hoc 2.
V d:
Gi s d liu c truyn vi tc 300 Baud (300 bit/ s) vi 1 bit Stop.
V c bit Stop nn knh s mc cao trong 1/300s sau khi truyn xong 1 k t.
Nhng nu c 1,5 bit Stop th knh s ln mc cao trong.
1,5 * 1/300s = 1/200s. Vic truyn k t n y l kt thc knh s
mc cao cho n khi c 1 k t mi c vo v tr truyn .Khi knh s h
xung mc thp truyn bit Start.
S lng bit d liu ph thuc vo kiu d liu cn truyn. truyn d
liu ASCII thng dng 7 bit ( v b k t ny ch c 127 k t ) nhng nu
truyn k t ASCII m rng th phi cn n 8 bit d liu cho mi k t. X l
truyn v nhn trong ch khng ng b dng cc vi mch thu pht khng
ng b vn nng UART. Nhc im ca truyn khng ng b l tc
truyn kh chm v phi truyn thm cc bit khng mang tin (Start bit, Parity bit,
Stop bit ). Mun loi b cc bit khng mang tin ny t nng cao c tc
hiu dng ca ng truyn ngi ta s dng phng php truyn ng b.
Trong ch ny dy cc k t c truyn s km thm mt k t c bit: K
t ng b SYN ( c m ASCII l 22). X l truyn v nhn k t trong ch
ny dng cc vi mch thu pht UART. Vi mch ny cho php hot ng c hai
ch .
4.1.2. Chun truyn ni tip RS232.
D liu mc TTL c bin i sang cc mc in p tng ng theo
tiu chun RS232 nh sau:
Mc 1: T 3V n 15V ( Tiu chun l -12V )
L Thnh Sn
69
Mc 0: T +3V n +15V ( Tiu chun l +12V )
BIOS ca my tnh PC cho php nhn bit c ti 4 cng ni tip :
COM1 c a ch t 3F8 n 3FFh tng ng vi IRQ1
COM2 C a ch t 2F8 n 2FFh tng ng vi IQR2
COM3 c a ch t 3E8 n 3EEh
COM4 c a ch t 2E8 n 2EEh
iu khin vic truyn d liu qua giao din RS232 l b x l UART
8250. Sau y l cch UART gi v nhn 1 k t:
*Truyn: u tin k t c a vo thanh ghi i truyn v nm cho
n khi k t trc c truyn xong ,sau n c a n thanh ghi
dch ca b pht v tng bit ca n s oc UART truyn vo knh d liu.
*Nhn: Khi nhn c mt k t , u tin cc bit ca n ln lt c
np vo thanh ghi dch ca b thu ri a ti thanh ghi d liu sau khi loi b
cc bit Start, Stop, Parity.
V d:
Gi s cn truyn k t A c m ASCII l 41h c biu din di dng
m nh phn l 01000001b, tng s bit 1 l 2. Nu ta chn kiu kim tra Parity l
chn th bit Parity phi c xo v 0 tng s cc bt 1 l chn. Cn nu ta
chn kiu kim tra l l th bit Parity phi c thit lp ln 1 tng s cc bit 1
l l v cui cng l bit Stop.
Gi s knh truyn c thit lp vi tc 9600 Baud th thi gian
truyn mi bit s l 1/9600s. Nu ta chn 1,5 bit Stop th sau khi kt thc truyn
cc bit ca k t A knh truyn s mc cao trong 1,5*1/9600s ri bit Start ca
k t tip theo mi c truyn.
Yu cu phn cng: RS232 lin lc vi bn ngoi qua u ni DB9 V
DB25 thng thng COM1 l DB9 V COM2 l DB25 ( nu dng DB25 th
cng ch ni 9 chn )

L Thnh Sn
70

* CD: DCE Pht hin ng truyn c vt mang tin hay DCE thu c
du hiu ca tin trn ng truyn v bo ng truyn tt
RXD: DTE nhn s liu t DCE.
TXD: DTE truyn s liu ra.
DTR: S liu sn sng DTE.
GND: Dy ni t .
DSR: S liu sn sng DCE.
RTS: DTE yu cu gi s liu .
CTS: Tn hiu tr li chp nhn RTS hoc l tn hiu yu cu lm vic.
RI: Bo chung.
4.1.3. B thu pht khng b vn nng.
B thu pht khng ng b vn nng UART c thit k c bit x
l truyn tin khng ng b. Chip UART 8250 l chip c bn c thit k cho
CPU 80286. Hin nay c cc chp thng dng UART khc nh 16450 v
16550A tng ng vi cc CPU c bus d liu 32 hay 64 bit. Ngoi ra cn c
cc chip UART c thit k cho x l c ng b v khng ng b.

CD
RXD
TXD
DTR
GND
DSR
RTS
CTS
RI
S cc ng tn hiu ca giao din RS-232
L Thnh Sn
71
* Chc nng ca UART:
Chuyn i tn hiu song song t CPU thnh tn hiu ni tip pht ra
ngoi my tnh v i tn hiu ni tip n my tnh thnh dng song song
my tnh x l. UART b xung cc bit Start, Stop, Parity n mi k t pht
v ly ra nhng bit t k t thu c. UART m bo rng nhng bit ring
bit c pht ra tc truyn d liu thch hp, tnh ton cc bit chn l trn
cc k t thu v pht thng bo cho h thng bit bt k mt sai st no c
pht hin.
* Cc giao tip ca UART.
+ Giao tip vi h thng BUS I/O ca CPU
+ Giao tip vi h thng ng h
+ Giao tip vi h thng chun RS232
* Cc a ch ca UART 8250.
+ 3F8/2F8: D liu nhn c hay cn gi i cha trong thanh ghi ny,
khi ghi vo thanh ghi th n cha d liu truyn v c thanh ghi th n cha d
liu nhn c
+3F9/2F9: Thanh ghi cho php ngt
7 6 5 4 3 2 1 0

Bit 7,6,5,4 khng s dng, thit lp v 0.
Bit 3 = 1 cho php UART pht ra IQR theo trng thi Modem.
Bit 2 = 1 cho php UART pht ra IQR theo trng thi ng truyn.
Bit 1=1 cho php UART pht IQR khi thanh ghi i truyn rng.
Bit 0 = 1 cho php UART Pht IQR khi d liu nhn sn sng.
+3FA2A: Thanh ghi nh danh ngt, khi xy ra 1 ngt th c thanh ghi
ny xem ngt xy ra t u.
7 6 5 4 3 2 1 0

Bit 7,3 thit lp v 0
Bit 2,1 : 00 :Trng thi MODEM thay i
L Thnh Sn
72
01: Thanh ghi i truyn rng
10: D liu nhn c sn sng
11: Trng thi ng truyn thay i
Bit 0 =1 : Khng c yu cu ngt cn x l
Bit 0 = 0: C yu cu ngt cn x l
+3FB/2FB: Thanh ghi iu khin ng truyn
7 6 5 4 3 2 1 0

Bit 7: = 1 : t tc truyn
= 0 : Bnh thng.
Bit 6: =1: Gi cc khong trng
= 0: Tt tn hiu Breack
Bit 5: = 1: Khng dng
Bit 4: = 1: Parity chn
= 0: Parity l
Bit 3: =1: C s dng parity
= 0: Khng s dng Parity
Bit 2: =1: Dng 1,5 bit stop nu 5 bit / 1 k t
= 0: Dng 1,5 bit Stop nu 5 bit / 1 k t
Bit 0-1 : 00: 5 bit/k t
01 :6bit/k t
10 :7bit/k t
11 :8bit/k t
+3FD/2FD: Thanh ghi trng thi ng truyn
7 6 5 4 3 2 1 0

Bit 7: Khng s dng ,thit lp v khng
Bit 6 =1: Thanh ghi dch rng, pht xong 1 byte
Bit 5 =1: Thanh ghi pht rng, bit ny t ng bng 0 khi CPU gi 1 byte
s liu tip theo ra thanh ghi pht
L Thnh Sn
73
Bit 4 = 1: Trong khi thu nhn c khong cch trng ln hn 1 k t y

Bit 3 = 1: Li khung
Bit 2 = 1: Li Parity
Bit 1= 1: Mt byte s liu nhn v cha kp c bi CPU b dng d
liu khc ln.
Bit 0 = 1: Nhn c d liu.
+3FE/2FE: Thanh ghi trng thi MODEM
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0

Bit 7 = 1: Lin lc vi Modem c thit lp
Bit 6 = 1: Chung
Bit 5 = 1:DCE gi tn hiu DSR ti DTE bo rng sn sng nhn d
liu
Bit 4=1 : DCE gi tn hiu CTS v DTE bo rng sn sng nhn d liu
Bit 3=1: Bit 7 va chuyn trng thi
4.2. TRUYN TIN NI TIP CA VI IU KHIN 8031.
4.2.1. Gii thiu chung.
H vi x l 8031 c cng ni tip nm trn chip. Chc nng quan trong
ca cng ni tip l bin i d liu t song song thnh ni tip y ln
ng truyn v bin i d liu vo t ni tip thnh song song .
Vic truy nhp phn cng ca cng ni tip thng qua cc chn TXD v
RXD ca 8031 v cng l 2 bit ca Port 3:
P3.1 ( TXD) l chn s 11
P3.0 (RXD) L chn s 10
L Thnh Sn
74
Cng ni tip ca 8031 c th truyn 2 chiu ng thi v k t c th
c nhn v lu tr trong b m trong khi k t th 2 c nhn v nu
CPU c k t th nht trc khi k t th 2 c nhn th d liu khng b mt
C 2 thanh ghi chc nng c bit phn mm qua truy nhp cng ni tip
l SPUF V SCON.
SPUF c a ch 99h c xem nh 2 Buffer .Khi ghi d liu vo SBUF l truyn
d liu cn khi c d liu t SBUF L nhn d liu t ng truyn SCON C
a ch 98h l thanh ghi c th nh a ch theo tng bit bao gm bit trng thi
v bit iu khin. Bit iu khin xc lp ch iu khin cho cng ni tip v
bit trng thi cho bit k t c truyn hay c nhn. Bit trng thi c kim
tra bng phn mm hoc lp trnh gy ra ngt.
4.2.2. Thanh ghi iu khin cng ni tip. (Spesial Post Cobtrol
Register).
Cc ch hot ng ca cng ni tip c xc lp bng cch ghi vo
thanh ghi SCON a ch 99h.
Sau y l cc bit ca thanh ghi SCON:
BIT SYBOL ADRES DESCRIPTION
SCON.7 SMO 9FH Serial port mode bit 0
SCON.6 SM1 9EH Serial port mode bit 1
SCON.5 SM2 9DH Serial port mode bit 2
SCON.4 REN 9CH Receive enable
c xc lp nhn k t
SCON.3 TB8 9BH Transmit bit 8
Bit th 9 truyn ch 3
c lp v xo bng phn mm
SCON.2 RB8 9AH Receive bit 8 .Bit 9 c nhn
SCON.1 TI 99H Transmit interrut flag
N c lp khi kt thc truyn
k t v c xo bng phn mm
SCON.0 RI 98H Receive Interrupt Flag .
L Thnh Sn
75
N c lp khi kt thc nhn 1
k t v c xo bng phn mm
Trc khi s dng cng ni tip thanh ghi SCON phi c khi to cho
ng ch hot ng .
V d:
MOV SCON ,# 01010010b
Khi to cng ni tip hot ng ch 1, cho php nhn (REN =1), v
t thanh ghi TI = 1 cho bit sn sng truyn.
4.2.3. Cc ch hot ng :
8031 c 4 ch hot ng, vic chn ch hot ng bng cch xc
lp cc bit SM0 v SM1 ca thanh ghi SCON. C 3 ch hot ng truyn
khng ng b, mi k t truyn hoc nhn theo tng khung vi bit Start v Stop
tng t RS232 ca my tnh PC. Cn ch th 4 hot ng nh mt thanh ghi
dch n gin.
4.2.3.1. Thanh ghi dch 8 bit (Mode 0).
MODE 0 c chn bng cch ghi 0 vo bit SM0 V SM1 thanh ghi
SCON, xc lp cng ni tip hot ng nh thanh ghi dch 8 bit. D liu vo v
ra ni tip qua RXD v TXD theo nhp ng h, 8 bit c truyn v nhn vi
bit thp nht c truyn u tin. Tc Baud c t bng 1/12 tc ng
h .Trong ch ny ta khng ni n RXD v TXD. ng RXD c dng
cho c truyn v nhn d liu cn ng TXD c dng cho tn hiu Clock
Vic truyn d liu c khi u bng cch ghi d liu vo thanh ghi SBUF, d
liu c dch ra tng bit ra ngoi qua chn RXD (P3.0) cng vi xung ng h
c gi ra ngoi qua ng TXD(P31). Mi bit c truyn qua RXD trong 1
chu k my.
Vic nhn d liu c khi u khi bit cho php nhn (REN) c xc
lp ln bit 1 v bit RI phi xo v 0. Nguyn tc chung l xc lp bit REN lc bt
u chng trnh khi to cc tham s ca cng ni tip v xo bit RI bt
u cng vic nhn d liu. Khi RI c xo, xung ng h c ghi ra chn
TXD, bt u chu k my tip theo v d liu c a vo chn RXD. Mt kh
L Thnh Sn
76
nng ca ch thanh ghi dch l c th m rng ng raca 8031. Thanh ghi
dch chuyn i ni tipthnh song song c th kt ni cc ng TXD v RXD
cung cp thm 8 ng ra.
4.2.3.2. Bit UART tc Baud c th thay i c (Mode 1).
Mode 1 cng ni tip ca 8031 hot ng nh l UART 8 bit vi tc
Baud c th thay i c. UART l mt thit b nhn v truyn d liu ni tip ,
mi k t c truyn bt u bng bit Start (trng thi thp) sau l cc bit d
liu c truyn v cui cng l bit Stop (trng thi cao).
Mt chc nng quan trng ca UART l chuyn i d liu song song
thnh ni tip truyn v chuyn i ni tip thnh song song nhn.
Trong ch ny, 10 bit d liu c c truyn qua TXD v nhn vo
qua RXD v vic truyn cng tng t nh ch 0, bit Start lun bng 0 sau
n 8 bit d liu (LSB u tin ) v cui cng l bit Stop. Bit TI ca SCON c
lp bng 1 khi bit Stop chn TXD. Trong qu trnh nhn bit Stop c a vo
bit RB8 ca thanh ghi SCON v tc truyn c t bi Timer 1. Vic ng
b thanh ghi dch ca cng ni tip ch 1,2,3 c iu khin bi Counter
vi u ra Counter l nhp ng h iu khin tc Baud cn u vo ca
Counter c chn bng phn mm .
4.2.3.3. 9 Bit UART vi tc Baud c nh.
Ch c chn bng cch t bit SM1 = 1 V SM0 = 0, cng ni tip
ca 8031 s hot ng nh UART 9 bit c tc baud c nh, 11 bit s c
truyn v nhn qua TXD v RXD: 1 bit Start, 9 bit d liu v mt bit Stop
.Trong khi truyn bit th 9 s c t vo TB8 ca thanh ghi SCON cn khi
nhn bit th 9 s c t vo RB8. Tc baud ca ch 2 c th l 1/32
hoc 1/64 xung nhp ng h.
4.2.3.4. 9 Bit UART vi tc Baud c th thay i c.
Mode 3 tng t nh Mode 2 nhng tc Baud c lp trnh v c
cung cp bng Timer. Trong thc t c 3 mode 1,2,3 l tng ng nhau ch
L Thnh Sn
77
khc nhau ch tc Baud ch 2 l c nh cn ch 1 v 3 c th thay i
c v s lng bit d liu ca Mode 1 l 8 bit cn Mode 2 v mode 3 l 9 bit.
4.2.4. Khi to v truy nhp cng ni tip.
* Cho php nhn
Bit cho php nhn (REN) ca thanh ghi SCON phi c lp bng phn
mm cho php nhn d liu. Vic ny c tin hnh lc bt u chng
trnh khi cng ni tip, Timer, Counter c khi to. C hai cch xc lp bit
ny:
SETB REN hoc MOV , SCON , #XXX1XXXXB
( Trong x c th l 0 hay 1 tu theo yu cu ca chng trnh ).
* C ngt (Interrupt Flag).
Hai bit RI v TI trong thanh ghi SCON c lp ln 1 bng phn cng v
phi c xo v 0 bng phn mm.
RI c xc lp khi bit cui cng ca d liu c nhn m n cho bit
rng kt thc truyn 1 byte d liu n c Test bng chng trnh gy ra
ngt. Nu chng trnh mun nhn d liu t 1 thit b ni vi cng ni tip n
phi ch cho n khi RI c lp sau xo RI v c d liu t SBUF
V d:
WAIT : JNB RI, WAIT; test RI v ch cho n khi c lp
CLR RI ; xo RI
MOV A , SBUF ; c d liu t SBUF
Tng t bit TI c lp khi bit cui cng ca d liu c truyn v n
cho bit rng truyn xong. Nu chng trnh mun gi d liu n thit b ni
qua cng ni tip n phi kim tra xem k t trc gi cha, nu cha gi
n phi ch n khi gi xong mi c gi.
V d:
WAIT: JNB TI, WAIT; Kim tra khi TI Set
CLR TI ; Nu set th xo TI
MOV SBUF, A; Gi d liu vo SBUF truyn.
L Thnh Sn
78

4.3. Ghp ni my tnh vi h vi x l.
4.3.1. S ghp ni h vi x l v my tnh.
Vic ghp ni gia h vi x l v my tnh iu khin h thng cn
m c thc hin khong cch gn, cho nn ghp ni ta khng cn s dng
modem , v pha my tnh ta s dng 3 dy l TxD, RxD v GND cng ni tip
RS232. V khng c Modem nn khi s dng cng ni tip ca my tnh phi c
s ngn mch gia RTS v CTS , DTR v DSR. m bo c s a lnh DTR
v RTS c trng thi v m bo chn CTS xung thp (khi truyn - nhn)
v tr v cao (khi kt thc truyn nhn).
Hnh v sau y minh ho h vi x l c ghp ni vi my tnh nh th
no :

4.3.2. m bo chng trnh cho cng ni tip.
Trong my tnh, hot ng vi DOS (t Version 3.0) c 4 cng ni tip
RS232 vi cc vng a ch (cho cc thanh ghi ni ) v cc mc ngt sau :
Cng ni tip ch Ngt
COM1 03F8H03FFH IRQ4
COM2 02F8H02FFH IRQ3
RxD
R1IN
GND
R1Out
RxD
TxD
TxD
VXL
MAX232
COM2 - PC
T1In T1Out
S nguyn l ghp ni vi x l v my tnh.
L Thnh Sn
79
COM3 03E8H03EFH IRQ4(hoc hi vng)
COM4 02E8H02EFH IRQ3(hoc hi vng)
COM1 v COM3 c thit k s dng ngt s 4, COM2 v COM4 s
dng ngt s 3. Trong my tnh cc cng ni tip ny c ni song song vi
cm DB-25 v DB-9 d s dng.
m bo vic s dng ghp ni cng ni tip ca my tnh vi h vi
x l 8031 th ta phi lp trnh cho cng ni tip , khi to (ghi cc thng s
ban u nh: Tc truyn, di tin, sai s chn /l ...) cho cng ni tip ca
my tnh ta c th.
Ghi trc tip bng lnh dng ngn ng ASSEMBLER.
S dng lnh MODE ca DOS v cc tham s thm vo ca DOS.
4.3.2.1. S dng lnh MODE ca DOS.
Vi DOS 3.3 tr v trc dng lnh :
MODE COM1 : 9600 ,N, 8, 1, P
Tc 9600 baud, N = khng kim tra tnh chn / l, 8 bit d liu, mt
bit Stop, vi cc ln th li lin tc.
Vi DOS 3.3 tr v sau, dng lnh :
MODE COM1: Baud = 9 600 Parity = n Data = 8 Stop = 1 Retry = B
(B ) thay cho (p) k t DOS . 5
4.3.2.2. S dng ngt INT 14 h ca BIOS .
BIOS truy cp ti khi ghp ni ni tip ca my tnh nh ngt INT 14h
vi cp hm sau:
Hm : Vai tr :
00h Khi pht khi ghp ni ca cng ni tip
01h Gi mt k t
02h Nhn mt k t
03h c trng thi ca khi ghp ni ca cng ni tip
04h Khi pht cng ni tip m rng
05h iu khin truyn thng ca cng ni tip m rng
L Thnh Sn
80
BIOS c th iu hnh ti a ti 4 cng ni tip ca my tnh t COM1 n
COM4 vi cc a ch :
Khi ghp ni a ch c s Ngt cng IRQ
COM1 3F8 IRQ4
COM2 2F8 IRQ3
COM3 3E8 IRQ4 ( hay hi vng )
COM4 2E8 IRQ3 ( hay hi vng)
mc chng trnh, ta c th chn mt khi ghp ni ni tip ca
cng ni tip no bng cch gn m tng ng vo thanh ghi vi gi tr:
00H cho COM1
01H cho COM2
02H cho COM3
03H cho COM
*Phc v 00h: Khi pht khi ghp ni ni tip. Phc v 00h n nh
nhng thng s khc nhau ca khi ghp ni ca cng ni tip RS232. l cc
thng s:
Tc Baud: Tc tc trao i tin
Tnh chn l
S bit Stop
Kch thc k t hay s bit tin ni tip
Nhng thng s ny c t hp trong m 8 bit c t vo thanh ghi
ca khi ghp ni ca cng ni tip theo th t cc bit nh sau:
D7, D6 , D5: M ca vn tc (tnh bng Baud )
D4, D3: M ca tnh chn tnh chn l
D2: M ca bit Stop
D1,D0: M ca kch thc k t.

L Thnh Sn
81
Cc m trn nh sau:
D7 D6 D5 Vn tc(bit/s)
0 0 0 110
0 0 1 150
0 1 0 300
0 1 1 600
1 0 0 1200
1 0 1 2400
1 1 0 4800
1 1 1 9600
D4 D3 Tnh chn l D1 D0 Kch thc k t
0 0 Khng c 0 0 Khng dng
0 1 Tnh l 0 1 Khng dng
1 0 Khng c 1 0 7 bit
1 1 Tnh chn 1 1 8 bit
D2 = 0: 1 Bit stop , D2 = 1 : Hai bit stop.
*Phc v 01h: Gi mt k t. Hm ny gi mt k t ra thit b ngoi
ni vi khi ghp ni ni tip ca cng ni tip. Mun vy ta lm nh sau:
t s liu ca khi ghp ni vo thanh ghi d liu .
Gi m k t vo thanh ghi tng (na cao)
Gi 01h vo thanh ghi tng (na thp)
Gi INT14 h
*Phc v 02h: Nhn mt k t trnh t thc hin cng nh trn :
t s liu ca khi ghp ni vo thanh ghi d liu
t gi tr 02h vo thanh ghi tng
Gi INT14 H
Kt qu ca chng trnh con l k t c gi vo khi ghp ni ni tip
v trong thanh ghi tng, thanh ghi tng cng cha kt qu ca vic thc hin
chng trnh.
L Thnh Sn
82
*Phc v 03h: c trng thi ca khi ghp ni ni tip.Trnh t cng
nh trn:
t s liu khi ghp ni vo thanh ghi d liu
t 03h vo thanh ghi tng
Gi INT14H
Kt qu ca chng trnh con l trng thi ca khi ghp ni ni tip
Bit7 - Vt qu tr
0: Khng c sai s
1: C sai s
Bit 6 Thanh ghi dch chuyn
0 : Thanh ghi bn
1: Thanh ghi ri
Bit 5 Thanh ghi i
0 : Thanh ghi bn
1: Thanh ghi ri
Bit 4 Ngt bi tn hiu Breack (t)
0: Khng bit
1: C tn hiu Breack
Bit 3 Giao thc
0: Khng c li
1: C li
Bit 2 Tnh chn l
0: ng c li
1: C li
Bit 1- S liu
0: khng c trn
1: B trn
Bit 0 - S liu sn sng
0: Khng c s liu sn sng
1: S liu sn sng
L Thnh Sn
83
4.3.3. Khi to thit lp cng ni tip ca my tnh bng
chng trnh.
dng cng ni tip ca my tnh trao i thng tin vi h vi x l
ngoi th ta phi lp trnh cho cng ni tip ca my tnh.Trong cng ni tip
c trao i hu ht theo cch lp trnh trc tip cho cc thanh ghi ca b thu
pht khng ng b UART 8250. UART ny c 10 thanh ghi iu khin tt
c cc chc nng ca vic nhp vo v xut ra d liu theo cch ni tip. Lp
trnh cho cng ni tip ca my tnh ta c th dng nhiu loi ngn ng lp
trnh khc nhau. Trc tin vic thit lp cu hnh cho cng ni tip lun lun
c tin hnh trc khi c nhu cu cn truyn. Khi c nhu cu cn truyn th
kim tra trng thi ng truyn, nu ng truyn ri th vng m c
kim tra v d liu c truyn t vng m ny, vng m khi lu tr d liu
theo nguyn tc hng i, d liu c yu cu gi trc th c gi ra hng
trc v ngc li. Nu kim tra ng truyn ang bn th tn hiu khng c
php truyn v vy khng xy ra tranh chp ng truyn .

L Thnh Sn
84

Phn V:
thit k phn mm lp trnh cho plc

L Thnh Sn
85
5.1. C s thit k phn mm.
Mt h x l mun hot ng c th phi c phn mm iu khin. Phn
cng v phn mm l hai yu t hnh thnh nn mt h x l hon chnh. Nu
thiu mt trong hai yu t th h vi x l s khng hot ng c.
Thit k phn mm thc cht l ta vit mt tp lnh cho vi x l lm vic
vi nhng lnh .
Vi h vi x l 8031 ng dng iu khin h PLC c cc phn mm iu khin
nh sau:
- Thit k phn mm h thng .
- Thit k phn mm ng dng .
- Thit k phn mm truyn tin gia my tnh PC v h vi x l.
Trong h PLC nhim v ca vi x l thu thp d liu t cc u vo Logic
sau x l theo chng trnh ri a ra iu khin. Tn hiu iu khin u ra
dng ng, ct cc thit b: ng c my sn xut, cc van in t. Cc trng
thi u ra ng vi mc 0 l ct ng vi mc 1 l ng, u vo tch cc mc
1.
a ch ca cc cng logic, b nh, s b nh v cc gi tr d liu bn
phm, gi tr d liu trng thi c tnh trong thuyt minh nguyn l.

L Thnh Sn
86
5.2. Thut ton ca mt s chng trnh iu khin.

- Kim tra, tnh ton cc
tham s lm vic.
- nh ch , gi tr m
cho Timer1 (tc Baud).
- X l cc s kin trong
vng Event_Buffer.
- Kim tra li, ch lm
vic trong System_Data
- Kim tra trng thi ca
chuyn mch iu khin.
START
STOP ? RUN ? TERM ?
Chuyn iu khin n
vng Code_Buffer.
c cc knh s liu u vo
v lu kt qu vo vng
Input_Data.
- X l s liu u vo v
tnh ton iu khin u ra.
- Lu gi kt qu tnh ton
vo vng Output_Data.
- Qut s liu ra cc knh
u ra tng ng t vng
Output_Data
c byte trng thi
ni tip Serial_Status
trong vng
Para_Buffer.
Status =1 ?
True
False
Lu thut ton chng trnh iu khin PLC
True
True
True
L Thnh Sn
87

c byte trng thi
(STB)
Ni tip
STB = 0 STB = 1
c byte tip theo v a
vo vng Code_Buffer.
Tng con tr vng
Code_Buffer
ln 1 n v
Tng con tr vng
Para_Buffer
ln 1 n v
c byte tip theo v a
vo vng Para_Buffer.
Lu thut ton chng trnh con x l ngt ni tip
L Thnh Sn
88

c trng thi
cc phm v a
vo vng
Event Buffer
INT 0
END

Pht tc Baud
cho cng ni
tip.
TIMER 1
END
Mch
pht xung
tc cao.
TIMER 0
END
Ngt ngoi
dng cho cc
trng hp
x l c bit
INT 1
END
Lu thut ton cc chng trnh con
x l ngt ngoi v ngt b m.
L Thnh Sn
89

Phn VI:
thuyt minh chung

L Thnh Sn
90

S d nguyn l v

L Thnh Sn
91
H PLC ng dng b vi iu khin. Mi thao tc trong PLC u do vi iu
khin kim sot.
u tin cp ngun cho PLC khi PLC khi to bng cc thao tc kim
tra ROM, RAM cc thanh ghi v t trng thi cho cc u ra mc logic thp
sau VXL ca h trng thi sn sng lm vic.
a trng thi u ra xung mc thp th VXL phi a d liu ln Bus
vi gi tr 00h v gi tr a ch 8003h trn Bus a ch.
Khi ta chuyn cng tc mt v tr bt k. Gi s v tr Stop khi VXL
lm vic khi ht chu k s i c chng trnh c bn phm t ROM khi s
xy ra cc thao tc.
- VXL a ln Bus a ch gi tr a ch ca vi mch 74LS245 trong mch
bn phm l 8001h v c d liu t bn phm qua IC ny v a ln Bus d liu
t vo VXL.
- VXL nhn gi tr bn phm FEh khi VXL bit vi gi tr l bn
phm Stop c n. Sau VXL a trng thi Stop ta n bo bng thao tc.
+ a a ch cho vi mch 74LS373 trong mch bo trng thi vi a ch
8000h v ng thi a ln Bus d liu gi tr 01h ri a trng thi dng v sn
sng cho cc lnh vo khc.
Gi s ta n phm Run.
Khi cng c tn hiu ngt v cc thao tc c phm, c chng trnh
iu hnh v bo trng thi ra vi phm Run ging nh cc thao tc VXL lm
khi phm Stop c n ch khc gi tr ca phm Run l: FDh v gi tri ca n
bo Run trn Bus d liu l 02h.
Sau thao tc ny VXL i chy chng trnh chnh trong RAM c
chng trnh trong RAM VXL phi tin hnh cc thao tc:
- a chn PSEN xung mc thp v a ra gi tr a ch c RAM
vi on a ch 2000h ... 3FFFh. V khi RAM c chia ta 2 phn vng a
ch thp dng lu tr chng trnh. Khi ghi chng trnh trong RAM ngoi tn
hiu a ch 2000h ... 2FFFh cn cn xung WR mc thp.
L Thnh Sn
92
Trong qu trnh lm vic c tp hp VXL phi lu tr hay c d liu t
ROM. Khi vng cho d liu trong RAM l vng a ch cao 3000h ... 3FFFh
khi c cn thm xun RD v khi ghi cn xung ny tch cc mc thp.
Khi chy chng trnh chnh chng trnh s yu cu VXL c gi tr ca
cng vo khi VXL s a ra gi tr a ch chn vi mch 74LS245 cng
u vo vi cc thao tc a a ch ra trn Bus a ch c a ch sau gi tr
u vo c a ln Bus d liu v VXL ly vo.
Sau khi kt thc qu trnh x l VXL s a ra cc gi tr u ra cc gi
tr u ra. Thao tc ny c tin hnh bng vic VXL a ra gi tr a ch ca
vi mch m cht cng ra vi gi tr v sau a ra d liu ln Bus d liu.
Khi d liu s c a ra u ra ca vi mch ny.
Khi tn hiu chn t gii m a ch ln mc cao th vi mch m cht ny
cht d liu sau mch m cht l mch ng ct Rle v bo mc s ng ct
cc thit b qua tip im Rle v it pht quang s bo cho ngi vn hnh
bit trng thi Logic cng ra. V VXL8031 c cng P0 dng kim dn knh
va mang gi tr a ch v gi tr d liu ln khi lm vic cn c mch m cht
d liu v sau khi VXl a gi tr a ch 8 bit thp ra th VXL dng cng ny
cho vo ra d liu nn cn b nh trung gian lu gi gi tr a ch ny. Vi mch
74LS373 dy m khi xung ALE (Address Latch Enable) xung 0 v cht li
gi tr ny khi xung ln mc 1.
Ngoi ra cn vi mch vo ra 2 chiu phc v cho qu trnh vo ra d liu
gip cho vic m rng Modul c s ny vi gi tr a ch cha c s dng th
vi mch lm vic vi ngoi vi (Modul ph).
Khi phm Term c n th qu trnh c bn phm v hin th trng thi
hon ton ging nh vi phm Stop hoc Run nhng gi tr phm Term l FBh v
gi tr LED bo Term sng khi gi tr trn Bus d liu l 04h.
Sau khi bo sng trng thi VXL chy chng trnh nhn truyn ni tip
t cng ni tip qua Max 232 a d liu vo thanh ghi trong VXL v ROM s
chuyn chng trnh ny vo RAM.
L Thnh Sn
93
Sau khi nhn song chng trnh s tin hnh chy th nh cc thao tc khi
chy phm Run.
l nguyn l hot ng ca ton b s nguyn l ca h PLC.
Kt lun: Trong h PLC nghin cu n ny c thit k lm vic
vi cc tn hiu s. Tuy nhin khng gian nh v vng a ch cng nh kh
nng lm vic ca vi x l cn rt nhiu nn chng ta c th tn dng ht kh
nng ca thit b v vy trnh gy lng ph trong u t. Trong lnh vc iu
khin ta c th lp thm cc Modul ph phc v cho x l v iu khin cc tn
hiu tng t.
Cc tn hiu tng t c th c ly t cc Sensor tng t sau chuyn
i A/D vi x l c th x l. Cc i tng cn iu khin tng t nh
trong thit b chnh lu, trong thit b n nh nhit m t u ra s ta cn
1 Modul ph chuyn i D/A to ra tn hiu tng t t tn hiu s u ra
PLC.
p ng m rng cho PLC ta c th thit k cc Modul ph kt hp vi
PLC nh s sau:

Khi chng trnh s a vo PLC qua cng ni tip v cc Modul Ph
lm vic cc khng gian a ch cn la khi h PLC khng ch lm vic iu
khin Logic m cn c kh nng x l tn hiu tng t c s ho v a
tn hiu iu khin tng t ra.

Cng m rng.
PLC
A/D
D/A
u vo tng t.
u ra tng t.
Modul m rng
L Thnh Sn
94
Ti liu tham kho

1. Bi ging vi x l Nguyn Tin Hng
2. Vi x l trong o lng v iu khin Ng Din Tp
3. K thut in t Xun Th
4. K thut in t s ng Vn Chuyt
5. K thut ghp ni my tnh H Mnh Giang
6. K thut ghp ni my tnh Ng Duyn Tp
7. iu khin logic v k thut PLC Nguyn Vn Liu
8. K thut vi iu khin L Vn Doanh - Phm Khc Chng
9. Thit b u cui thng tin V c Th
10. MCS 51 MicroController Family Users Manual Intel
11. Micro System SIMATIC S7-200 SIEMENS

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