8085 Architecture & 8085Architecture&

ItsAssemblylanguageprogramming
DrASahu
DeptofComputerScience&
Engineering Engineering
IITGuwahati
Outline
8085
Blockdiagram(DataPath)
InstructionSetof8085
Sampleprogramof8085
Counter&TimeDelay Counter & Time elay
StackandSubRoutine
Assignment on 8085 Assignmenton8085
Introductionto8086and30x86architecture
INTR INTA
RST5.5
ReSeT6.5
RST7.5
TRAP
SID SOD
8085MicroprocessorArchitecture
MUX
Bus8Bit
InterruptControl SerialI/OControl
RST5.5 RST7.5 SID SOD
W Z
B C
D E
H L
SP
MUX
IR
IDecode
&
/
tmp R ACC
ALU
Flag
SP
PC
I /D t
Addlatch
Inc/Dec.ter
Addlatch
M/C
Encoding
TimingandControl
ALU
Add Buff Data/Add Buff AddBuff Data/AddBuff
A
15
A
0
AddressBus(16bit)
8085
MPU
Memory I/P
O/P
D0
D7
DataBus(8bit)
ControlBus(8bit)
Assumption Assumption
RAM Memory is interfaced RAMMemoryisinterfaced
Instructionsarestoredinmemory
O /O di l i i f d di l OneI/Odisplayportisinterfacedtodisplay
dataofACC
Simple Assembly Program SimpleAssemblyProgram
MVIA,24H//loadReg ACCwith24H
MVIB,56H//loadReg Bwith56H
ADDB//ACC=ACC+B
OUT01H//DisplayACCcontentsonport01H
HALT//Endtheprogram // p g
Result:7A(AllareinHex)
DAA operation for Decimal Adjust A+6=10H DAAoperationforDecimalAdjustA+6=10H
Flowchart to multiply two number Flowcharttomultiplytwonumber
Start
LDA 2000 // Load multiplicant to accumulator LDA2000//Loadmultiplicant toaccumulator
MOVB,A//Movemultiplicant fromA(acc)toBregister
LDA2001//Loadmultipliertoaccumulator
MOVC,A//MovemultiplierfromAtoC
MOVC,A//MovemultiplierfromAtoC
MVI A 00 // Load immediate value 00 to ACC MVIA,00//Loadimmediatevalue00toACC
ADDB//AddB(multiplier)withA
DCRC//DecrementC,itactasacounter
JNZL//JumptoLifC!=0
STA2010//Storeresultintomemory
HLT//End
Code to multiply two number Codetomultiplytwonumber
LDA2000//Loadmultiplicant toaccumulator
MOV B A // M l i li f A( ) B i MOVB,A//Movemultiplicant fromA(acc)toBregister
LDA2001//Loadmultipliertoaccumulator
MOV C A // Move multiplier from A to C MOVC,A//MovemultiplierfromAtoC
MVIA,00//Loadimmediatevalue00toa
L:ADDB//AddB(multiplier)withA // ( p )
DCRC//DecrementC,itactasacounter
JNZL//JumptoLifCreaches0
STA2010//Storeresultintomemory
HLT//End
Delay of Instructions DelayofInstructions
Performance/delayofeachinstruction
MVI C FFH 7 T State
F R
MVIC,FFH7TState
LOOP:DCRC4TState
JNZ LOOP 7/10 T State
F R
F
F R R
JNZLOOP7/10TState
PerformanceofotherINS
ADD R 4 T S
F R R
F
ADDR4TState
ADDM7TState
F
F R
CALLaddr 18TState
F=Fetchwith4State,S=Fetchwith6State,
S R R W W
R=MemoryRead,W=MemoryWrite
Time Delay Loop TimeDelayLoop
Performance/delayofeachinstruction
MVI C FFH 7 T S MVIC,FFH7TState
LOOP:DCRC4TState
F R
F
JNZLOOP7/10TState
Timedelayinloop
F R R
T
L
=TxLoopTStatesxN
10
whereT=Systemclockperiod
N
10
=Equiv.decimalvalueofcountloadedtoC
T
L
=0.5x10
6
x(14x255)=1.8ms(ignore10TState)
L
( ) ( g )
Time Delay: Nested Loop TimeDelay:NestedLoop
Performance/delayofeachinstruction
MVI C FFH 7 T State
F R
MVIC,FFH7TState
MVID,FFH7TState
LOOP1: DCR C 4 TState
F R
F
F R
LOOP1:DCRC4TState
LOOP2:DCRD4TState
JNZ LOOP2 7/10 TState
F
F R R
F
JNZLOOP27/10T State
JNZLOOP17/10TState
Time delay in Nested loop
F R R
F R R
TimedelayinNestedloop
T
NL
=N1
10
xTx(L1_TStates+L2_TStatesxN2
10
)
TrafficLightControl:Counter&Delay
LOOP: MVIA01H
OUT01H
LD B DELAY RED
LoadDelayRed
TurnSignaltoRed TurnSignaltoRed
LDBDELAY_RED
CALLDELAY
y
TimeDelay TimeDelay
LoadDelayYellow LoadDelayYellow
TurnSignaltoYellow TurnSignaltoYellow MVIA02H
OUT01H
LDBDELAY YELLOW
TimeDelay TimeDelay
T Si l t G
_
CALLDELAY
MVIA03H
LoadDelayGreen LoadDelayGreen
TurnSignaltoGreen
MVI A 03H
OUT01H
LDBDELAY_GREEN
CALL DELAY
TimeDelay
CALLDELAY
JMPLOOP
StackPointer(SP)&StackMemory ( ) y
Thestackisanareaofmemoryidentifiedby
the programmer for temporary storage of theprogrammerfortemporarystorageof
information.
The stack is a LIFO structure ThestackisaLIFOstructure.
Thestacknormallygrowsbackwardsinto
memory Memory memory.
Programmercandefinesthe
bottom of the stack (SP)
Memory
bottomofthestack(SP)
andthestackgrowsupinto
reducingaddressrange.
Bottom
TheStack
grows
backwards
ofthe
Stack
backwards
intomemory
Stack Memory StackMemory
Growsbackwardsintomemory
l h b f h k h Bettertoplacethebottomofthestackatthe
endofmemory
Tokeepitasfarawayfromuserprogramsas
possible.
StackisdefinedbysettingtheSP(Stack
Pointer)register. ) g
LXI SP, FFFFH
This sets SP to location FFFFH (end of memory ThissetsSPtolocationFFFFH(endofmemory
for8085).
Saving Information on the Stack SavingInformationontheStack
SaveinformationbyPUSHing ontoSTACK
Retrieved from STACK by POPing it off RetrievedfromSTACKbyPOPing itoff.
PUSHandPOPworkwithregisterpairsonly.
E l PUSH B ExamplePUSHB
DecrementSP,CopyBto0(SP)
D SP C C 0(SP) DecrementSP,CopyCtp 0(SP)
ExamplePOPB
( )
B
C
F3 12
Copy0(SP)toC,IncrementSP
Copy0(SP)toB,IncrementSP
FFFD
FFFC
FFFB
F3
SP
FFFF
FFFE
12
Stack/LIFOuseinCALL/RET
Retrieveinformationbackintoitsoriginal
location
TheorderofPUSHsandPOPsmustbeopposite
8085recognizesoneadditionalregisterpair g g p
PSW(ProgStatusword)=ACCandFlag
BeforeanyroutineCALLdothis
PUSH B
AfterRETURNfromcalldothis
POP PSW
PUSH D
PUSH PSW
POP D
POP B
Subroutines
A subroutine is a group of instructions
That is used repeatedly in different places of the
program.
Rather than repeat the same instructions several
times times
It can be grouped into a subroutine and call from the
different locations.
Instructionsfordealingwithsubroutines.
TheCALLinstructionisusedtoredirectprogram p g
executiontothesubroutine.
TheRETinstructionisusedtoreturntheexecutionto
h ll thecallingroutine.
CALL/RETInstruction
YoumustsettheSPcorrectlybeforeusingCALL
CALL 5000H CALL5000H
PushthePCvalueontothestack
L d PC ith 16 bit dd li d CALL i LoadPCwith16bitaddresssuppliedCALLins.
RET:LoadPCwithstacktop;POPPC
PC
FFFB
2003
2000 CALL 5000
FFFE
FFFD
FFFC
FFFB
03
20
2000 CALL5000
2003
17
SP
FFFF
FFFE
20
Call by References CallbyReferences
IfSRperformsoperationsonthecontentsof
the registers theregisters
Thesemodificationswillbetransferredback
h ll f tothecallingprogramuponreturningfroma
subroutine.
Ifthisisnotdesired,theSRshouldPUSH
registersandPOPonreturn.
18
Stack/LIFOuseinCALL/RET
Retrieveinformationbackintoitsoriginal
location
TheorderofPUSHsandPOPsmustbeopposite
8085recognizesoneadditionalregisterpair g g p
PSW(ProgStatusword)=ACCandFlag
BeforeanyroutineCALLdothis
PUSH B
AfterRETURNfromcalldothis
POP PWD
PUSH D
PUSH PSW
POP D
POP B
Factorialofanumber
LXISP,27FFH//Initializestackpointer
LDA2200H//Getthenumber
CPI 02H // Ch k if b i t th 1 CPI02H//Checkifnumberisgreaterthan1
JCLAST
MVID,00H//Loadnumberasaresult
MOVE,A
DCRA
MOVC,A//Loadcounteronelessthannumber , //
CALLFACTO//CallsubroutineFACTO
XCHG//GettheresultinHL//HLwithDE
SHLD 2201H // Store result // store HL at 0(16bit) SHLD2201H//Storeresult//storeHLat0(16bit)
JMPEND
LAST: LXIH,000lH//Storeresult=01
END: SHLD2201H
HLT
Sub Routine for FACTORIAL SubRoutineforFACTORIAL
FACTO:LXIH,0000H
MOVB,C//Loadcounter
BACK: DADD//doubleadd;HL=HL+DE
DCR B DCRB
JNZBACK//Multiplybysuccessiveaddition
XCHG//StoreresultinDE//HLwithDE
C C // DCRC//Decrementcounter
CNZFACTO//CallsubroutineFACTO
RET//Returntomainprogram
AssignmentI
Writeandexecute8085assemblylanguage
programtofindvalueofN
th
Fibonaccinumber
(R i i i i b ti (Recursiveversion:usingrecursivesubroutine
call)
16 bit can support up to 65356 > F 16bitcansupportupto65356>F
24
Deadline 12
th
Aug 2010 11 55Mid night Deadline:12
th
Aug2010,11.55Midnight
Afterdeadlinegrading:Max5outof10
S d TXT i f ith fil SendTXTversionofprogramwithfilename
RollNo.txttoasahu@iitg.ernet.in with
Assignment one as subject of email Assignmentoneassubjectofemail
Dontsubmitcopiedone:willgetNegativemarks
Introductionto
8086&i386processor
16 bit Microprocessor 16bitMicroprocessor
Allinternalregistersaswellasinternaland
external data buses were 16 bits wide externaldatabuseswere16bitswide
4MainRegister,4IndexRegister,4Segment
R i S R I P Register,StatusReg,Instr Ptr.
Notcompatiblewith8085,butwithsuccessors
TwoUnitworksinparallel:
BusInterfaceUnit(BIU) ( )
ExecutionUnit(EI)
8086Architecture
BusInterface
Unit
CBUS
Q6 Q6
Q5 Q5
Q4 Q4
Q3 Q3
Q2 Q2
Q1 Q1
SUM
CS(CodeSeg Reg) CS(CodeSeg Reg)
DS(DataSeg Reg ) DS(DataSeg Reg )
ES(ExtraSeg Reg ) ES(ExtraSeg Reg )
SS(StackSeg Reg) SS(StackSeg Reg)
IP (Intr Ptr)
Sequencer
( ) IP(Intr Ptr)
Operand Operand
InDirect InDirect
Sequencer
Execution
Unit
ABUS
AH AH AL AL
BH BH BL BL
CH CH CL CL
DH DH DL DL
SI(SourceIdx ) SI(SourceIdx )
DI (Dest Idx)
TempA TempA
TempB TempB
TempC TempC
( ) DI(Dest.Idx)
BP(BasePtr ) BP(BasePtr )
SP(StackPtr) SP(StackPtr)
Z(FlagReg)
ALU
8086 Registers 8086Registers
AX theaccumulatorregister(dividedintoAH/AL)
AH AL
BX thebaseaddressregister(dividedintoBH/BL)
CX thecountregister(dividedintoCH/CL)
DX the data register (divided into DH / DL)
BH BH BL BL
CH CH CL CL
DH DH DL DL
DX thedataregister(dividedintoDH/DL)
SI sourceindexregister.
d i i i d i
SI(SourceIdx )
DI(Dest.Idx) DI(Dest.Idx)
BP(BasePtr ) BP(BasePtr )
SP (St k Pt )
DI destinationindexregister.
BP basepointer.
SP stackpointer.
SP(StackPtr)
CS (Code Seg Reg)
Z(FlagReg)
CS(CodeSeg Reg)
DS(DataSeg Reg ) DS(DataSeg Reg )
ES(ExtraSeg Reg ) ES(ExtraSeg Reg )
SS (Stack Seg Reg) SS(StackSeg Reg)
IP(Intr Ptr) IP(Intr Ptr)
8086Architecture
ExecutionUnit:
ALUmaybeloadedfromthreetempregisters(TMPA,TMPB,
TMPC)
Executeoperationsonbytesor16bitwords.
Theresultstoredintotempreg orregistersconnectedtothe
internaldatabus.
BusInterfaceUnit
BIUisintendedtocomputetheaddresses.
Twotemporaryregisters p y g
indirectaddressing
foursegmentregisters(DS,CS,SSandES),
Programcounter(IP InstructionPointer), g ( ),
A6byteQueueBuffertostoretheprefetchedopcodes anddata.
ThisPrefetch Queueoptimizethebususage.
To execute a jump instruction the queue has to be flushed since the Toexecuteajumpinstructionthequeuehastobeflushedsincethe
prefetchedinstructionsdonothavetobeexecuted.
Next Class Agenda NextClassAgenda
Detailof8086Architecture
Advanced32bitarchitecture(i386,Pentium,p4)
Iknowalittlebitofthis
Myexpertiseareaofwork
Programmingmodelforx86architecture Programming model for x86 architecture
8086Assemblylanguageprogramming
MASM / TASM /NASM ( 86 assembler) MASM/TASM/NASM(x86assembler)
Ifyoumissthenextclass,willmissalot
Th k Thanks