EE 4345 Semiconductor Electronics

Design Project

Transistor Current Sources and Active Loads
Anuj Shah
Himanshu Doshi
Jayaprakash Chintamaneni
Nareen Katta
Nikhil Patel
Preeti Yadav

Current sources made by using active devices have come to be widely used in
analog integrated circuits as Biasing elements and as load devices for amplifier
stages

The use of current sources in biasing can result in superior insensitivity of circuit
performance to power supply variations and to temperature
Current Sources
A simple 2-transistor current source
Simple current source
Since Q1 and Q2 have the same base-emitter voltage.

Their collector currents are equal, I
c1
=I
c2

Summing currents at the collector of Q1 gives,








Thus, For identical devices Q1 and Q2, the output and the reference
Currents are equal
0 2
1
1
=
f
c
c ref
I
I I
|
2 1
2
1
c
f
ref
c
I
I
I =
+
=
|
R
on V V
I I
be cc
ref c
) (
2

= =
Collector characteristics for an npn transistor
Norton equivalent representation
Of a transistor current source
Thevenin equivalent Representation of a
Transistor current source
Simple current source with current gain
The collector current Ic
2
is different form the reference Current by a
factor [ 1 + ( 2/
f
)]

The emitter current of the transistor Q3 is given by,

SummingcurrentsatthecollectorofQ1,

Since I
c1
and I
c2
are equal,

Thus, the reference and the output current differ only by a factor
of 1/
f
2

f
c
f
c
f
c
I I I
| | |
2 2 1
2
= +
0
) 1 (
2
2
1
=
+

f f
c
c ref
I
I I
| |
f f
ref
c o
I
I I
| | +
+
= =
2
2
2
1
Widlar current source
Widlar current source
Assuming that the transistors are identical and that Vce
2
is high enough
to allow Q2 to operate in the active region,The collector current of Q2 is
given by,









|
|
.
|

\
|
=
T
be
s c
V
V
I I
2
2
exp
|
|
.
|

\
|
=
S
c
T be
I
I
V V
2
2
ln
|
|
.
|

\
|
=
S
C
T be
I
I
V V
1
1
ln
Voltage equation around the base-emitter loop gives,


Solving for R
2
gives



Neglecting the base currents,
2 2 2 1 e be be
I R V V + =
2
1
2
2
ln
C
C
c
T
I
I
I
V
R =
1
1
1
R
V V
I I
be cc
ref c

= =
Design a widlar current source , given Vcc=15volts. Assume identical
transistors.Also, design a 10uA current mirror and compare total resistance
required in the two circuits.

Let Iref =1mA







Design of current mirror,
O =
|
|
.
|

\
|
=
|
|
.
|

\
|
= k
A
mA
I
I
V R
c
c
T
12
10
1
ln 025 . 0 ln
2
1
2

O =

= M
A
v v
I
V V
R
ref
be cc
45 . 1
10
5 . 0 15

O =

k
mA
v v
4 . 14
1
6 . 0 15
Cascode current source with bipolar transistors

Performing a full small-signal analysis on this circuit, including the finite

small-signal resistance of Q1 and Q4

We obtain, Ro =
0
r
0
/2
Bipolar Wilson current source
Conventional Differential Amplifier


T
c c
c m dm
V
R I
R g A = =
Resistors are used as load elements
Large Voltage Gain requires large power-supply voltage and
large values of resistors

Example:

A voltage gain of 500 would require

and , R
c
would have to be
V R I
c c
13 =
A I
c
100 =
O K 130
Current Sources as Active Load

Common-Emitter Amplifier with Active Load
Emitter-Coupled Pair with Active Load
Input Offset Voltage of the Emitter-Coupled Pair with
Active Load
Common-Mode Rejection Ratio of the Emitter-Coupled
Pair with Active Load
Common-Source Amplifier with Active Load

] ), [(
2 1 2 1
1 2
2 1
BE ce cc c c
ce cc ce
c c
V V V I I
V V V
I I
+ =
+ =
=
Fig.Common-emitter amplifier with active load
Transistors
NPN PNP
Initially at V
i
=0 at point 1 Off Saturates
As V
i
Increases at point 2 On On
at point 3 On On
at point 4 Saturated Saturated
Fig.npn collector characteristic
with pnp Load line superimposed
|
|
.
|

\
|
+
|
|
.
|

\
|
=
|
|
.
|

\
|
+
|
|
.
|

\
|
=
AP
ce
T
be
s c
AN
ce
T
i
s c
V
V
V
V
I I
V
V
V
V
I I
2 2
2 2
1
1 1
1 exp
1 exp
(

+
|
|
.
|

\
|
= ~
AP
on
BE
T
BE
s c ref
V
V
V
V
I I I
) ( 3
2 3
1 exp
0 2
0 1
V V V
V V
cc ce
ce
=
=
Large Signal Model
]
exp
1 [ ) ]( [
1
) ( ) ( 0
ref
T
i
s
eff A
AP AN
AN
on BE cc
I
V
V
I
V
V V
V
V V V +
+
=
) ( ,
) (
AP AN
AP AN
eff A
V V
V V
V Where
+
=
] [ ] [
) ( 0 ) ( sat CE sat CE CC
V V V V > >
&
) ]( [
) ( 0
AP AN
AN
on BE CC
V V
V
V V V
+
=
Fig.dc transfer characteristics Of
common-emitter Amplifier with active
load
Typical values for voltage gain are 1000 to 2000 range.
2 1
1
02 1
1
2 1 1
1 1
) || (
m pnp m npn
m
o
m
o o m v
g g
g
r r
g
r r g A
q q +

=
+

= =
R
0
=(r
onop
+r
opon
)

Fig.Small-signal equivalent Circuit for
common-emitter Amplifier with active
load


Drawback:
The quiescent value of the common-mode output voltage is very
sensitive to the value of the emitter-biasing current source and
the active-load current sources.

Fig.Emitter-coupled pair with
Active load
Fig.Common-mode half-circuit for emitter-coupled pair with active load
Output voltage V
oc
is very sensitive to the voltage at the base of Q
6
,
which is influence by I
ref2
.
Example:
If I
ref1
and I
ref2
are different by 4% , the output voltage V
oc
will change by
about 2V.
The same change result from a 1mV mismatch between Q
6
And Q
7
.
This circuit eliminates the common-mode problems but provides
a single output with much better rejection of common-mode
Input signals.
Large signal behavior model
Load resistance is zero.
V
bias
is adjusted in order to keep Q
2
and Q
4
in forward Active region.
Fig.Active-load stage with output connected to a voltage source
) 1 )( (exp
3 3
3
AP
ce
T
be
s c
V
V
V
V
I I + = ) 1 )( (exp
2 2
2
AN
ce
T
be
s c
V
V
V
V
I I + =
) 1 )( (exp
4 4
4
AP
ce
T
be
s c
V
V
V
V
I I + =
cc be be cc ce
V V V V V ~ + + =
1 3 1
) ( 3 on BE ce
V V ~
2 1 be be id
V V V =
|
|
|
|
|
.
|

\
|
|
|
.
|

\
|
+

+
|
|
.
|

\
|
+ =
T
id
AP AN
AP AN
T
id
eff A
BE cc o
V
V
V V
V V
V
V
V
on V V V
2
tanh 1
2
tanh 2
) (
) (
AP AN
AP AN
eff
A
V V
V V
V
+
=
) (
|
|
.
|

\
|
+ =
T
id
eff A BE cc o
V
V
V on V V V
2
tanh 2 ) (
) (
| |
) ( ) ( sat CE on BE o cc
V V V V + ) )
where
Early factor is on the order of 2 * 10
-4
AP
T
AN
T
AP AN
AP AN
T T
eff A
vd
V
V
V
V
V V
V V
V V
V
A
+
=
|
|
.
|

\
|
+
= =
1 1
) (
) (
1
opnp onpn m
pnp npn
vd
llr r g A =
+
=
q q
A
T
V
V
r EarlyFacto = = q
,Where
Device Mismatch Effects:


Presence of Component mismatches within the Amplifier itself and drifts

of component values with Temperature produce differential voltages at the

output that are indistinguishable from the signal being amplified.



For Transistor Differential Amplifiers the effect of mismatches is represented

by two Quantities,the input offset voltage and the input offset current.



Circuit Containing Mismatches
Equivalent Circuit with
identically matched devices

1
2
2
1
s
s
c
c
T OS
I
I
I
I
V V =
Input Offset Voltage is given by the expression
where


mV
q
kT
V
T
26 = =
at 300K
I
s
represents the Saturation Current
( )
n
CB Bn A
n i
sn
A
V W N
D qn
I
2
= where

W
b
(V
CB
) is the base width of the function V
CB

N
A
is the acceptor density in the base and A is the emitter Area
Input Offset Voltage of the Emitter Coupled Pair with Active
Load


For a Resistive Load the Input Offset Voltage arises mainly due to the

mismatches in I
s
in the Input Transistors and from mismatches in the

collector load Resistors.


For an Active Load the input offset voltage results from mismatches in the

input Transistors and load devices and from the base current of the load

devices.


Emitter Coupled Pair with Active Load
Input Offset Voltage of the Emitter Coupled Pair with Active Load
2 1 ce ce
V V =
4 3 ce ce
V V =
and
The Collector Current I
c4
is related to I
c3
by
|
|
.
|

\
|
=
3
4
3 4
s
s
c c
I
I
I I
The Collector Current Q2 is equal to (-Ic4) and thus
|
|
.
|

\
|
=
3
4
3 2
s
s
c c
I
I
I I
The Current I
c1
equals (-I
c3
),plus the base currents in the pnp transistors
(
(

|
|
.
|

\
|
+ =
f
c c
I I
|
2
1
3 1
The input offset voltage is given by

(
(

|
|
.
|

\
|
|
|
.
|

\
|
+ =
f s
s
s
s
T oc
I
I
I
I
V V
|
2
1 ln
1
2
4
3
In a Worst Case, the Offset Voltage is 0.2V
T
These Circuits have significantly higher offset Voltage than the

Resistively loaded case

The offset Voltage can be reduced by inserting resistors in the Emitters of

Q3 and Q4.


Actively Loaded Emitter Coupled Pair for improved Offset
Common-Mode Rejection Ratio of the Emitter Coupled Pair with
Active Load

CMRR is defined as the Magnitude of the ratio of differential to

Common Mode Gain.

Provides conversion from a differential signal to a signal that is

referenced to ground.This type of Conversion is required in all

differential input,single-ended output amplifiers.

Simplest differential to single-ended converter is the resistively

Loaded emitter coupled pair.
Differential to Single ended Conversion
Using resistively loaded Emitter coupled Pair
Differential to Single ended Conversion
Using actively loaded Emitter coupled Pair

|
.
|

\
|
+ =
CMRR
V
V
A
V
ic
id
dm
o
2
2
The output is given by
|
|
.
|

\
|
+ + =
o
|
1
1 2 1
EE m
R g CMRR
Transistor Q
3
operates at twice the current of Q
1
and Q
2
3
3 3
1
q
= =
o m
r g CMRR
CMRR of the resistively loaded stage is the inverse of the q of the current
source Transistor when a simple current source is used as a biasing element.
For an active-loaded case

In case of Resistively loaded case ,changes in the common Mode input will cause

changes in the bias current I
EE
because of the finite output resistance of the biasing

current source.This will cause a change in I
c2
and an identical change in I
c1.



Because of the active load ,the change in I
c1
will produce a change in the currents

flowing in the pnp load transistors ,which produces a change in the collecter current

of Q
2
.So the output does not change at all in response to common Mode Inputs.



Analytically



1
|
|
.
|

\
|
c
c
= =
ic
os
cm
dm
V
V
A
A
CMRR
Common-Source Amplifier with Active Load
Common Source Amplifier using an NMOS driver and PMOS active
load.
When M1 and M2 are forward active,the small signal gain is

2 1
1
o o
m
v
g g
g
A
+
=
2
1
mb
m
v
g
g
A =
Gain for NMOS depletion-load transistor
Common-Source Amplifier with p channel transistor
Current source load
Transfer Characteristic
I-V Characteristic of n-channel depletion mode load transistor
Common Source Amplifier with depletion mode transistor load
and dc transfer characteristic
Common Source Amplifier with Enhancement-Mode load
( )
( )
2
1
2
1
/
/
L W
L W
g
g
A
m
m
v
= =
Common-Source Amplifier with enhancement-mode load and transfer characteristic
Source Coupled Pair with Active load
4 2
1
o o
m
v
g g
g
A
+
=
Widely used in CMOS Circuit Design

References:

Analysis and Design of Analog Integrated Circuits, 3
rd
Edition
by Paul R.Gray and Robert G.Meyer.

Analog integrated circuit design,1
st
edition by David Johns and Ken
Martin

Electronics,2
nd
Edition, by Allan R.Hambley