BC0046 Microprocessor

1. Convert the decimal number 321.145 to octal and hexadecimal.

Answer:
8 321
8 40 1
8 5 0
0 5
321(10)=501
8 145
8 18 1
8 2 2
0 2
145(10)=221
So,321.145(10)=501.221(8)
16 321
16 20 1
16 1 4
0 1
321(10)=
16 145
16 09 1
0 09

So,321.145(10)=
2. Write an assembly language program to find the smallest among two
numbers.
Answer:

MVI B, 30H
MVI C, 40H
MOV A, B
CMP C
JZ EQU
JC SML
OUT PORT1
HLT
EQU: MVI A, 01H
OUT PORT1
HLT
SML: MOV A, C
OUT PORT1
HLT
SML: MOV A, COUT PORT1
































3.Draw and explain the internal architecture of 8085.

Answer:




Arithmetic and Logic Unit (ALU):

It is used to perform the arithmetic operations like addition, subtraction,
multiplication, division, increment and decrement and logical operations like
AND, OR and EX-OR.

It receives the data from accumulator and registers.

According to the result it set or reset the flags.
Program Counter (PC):

This 16-bit register sequencing the execution of instructions.

It is a memory pointer. Memory locations have 16-bit addresses, and that is why
this is a 16-bit register.

The function of the program counter is to point to the memory address of the
next instruction to be executed.
When an opcode is being fetched, the program counter is incremented by one
to point to the next memory location.

Stack Pointer (Sp):

The stack pointer is also a 16-bit register used as a memory pointer.

It points to a memory location in R/W memory, called the stack.

The beginning of the stack is defined by loading a 16-bit address in the stack
pointer (register).

Temporary Register:
It is used to hold the data during the arithmetic and logical
operations.

Instruction Register:
When an instruction is fetched from the memory, it is loaded in the
instruction register.

Instruction Decoder:
It gets the instruction from the instruction register and decodes the
instruction. It identifies the instruction to be performed.

Serial I/O Control:
It has two control signals named SID and SOD for serial data
transmission.

































4. Draw and explain the internal architecture of 8086.

Answer: Figure shows the internal architecture of the 8086. Except for the
instruction register, which is actually a 6-byte queue, the control unit
and working registers are divided into three groups according to their
functions. There is a data group, which is essentially the set of
Arithmetic registers; the pointer group, which includes base and index
registers, but also contains the program counter and stack pointer; and
the segment group, which is a set of special purpose base registers. All
of the registers are 16 bits wide.
The data group consists of the AX, BX, CX and DX registers. These
registers can be used to store both operands and results and each of
them can be accessed as a whole, or the upper and lower bytes can be
Accessed separately. For example, either the 2 bytes in BX can be used
Together, or the upper byte BH or the lower byte BL can be used by
itself by specifying BH or BL, respectively. registers play special
addressing, counting, and I/O roles:
BX may be used as a base register in address calculations.
CX is used as an implied counter by certain instructions.
DX is used to hold the I/O address during certain I/O operations.
The pointer and index group consists of the IP, SP, BP, SI, and DI
registers. The instruction pointer IP and SP registers are essentially the
program counter and stack pointer registers, but the complete
instruction and stack addresses are formed by adding the contents of
these registers to the contents of the code segment (CS) and stack
segment (SS) registers. BP is a base register for accessing the stack
and may be used with other registers and/or a displacement that is
part of the instruction. The SI and DI registers are for indexing.
Although they may be used by themselves, they are often used with
the BX or BP registers and/or a displacement. Except for the IP, a
pointer can be used to hold an operand, but must be accessed as a
whole.
To provide flexible base addressing and indexing, a data address may
be formed by adding together a combination of the BX or BP register
contents, SI or DI register contents, and a displacement. The result of
such an address computation is called an effective address (EA) or
offset. The word displacement is used to indicate a quantity that is
added to the contents of a register(s) to form an EA. The final data
address, however, is determined by the EA and the appropriate data
segment (DS), extra segment (ES), or stack segment (SS) register.
The segment group consists of the CS, SS, DS, and ES registers. As
indicated above, the registers that can be used for addressing, the BX,


















5. Write a sequence of instructions to reverse a two digit hexadecimal
number available in the register AX using shift and rotate instructions

Answer: Shift and rotate instructions
The shift and rotate instructions for the 8086 are defined in Fig. 5.
These instructions shift all of the bits in the operand to the left or right
by the specified count, CNT. For the shift left instructions, zeroes are
shifted into the right end of the operand and the MSBs are shifted out
the left end and lost, except that the least significant bit of these MSBs
is retained in the CF flag. The shift right instructions similarly shift bits
to the right; however, SAR (shift arithmetic right) does not
automatically insert zeroes from the left; it extends the sign of the
operand by repeatedly inserting the MSB. The rotate instructions differ
from the
shift instructions in that the operand is treated like a circle in which the
bits shifted out of one end are shifted into the other end. The RCL and
RCR instructions include the carry flag in the circle and the ROL and
ROR do not, although the carry flag is affected in all cases






















6. Explain the concept of Linking and Relocation.


Answer: In constructing a program some program modules may be put in
the same source module and assembles together; others may be in
different source modules and assembled separately. If they are assembled
separately ,then the main module, Which has the first instruction to be
executed ,must be terminated by an END statement with the entry point
specified, and each of the other modules must be terminated by an END
with no operand. In any event, the resulting object modules, some of which
may be grouped into libraries, must be linked together to form a load
module before the program can be executed. In addition to outputting the
load module normally the linker prints a memory map that indicates where
the linked object modules will be loaded into memory. After the load
module has been created it is loaded into memory of the computer by the
loader and execution begins. Although the I/O can be performed by
modules within the program, normally the I/O is done by I/O drivers that are
part of the program, normally the I/O is done by I/O drivers that are part of
the operating system. All that appears in the users program are references
to the I/O drivers that cause the operating system to execute them.




















Question7: Differentiate macros and procedures

Answer:



Procedures



Macros



A procedure is a set of code that
can be branched to and returned
from in such a way that code is as is
it were inserted at the point from it is
branched.

There is a sequential execution in
the case of procedure

procedure is faster as there is
sequential execution.

While defining procedure if we use
stack explicitly we have to define
stack segment.

While defining procedure if we
use stack explicitly we have to
define stack segment.












A macro is a segment of code that needs to
be written only once but whose basic
structure can be caused to be repeated
several times within a source module by
placing a single statement at the point of
each appearance.

Macro is comparatively slower as there
is branched execution

procedure is faster as there is
sequential execution.

In the case of macro we have to
write include (file name).macro
before the data segment or code
segment (if in some case data
segment is absent).











































Question8:What is the operational difference between the IRET and RET
instructions?

Answer: It is sometimes necessary to have the computer automatically
execute one of a collection of special routines whenever certain
conditions exist within a program or the computer system. The action
that prompts the execution of one of these routines is called an
interrupt and the routine that is executed is called an interrupt routine.
There are two general classes of interrupts and associated routines.
There are the internal interrupts that are initiated by the state of the
CPU or by an instruction, and the external interrupts that are caused
by a signal being sent to the CPU from elsewhere in the computer
system. Typical internal interrupts are those caused by a division by
zero or a special instruction and typical external interrupts are caused
by the need of an I/O device to be serviced by the CPU.
An interrupt routine is similar to a procedure in that it may be
branched to from any other program and a return branch is made to
that program after the
interrupt routine has executed. The interrupt routine must be written
so that, except for the lapse in time, the interrupted program will
proceed just as if nothing had happened. This means that the PSW and
the registers used by the routine must be saved and restored and the
return must be made to the instruction following the last instruction
executed before the interrupt. An interrupt routine is unlike a
procedure in that, instead of being linked to a particular-program, it is
sometimes put in a fixed place (absolutely located) in memory.
Because it is not linked to other segments, it can use only common
areas that are absolutely located to communicate with other programs.

Because some kinds of interrupts -are initiated by external events,
they occur at random points in the interrupted program. For such
interrupts, no parameters or parameter addresses can be passed to
the interrupt routine. Instead, data communication must be made
through variables that are directly accessible by both routines.
Regardless of the type of interrupt, the actions that result from an
interrupt are the same and are known as the interrupt sequence. The
interrupt sequence for the 8086 is shown in Fig. 5.8. Some kinds of
interrupts are controlled by the IF and TF flags and in those cases
these flags must be properly set or the interrupt action is blocked. If
the conditions for an interrupt are met and the necessary flags are set,
the instruction that is currently executing is completed and the
interrupt sequence proceeds by pushing the current contents of the
PSW, CS, and IP onto the stack, inputting the new contents of IP and CS
from a double word whose address is determined by the type of
interrupt, and clearing the If and TF flags. The new contents of the IP
and CS determine the beginning address of the interrupt routine to be
executed. After the interrupt has been executed the return is made to
the interrupted program by an instruction that pops the IP, CS, and
PSW from the stack.




9. Describe about each flag of a 8086 flag register.

Answer: The 8086s PSW contains 16 bits, but 7 of them are not used.
Each bit in the PSW is called a flag. The 8086 flags are divided into the
conditional flags, which reflect the result of the previous operation
involving the ALU, and the control flags, which control the execution of
special functions. The flags are summarized in Fig. 9
The condition flags are:
SF (Sign FIag)-Is equal to the MSB of the result. Since in 2s
complement negative numbers have a 1 in the MSB and for
nonnegative numbers this bit is 0, this flag indicates whether the
previous result was negative or nonnegative.
ZF (Zero Flag)-Is set to 1 if the result is zero and 0 if the result is
nonzero.


PF (Parity Flag)-Is set to 1 if the low-order 8 bits of the result
contains an even number of 1s; otherwise it is cleared.
CF (Carry Flag)-An addition causes this flag to be set if there is a
carry out of the MSB, and a subtraction causes it to be set if a borrow
is needed. Other instructions also affect this flag and its value will be
discussed when these instructions are defined.
AF (Auxiliary Carry Flag)-Is set if there is a carry out of bit 3 during
an addition or a borrow by bit 3 during a subtraction. This flag is used
exclusively for BCD arithmetic.
OF (Overflow Flag)-Is set if an overflow occurs, i.e., a result is out of
range. More specifically, for addition this flag is set when there is a
carry into the MSB and no carry out of the MSB or vice versa. For
subtraction, it is set when the MSB needs a borrow and there is no
borrow from the MSB or vice versa. As an example, if the previous
instruction performed the addition
0010 0011 0100 1101
+ 0011 0010 0001 0001
0101 0101 0101 1110
then following the instruction:
SF=0 ZF=0 PF=0 CF=0 AF=0 OF=0



the string is processed from its beginning with the first element having
the lowest address. Otherwise, the string is processed from the high
address towards the low address.
IF (Interrupt Enable Flag)-If
set, a certain type of interrupt (a maskable interrupt) can be
recognized by the CPU; otherwise, these interrupts are ignored.
TF (Trap Flag)-If
set, a trap is executed after each instruction.
















10. Write an assembly program to add and display two numbers.

Answer: To add two 16-bit numbers


;PROGRAM TO ADD TWO 16 BIT DATA
DATA SEGMENT ;Assembler directive
ORG 1100H ; Assembler directive
DATA1 DW 0 ; Assembler directive
DATA 2 DW 0 ; Assembler directive
SUM DW 0 ; Assembler directive
CARRY 0 ; Assembler directive
DATA ENDS
CODE SEGMENT
ASSUME CS : CODE ; Assembler directive
ASSUME DS: DATA ; Assembler directive
ORG 1000 H ; Assembler directive
MOV AX, DATA1 ; Load the first data in AX register
MOV CL, 00H ; Clear the CL register for
carry
ADD AX, DATA2 ;Add 2nd data to AX, sum will be in
AX
MOV SUM, AX ;Store sum in memory
location (1104H)
JNC AHEAD ;Check the status of carry flag
INC CL ;If carry is set, increment CL
by one
AHEAD: MOV CARRY, CL ;Store carry in memory location
(1106H)
HLT
CODE ENDS :Assembler directive
END ;Assembler directive