Pic Ccs Full PDF

Nhm bin son BigLab Ch bin: ThS. V Xun Quc vxquoc@gmail.
com 1
1 Nhm o to k thut BigLab - Gio trnh PIC - CCSC
laLI NI U
Ti liu ny cng vi cng chng trnh l ti liu hng dn chnh thc cho hc vin tham
gia kha hc PIC CCSC ti Nhm o to in t lp trnh BigLab.
Ti liu c gi tr lu hnh ni b, c cung cp min ph cho hc vin tham gia kha hc.
Mi thc mc v ti liu xin lin h trc tip vi ging vin ng lp.
Ti liu c bin son ln u chc chn cn nhiu thiu st, rt mong s gp ca qu hc
vin, c gi. Mi kin ng gp xin lin h email: vxquoc@gmail.com

Nhm bin son
BigLab

Nhm bin son BigLab Ch bin: ThS. V Xun Quc vxquoc@gmail.com 2
MC LC
B CHNG TRNH TI BIGLAB ........................................................................... 7
CNG CHNG TRNH PIC - CCSC ............................................................. 10
Bi 1 : NHNG KHI NIM BAN U .................................................................... 16
1.1 VI IU KHIN L G ...................................................................................... 16
1.2 TNG TH KIN TRC PHN CNG VI IU KHIN ................................ 18
1.3 LA CHN DNG VI IU KHIN ................................................................ 21
1.4 CC NGN NG LP TRNH CHO VI IU KHIN ..................................... 21
Bi 2 : K THUT LP TRNH C ............................................................................. 23
2.1 KHI QUT NGN NG C .............................................................................. 23
2.2 NHNG VN LIN QUAN KHI S DNG C CHO LP TRNH PIC ....... 34
Bi 3 : PRE-PROCESSOR DIRECTIVE .................................................................... 36
3.1 TNG TH KIN TRC PHN CNG VI IU KHIN ................................ 36
3.2 B NH ............................................................................................................. 38
3.3 B DAO NG .................................................................................................. 42
3.4 CC CH TH TIN X L TRONG CCSC ...................................................... 46
3.5 BI TP .............................................................................................................. 49
Bi 4 : IO PORT OUTPUT ....................................................................................... 50
4.1 GII THIU PHN CNG ................................................................................ 50
4.2 TP LNH TNG TC PORT TRONG CCSC ............................................... 51
4.3 BI TP - CC NG DNG CA IO PORT-PHN OUTPUT ........................ 52
4.4 BI TP V NH: ............................................................................................. 54
4.5 PH LC CHUN LOGIC NG RA CA IO PORT ..................................... 55
Bi 5 : NGT (INTERRUPTS) .................................................................................... 56
5.1 NH NGHA NGT .......................................................................................... 56
5.2 PHN LOI NGT ............................................................................................ 56

5.3 HOT NG CA NGT ................................................................................. 57
5.4 TNG TC VI NGT ................................................................................... 57
5.5 BI TP .............................................................................................................. 60
Bi 6 : IO PORT - INPUT ............................................................................................ 61
6.1 M T PHN CNG ......................................................................................... 61
6.2 BI TP NG DNG IO PORT - INPUT ....................................................... 61
6.3 PH LC ............................................................................................................ 64
Bi 7 : TIMER .............................................................................................................. 66
7.1 TIMER ................................................................................................................. 66
7.2 TNG TC VI TIMER.................................................................................. 68
7.3 BI TP .............................................................................................................. 69
7.4 M RNG WATCH DOG TIMER (WDT) ...................................................... 70
Bi 8 : BI TP GIA KHA .................................................................................... 71
8.1 YU CU ............................................................................................................ 71
8.2 M T PHN CNG ......................................................................................... 71
8.3 GII THUT ...................................................................................................... 72
8.4 CHNG TRNH ............................................................................................... 72
Bi 9 : NGN NG LP TRNH C NNG CAO ...................................................... 73
9.1 CC KIU D LIU NNG CAO TRONG C ................................................... 73
9.2 CC HM THNG DNG TRONG TH VIN C CHUN: ............................ 73
Bi 10 : LCD ................................................................................................................. 76
10.1 TNG QUAN V LCD ....................................................................................... 76
10.2 GIAO DIN LCD - HD 44780 ............................................................................. 77
10.3 CC HM TNG TC VI LCD TRONG CCSC .......................................... 77
10.4 BI TP .............................................................................................................. 78
Bi 11 : ADC (ANALOG DIGITAL CONVERT) .................................................... 79

11.1 TNG QUAN V ADC ....................................................................................... 79
11.2 CC HM TNG TC ADC TRONG CCSC .................................................. 80
11.3 QUY TRNH TNG TC ADC TRONG CCSC ............................................... 81
11.4 BI TP .............................................................................................................. 82
Bi 12 : USART ............................................................................................................ 83
12.1 KHI QUT V CC CHUN GIAO TIP ...................................................... 83
12.2 CC HM TNG TC VI USART TRONG CCSC ...................................... 84
12.3 BI TP .............................................................................................................. 86
Bi 13 : PWM / CAPTURE / COMPARE ................................................................... 87
13.1 TNG QUAN V PWM/CAPTURE/COMPARE ............................................... 87
13.2 QUY TRNH S DNG MODULE PWM TRONG PIC ..................................... 88
13.3 BI TP .............................................................................................................. 89
13.4 PHN M RNG - ENCODER .......................................................................... 89
Bi 14 : SPI I2C ......................................................................................................... 92
14.1 TNG QUAN V SPI ......................................................................................... 92
14.2 HOT NG CA SPI ...................................................................................... 92
14.3 SPI TRONG PIC .................................................................................................. 92
14.4 M RNG I2C ................................................................................................. 93
14.5 CC PHNG PHP LU TR D LIU ...................................................... 95
Bi 15 : BI TP TNG KT .................................................................................... 97
15.1 YU CU ............................................................................................................ 97
15.2 M T PHN CNG ......................................................................................... 98
15.3 GII THUT ...................................................................................................... 98
15.4 CHNG TRNH ............................................................................................... 98

DANH SCH HNH V
Hnh 1.1 - S khi kin trc tng th mt h my tnh ................................................... 18
Hnh 1.2 - CPU .................................................................................................................. 19
Hnh 1.3 - Cc dng vi iu khin PIC hin nay ................................................................. 21
Hnh 3.4 - Stack memory ................................................................................................... 40
Hnh 3.5 - Gin xung clock cp cho CPU ...................................................................... 40
Hnh 3.6 - S khi b dao ng ..................................................................................... 42
Hnh 3.7 - S kt ni ngun xung bng thch anh .......................................................... 43
Hnh 3.8 - S kt ni b to xung bng mch RC .......................................................... 44
Hnh 3.9 - Ngun xung bn ngoi....................................................................................... 44
Hnh 4.1 - Cu to LED 7 on .......................................................................................... 52
Hnh 4.2 - Nguyn l hin th nhiu LED 7 on ................................................................ 54
Hnh 5.1 - S logic ca ngt trong PIC 18F4550............................................................ 56
Hnh 6.1 - S mch lp trnh qut phm n .................................................................. 61
Hnh 7.1 - Nguyn l timer ................................................................................................ 66
Hnh 7.2 - iu chnh thi gian timer bng thanh ghi gi tr ............................................... 67
Hnh 8.1 - S phn cng mch th nghim ..................................................................... 71
Hnh 10.2 - Graphic LCD ................................................................................................... 76
Hnh 10.3 - Giao din LCD HD44780 ................................................................................ 77
Hnh 11.1 - Analog - Digital ............................................................................................... 79
Hnh 11.2 - phn gii b chuyn i ADC 3 bit ............................................................ 79
Hnh 13.1 - Nguyn l phng php iu rng xung .......................................................... 87
Hnh 15.1 - S phn cng ca mch th nghim ............................................................. 97


DANH SCH BNG BIU
Bng 1.1 Mt vi ng dng ca vi iu khin trong thc t ............................................ 17
Bng 2.1 Cc kiu d liu trong C ................................................................................. 24
Bng 2.2 Cc cu trc lnh trong C ................................................................................ 26
Bng 2.3 Lu gii thut ca cc cu trc lnh trong C ............................................... 27
Bng 2.4 Ton t trong C ............................................................................................... 30
Bng 2.5 Bng so snh mc u tin ca cc ton t: ................................................. 31
Bng 3.1 Cc thanh ghi h thng ca PIC18F4620 (datasheet PIC18F4620 trg 251) ...... 46
Bng 3.2 Cc option v chip trong CCS ......................................................................... 47
Bng 3.3 Cc la chn ca tin x l #FUSES ............................................................... 48
Bng 3.4 Cc la chn ca tin x l #USE ................................................................... 49
Bng 4.1 Bng m dnh cho LED 7 on Anode chung ................................................. 53
Bng 4.2 Bng m dnh cho LED 7 on Cathode chung ............................................... 54
Bng 5.1 Cc cp ngt (level) ........................................................................................ 58
Bng 6.1 Mc in p ch input ............................................................................. 65
Bng 7.1 Cc ch (mode) .......................................................................................... 69
Bng 9.1 Cc kiu d liu nng cao trong C ................................................................... 73
Bng 10.1 Bng cc nh dng cstring trong LCD ........................................................... 77
Bng 11.1 Cc trng thi s dng ca b chuyn i ADC trong CCSC .......................... 80
Bng 11.2 Cc trng thi s dng ca knh ADC trong CCSC (PIC18F4620) .................. 81
Bng 12.1 Cc la chn ci t cho USART trong CCSC ................................................ 84
Bng 13.1 Mt s ch hot ng ca CCP .................................................................. 88

B CHNG TRNH TI BIGLAB
B chng trnh ti Nhm o To K Thut BigLab c thit k nhm cung cp nhng kin
thc b tr cn thit nht cho cc bn hc vin quan tm ti lnh vc lin ngnh C kh in t -
Lp trnh, hay cn gi l C in t.
B CHNG TRNH O TO TI BIGLAB
C kh in t Lp trnh vi iu khin
AutoCAD
cn bn
SolidWorks
cn bn
Thit k vi
AutoCAD
Thit k vi
SolidWorks
OrCAD
cn bn
in t
thc hnh
in t ng dng
PIC C bn
PIC ng dng
PIC Full
PIC Full
CCSC
PIC Full
C18
ARM
Total
PIC - iu
khin ng
c
PIC Giao
tip khng
dy
PIC C#
MC TIU: THIT K H THNG T NG
in t
KTS
Vi mc tiu trn, ton b chng trnh c chia lm 3 mng ln: C kh, in t, Lp trnh.
C kh:
mng c kh, chng trnh s dng 2 phn mm thit k: SolidWorks v AutoCAD. y l
cc phn mm thng dng vi u im trc quan, tm ng dng ln, d s dng, rt thch hp cho
cc yu cu thit k c kh.
Cc lp v SolidWorks v AutoCAD c chia lm 2 cp : C bn v ng dng vo thit k
c kh.

- Lp c bn s cung cp nhng kin thc c bn v cc phn mm, cc phng php dng
hnh c bn. i tng ca lp c bn l cc bn sinh vin nm 2, 3 ln u tin tip xc
vi phn mm
- Lp thit k: Cc bn s c hc v phng php thit k, trnh t thit k trong c kh,
thit k theo trnh t gia cng... Sau s ng dng cc kin thc v phn mm vo vic
thit k c kh. i tng chnh ca lp thit k l nhng ai bit v AutoCAD v
SolidWorks c bn, mong mun s dng n thit k cc chi tit c kh.
in t:
- Lp in t thc hnh: lp ny cc bn s c hc v cc linh kin in t c bn da
trn s phn tch vai tr ca chng trong cc mch in t nh mch ngun tuyn tnh,
mch khuch i, mch ngun xung... Trong chng trnh cn tch hp vic s dng cc
phn mm thng dng trong in t nh: phn mm thit k mch OrCAD, phn mm m
phng mch Tina,...
- Lp in t k thut s vi iu khin: l phn sau ca lp in t thc hnh. Trong lp
ny cc bn s c hc t cc nguyn l c bn ca h thng xung, s n vic thit k
hon chnh mt mch k thut s. c bit lp cung cp cho cc bn nhng kin thc thit
k mch giao lin quan ti vi iu khin (PIC, ARM...) nh mch hin th LED, mch giao
tip my tnh, mch phm nhn.... Chng trnh c s dng cc phn mm in t nh:
OrCAD, Circuit Maker, Proteus,...
- Lp in t ng dng: y l lp nng cao trong mng in t, cung cp cho cc bn nhng
kin thc phi hp c th thit k mt mch in t.
Lp trnh nhng:
Cc lp lp trnh nhng l mt mng ln c quan tm nht ca b chng trnh ti BigLab.
Hin ti BigLab c cc chng trnh lp trnh cho vi iu khin: PIC, ARM trong b chng
trnh cho vi iu khin PIC c thit k cng phu v c th nghim qua nhiu kha hc.
Chng trnh PIC c thit k theo 2 hng chnh:
- Hng y trong 1 kha:
l cc lp PIC Full. y l cc lp dy y v vi iu khin PIC. Cc bn s c hc
t h thng ti cc module ngoi vi v s dng thnh tho ngn ng C lp trnh cho cc module
ny. Trong hng ny chng trnh c chia ra lm 2 hng nh da trn vic s dng 2 trnh
bin dch khc nhau: CCSC v C18.

+ CCSC: y l trnh bin dch d s dng, khng cn kin thc chuyn su v h thng. Lp
ny thch hp cho nhng bn i lm v mong mun c kin thc v lp trnh vi iu khin s
dng trong cng vic c th.
+ C18: l trnh bin dch chuyn su ca Microchip vit ring cho dng PIC18. s dng
trnh bin dch ny i hi cc bn phi c kin thc su v phn cng vi iu khin. Chnh v th
s thng qua vic lp trnh cc bn s hiu r v hot ng ca vi iu khin hn, t d dng
tm hiu nhng dng vi iu khin khc (nh ARM,...).
- Hng PIC C bn ng dng:
y l b chng trnh lp trnh vi iu khin PIC c thit k c bit dnh cho cc bn sinh
vin, nhng ngi c thi gian, lng am m cng nh s kin nhn theo ui v nm vng
dng vi iu khin PIC. Lp u tin trong b ny l lp PIC C bn: lp ny s cung cp nhng
kin thc c bn v lp trnh C, vi iu khin PIC, cc nguyn l hot ng ca vi iu khin, v
cc module h thng. Cc lp tip theo ca chng trnh l cc lp ng dng vi iu khin vo
vic gii quyt cc bi ton thc t nh iu khin ng c, giao tip my tnh, giao tip khng
dy... cc lp ny cc bn s c hc cc module ngoi vi tng ng, sau s ng dng cc
module ny vo thc t cng vic.
Ton b chng trnh ny c thit k s dng trnh bin dch C18, l mt trnh bin dch
chuyn su do Microchip pht trin chuyn dng cho dng vi iu khin PIC18F.
Lp hc NG HNH, bui ni chuyn chuyn :
Ngoi nhng chng trnh c nh trn Nhm cn thung xuyn m cc lp hc NG HNH
(min ph) v ch nht hng tun. y l ni cc bn c c hi hc tp min ph, gp g giao lu
v c c hi tm hiu thm v lnh vc mnh ang theo ui.
Bn cnh cc bui hc NG HNH l cc bui ni chuyn chuyn chia s kinh nghim
hc tp, cp nht kin thc cng ngh... cng c t chc thng xuyn.
y l cc chng trnh c cc Ging vin trng i Hc Bch Khoa TPHCM thc hin
nhm to mt khng kh gp g giao lu, kt ni vi ton th cc bn sinh vin k thut cng
to dng mt cng ng vng mnh hn trong lnh vc k thut iu khin t ng.
Mi thc mc xin lin h website chnh thc ca nhm: www.biglab.edu.vn hoc thng qua
din n: www.dieukhienvietnam.com

CNG CHNG TRNH PIC - CCSC
I. MC TIU V I TNG
1. i tng kha hc
i tng chnh ca kha hc dnh cho nhng ai mun lm quen v i n nm vng vi
iu khin PIC, ng dng PIC cho cc cng vic iu khin, giao tip.
2. Mc tiu kha hc:
Hon thnh kha hc hc vin s:
- Nm c tng quan cc chc nng trong cc dng vi iu khin ca hng Microchip v
cch la chn dng vi iu khin ph hp.
- Hiu r vi iu khin PIC
- Nm c cch s dng cc modul ca dng vi iu khin PIC18F, c v hiu datasheet
sau ny c th d dng tip cn nhng dng vi iu khin khc.
- Lp trnh s dng tt c cc module ca vi iu khin bng ngn ng C.
- M phng chng trnh v hin thc trn kit th nghim.
- c s t vn, h tr trc tip t cc thc s, k s c kinh nghim trong v sau kha hc.
II. NI DUNG CHNG TRNH
Chng trnh xy dng da trn dng vi iu khin PIC18 ca hng Microchip. Ngn ng lp
trnh s dng: CCSC. Dng vi iu khin s dng th nghim l PIC18F4620 v PIC18F4550.
Chng trnh s cung cp cho hc vin nhng kin thc v vi iu khin PIC t c bn ti nng
cao. Gip hc vin thc hnh thnh tho vic s dng cc module chc nng trong vi iu khin,
tin ti ng dng vi iu khin PIC gii quyt cc vn thc t. Chng trnh cng c nhiu
bi tp thc hnh thc t lin quan.
- Bui 1: Nhng khi nim c bn v vi iu khin
o Vi iu khin l g? Nhng dng vi iu khin c trn th trng
o Cu trc phn cng vi cc dng vi iu khin c bn
o Gii thiu phn mm s dng, kit th nghim, b th nghim PIC
o B tc k thut lp trnh C cho vi iu khin
Cc h s m
Bin v hng
- Bui 2: B tc k thut lp trnh C cho vi iu khin (tt)
o Con tr, mng
o Cu trc lnh
Cu trc iu kin
Cu trc lp
Cu trc la chn
o Hm

o Ton t
o Cu trc v cch thc thi chng trnh C
o Nhng kin thc cn bn v t ch b nh PIC
- Bui 3: T chc phn cng ca PIC
o Thanh ghi h thng
o Cc vn lin quan ti b dao ng, tin x l
o Gii thiu cc module ca vi iu khin
o Bi tp: Cc ch th tin x l
o Gii thiu cc phn mm v ngn ng s dng
Trnh bin dch C complier
C complier v MPLAB
Proteus v m phng bng Proteus
- Bui 4: Cc module cn bn ca vi iu khin PIC
o L thuyt:
T chc phn cng
Cc thanh ghi iu khin PORT
o Bi tp:
Lp trnh xut led n
- Bui 5: Cc module cn bn ca vi iu khin PIC (tt)
o Bi c:
Lp trnh hin th led 7 on
o L thuyt:
T chc phn cng ca interrupt
Cc thanh ghi iu khin interrupt trong PIC
o Bi tp v nh:
Lp trnh s dng c phm n bng ngt ngoi
o Bi c:
Lp trnh c s ln nhn phm hin th ra led 7 on
o L thuyt:
Cc thanh ghi iu khin input
o Bi tp:
Lp trnh c 4 phm n (s dng phng php qut)
o Bi tp v nh:
Lp trnh c 4 phm n bng phng php ngt RB
o Bi c:
Lp trnh qut phm ma trn
o L thuyt:
T chc phn cng timer
Cc thanh ghi iu khin timer trong PIC
Watch Dog Timer (WDT)
o Bi tp:
Lp trnh s dng timer to hm delay

o Bi c:
Lp trnh dng hm delay iu khin I/O Port
o Bi tp gia kho: Hc vin chn 1 trong 2 bi tp sau lm ti lp, cc bi cn
li lm nh
Bi tp 1: Lp trnh hin thc ng h s
Bi tp 2: Lp trnh hin thc my tnh b ti n gin
- Bui 9: LCD Cc hm thao tc trn chui v hm chuyn i d liu trong C
o Cc kiu d liu m rng
o Tng tc vi cc hm trong th vin C
o Hm chuyn i kiu d liu
o Hm x l chui
o LCD
Kin trc phn cng LCD
Cc thanh ghi, cc ch lm vic ca LCD
Tp lnh LCD
o Bi tp:
Hin th d liu va nhp ra LCD
o Bi tp v nh:
Nhp d liu s t nt nhn, hin th d liu va nhp ra LCD
- Bui 10: Timer ngoi vi Counter Realtime timer
o Gii thiu cc timer ngoi vi: timer 1, 2, 3
o Counter
o Realtime timer
T chc phn cng ca mch thi gian thc dng thch anh 32k
o Bi tp:
Lp trnh m xung encoder dng counter
o Bi tp v nh:
Thit k ng h thi gian thc dng thch anh thi gian thc v timer 1/3
- Bui 11: ADC
o C bn v nguyn l b chuyn i Analog Digital
o Nhng thng s c trng ca b chuyn i
o Cu trc b ADC trong PIC
o Bi tp:
c gi tr bin tr VR
Hin th gi tr in tr hin thi ca VR ra LCD
o Bi tp v nh: Thit k h thng gim st nhit phng
c ADC t cm bin nhit
Dng Timer ci t thi gian ly mu
Hin th gi tr nhit ra LCD
- Bui 12: UART giao tip ni tip bt ng b
o Chun giao tip ni tip
Chun giao tip ni tip l g, cc ng dng
Cc thng s c trng ca chun giao tip ni tip RS232

o UART trong PIC
Chng trnh truyn nhn trn PIC
Gii thiu v giao tip my tnh qua RS232
o Bi tp:
Giao tip PIC My tnh: gim st nhit phng bng th trn my tnh
- Bui 13: PWM/Capture/Compare
o PWM/Capture/Compare
Nguyn l, ng dng?
Cc thng s c trng
o PWM/Capture/Compare trong PIC
Thc hnh iu ch xung PWM, cc chc nng Capture, Compare trn kit
th nghim
o Bi tp:
iu khin vn tc ng c DC dng PWM c gim st vn tc bng my
tnh
o Bi tp v nh:
iu khin vn tc ng c c hi tip dng encoder
- Bui 14: Bi tp tng kt:
o Thit k h thng gim st tc qut lm mt, t ng iu chnh tc theo
nhit .
iu khin ng c bng PWM c hi tip encoder
c ADC t cm bin nhit cp nht gi tr vn tc
Hin th nhit , tc ra LCD dng trn, dng di l thi gian ng c
hot ng (tnh bng gi, pht, giy)
Mi 1 pht lu gi tr vo EEPROM (optional)
-
- Bui 15: SPI giao tip ni tip ng b; Cc phng php lu tr d liu
o Chun giao tip SPI
Chun giao tip SPI l g, cc ng dng?
Cc thng s c trng ca chun giao tip SPI
o SPI trong PIC
T chc phn cng
Tp lnh tng tc vi EEPROM
Khi nim v chun giao tip I2C v cc phng php lu tr d liu.
o Bi tp:
Lu v c d liu t EEPROM ngoi qua SPI
o Bi tp m rng:
Lp trnh m phng giao tip gia 2 VK PIC dng SPI
o Tng kt kha hc
III. CC CHUYN NG DNG KM THEO SAU KHA HC
1. Chuyn 1: iu khin ng c bc c cu visme-ai c bi
2. Chuyn 2: iu khin vn tc ng c DC c hi tip
3. Chuyn 3: Cc chun giao tip khng dy (phn 1)
4. Chuyn 4: Cc chun giao tip khng dy (phn 2)

5. Chuyn 5: iu khin 2 ng c DC phi hp (bn my 2D)
6. Chuyn 6: chuyn phi hp: Robot 2 bnh, Robot d line.
7. Chuyn 7: chuyn phi hp: Con lc ngc
8. Chuyn 8: chuyn phi hp: Xe 2 bnh t cn bng
9. Chuyn 9: iu khin ng c khng chi than iu khin lc nng qut
10. Chuyn 10: iu khin 2 ng c khng chi than cn bng 2 cnh qut
11. Chuyn 11: chuyn phi hp: Quad Rotor
IV. TI LIU V THIT B HC TP
1. Ti liu hc tp
- Ti liu hc tp chnh do trung tm cung cp
- Cc ti liu tham kho s c gii thiu trong tng bui hc
2. Thit b hc tp
- My tnh Laptop do hc vin t trang b
- Kit th nghim do trung tm cung cp
- Mch np, ngun v nhng linh kin khc do trung tm cung cp


PHN BI GING
PIC - EXPRESS

Bi 1 : NHNG KHI NIM BAN U
Bi 1 gii thiu tng quan v khi nim v lch s ra i, pht trin vi iu khin. S khc nhau
v ging nhau gia vi iu khin v vi x l, kin trc in hnh ca mt vi iu khin. Bi 1 cng
gii thiu v lch s, kin trc ca dng vi iu khin PIC. Tc gi cng i su phn tch cc tiu
ch la chn dng vi iu khin cho cc ng dng c th. T a ra l do v sao vi iu khin
PIC l mt s la chn hp l trong hon cnh hin nay.
1.1 VI IU KHIN L G
1.1.1 Vi nt v lch s
Nhng thp k cui ca th k XX, vi s pht trin ca cng ngh bn dn, k thut in t c
nhng bc pht trin vt bc. Ngy cng c nhiu linh kin c tch hp trong mt th tch
nh hn. Nhng thit b ny gi l cc vi mch tch hp.
Nm 1971 Intel cho ra i b vi x l u tin, chip 4004, cha 2300 transistor. S kin ny
c xem nh l mt bc t ph v cng ngh. Vi s pht trin khng ngng, ngy nay s
transitor tch hp trong vi x l ln con s hng chc triu (b vi x l Penltum 4 cha 55 triu
transistor).
Nh vy vi x l m mt mch tch hp cha hng ngn thm ch hng triu transitor kt ni
vi nhau. Cc transistor cng nhau lm vic tnh ton, x l, lu tr Chc nng c th ca
vi x l c xc nh bng phn mm.
1.1.2 T vi x l ti vi iu khin
Vi x l ch c tc dng tnh ton, thc hin mt chc nng no c th (v d iu khin
ng c) vi x l phi c kt ni vi cc thit b, c th l cc mch in bn ngoi. H thng
d ln hay nh, nu dng vi x l th cng i hi cc khi mch in giao tip phc tp nh
nhau. Cc khi ny bao gm b nh cha d liu v chng trnh thc hin, cc mch in giao
tip ngoi vi xut nhp v iu khin tr li, cc khi ny cng lin kt vi vi x l th mi thc
hin c cng vic. kt ni cc khi ny i hi ngi thit k phi hiu bit tinh tng v
cc thnh phn vi x l, b nh, cc thit b ngoi vi. H thng c to ra kh phc tp, chim
nhiu khng gian, mch in phc tp. V thc hin vic nay yu cu trnh ngi thit k phi
cao. Kt qu l gi thnh sn phm cui cng rt cao, khng ph hp p dng cho cc h thng
nh.
Chnh v yu cu vi iu khin ra i. Vi iu khin l s tch hp mt t b nh v mt s
mch giao tip ngoi vi cng vi vi x l vo mt IC duy nht. Vi iu khin c kh nng tng t

nh kh nng ca vi x l, nhng cu trc phn cng dnh cho ngi dng n gin hn nhiu. Vi
iu khin ra i mang li s tin li i vi ngi dng, h khng cn nm vng mt khi lng
kin thc qu ln nh ngi dng vi x l. Thm vo , kt cu mch in dnh cho ngi dng
cng tr nn n gin hn nhiu, v c kh nng giao tip trc tip vi cc thit b bn ngoi. V
d nhin v th gi thnh ca vi iu khin cng r hn nhiu so vi vi x l. Nhng thay cho
nhng li im ny l kh nng x l b gii hn (tc x l chm hn v kh nng tnh ton t
hn, dung lng chng trnh b nh hn).
Vi nhng u im , ngy nay, vi iu khin ring l c s dng rng ri vo nhiu ng
dng c chc nng n gin, khng i hi tnh ton phc tp. Vi s tch hp nhiu chun giao
tip khc nhau, cc vi iu khin c kh nng kt ni vi nhau to thnh mt h thng ln khi
yu cu phc tp v h thng tng ln. Do vi iu khin l thnh phn khng th thiu trong
cc h thng s d ln hay nh m c kh nng lp trnh.
1.1.3 ng dng ca vi iu khin
Nh ni trn, vi iu khin c ng dng nhiu trong cc h thng va phi. Nhng h
thng ny c th k n nh: cc thit b gia nh, cc thit b vn phng, cc ng dng cng
nghip nh, chiMt vi ng dng vi iu khin c cho bng sau:
Bng 1.1 Mt vi ng dng ca vi iu khin trong thc t
Thit b gia nh in trong nh
L vi sng
Ca t ng
Dng c th thao
Tivi
VCR
Camera
iu khin t xa
Tr chi in t
Nhc c in t
iu ha nhit
chi tr em
Thit b vn phng in thoi
My Fax
My photocopy
My tnh c nhn
H thng an ninh
My in
Thit b cng nghip iu khin ng c
Thit b ABS
H thng o lng
iu khin chiu sang

1.2 TNG TH KIN TRC PHN CNG VI IU KHIN
1.2.1 Kin trc tng th ca mt vi iu khin

Hnh 1.1 - S khi kin trc tng th mt h my tnh
Mt h my tnh c bn bao gm: b x l trung tm (CPU), thit b tao dao ng (b dao
ng), b nh, cc iu khin, cng xut nhp v cc thit b ngoi vi (Hnh 1.1). Ton b cc
thnh phn ny c kt ni vi nhau thng qua cc BUS. Trong mt h my tnh, ty theo chc
nng s dng m BUS c chia lm 3 loi: BUS a ch (Address BUS), BUS d liu (Data
BUS) v BUS iu khin (Control BUS). Chi tit hn v cc thnh phn c trnh by sau y.
1.2.2 Kin trc cc thnh phn
1.2.2.1 B x l trung tm (CPU)
CPU l u no tnh ton ca ton b h thng, qun l tt c cc hot ng ca h v thc hin
tt c cc thao tc trn d liu. Hu ht cc CPU ch bao gm mt tp cc mch logic thc hin
lin tc 2 thao tc: tm np lnh v thc thi lnh. Thc t vic tnh ton trong CPU n thun ch l
cc php ton s hc trn h c s 2 c thc hin trong b tnh ton s hc ALU. Control Unit
trong CPU c nhim v tm lnh t cc thanh ghi v np lnh cho b tnh ton ALU x l (Hnh
1.2)


Hnh 1.2 - CPU
1.2.2.2 B nh
y l mt tp hp cc nh, mi c mt s bit nht nh v cha mt thng tin c m ha
thnh s nh phn m khng quan tm ti kiu ca thng tin. Cc thng tin ny c th l lnh hay
d liu. Mi nh u c mt a ch. Thi gian truy cp vo mi nh l nh nhau, v vy b
nh ny cn c tn l b nh truy cp ngu nhin (RAM). Mi nh thng l 8bit, bt k di
ca t nh trong thit b l bao nhiu.
Tuy nhin b nh RAM ch c s dng khi chng trnh thc thi. Trong trng hp chng
trnh dng thc thi v mt l do g (h thng shutdown, mt in) th b nh ny s t ng
gii phng. Chnh v th, lu tr cc thng tin cn thit nh chng trnh, d liu quan trng
cn thm mt b nh ch c ROM.
Trong vi iu khin c 2 loi b nh: B nh d liu v b nh chng trnh tng ng vi b
nh RAM, ROM trong cu trc trn.
B nh d liu(RAM, hay data memory): L khng gian nh dng lu tr d liu ca chng
trnh khi chng trnh thc thi.
B nh chng trnh (program memory): y l mt dng ROM, tuy nhin trong vi iu khin
ROM l b nh c cho php truy xut, thay i v vy c gi l EEPROM (Electrically Erasable
Programmable Read-Only Memory).
1.2.2.3 B to dao ng
B to dao ng l phn khng th thiu ca mt h thng s. y l ngun cp xung nhp
ng b cho ton b hot ng ca h thng. Hu ht cc vi iu khin hin nay u c trang b
b dao ng ni, ngha l b to dao ng c ng gi bn trong chip. Tuy nhin b do ng
bn trong vi iu khin thng c xung nhp thp. V th xu hng hin nay trong thit k mch

cho vi iu khin ngi ta thng dng b dao ng t bn ngoi. Vn ny s c ni r bi
3.
1.2.2.4 B nh thi (timer)
Cc ng dng iu khin thng thng u lin quan ti thi gian. Chnh v th b nh thi l
mt phn khng th thiu trong cc vi iu khin. B nh thi thng thng dng : nh thi
mt khong thi gian, m s kin, to xung
1.2.2.5 B iu khin ngt (Interrupt Control)
Ngt l hnh ng dng mt chng trnh ang thc thi thc hin chng trnh ch nh ngt
khi c mt tn hiu bo ngt. B ngt l mt mch logic mc ch l to ra mt xung kch hot ngt
(tn hiu bo ngt) cho CPU. Ngt l mt phn v cng quan trng trong vi iu khin. N gip
cho ngi lp trnh c nhiu sc mnh hn trong vic thit k mt ng dng. Mt chng trnh
c iu khin bi ngt lm cho ta c cm gic c nhiu ng dng ang chy song song, trn
thc t l chng chy ni tip nhau.
1.2.2.6 Cc thit b ngoi vi
Thit b ngoi vi y c hiu l nhng module chc nng tch hp sn trong vi iu khin.
Cc module ny tng dng vi iu khin l khc nhau ty theo dng vi iu khin c thit
k dnh cho cc ng dng ph thng hay mt vi ng dng c bit no . Cc module bao
gm: ADC, UART, SPI, I2C, PWM, Capture, Compare
1.2.2.7 Cc chn xut nhp
Cc chn xut nhp l cc chn chc nng chnh ca vi iu khin. y c xem l ng ra
chc nng ca vi iu khin c dng trc tip thit k cc ng dng iu khin. Hy tng
tng cc chn xut nhp nh tay, chn ca mt con ngi nu thiu tay chn th con ngi s
khng th c c mt thao tc no c.
1.2.2.8 BUS
BUS l mt tp hp cc dy mang thng tin c cng mt mc ch. CPU s dng 3 BUS
truy xut ti cc thnh phn xung quanh: BUS d liu, BUS iu khin v BUS a ch.
c trng quan trng nht ca BUS l s bit. S bit l s dy mang thng tin ng thi ca
mt BUS. S bit ca BUS a ch quy nh ln ca b nh m CPU c th truy xut c. S
bit ca BUS d liu quy nh ln ca mt d liu trong b nh. S bit ca BUS iu khin
ph thuc vo thit b cn iu khin. V my tnh thng dng ti khong 2/3 thi gian cho vic

di chuyn cc d liu trn cc BUS nn rng ca BUS (hay s bit) l rt quan trng i vi hiu
sut cng nh tc ca my. Tc ca my tnh s tng khi s bit ca BUS tng ln.
1.3 LA CHN DNG VI IU KHIN
K t khi ra i n nay c rt nhiu dng vi iu khin ca nhiu hng khc nhau ra i. Sau
y l mt vi dng c bn, xp theo trnh t thi gian: 8611 ca Motorola, 8051 ca Intel, Z8 ca
Zilog, AVR ca Atmel, PIC ca Microchip. y l cc dng vi iu khin 8bit c bn. Ngoi ra
cn c cc dng vi iu khin 16 bit, 32 bit (PIC30F, 33F (dng 16 bit), PIC32(dng 32
bit)(hnh 1.3)
Chnh v c rt nhiu dng vi iu khin khc nhau nh vy nn vic la chn vi iu khin s
dng cn phi c xem xt. V c bn c 3 tiu chun chnh la chn s dng dng vi iu
khin no:
p ng yu cu cng vic mt cch hiu qu v kinh t
C sn cc cng c pht trin phn mm, nh cung cp linh kin phn cng
C ngun cung cp ti liu hc v pht trin tin cy.

Hnh 1.3 - Cc dng vi iu khin PIC hin nay
1.4 CC NGN NG LP TRNH CHO VI IU KHIN
lp trnh cho vi iu khin c cc ngn ng c bn sau:

Ngn ng my: l dng ngn ng nh phn (thng c bit n vi tn gi l ba
c l). y l dng ngn ng m my tnh s dng trong h thng cho nn khng cn
c trnh bin dch. Tuy nhin lp trnh vi ngn ng ny l ht sc kh khn v vi
nhng chng trnh ln ngy nay th iu ny l hu nh khng th.
Hp ng (Assembly): y l mt tp hp cc m gi nh thc hin mt chc nng
no . Hp ng l ngn ng lp trnh gn vi ngn ng my nht v mi dng vi iu
khin u lun c mt tp lnh hp ng nht nh. Nh sn xut cng bt buc phi
c mt trnh bin dch hp ng dnh ring cho dng vi iu khin .
Ngn ng cp cao: Hu ht cc ngn ng cp cao dnh cho cc vi iu khin u dng
li ngn ng C. Tuy nhin mi cp khc nhau ngn ng C cng chia ra nhiu
dng khc nhau. Vi PIC chng ta c th c nhng trnh bin dch ngn ng C dnh
ring nh sau:
CCSC
Mikro C
Hi-Tech C
C18, C30, C32
B trnh bin dch C18, C30, C32, l b trnh bin dch c hng Microchip thit k chuyn
dng lp trnh cho vi iu khin PIC v n c a ra khi mt dng vi iu khin PIC no
ra i. Chnh v c im ny cc trnh bin dch ny rt ph hp vi vic lp trnh cho dng vi
iu khin m n h tr. y l mt dng ngn ng thao tc trn phn cng, c th can thip vo
cp thanh ghi ca vi iu khin quy nh chc nng ca tng module cn bn trong vi iu
khin. ng thi ngn ng cng h tr cc hm tnh ton, cch khai bo, cc cu trc lnh ca
ngn ng C cn bn. iu ny gip ngi lp trnh d dng hn rt nhiu so vi vic s dng hp
ng m vn m bo hiu r c cch thc lm vic ca vi iu khin mc thanh ghi.

Bi 2 : K THUT LP TRNH C
Bi 2 bn v cc vn c bn ca lp trnh C da trn ANSI C v ng dng ca n trong b
trnh dch MPLAB - CCSC.
2.1 KHI QUT NGN NG C
2.1.1 Cc h s m
H nh phn: H s dng cc k s 0 v 1 biu din s. VD: 1101, 1001
H thp phn:H s dng cc k s t 0 n 9 biu din s. Cc con s ny
c dng cng vi du . phn cch phn thp phn v phn nguyn. Ngoi ra,
phn bit s m v s dng ngi ta cn thm du - v du + trc k s.
VD: 15; 12.96; -902.6
H thp lc phn: H s dng cc k s 0 n 9 cng cc k t A n F
biu din s.
VD: 9AF; 6BC
Cch chuyn i k s: (GV hng dn ti lp)
2.1.2 Bin, hng, mng
2.1.2.1 Bin
Bin c v nh mch mu trong chng trnh truyn d liu t hm ny sang hm khc. Mt
bin c c trng bi 2 c tnh: kiu bin v tm vc ca bin. Bng di y lit k cc kiu
bin c h tr trong C:
Bin : <kiu d liu> <tn bin> = <gi tr>;
Phn khai bo gi tr c th cn hoc khng.
Tm vc truy xut bin:
Bin ton cc:
o Bin ton cc l bin xut hin khi chng trnh thc thi, tn ti sut trong thi gian
chng trnh thc thi ch c gii phng khi chng trnh kt thc.
o Tt c cc hm trong chng trnh u c th truy xut gi tr ca bin ton cc
o Bin ton cc c khai bo u chng trnh trong phn khai bo bin
Bin a phng:

o Bin a phng l bin xut hin khi on chng trnh cha bin a phng thc
thi, gii phng khi on chng trnh kt thc.
o Ch chng trnh con, on chng trnh cha bin a phng mi c truy xut
bin
o Bin a phng c khai bo trong on chng trnh, chng trnh con
Kiu bin:
Bng 2.1 Cc kiu d liu trong C

2.1.2.2 Hng
Hng s trong C c ngha theo ng hng s ton hc. C ngha l gi tr ca hng s khng
thay i trong sut qu trnh chng trnh thc thi.Hng s lun c tm vc ton cc.
khai bo hng s thuc mt kiu d liu no ta thm t kha const vo pha trc t
kha quy nh kiu d liu.
Hng: const <kiu d liu> <tn hng> = <gi tr>;
Bt buc phi c phn khai bo gi tr.
VD: const int8 a = 10;
2.1.2.3 Mng
Khai bo mng hng s:

const<kiu d liu mng><tn mng>[<kch thc mng>] = {<gi tr cc phn t
mng>};
VD: const int8 vidu[2] = {1,2};
Lu :
Nhng phn t no cha c t gi tr s mc nh gi tr l 0
Truy xut gi tr vt qu kch thc mng s lm chng trnh chy v tn
Mng hng s thng dng lm bng tra (v d bng tra cc hm lng gic)
Khai bo bin mng:
Khai bo tng t khai bo mng hng s.Tuy nhin khng c t kha const v khng cn ci
t gi tr cho cc phn t ca mng (mc nh gi tr u s l gi tr mc nh ca kiu d liu
mng).
Mt s lu v kch thc:
Kch thc mng ph thuc vo khai bo con tr v loi VDK
PIC18F Kch thc bin mng khng gii hn. Nu khai bo con tr 8 bit th bin
mng ti a l 256 byte, nu l 16 bit th ton b khng gian b nh RAM
Mt s lu khi s dng bin, mng, hng s:
Trn s: S trn s xy ra khi khai bo kiu d liu nh hn phm vi s s dng. Lc
trnh bin dch s lm trn s theo cch vng tun hon:
VD: int8 a = 260;
Khi bin dch gi tr a c lm trn nh sau: a = 260-256 = 4
Tnh ton vi s m: Khi tnh ton vi s m bt buc ta phi khai bo kiu d liu l
s c du (mc nh l khng du) nu khng s gp kt qu tng t nh trng hp
trn s.
Chuyn kiu v p kiu
unsigned char a =8 , b=200;
Int c;
c= (int16) a * b;

on code trn ta p kiu d liu ca php nhn 2 s 8 bit thnh mt s 16 bit. Vic ny s
trnh li trn s cho php nhn, ng thi tit kim b nh, gim thi gian tnh ton (v nu khng
phi khai bo li cc bin a, b)
2.1.3 Cu trc lnh
Nu nh bin, hng, mng trong chng trnh c v nh h tun hon, ni lu chuyn mu
(d liu) trong chng trnh th cc cu trc lnh c v nh h thn kinh, l h thng iu khin
dng mu (d liu ). Mi hot ng trong chng trnh u da trn s iu khin ca cc cu
trc lnh ny.
Cu trc lnh c bn u tin cng l nguyn tc ca lp trnh C: Chng trnh s thc hin ln
lt cc lnh theo th t t trn xung di. Ngha l nu khng c s iu khin no khc th
dng lnh no ng trc s c bin dch v thc hin trc, dng no ng sau s c bin
dch v thc hin sau.
Ngoi ra gip cho ngi lp trnh d dng iu khin cc dng d liu trong chng trnh, C
cn cung cp nhng cu trc lnh nng cao (c cho trong bng 2.2)
2.1.3.1 C php
Bng 2.2 Cc cu trc lnh trong C

ng vi nhng cu trc lnh nng cao ny l nhng on s gii thut c trng ca n.
2.1.3.2 Gii thut
Lu gii thut l lu th hin dng di chuyn d liu v cc thao tc x l d liu trong
chng trnh. Nhng quy tc chung v cch th hin lu gii thut gip ngi lp trnh c th

d dng hiu v hin thc chng di dng cc dng lnh. Mt gii thut tng th c hnh thnh
da trn nhng cm gii thut con, mi cm gii thut con ny ng vi mt dng cu trc iu
khin. Sau y s trnh by nhng dng gii thut ca cc cu trc iu khin trong C:
Bng 2.3 Lu gii thut ca cc cu trc lnh trong C
Cu trc Gii thut
If

If else

Switchcase
k = k1?
Start
Cng vic 1
Stop
Sai
ng
k = k2?
k = k(n)?
Cng vic 2
Cng vic n
.....

While

Dowhile

For
k ch s?
Start
Stop
Sai
ng
Ch s = <gt u>
Thc hin cng vic
Cp nht ch s

2.1.4 Ton t
2.1.4.1 Ton t
Bng 2.4 Ton t trong C
STT
Loi
ton t
Tn
ton t
K
hiu
Chc nng
1
Ton t
tnh
ton s
Nhn *
Nhn 2 s
2
Chia /
Chia 2 s
3
Cng +
Cng 2 s
4
Tr -
Tr 2 s
5
Chia
ly d
%
Chia ly d 2 s
nguyn
6
Ton t
bit
Not bit ~
o logic tng bit
7
Dch
tri
<<
Dch sang tri mt s
bit
8
Dch
phi
>>
Dch sang phi mt s
bit
9
AND &
V tng bit
10
XOR ^
XOR tng bit
11
OR |
OR tng bit
12 Ton t
logic
AND &&
AND logic 2 gi tr
logic
13
OR ||
OR logic 2 gi tr logic
14
Ton t
quan
h
So snh
bng
==
So sng bng 2 s
15

So snh
khc
!=
So snh khc 2 s
16
SS b <
SS b hn 2 s

hn
17

SS b
hn,
bng
<=
SS b hn hoc bng 2
s
18

SS ln
hn
>
SS ln hn 2 s
19

SS ln
hn,
bng
>=
SS ln hn hoc bng
2 s
2.1.4.2 Mc u tin ca cc ton t
Bng 2.5 Bng so snh mc u tin ca cc ton t:
STT Tn Mc Ton t Nhm
1 Primary 1(high) () . [] Left to Right
2 Unary 2 ! ~ -(type) * & ++ --sizeof Right to Left
3 Binary 3
/ * % Left to Right
4 Arithmetic 4
+ - Left to Right
5 Shift 5
>> << Left to Right
6 Relational 6
< <= > >= Left to Right
7 Equality 7
== != Left to Right
8 Bitwise 8
& Left to Right
9 Bitwise 9
^ Left to Right
10 Bitwise 10
| Left to Right
11 Logical 11
&& Left to Right
12 Logical 12
|| Left to Right
13 Conditional 13
? : Right to Left

14 Assigment 14 (low)
= += -= /= *= %= <= >= &= |= ^= Left to Right
2.1.5 Hm
2.1.5.1 C php hm
Mt hm C phi bao gm mt kiu tr v (kiu tr v void nu khng c gi tr tr v), mt
tn xc nh, mt danh sch cc tham s trong ngoc n (nu danh sch ny khng c tham s
no th ghi l void bn trong du ngoc), sau l khi cc cu lnh (hay khi m) v/hay cc cu
lnh return. (Nu kiu tr v l void th mnh ny khng bt buc phi c. Ngc li, cng
khng bt buc ch c mt cu lnh return m ty theo k thut, ngi lp trnh c th dn dng
m sao cho mi hng ch nhnh u c tr v ng kiu.)
<kiu_tr_v> tn_hm(<danh sch tham s>)
{
<cc_cu_lnh>
return <bin (hay gi tr) c kiu l kiu_tr_v>;
}
Trong , <danh sch tham s> ca N bin th c khai bo nh l kiu d liu v tch ri
nhau bi du phy ,
Ton b danh sch ny c t trong ngoc n ngay sau tn_hm.
- Th d:
Vit hm add tnh tng hai s c kiu integer, hm abs tnh tr tuyt i ca s c kiu integer,
v chng trnh (hm main) hin th hai dng 1 + 1 = 2 v absolute value of -2 is
2.1.5.2 Cc kiu truy xut bin trong hm
Khi thc hin mt li gi hm ta phi cung cp y thng tin ph hp vi hm hm
c th thc hin
VD: void test(int8 n)
{}
test(x);

y n c gi l tham s hnh thc, ch mang tnh hnh thc.x l tham s thc s. Vic gi x
vo cho hm test thay th cho n c gi l truyn tham s. Vi nhng hm khng c tham s th
khng phi truyn. C 3 loi truyn tham s:
Truyn tham tr:
Gi tr ca tham s thc s c gi n cho hm. Khi thc hin truyn tham s theo kiu ny
th hm c gi ch tc ng ln bn sao ca tham s gc, do vy n ch lm thay i gi tr ca
bn sao m khng nh hng n tham s gc.
VD:
void test(int x)
{
x=x+10;
}
void main()
{
int n=5;
test(n);
cout<<"Gia tri n ="<<n<<endl;
}
Kt qu sau khi thc hin chng trnh trn: Gia tri n = 5. y n vn gi nguyn gi tr ban
u mc d trong test c cu lnh nhm lm thay i n.
Truyn tham tr l c cu mc nh trong truyn tham s.
Truyn tham kho (tham chiu)
V bn cht, truyn tham chiu l ta gi a ch ca tham s ti hm c gi. Hm c gi s
tc ng ln vng nh c a ch m n nhn c(chnh l tham s gc). Bi vy mi thay i m
n gy ra u lm nh hng n tham s gc.
V d:
void test(int &x)
{
x=x+10;
}
void main()
{
int n=5;
test(n);
cout<<"Gia tri n ="<<n<<endl;
}

Kt qu sau khi thc hin chng trnh trn: Gia tri n = 15. y n b thay i.Vic gi a
ch (tham chiu) ca tham s n hm c gi, ngi ta gi l truyn tham chiu. Vi hm c
c ch truyn tham chiu th n khng c vng nh ring cho tham s , khi thc hin li gi
hm, n s gn cho tham s mt b danh (alias) - chnh l tn ca tham s hnh thc v t do tc
ng ln vng nh ca tham s c gi ti.
Truyn con tr
a ch vng nh ca mt bin no l mt s, do ta c th khai bo mt bin khc lu
tr gi tr a ch ny. Con tr l bin nh th.
Cch truyn con tr cng tng t nh cch truyn mt tham chiu, tuy nhin cn phn bit con
tr v tham chiu nhng im c bn sau:
- C con tr null ch khng c tham chiu null
- Con tr c th tr n nhiu i tng, trong khi tham chiu ch c th ch n tham chiu
c to cho n.
Tham kho:http://www.cplusplus.com/doc/tutorial/pointers/
2.2 NHNG VN LIN QUAN KHI S DNG C CHO LP TRNH PIC
2.2.1 C Complier v MPLAB
2.2.2 M phng chng trnh bng Protus
(GV s hng dn trc tip cch s dng cc phn mm trn lp)
2.2.3 Cu trc v thc thi chng trnh
//Phn cc ch th tin x l
#include < 16F877 .h >
#include < delay.h >
. . . .
//Phn khai bo bin, hng, mng ton cc
Int a, b;
. . . .
// Phn khai bo hm Prototype
Void ADC_Processing() ;
Void timer_INT();

//Chng trnh chnh
Main()

{. . . }
//Chng trnh con
Void ADC_Processing()
{ . . . }
//Chng trnh x l ngt
#Interrupts
Void timer_INT()
{. . . }

Bi 3 : PRE-PROCESSOR DIRECTIVE
Bi 3 s gii thiu s lc v kin trc phn cng ca vi iu khin PIC. Sau bi ny s gii
thiu cc ch th tin x l ng lu ci t phn cng trong CCSC, bao gm cc ch th khai
bo processor, b dao ng, ch th define
3.1 TNG TH KIN TRC PHN CNG VI IU KHIN
3.1.1 PIC vs My tnh
PIC l vit tt ca Programable Intelligent Computer, c th tm dch l my tnh thng
minh kh trnh do hng Genenral Instrument t tn cho vi iu khin u tin ca h: PIC1650
c thit k dng lm cc thit b ngoi vi cho vi iu khin CP1600. Vi iu khin ny sau
c nghin cu pht trin thm v t hinh thnh nn dng vi iu khin PIC ngy nay.
Sau y, ta phn tch cu trc c bn ca mt b VK PIC. (Xt VK 18F4620)
T chc phn cng ca PIC c thit k theo kin trc Havard. Nh trong hnh trn ta c th
nhn thy phn b nh d liu v b nh chng trnh l hon ton c lp v c truy xut bi 2
BUS khc nhau: Data BUS 8 bit v Instruction BUS 16 bit. V tnh cht c lp vi cu trc d
liu nn tp lnh ca vi iu khin thuc cu trc Havard s t lnh hn, ngn hn, n gin hn
p ng yu cu m ha lnh bng mt s lng bit nht nh. Vi iu khin c t chc theo
kin trc Havard cn c gi l vi iu khin RISC (Reduced Instruction Set Computer) hay vi
iu khin c tp lnh rt gn. Vi iu khin c thit k theo kin trc Von-Neuman cn c
gi l vi iu khin CISC (Complex Instruction Set Computer) hay vi iu khin c tp lnh phc
tp v lnh ca n khng phi l mt s c nh m lun l bi s ca 8 bit (1 byte).
3.1.2 Cc thnh phn ca PIC
Da vo s khi trn ta c th thy cc phn cu to nn vi iu khin PIC hon ton ph
hp vi mt m hnh my tnh c bn.
Phn b nh (khi A): bao gm b nh chng trnh v b nh d liu.
Phn to xung (khi B): bao gm b to xung v cc chc nng i km vi n.
Phn tnh ton (cn gi l b ALU khi C): m nhn vic tnh ton ca VK.
Phn I/O (khi D): bao gm cc port input v output.
Phn ngoi vi (khi E): qun l cc chc nng tng tc ngoi vi trong VK.


Hnh 3.1 - S khi tng th ca PIC18F4620
(con s c ghi trn mi mi tn chnh l s bits d liu trong vic giao tip gia cc khi)
3.1.3 Hot ng thc thi lnh trong CPU
Hot ng thc thi lnh ca CPU trong PIC c thc hin theo c ch Pipelinie. Trong mt
chu k lnh ny CPU va thc hin lnh trc va c lnh tip theo. Do mi chu k lnh cn
4 xung clock t b dao ng (4 chu k my). Vi c ch ny ta c th xem mi lnh ca PIC ch
c thc hin trong mt chu k lnh tr nhng lnh lm thay i gi tr ca Program counter
(nh lnh r nhnh, lnh CALL). Vi c ch ny c th tn dng ti a hiu nng ca tt c cc
thnh phn trong CPU tham gia vo x l lnh.


Hnh 3.2 - Pipelining 4 xung clock cho mt chu k lnh
Trong bi ny chng s xem xt hai khi chnh l khi b nh v khi to xung.
3.2 B NH
Ti liu tham kho: Chng 5,6,7 datasheet 18F4620 18F2550
3.2.1 C bn v t chc b nh ca VK PIC
T chc b nh vi iu khin PIC c chia lm 3 thnh phn chnh:
Program Memory (hay cn gi l Flash Memory b nh Flash, b nh lu tr)
Data Memory (hay cn c tn gi l Data RAM Memory)
Data EEPROM Memory
Ngoi ra cn c cc thnh phn ph khc b tr cho qu trnh hot ng ca mt b VK.
3.2.2 T chc b nh chng trnh (Program Memory)
B nh chng trnh trong PIC l mt b nh Flash, dng lu tr chng trnh. Tuy nhin,
n khng ging b nh chng trnh bnh thng l n c th c c, ghi, xa mt cch bnh
thng. Thm vo , thao tc ghi, xa c th thc hin trn 64 byte ti cng mt thi im. iu
ny gii thch v sao ta c th np, xa chng trnh trn vi iu khin nhiu ln.
3.2.2.1 Cc thnh phn b nh chng trnh
Nh chng ta c th thy b nh chng trnh c chia lm 3 phn chnh:

Program Counter:
Phn ny l mt thanh ghi 21 bits (c chia thnh 3 thanh ghi 8 bit, tn gi l thanh ghi PC)
cha gi tr a ch ca cu lnh hin thi trong Program Memory.
Stack Memory:
y l b nh vi 31 (mi c 21 bits) nhm ghi li a ch vo ra ca cc chng trnh con.
Stack Memory c thc hin da trn c ch VO SAU RA TRC. Thanh ghi iu khin
stack l STKPTR. Bnh thng bit trng thi STKUNF th hin stack cn trng s tch cc. Nu
PC a vo stack 31 ln a ch m khng ly ra ln no th bit STKFUL s c a ln 1 bo
stack y. Bit ny ch c clear bng phn mm hoc bng c ch POR. Hot ng ca POR
trn stack ph thuc vo bit STVREN (Stack Overflow Reset Enable). Nu bit ny c set th
POR s t ng reset h thng khi stack trn v h thng c th hot ng li bnh thng trng
thi u. Ngc li, nu bit ny b clear th trong trng hp trn stack h thng s b treo v bt
buc phi reset nng. y l mt ch quan trng khi lp trnh vi stack.
Memory Space:
y l phn cha ton b ni dung ca chng trnh iu khin (c m ha ra dng m hex).

Hnh 3.3 - T chc b nh chng trnh ca VK PIC


Hnh 3.4 - Stack memory
3.2.2.2 Cu trc lnh trong b nh chng trnh
Nh ni trc, c ch x l lnh trong CPU l c ch Pipeline. Chnh v th lnh trong b
nh chng trnh cng phi c cu trc ph hp vi c ch ny. Mi chu k thc thi lnh (chu k
lnh TCY) ca h thng bao gm 4 chu k xung clock (chu k my) Q1, Q2, Q3, Q4. Gin
xung c cho trong hnh sau:

Hnh 3.5 - Gin xung clock cp cho CPU
T gin ta c th thy:
- Q1: Tng con tr PC c lnh
- Q2: c d liu t Data memory
- Q3: x l lnh, d liu
- Q4: Ghi d liu vo Data Memory

3.2.3 T chc b nh d liu (Data Memory)
3.2.3.1 T chc RAM
Data Memory trong PIC l SRAM. Mi nh trong RAM c nh a ch bng 12 bit, do
dung lng ti a ca RAM l 4096 nh. Ton b RAM c chia thnh 16 bank, mi bank
cha 256 nh. PIC18F l loi PIC 8 bit nn mi nh tng ng l 1 byte. 16 bank ny c
chia thnh cc phn ring bit sau:
Access Ram:
nh a ch ca tng nh bn trong RAM, CPU dng ti 12 bit a ch. Trong 12 bit , 8
bit nh a ch byte trong tng bank, v 4 bit nh a ch bank. 4 bit ny l mt phn ca
thanh ghi chc nng BSR (Bank Select Register). Tuy nhin, theo c ch ny, mi ln truy xut b
nh c thay i a ch th thanh ghi ny li c cu hnh li mt ln. iu ny l khng kh thi.
Do ngi ta thm vo mt phn b nh goi l Access Bank. y l ni cha bn a ch ca
ton b b nh, do khi truy xut khng cn phi cu hnh li BSR. Mt phn ca b nh ny
cha nhng thanh ghi chc nng c bit. y l phn b nh truy xut nhanh, tc nhng d liu
no chng ta thng hay truy xut nn a vo phn RAM ny.
GPR (General Purpose Register): (thanh ghi dng chung) y ni lu tr d liu ca
chng trnh.
SFR (Special Function Register): thanh ghi c bit-vng nh ny dng lu tr
nhng thanh ghi c bit (dng iu khin cc chc nng ca VK) tham kho bng
5.1
3.2.3.2 C ch nh a ch trong RAM
B nh chng trnh c th c nh a ch theo nhiu cch v ph thuc vo dng cu trc
lnh. i vi mt vi lnh th vic nh a ch ny l c nh. Nhng cu lnh khc c th s dng
3 c ch nh a ch: Inherent and Literal, Direct, Indirect. (tham kho thm datasheet 18f4620
chng 5, phn 5.4)
Mt a ch Data bao gm hai thnh phn:
Opcode: hay cn gi l s th t ngn (mi ngn 8 bits, 16 bits ty theo dng
VK)
BSR: hay cn gi l s th t t. Mi t cha 256 ngn.

3.2.4 Data EEPROM Memory:
Data EEPROM (Electric Eraseable Programmable ROM) l dng b nh lu tr d liu khng
bay hi (khng mt d liu khi mt ngun cp). Chnh v th b nh ny c dng lu tr
nhng d liu lu di ca ngi dng trn PIC. truy xut n s dng phng thc nh a ch
gin tip thng qua cc thanh ghi SFR iu khin tng ng. Chnh v vy vic cp pht b nh
trn EEPROM l hon ton do ngi dng lm ch. C 5 thanh ghi lin quan ti vic iu khin
c, ghi b nh ny: EECON1, EECON2, EEDATA, EEADR, EEADRH. Tng tc vi phn b
nh ny s c trnh by r hn bi cui ca chng trnh, bi cc phng php lu tr d liu.
3.3 B DAO NG
Ti liu tham kho: Chng 2 - datasheet PIC18F4620
3.3.1 Vai tr ca b dao ng
B dao ng (hay cn c tn gi khc l b to xung) l phn to xung nhp hot ng chnh
cho VK. B to dao ng nhm to ra cc h xung c chu k c nh, ng b ha d liu ca
VK, hay ni cch khc hn, thi gian chu k ca h xung dao ng chnh l n v c bn o
m thi gian hot ng ca cc module trong VK.
3.3.2 Cu to b dao ng
Ngun xung
B iu ch
xung
Xung
ra

Hnh 3.6 - S khi b dao ng
B dao ng bao gm 2 thnh phn chnh: ngun xung v b iu ch xung (hnh 3.4).
Ngun xung l thit b to xung th c tn s xc nh cp cho vi iu khin. Ngun
xung c th nm bn trong hoc bn ngoi vi iu khin. Nu nm trong ta gi l
ngun xung ni, nm ngoi ta gi l ngun xung ngoi.
B iu ch xung l thit b c tch hp sn bn trong vi iu khin. B iu ch
xung c nhim v nhn xung u vo t ngun xung v iu ch ra xung ng ra ph
hp cung cp cho CPU v cc thit b ngoi vi. Thng s c iu ch l tn s
xung. B iu ch xung c th lp trnh c, ngha l vi cng mt ngun xung chng
ta c th iu ch ra nhng xung c tn s khc nhau cp cho CPU bng phn

mm. lm vic ny chng ta cn phi can thip vo cc thanh ghi h thng ca vi
iu khin.
3.3.2.2 Ngun xung
to xung cho h thng vi iu khin c 2 cch c bn: dng thch anh v dng mch RC.
Ngun xung bng thch anh:

Hnh 3.7 - S kt ni ngun xung bng thch anh
y l ngun xung n gin, d hiu v d s dng nht. Tn hiu dao ng vo VK theo ng
OSC1 v ra theo ng OCS2. T C1 v C1 ng vai tr nh b n nh xung nhp. Gi tr C1 v C2
thay i theo tn s thch anh (c th tra bng 2.1, 2.2 datasheet).
Ch :
Tng t C1, C2 gip n nh xung dao ng ca thch anh, tuy nhin cng lm tng
thi gian khi ng ca h thng (Power Up Delay)
in tr ni tip RS c th cn thit trnh trng hp overdriving ca thch anh.
(overdriving: hot ng qu tn s cho php).
Ngun xung bng mch RC:

Hnh 3.8 - S kt ni b to xung bng mch RC
Ngun xung ny da vo c tnh dao ng c bn ca mch RC. B dao ng loi ny tng
i kh s dng, thch hp vi nhng ng dng cho php thay i tn s hot ng ca h thng.
Ngun xung ni:
Trong mi VK u tn ti mt ngun xung ni, tc l chng ta c th s khng cn dng
ngun xung bn ngoi m VK vn hot ng bnh thng.
Khuyt im ca ngun xung ni l tn s hot ng thp hn so vi ngun xung gn ngoi, v
t c s la chn hn. Nhng b li chnh xc l tin cy cao hn, tiu tn t nng lng hn.
y l ngun xung ti u nng lng cho vi iu khin PIC.
Ngoi nhng ngun xung trn ta cng c th to ra mt ngun dao ng phc tp hn nh my
tao dao ng hoc mch to dao ng (IC555 chng hn) cp cho vi iu khin (hnh 3.7). ng
vi mi dng ngun xung, b iu ch xung phi c ci t cc ch tng ng (iu ny s
c ni r hn trong phn tip theo).

Hnh 3.9 - Ngun xung bn ngoi
3.3.2.3 B iu ch xung PIC18F4620
Cu to v cc ch hot ng:


Hnh 3.10 - B dao ng PIC18F4620

Hnh 3.8 m t b iu ch xung bn trong vi iu khin PIC18F4620. Nhng c nh du
pha bn tri l cc ng vo ca cc ngun xung, bn phi l xung ng ra cung cp cho CPU. B
iu ch xung l phn cn li gia.
Mi con ng i t ng vo ti ng ra th hin mt s ci t (iu ch) khc nhau. Cng vic
ca ngi lp trnh l phi tnh ton, la chn mt con ng thch hp nht v ra lnh cho vi iu
khin bit rng h chn con ng . la chn con ng ny chng ta cn xc nh r
ngun xung l g v ch hot ng ca b iu ch dao ng l g. ci t ch hot ng
cho b iu ch xung trong CCSC ta dng cc ch th tin x l chuyn dng c trnh by trong
phn 3.4.
3.3.2.4 Cc thanh ghi h thng
Thanh ghi h thng l ni ci t tt c cc chc nng ban u ca h thng. Cc ch th tin x
l c gii thiu trong phn 3.4 thc cht l nhng lnh tng tc vi thanh ghi h thng ci
t cc gi tr ca thanh ghi ny. Cc thanh ghi h thng c th tham kho trong phn Special
Features of CPU trong Datasheet ca cc dng vi iu khin PIC.

Bng 3.1 Cc thanh ghi h thng ca PIC18F4620 (datasheet PIC18F4620 trg 251)

3.3.2.5 Thi gian khi ng ca h thng (Power Up Delay)
Thi gian khi ng ca h thng l thi gian m thit b c gi ch Reset m bo
ngun cung cp cho h thng v cc ch ci t phn cng ca h thng n nh trc khi CPU
tin hnh truy xut b nh chng trnh. Thi gian ny c iu khin bi 2 timer chuyn dng:
PWRT (Power up timer) timer ci t thi gian c nh khi ng h thng lin quan ti s
n nh in p trn cc chn ngun; OST (Oscilator set timer) timer ci t thi gian khi ng
ca b dao ng, ph thuc vo ch hot ng cng nh gi tr ca t C1, C2 ca b dao ng
lin quan ti s n nh xung cp cho CPU v cc ch c ci t cc thanh ghi h thng
(khong 2ms vo ch HS, HSPLL).
3.4 CC CH TH TIN X L TRONG CCSC
3.4.1 Nhng tin x l c bn:
#include:
Tin x l ny dng thm mt file mi vo chng trnh.
C php: #include <filename>
#include filename

Trong : filename l mt tn file hp l trong my tnh. N c th bao gm ng dn trc
tip. V d:
#include <C:\INCLUDES\COMLIB\MYRS232.C>
#define:
Tin x l #define dng nh ngha mt i tng trong chng trnh.
C php: #define <name> <object>
Trong : <name> l tn nh danh mi ca i tng (tn ny c dng trong chng trnh),
<object> l i tng cn nh ngha.
V d:
#define mainRelayControlPin PIN_D0
Trong v d trn, ngi dng mun nh ngha chn D0 trn PORTD l chn iu khin Relay
chnh ca h thng. Sau khi dng tin x l ny, trong chng trnh i tng
mainRelayControlPin s c hiu l PIN_D0.
#device
y l tin x l khai bo ch la chn ca b x l (chip option)
C php: #device <chip options>
C th cng lc chn nhiu option khc nhau, mi option cch nhau bi du ,.
Bng 3.2 Cc option v chip trong CCS
STT Loi Option Tn Options ngha
1
Con tr
*5 S dng con tr 5 bit
2 *8 S dng con tr 8 bit
3 *16 S dng con tr 16 bit
4 ADC
ADC=x
S dng ADC x bit
5 Ngt
HIGH_INTS=TRUE
Cho php u tin trong ngt
6 Debug
ICD=TRUE
Cho php debug bng phn cng

#FUSES:
y l tin x l khai bo phn cng s dng cho h thng. Bao gm b dao ng, cc
config thuc v thanh nghi h thng nh Watchdog, ch np, ch Reset,
C php
#FUSES <Options>
Trong CCSC c cc Options sau:
Bng 3.3 Cc la chn ca tin x l #FUSES
1
B dao
ng
LP Khai bo loi thch anh ngoi in p thp
2 XT Khai bo s dng thch anh ngoi c F < 4MHz
3 HS Khai bo s dng thch anh ngoi c F > 4MHz
4 RC Khai bo s dng b dao ng RC
5 Watchdog WDT/NOWDT C s dng WDT/khng s dng WDT
6
Ch bo
v code
PROTECT/
NOPROTECT
C s dng ch bo v c ngc code np/
khng s dng ch bo v c ngc code np
7 Power up PUT/NOPUT C s dng Power up Timer (PUT)/ Khng s dng PUT
8 Power down
reset detect
BROWNOUT/
NOBROWNOUT
C s dng ch reset khi power down/ Khng s
dng ch reset khi Power down
Mt vi ch cn ti cp , v d nh PROTECT cn ch r code c bo v cp my
c 15 cp bo v, tng ng vi cc gi tr 0 ~ 15 (mc nh code s c bo v cp 15, 4
block u c bo v)
#USE
C php: #USE <Options>
y l ch th tin x l khai bo tn s thch anh, cc ngoi vi s dng trong h
thng. C th cho bng sau:

Bng 3.4 Cc la chn ca tin x l #USE
1
Tn s b
dao ng
Delay(clock = <f>) Khai bo s dng thch anh c tn s f, tn s ny
dng s dng cho cc lnh delay_us(), delay_ms().
2
Delay(clock = <f>,
restart_wdt)
Khi ng li WDT sau mi lnh delay_us(),
delay_ms().
3
delay (clock=<f>,
type)
Type - loi b dao ng s dng: oscillator hay
internal
4
delay(clock=<f1>,
type=<f2>)
Clock s dng tn s f1, h thng s dng tn s f2
5 Port FAST_IO S dng ch IO nhanh
6
Cc ngoi vi
I2C S dng I2C
7 RS232 S dng RS232
8 SPI S dng SPI
V d:
#use delay(clock=20M, oscillator)
#use delay(internal=8M)
#pragma
C php: #pragma <cmd>
y l tin x l c bn v mnh nht trong CCSC, c th dng ch th tin x l ny
thay th cho tt c cc ch th tin x l trc .
V d:
#pragma device PIC16C54
3.5 BI TP
Vit on chng trnh config cho PIC18f4550 vi cc yu cu sau:
Thch anh s dng 20MHz
Cp xung 48MHz cho CPU

Bi 4 : IO PORT OUTPUT
Bi 4 gii thiu v module u tin trong vi iu khin IO PORT. y l phn quan trng bc
nht trong vi iu khin v tt c cc ng dng u cn dng n. Hc vin cn nm r phn cng
v cch tng tc phn cng, t p dng vo cc ng dng c th c hng dn trong bi.
4.1 GII THIU PHN CNG
Ti liu tham kho: Chng I/O Port datasheet 18F4550 /18F4431
4.1.1 Cc PORT trong PIC
Trong cc dng PIC18F, PIC16F loi 40 chn c tng cng 5 PORT c nh tn theo th t
bng ch ci: A, B, C, D, E
4.1.1.1 PORT A
PORTA c s chung chn vi mt s chc nng khc nh ADC v Oscillator. Khi s dng
PORTA ti chn Analog cn thit phi t gi tr cho thanh ghi ADCON1 l bit tng ng ang
ch analog hay digital, vi chn RA7 v RA6 do c ni vi chn Oscillator nn chn ny ch
c s dng khi khng khng t ch oscillator.
4.1.1.2 PORT B
PORTB vi 8 chn giao tip bn ngoi, ngoi chc nng I/O n cn l ni c cc chn ngt
ngoi v ngt thay i trng thi. Ch khi t ch ngt th cc chn I/O phi ch Input.
Mt s chn Port B l c i cng chc nng Analog nn khi s dng phi khai bo chn ny l
analog hay digital trong thanh ghi ADCON1. PORTB c th c ko ln ngun yu bng cch
ci t bit RBPU trong thanh ghi INTCON2.
4.1.1.3 PORT C
Vi 8 chn giao tip bn ngoi, PORT C l ng ra Digital thun ty. Ngoi ra PORTC cn l
ng ra ca nhiu module giao tip trong PIC, c th nh RS232, SPI, I2C, USB,
4.1.1.4 PORT D v PORT E
PORTD v PORTE l cc PORT giao tip I/O thun ty. Port D v E c thm chc nng lm
cng giao tip song song t. Hot ng ch ny xem chi tit trong Datasheet.

4.2 TP LNH TNG TC PORT TRONG CCSC
4.2.1 Cc lnh ci t ch
Set_tris_x(value) ;
X - tn port : A, B, C, D, E
Value : gi tr 8bit ci t cho thanh ghi TRIS ca PORTX
Lnh ny tng tc ng vo thanh ghi TRIS ca PORTX, ci t gi tr cho thanh ghi ny.
ng vi gi tr 1 trn bit tng ng th chn tng ng trn PORTX s c chc nng input, v
ngc li gi tr 0 quy nh chn tng ng chc nng output.
4.2.2 Cc lnh input
input_X()
Vi: X l tn PORT (A, B, C, D, E)
Hm dng c vo trng thi logic ca cc chn trn PORT X.
input(pin)
Vi pin l cc k hiu chn (trn mt PORT) c nh ngha trong header file. Hm dng
c vo trng thi logic ca chn tng ng.
4.2.3 Cc lnh output
Output_high(pin)
Hm xut ra mc cao trn chn pin. pin c nh ngha trong header file
Output_low(pin)
Hm xut ra mc thp trn chn pin. pin c nh ngha trong header file
Output_float(pin)
Hm th ni trng thi logic trn chn pin. pin c nh ngha trong header file
Output_x()
Vi: X l tn PORT (A, B, C, D, E)
Hm c tc dng xut ra PORT c tn X mt gi tr 8 bit. Gi tr ny s quy nh cc mc in
p trn cc chn ca PORT .

4.3 BI TP - CC NG DNG CA IO PORT-PHN OUTPUT
Ti liu tham kho: datasheet 7447, datasheet 74595
4.3.1.1 ng dng chp tt LED:
Yu cu: GV hng dn chp tt LED theo ch k nht nh.
S mch: nh km ti liu (file)
4.3.1.2 ng dng xut LED 7 on:
Gii thiu chung:
LED 7 on thc cht l bao gm nhiu LED n c sp xp theo hnh dng cc con s. 8
LED n ny c k hiu t a n f (hnh 4.1a) v c kt ni nh trn hnh 4.1b. C hai dng
chn chung cho Led 7 on.
Chn chung Anode(+)
Chn chung Cathode(-)

(a) (b)
Hnh 4.1 - Cu to LED 7 on
hin th mt gi tr ra LED 7 on ta phi cp cc mc in p tng ng vo cc chn t a
ti f iu khin cc con LED n tng ng bn trong. Gi tr nh phn ny c gi l m ca
LED 7 on. T cu to phn cng ca LED 7 on nn chng ta s c 2 bng gii m khc nhau
cho cc tn hiu u vo:

Bng 4.1 Bng m dnh cho LED 7 on Anode chung

Hin th nhiu LED 7 on
R rng, hin th mt LED 7 on ta cn 8 chn cp m cho 8 LED bn trong. Trong thc
t, cc LED 7 on thng c s dng theo t hp vi nhau hin th cc s thp phn, ch t
A ti F. iu ny i hi phi hin th nhiu LED 7 on trong mt h thng. V r rng, nu s
chn iu khin LED l mt bi s ca 8 (mi LED mt 8 chn) l khng kh thi. Gii quyt cho
vn ny ta xt s khi mch nh hnh 4.2.
Phng php qut l phng php tn dng s lu nh trong mt ngi, bng cch s dng cc
hm delays trong hin th. Trong mt ln qut, chng trnh ch hin th mt LED 7 on, nhng
do s dng tn s qut cao (>24Hz) kch/tt chn ngun ca LED 7 on nn mt ngi b lm
tng l cc LED7 on c hin th cng lc. B iu khin cp ngun c chc nng nhn lnh
t CPU v cho php ti mt thi im nht nh LED no c sng.
Phng php nh trn c gi l phng php qut. y l phng php c bn nht hin
th LED 7 on. Ngoi ra cn c nhng phng php khc vi s h tr ca cc IC s nh: 7447,
74595

Bng 4.2 Bng m dnh cho LED 7 on Cathode chung

LED
7SEG
LED
7SEG
LED
7SEG
LED
7SEG
B C P M HIN TH
NGUN DC
B I U KHIN C P NGUN
CPU

Hnh 4.2 - Nguyn l hin th nhiu LED 7 on
4.4 BI TP V NH:
Hin th ma trn LED 4x4.

4.5 PH LC CHUN LOGIC NG RA CA IO PORT
ch output mc in p s c a ra ng ra I/O pin, ng ra s c a ra bng mt
trong hai mc logic 1 hoc logic 0. Gi tr in p ca ng ra c cho trong bng sau:

Dng in ti a cho php ca mt ng ra l 25mA.
Tng dng in ti a cho Port l 200mA.

Bi 5 : NGT (INTERRUPTS)
5.1 NH NGHA NGT
Ngt (interrupt) l qu trnh tm thi dng chng trnh chnh, thc thi mt chng trnh
khc, chng trnh ny cn c gi l chng trnh thc thi ngt. Hot ng ngt gip h thng
ca chng ta c t tt hn cc c tnh thi gian thc.
5.2 PHN LOI NGT
Ngt thng c chia thnh hai loi chnh sau y:
Ngt cng: L loi ngt c chnh h thng chng ta gi bng m lnh m khng ph
thuc vo cc nhn t bn ngoi.
Ngt mm: L loi ngt c sinh ra do cc nhn t bn ngoi tc ng vo (hu ht
tt c cc loi ngt chng ta hc trong kha hc u l ngt mm).
Cc loi ngt trong h thng:

Hnh 5.1 - S logic ca ngt trong PIC 18F4550

5.3 HOT NG CA NGT
Qu trnh hot ng ca ngt c tm tt thng qua s sau:

Hnh 5.2 - Quy trnh hot ng ca ngt trong VK
5.4 TNG TC VI NGT
Trong khun kh bi hc chng ta s c dp tng tc vi 2 loi ngt:
Ngt ngoi: Loi ngt ny c kch thch khi c s thay i trng thi ca cc chn
INTx.
Ngt RB (ngt PortB): Loi ngt ny c kch hot khi c s thay i trng thi bt
k ca mt trong cc chn R4 R7.
C 2 loi ngt ny c xp vo loi ngt External, thi gian t khi xut hin ngt n khi
chng trnh ngt hot ng c th t 3 ti 4 chu k lnh.
5.4.1 Quy trnh khai bo ngt:
tng tc vi ngt ta phi quan tm ti 3 vn sau :
Trong chng trnh chnh
- Khai bo s dng ngt (loi ngt c chn)

- Khai bo kch hot ngt ton cc
Trong chng trnh ngt
X l ngt
Reset c ngt
5.4.2 Cc hm tng tc vi ngt trong CCSC
5.4.2.1 Cc hm tng tc vi ngt
disable_interrupts(level); Disable ngt tng ng
Enable_interrupts (level); Kch hot ngt tng ng
Clear_interrupts(level ); Xa c ngt tng ng
ext_int_edge(source, edge); ci t cnh ngt cho ngt ngoi INT, trong
Source : l cc ngun ngt ngoi c cc gi tr l 0, 1, 2,
edge: khai bo loi cnh xung bo ngt, c cc gi tr: L_TO_H ; H_TO_L
Cc cp ngt level :
Bng 5.1 Cc cp ngt (level)
STT Tn Level ngha
1 INT_AD Analog to digital conversion complete
2 INT_ADOF Analog to digital conversion timeout
3 INT_BUSCOL Bus collision
4 INT_BUTTON Pushbutton
5 INT_CANERR An error has occurred in the CAN module
6 INT_CANIRX An invalid message has occurred on the CAN bus
7 INT_CANRX0 CAN Receive buffer 0 has received a new message
8 INT_CANRX1 CAN Receive buffer 1 has received a new message
9 INT_CANTX0 CAN Transmit buffer 0 has completed transmission
12 INT_CANWAKE Bus Activity wake-up has occurred on the CAN bus
13 INT_CCP1 Capture or Compare on unit 1
18 INT_COMP Comparator detect
19 INT_COMP1 Comparator 1 detect
20 INT_COMP2 Comparator 2 detect
21 INT_CR Cryptographic activity complete
22 INT_EEPROM Write complete

23 INT_EXT External interrupt
24 INT_EXT1 External interrupt #1
27 INT_I2C I2C interrupt (only on 14000)
28 INT_IC1 Input Capture #1
31 INT_LCD LCD activity
32 INT_LOWVOLT Low voltage detected
33 INT_LVD Low voltage detected
34 INT_OSC_FAIL System oscillator failed
35 INT_OSCF System oscillator failed
36 INT_PSP Parallel Slave Port data in
37 INT_PWMTB PWM Time Base
38 INT_RA Port A any change on A0_A5
39 INT_RB Port B any change on B4-B7
40 INT_RC Port C any change on C4-C7
41 INT_RDA RS232 receive data available
42 INT_RDA0 RS232 receive data available in buffer 0
45 INT_RTCC Timer 0 (RTCC) overflow
46 INT_SPP Streaming Parallel Port Read/Write
47 INT_SSP SPI or I2C activity
48 INT_SSP2 SPI or I2C activity for Port 2
49 INT_TBE RS232 transmit buffer empty
50 INT_TBE0 RS232 transmit buffer 0 empty
53 INT_TIMER0 Timer 0 (RTCC) overflow
54 INT_TIMER1 Timer 1 overflow
59 INT_USB Universal Serial Bus activity
5.4.2.2 Cc ch th khai bo chng trnh ngt ngt
khai bo chng trnh ngt ta thm ch th # vo trc tn ca cc cp ngt
C php: #level

Trong cc level c cho v c ngha nh bng 5.1

5.4.2.3 Mu chng trnh s dng ngt
// Khai bo hm ngt
Void InterruptFunc();
Void main()
{
//Kch hot ngt ton cc
//Kch hot level ngt tng ng
While(1)
{
// User code
}
}
// vng khai bo hm ngt
# level
Void InterruptFunc()
{
// code x l ngt
// Reset c ngt
}
5.5 BI TP
S dng PIC 18F4620 c s ln nhn phm hin th ra LED 7 on(s dng ngt ngoi)

Bi 6 : IO PORT - INPUT
6.1 M T PHN CNG
Kin trc phn cng xem bi 4.
6.2 BI TP NG DNG IO PORT - INPUT
6.2.1 Bi tp 1 - Lp trnh qut phm n
Trong cc ng dng cn dng t phm th ta c th dng mt s chn ca vi iu khin c
tn hiu s 0/1 t chn ca phm (mc 1 tng ng cha nhn phm, mc 0 tng ng nhn
phm). Phm c kt ni nh th ny ta tm thi gi l phm n.
6.2.1.1 M t phn cng

Hnh 6.1 - S mch lp trnh qut phm n
S nguyn l ca phm n nh hnh, khi khng nhn phm th in p ng ra a vo c
in tr ko ln ngun nn mc s l mc 1, khi nhn nt th ng ra ca nt nhn c ko thng
xung t nn in p ng ra l mc 0.
6.2.1.2 Yu cu
Cc phm c kt ni ln lc vo cc chn RB0 RB3. 4 LED hin th tng ng c ni
vo cc chn RD0 RD3. Lp trnh mi ln nhn 1 phm, mt led tng ng s sng.
6.2.1.3 Gii thut
c phm n ta c th dng ngt hoc phng php qut.

6.2.2 Bi tp 2 - Lp trnh qut phm ma trn
Vi cc ng dng ln, cn nhiu phm th khng th dng qu nhiu chn ca vi iu khin
c phm. Vy lm th no dng t chn m vn c c nhiu phm?
=> Cn phi t hp phm theo mt qui lut v c tun t cc phm -> m ha phm
Mt phng php thng dng nht l t hp phm ma trn: cc phm s c sp xp thnh mt
ma trn MxN:
S phm to ra l M.N
S ng dy tn hiu cn c l M+N
VD: Ma trn 4x4 gm 16 phm, dng 8 ng tn hiu
Ma trn 4x5 gm 20 phm, dng 9 ng tn hiu
6.2.2.1 M t phn cng
S kt ni vt l ca cc phm ma trn c cho hnh di.

Hnh 6.2 - S kt ni bn phm ma trn 4x4
6.2.2.2 Yu cu
Cc ROW ln lt c ni vo RB0 RB3, cc COL ln lt c ni vo RA0 RA3, 4
LED hin th ln lt c ni vo RD0 RD3.

Lp trnh sao cho khi mi phm c nhn 4 LED s hin th gi tr nh phn ch a ch (1 16)
ca phm trn bn phm
6.2.2.3 Gii thut
Phn tch hot ng ca s phm ma trn hnh 6.2
Ti mi thi im ch nhn c 1 phm
Ma trn c b tr thnh cc hng R1-> R4 v cc ct C1->C4
Cc ct s c cp mc in p 0 tun t: 0111, 1011, 1101, 1110, 0111.
Ti mi trng thi ca cc ct, ton b tn hiu ti cc hng s c c v kim tra,
mi mc in p 0 xut hin ti mt hng tng ng vi mt phm c nhn ( v
tr tng ng)
Tc thay i trng thi ti t hp cc ct gi l tc qut, tc qut phi ln hn
tc ngi dng nhn phm th mi c c phm. V d ngi dng trong 1 giy
c th nhn phm 3 ln th tc qut phi ln hn 4x3=12 Hz th mi c kh nng
c c phm. Tng qut:
Tc qut (Hz) = S ct x S ln nhn phm/s x H s an ton (2)
Chi tit gii thut:
Bt u:
Xut tn hiu ra cc ct C1C2C3C4: 0111
c trng thi ti cc hng R1R2R3R4?
-R1R2R3R4 = 0111? : ->phm 1 c nhn
-R1R2R3R4 = 1011? : ->phm 4 c nhn
-R1R2R3R4 = 1101? : ->phm 7 c nhn
-R1R2R3R4 = 1110? : ->phm * c nhn
-R1R2R3R4 = 0111? : ->phm 2 c nhn
-R1R2R3R4 = 1011? : ->phm 5 c nhn

-R1R2R3R4 = 1101? : ->phm 8 c nhn
-R1R2R3R4 = 1110? : ->phm 0 c nhn
-R1R2R3R4 = 0111? : ->phm 3 c nhn
-R1R2R3R4 = 1011? : ->phm 6 c nhn
-R1R2R3R4 = 1101? : ->phm 9 c nhn
-R1R2R3R4 = 1110? : ->phm # c nhn
-R1R2R3R4 = 0111? : ->phm A c nhn
-R1R2R3R4 = 1011? : ->phm B c nhn
-R1R2R3R4 = 1101? : ->phm C c nhn
-R1R2R3R4 = 1110? : ->phm D c nhn
Lp li im bt u->..
6.3 PH LC
Cc mc in p s dng ch input
ch ny s c mc in p chn I/O pin, v truyn d liu c c trong thng qua
Data bus. Mc in p y ch c mt hoc hai gi tr l l 1 hoc 0, mc in p nhn ra cc
mc nh sau:
Mc logic 0: in p t Vss n 0,15Vdd khi in p cung cp cho chip l <4,5V, v
Vss n 0,8 V nu in p t 4,5 n 5,5V.
Mc logic 1: 0,25VDD + 0,8 n VDD khi in p cp b hn 4,5V, v t 2.0 n
VDD nu in p cung cp cho chip t 4,5 n 5,5V.
i vi nhng I/O c ng vo l Trigger Schmitt th in p vo tng ng l:
Logic 0: l Vss n 0,2VDD, logic 1: 0,8VDD n VDD.

Bng 6.1 Mc in p ch input

Ch : khi in p cung cp l mc nm gia mc logic 0 v 1 trn th hon ton
khng c c, gy ra sai. Do khi thit k phi ch mc logic phi nm trong hai
khong in p ny.

Bi 7 : TIMER
7.1 TIMER
7.1.1 Timer l g?
Timer l b nh thi c chc nng nh mc mt khong thi gian. Timer c dng hoch
nh thi gian cho cc tc v ca CPU. Nguyn l timer c cho hnh 7.1.

Hnh 7.1 - Nguyn l timer
Nh hnh 7.1 ta thy: timer bao gm 2 khi chnh kt ni tun t vi nhau, l b iu ch
xung v b m xung.
B iu ch xung:
B iu ch xung c chc nng nhn cc xung t ng vo c tn s f
in
v iu ch ra xung ng
ra c cng bin tn hiu nhng c tn s l f
out
. lm iu ny b iu ch xung s dng mt
b chia tn s. Cc h s ca b chia ny tng ng Prescaler v Postscaler. Nh vy ta c h
thc:
f
out
= f
in
/ Prescaler/Postscaler
Trong nhiu trng hp ch c 1 trong 2 thng s Prescaler hoc Postscaler c cho. Trong
trng hp thng s cn li c gi tr l 1.
B m xung:
B m xung nhn u vo l xung c tn s f
out
l ng ra ca b iu ch xung. Mi khi c mt
xung xut hin, thanh ghi gi tr ca b m xung c tng ln 1. Cn c vo gi tr ca thanh ghi
ny v tn s xung f
out
ta c th tnh c thi gian m timer hot ng. R rng ta c:
Thi gian timer = Thanh ghi gi tr/ f
out

Gii hn ca thanh ghi gi tr c gi l gii hn ca timer v c hiu l s bit ca timer
(s bit timer = s bit ca thanh ghi gi tr). Khi gi tr trong thanh ghi ny t gii hn timer s
kch hot mt bit (gi l bit c timer) thng bo cho h thng bit l timer trn.
Thanh ghi gi tr l mt thanh ghi vt l nn c th tng tc c bng phn mm. Da vo
c im ny ta c th ci t gi tr ban u ca thanh ghi gi tr (InitValue). Khi timer c kch
hot, b m xung s tng gi tr ca thanh ghi gi tr t im u ny cho n lc trn. Bng cch
ci t nhng gi tr u khc nhau, r rng ta c th nh c thi gian trn cho timer l khc
nhau (xem hnh 7.2)
0
MaxValue = 2
s bit
InitValue
Khong gi tr
timer hot ng

Hnh 7.2 - iu chnh thi gian timer bng thanh ghi gi tr
7.1.2 Tnh ton timer
Nh vy, da vo cu to ca timer ta c th thy c 3 yu t nh hng ti thi gian trn ca
mt timer:
- Tn s xung f
out

-
Gii hn timer: MaxValue = 2
s bit timer
(gi tr cui ca thanh ghi gi tr)

-
Gi tr u ca thanh ghi gi tr: InitValue

Gi: t thi gian timer cn nh thi (tnh theo s)
Vi 2 gi tr u v cui ny ta d dng tnh c s xung m b m timer c th m c
trc khi trn:
S xung m c = MaxValue InitValue
M:
S xung m c = t. f
out
= (

.
)
T suy ra:
InitValue = MaxValue - (

.
)
Hay: = 2
.
)

y chnh l h thc tnh gi tr ci t cho thanh ghi gi tr ca timer da vo: s bit timer, thi
gian cn ci t v tn s xung ng vo.
Trong trng hp vi iu khin, ch nh thi, tn s xung ng vo f
in
= F
OSC
/4 ta c h
thc:
= 2
4. .
)
7.2 TNG TC VI TIMER
7.2.1 Quy trnh khai bo timer nh sau:
Ci t
Ci t ch hot ng cho timer (8 bit/16 bit)
Ci t ngun xung cho timer (timer/counter)
Ci t Prescaler cho timer
Tnh ton v ci t thi gian (nu ch timer) cho timer
Hot ng
Kch hot timer
Ch timer trn
Khi timer trn x l reset c
Np li timer
Trn y l quy trnh tng tc vi 1 timer. Tuy nhin, iu ny ch thc hin c khi ta
tng tc vi cc thanh ghi quy nh timer (s dng trong cc ngn ng ASM, C18, C30,
HiTechC...) i vi CCSC, th vin v timer c h tr sn nhiu hm tng tc. Ta s gii
thiu tip theo phn tip theo sau y:
7.2.2 Cc hm tng tc vi timer trn PIC trong CCSC
setup_timer_X(mode)
y l hm ci t cc trng thi hot ng ca timerX.

Bng 7.1 Cc ch (mode)
STT Timer Loi C php ngha
1 Timer0
Xung vo
RTCC_INTERNAL Dng xung ni
2 RTCC_EXT_L_TO_H Dng xung ngoi cnh ln
3 RTCC_EXT_H_TO_L Dng xung ngoi cnh xung
4
Prescaler/
Postscaler
RTCC_DIV_2 Prescaler = 2
5 RTCC_DIV_4 Prescaler = 4
12
Control
RTCC_OFF Tt timer0
13 RTCC_8_BIT Timer0 8 bit
14 RTCC_16_BIT Timer0 16 bit
set_timerX(value)
hm ny dng ci t gi tr cho thanh ghi gi tr timer.
- X: S timer (0, 1, 2, 3,...)
- Value: c tnh theo cng thc phn 7.1.2
Ring i vi timer0 c th dng hm ny: set_rtcc(value)
value=get_timerX
Hm dng c gi tr hin ti ca thanh ghi gi tr timer (thng dng trong ch counter)
- X: s timer (0, 1, 2, ...)
- Value: bin lu gi tr timer
Ngt lin quan: INT_TIMERX or INT_RTCC vi timer0
C timer c kt ni ti c ch ngt. Khi timer trn h thng s kch hot mt ngt. Chnh v
l do ny khi ci t timer cn kt hp vi ci t ngt timer (cc thao tc ci t ngt xem li bi
5).
7.3 BI TP
7.3.1 Yu cu: Dng timer0 vit hm delay cho h thng.
to hm Delay ta c th s dng mt lnh lp no chng hn vng lp for xc nh
thi gian delay cn thit, tuy nhin khi thc hin bng phng php ny kh xc nh c chnh
xc thi gian. xc nh chnh xc thi gian cn thit phi s dng mt b nh thi lm vic
ny.

7.3.2 Gii thut (GV s ging trn lp)
7.3.3 Thc hnh: KIT th nghim s dng thch anh c tn s dao ng 25MHz.
7.4 M RNG WATCH DOG TIMER (WDT)
WDT l b nh thi chuyn dng ci t thi gian time out cho h thng. Khi mt lnh ca
h thng thc thi WDT s c reset, nu h thng treo trong thi gian vt qu thi gian ci t,
WDT t ng reset li h thng.

Hnh 7.3 - Watch Dog Timer
WDT nhn xung dao ng t b to xung ni, chnh v th nu s dng WDT th cng phi
dng b dao ng ni ca vi iu khin. ch bnh thng WDT c ci t trn 4 ms. Tuy
nhin thi gian reset h thng ca WDT c th c tng ln nh ci t Postscaler bng phn
mm (xem hnh 7.3, 7.4).

Bi 8 : BI TP GIA KHA
8.1 YU CU

Hnh 8.1 - S phn cng mch th nghim
8.1.2 Bi tp 1: ng h s:
Vi phn cng trn chng ta c th thit k mt ng h s dng timer. Thit b hin th l 6 led
7 on (2 led cho giy, 2 led cho pht, 2 led cho gi). Khi cn thay i hay ci t li gi tr gi ta
dng cc phm n lm phm iu khin. C ch nhn tc ng ca cc phm n l c ch ngt.
Gi tr gi, pht, giy c nhp vo trong ch ci t bng bn phm ma trn. Led n dng
lm led bo tn hiu ci t tng ng.
8.1.3 Bi tp 2: My tnh b ti:
Vi phn cng trn ta cng c th thit k mt my tnh b ti n gin vi cc php tnh cng,
tr, nhn, chia. 4 phm quy nh php tnh l 4 phm n nhn vo bng c ch ngt. Cc gi tr
hng t c nhp bng bn phm ma trn. Li c hin th bng cc led n (2 led cho 4 m
li), 2 led n cn li hin th cho 4 php tnh. Cc gi tr trong qu trnh nhp cng nh kt qu
c hin th qua 6 led 7 on.
Mi nhm hc vin chn 1 trong 2 bi lm ti lp, bi cn li dnh cho v nh
8.2 M T PHN CNG
Vi iu khin: PIC18F4620, s dng thch anh 24MHz.

Kt ni PORT s c hng dn ti lp
8.3 GII THUT
(GV hng dn trc tip trn lp)
8.4 CHNG TRNH
Chng trnh c gii ti lp

Bi 9 : NGN NG LP TRNH C NNG CAO
9.1 CC KIU D LIU NNG CAO TRONG C
Bng 9.1 Cc kiu d liu nng cao trong C
char az; AZ; 09 Kiu k t 1B d liu
float -1.175e-38 3.402e38 Kiu s thc 4Bs d liu
signed long -2147483648 2147483647 Kiu s nguyn c du m
rng
4Bs d liu
unsigned long 0 4294967295 Kiu s nguyn khng du
m rng
4Bs d liu
9.2 CC HM THNG DNG TRONG TH VIN C CHUN:
9.2.1 Cc hm chuyn i kiu d liu:
Yu cu bt buc:
#include <stdlib.h>
atoi(data):
Chc nng: chuyn i d liu (data) sang kiu s nguyn int.
Tham s truyn vo: a vo phi bt u bng k t, nu khng chng trnh s b li
v khng thc hin c
D liu tr v: d liu tr v kiu int.
atol(data):
Chc nng: chuyn i d liu (data) sang kiu long
v khng thc hin c
D liu tr v: tr v d liu kiu long
atof(data):
Chc nng: chuyn i kiu d liu (data) t dng chui sang dng s thc float.

v khng thc hin c.
D liu tr v: d liu tr v thuc kiu float
9.2.2 Cc hm x l chui:
Yu cu bt buc:
#include <string.h>
strlen(str):
Chc nng: o di chui str
Tham s truyn vo: str thuc kiu chui
D liu tr v: gi tr tr v chnh l s k t trong chui str, kiu unsigned int
strcat(str1,str2):
Chc nng: ni 2 chui str1 v str2
Tham s truyn vo: str1 v str2 thuc kiu chui
D liu tr v: d liu tr v thuc kiu chui
strcpy(str1, str2):
Chc nng: sao chp t chui str1 sang chui str2
Tham s truyn vo: str1 v str2 thuc kiu chui
D liu tr v: khng c kiu d liu tr v
9.2.3 Cc hm ton hc:
Yu cu bt buc:
#include <math.h>
abs(data):
Chc nng: ly gi tr tuyt i mt s
Tham s truyn vo: data truyn vo thuc kiu s (char, int, long, float)
D liu tr v: d liu tr v l dng unsigned ca d liu truyn vo
acos(data), asin(data), atan(data):

Chc nng: dng ly cc gi tr arcsin, arccos, arctan ca d liu
Tham s truyn vo: d liu a vo bt buc phi l kiu s (char, int, long, float)
D liu tr v: kiu d liu tr v thuc kiu float
cos(data), sin(data), tan(data):
Chc nng: dng ly cc gi tr sin, cos, tan ca d liu
Tham s truyn vo: d liu a vo bt buc phi l kiu s (char, int, long, float)
D liu tr v: kiu d liu tr v thuc kiu float

Bi 10 : LCD
10.1 TNG QUAN V LCD
10.1.1 LCD l g?
LCD (Liquid Crystal Display) l mt thit b hin th dng im nh c mn hnh dng tinh th
lng. LCD c s dng rt rng ri ngy nay.
10.1.2 Cc loi LCD trn th trng
10.1.2.1 Character LCD
Character LCD l loi LCD ch th hin c cc k t (A Z, a z, 0 9).
Thng thng trn th trng ch c mt s kch c LCD nh 16x2 (16 ct 2 dng), 20x4 (20 ct
4 dng).

Hnh 10.1 - Graphic LCD
10.1.2.2 Graphic LCD
Graphic LCD c hin th bng cc im nh (dot). Chng ta tm chia loi ny thnh 2 loi
chnh: Black/White LCD, Colour LCD.

Hnh 10.2 - Graphic LCD
V mt kch thc loi LCD ny kh a dng, mt s kch thc thng dng trn th trng
nh: 128 x 64, 240 x 128

Ngoi ra LCD cn c th tch hp tnh nng nhn d liu dng TouchScreen (TouchScreen
LCD). Chng trnh ny ch xt ti LCD dng Character LCD c iu khin bi chip HD
44780.
10.2 GIAO DIN LCD - HD 44780

Hnh 10.3 - Giao din LCD HD44780
Giao din loi LCD k t HD 44780 c cho nh hnh 10.3. Trong 3 chn EN, RS, RW
l 3 chn iu khin; cc chn DB0 DB7 l b chn d liu.
LCD hot ng 2 ch : 4 bit v 8 bit, trong trng hp 4 bit, ch c cc chn t DB4 DB7
c kt ni vi vi iu khin, cc chn DB0 DB3 c b trng.
10.3 CC HM TNG TC VI LCD TRONG CCSC
#include <lcd.c>
Dng lnh tin x l trn c tc dng load th vin lcd.c trong h thng vo file code. T ta
mi c th dng cc hm trong th vin ny.
lcd_init();
Hm ny l hm khi to LCD. Khi dng LCD hm phi c gi u chng trnh main.
lcd_putc(char);
Hm hin th ra LCD mt k t.
printf(lcd_putc, cstring, value...);
Hm hin th LCD vi nhiu s la chn khc nhau. y l hm mnh nht v thng dng nht
trong hin th LCD. Trong :
- lcd_putc: tn hm hin th LCD (nu khng c hm ny hm printf s dng cho truyn
nhn chui qua chun RS232
- cstring: l mt tp hp cc nh dng ca d liu (nu c), c th cho bng sau
Bng 10.1 Bng cc nh dng cstring trong LCD
STT Tn nh dng ngha
1 %c Character

2 %s String as character
3 %d Signed interger 8bit
4 %u Unsigned interger 8 bit
5 %Lu Long unsigned int
6
%Ld Long signed int
7
%x Hex int (lower case)
8
%X Hex int (upper case)
9
%Lx Hex long int (lower case)
10
%LX Hex long int (upper case)
11
%f Float with truncated decimal
12
%g Float with rounded decimal
13
%e Float in exponential format
14
%w Kiu s thc c xc nh s s sau du phy
V d:
- printf("HiThere");
- printf("RTCCValue=>%2x\n\r",get_rtcc());
- printf("%2u %X %4X\n\r",x,y,z);
- printf(LCD_PUTC, "n=%u",n);
10.4 BI TP
S dng th vin lcd.c trong CCSC hin th ra LCD chui k t cho trc.

Bi 11 : ADC (ANALOG DIGITAL CONVERT)
Ti liu tham kho: Datasheet 18F4620 Chng 19
11.1 TNG QUAN V ADC
11.1.1 ADC l g?
ADC (Analog to Digital Convert) l mt b chuyn i t tn hiu tun t (analog) sang tn hiu
s (digital). Trong ni dung bi hm nay, chng ta ch xt n cc b chuyn i ADC c tch
hp trong VK. Trc ht, chng ta s tm hiu mt s khi nim c bn ca b ADC.

Hnh 11.1 - Analog - Digital
11.1.2 phn gii (Resolution)
phn gii l s gi tr bit c th c cha ht ton b cc gi tr ca tn hiu. phn gii
c tnh theo n v bits. phn gii cng cao th tn hiu thu c s cng mn tc l gn
ging vi tn hiu tun t hn.

Hnh 11.2 - phn gii b chuyn i ADC 3 bit
11.1.3 Gi tr tham chiu:
Gi tr tham chiu l cc gi tr cao nht v thp nhp ca b chuyn i ADC. Ta xt n mt
v d sau y:

Gi s bn c mt b ADC 10 bits, gi tr tham chiu c chn l Vref+ = 5V - Vref- = 0V.
Nu bn thu v mt tn hiu tun t 3V, th bn s thu v c gi tr ca ADC l
2
1
5 0
(3 0) = 614
Nhng nu chng ta chn Vref+ = 5V v Vref- = 1.5V, khi ta thu v mt tn hiu tun t mc
3V, ta s nhn c gi tr nh sau
2
1
5 1.5
(3 1.5) = 438
11.2 CC HM TNG TC ADC TRONG CCSC
#device ADC = 10: khai bo s dng b chuyn i ADC 10 bit
#device ADC = 8: khai bo s dng b chuyn i ADC 8 bit
setup_adc (mode); setup_adc2(mode);
Cc hm ci t s dng b ADC, mode l cc ch cho b chuyn i c nh ngha chi
tit trong header file.
Bng 11.1 Cc trng thi s dng ca b chuyn i ADC trong CCSC
STT Trng thi ngha
1 ADC_OFF Tt b chuyn i ADC
2 ADC_CLOCK_DIV_2 TAD = TOSC/2
8 ADC_CLOCK_INTERNAL TAD = Internal
9 ADC_TAD_MUL_0 TACQ = 0*TAD
17 VSS_VDD in p tham kho ly t ngun nui
18 VREF_VREF in p tham kho ly t bn ngoi (chn RA2, RA3)
19 VREF_VDD Vref(-) = Vref; Vref(+) = VDD
20 VSS_VREF Vref(-) = VSS; Vref(+) = VREF

setup_adc_ports(mode)
Hm khai bo s dng cc PORT trong ADC. Cc mode s dng nh sau:
Bng 11.2 Cc trng thi s dng ca knh ADC trong CCSC (PIC18F4620)
STT Trng thi ngha
1 NO_ANALOGS Khng s dng analog
2 ALL_ANALOG Tt c cc knh u c s dng
3 AN0_TO_AN11 Cc knh t 0 ti 11
14 AN0 Knh s 0
set_adc_channel(channel)
Hm ci t knh ADC s dng. Trong : channel l gi tr quy nh s knh, 0, 1, 2, 3...
read_adc()
Hm c gi tr ADC, hm tr v gi tr kiu int16.
11.3 QUY TRNH TNG TC ADC TRONG CCSC
Ci t
- Ci t ch hot ng ca ADC : dng hm setup_adc(mode)
- Ci t s PORT ADC s dng : dng hm setup_adc_ports(mode)
Vn hnh:
- Chn knh ADC cn c : dng hm set_adc_channel(channel)
- Delay khong 2us : dng hm delay_us(2);
- c gi tr ADC : dng hm read_adc();

11.4 BI TP
Bi tp 1:
c gi tr in p rt trn bin tr, hin th ra LCD
Bi tp 2:
Dng timer1 ci t thi gian ly mu cho b chuyn i ADC; c gi tr ADC t bin tr v
hin th ra LCD.

Bi 12 : USART
12.1 KHI QUT V CC CHUN GIAO TIP
USART (Universal Synchronous & Asynchronous serial Receiver and Tranreceiver) c ngh l
Chun truyn nhn ni tip ng b v bt ng b, y l mt thut ng ch mt chun giao
tip. Ngoi ra, chng ta cn phn bit thut ng UART (ngha l chun truyn nhn bt ng b),
thng ch mt thit b phn cng. Khi chng ta s dng chun giao tip USART, chng ta phi
s dng thm mt b phn phn cng nh km, thng th b phn phn cng ny l mt mch
m dng chuyn in p 0V n 5V sang mt mc in p khc cho ph hp vi loi giao
tip. Sau y, chng ta s cng tm hiu nhng khi nim c bn ca USART:
12.1.1 Giao tip ni tip:
Giao tip ni tip l kiu truyn nhn m d liu i trong bus d liu dng tng bit mt, khc
vi chun truyn nhn song song khi m d liu c truyn trong bus dng gi d liu. Hnh
nh sau gip chng ta d hnh dung hn chun giao tip ni tip/ song song:

Hnh 12.1 - Giao tip song song vs ni tip
u im ln nht ca chun giao tip ni tip l bng thng nh, chun phn cng n gin
(ch c 1 hay 2 ng d liu). Bn cnh , chun giao tip ni tip c khuyt im ln nht l,
thi gian truyn chm, nhng nh c s pht trin ca k thut nn dn dn nhng khuyt im
c loi b.
12.1.2 Truyn thng ng b v bt ng b:
Truyn thng ng b l kiu tryn c chun ha v mt thi gian, nn khi d liu c
truyn i chng ta cn phi c tn hiu bo trc. Khi y, chun truyn ng b ny cn t nht hai
chn (mt chn d liu v mt chn xung nhp). Nhng nh m tin cy trong truyn nhn
cao hn, d liu sai st t hn.

Khc vi chun truyn thng ng b, chun truyn bt ng b l chun truyn m chng ta
khng cn c tn hiu bo trc. Nhng nhn bit d liu truyn nhn chng ta cn tun th cc
nguyn tc chung trong truyn nhn, nn t chng ta c chun truyn nhn cho cc giao tip bt
ng b.
12.1.3 Baud Rate:
Baud Rate l mt chun v thi gian cho vic truyn nhn, hay ni cch khc Baud Rate chnh
l s bit truyn c trong mt giy.
12.1.4 Frame truyn:
Do truyn thng bt ng b rt d xy ra sai lch trong qu trnh truyn nhn, nn ngi ta mi
ra quy nh v frame truyn. Frame truyn l mt gi d liu truyn trong bao gm cc thnh
phn c bn sau:
Start bit : bit bo bt u gi truyn.
Stop bit : bis bo kt thc gi truyn.
Data : d liu cn truyn.
Parity bit: bit kim tra li, thng c 2 loi bit parity (chn v l)
12.2 CC HM TNG TC VI USART TRONG CCSC
12.2.1 Khai bo s dng
#use rs232 (option)
Trong option l cc la chn ci t, cch nhau bi du , v c th c cc la chn nh
bng 12.1
Bng 12.1 Cc la chn ci t cho USART trong CCSC
STT Options ngha
1 STREAM=id
Ci t ID cho thit b, ID ny c th c dng trong
cc hm truyn nhn nh fputc()
2 BAUD=x Ci t baudrate (theo chun RS232)
3 XMIT=pin Khai bo chn truyn
4 RCV=pin Khai bo chn nhn

5 BRGH1OK S dng buadrate mc cao
6 ENABLE=pin
Chn ny s c kch khi c tn hiu truyn (thng
dng iu khin RS485
7 DEBUGGER Cho php debugger hot ng khi truyn nhn
8 RESTART_WDT Cho php hm getc() clear WDT
9 PARITY=X Khai bo parity bit, x c th l N, E, hay O.
10 BITS =X Khai bo s bit truyn, x c th 8-9
11 LONG_DATA
Khai bo hm getc() tr v 1 s int16 (c s dng khi
truyn nhn 9 bit)
12 DISABLE_INTS Tt ngt
13 STOP=X Ci t stop bit (mc nh l 1)
14 TIMEOUT=X Ci t thi gian timeout khi nhn d liu
15 UART1 Ci t chn truyn nhn cho module UART1
16 UART2 Ci t chn truyn nhn cho module UART2
Ngoi ra ta c th dng hm setup_uart(baud, stream) thay i ci t ca module USART
trong khi chng trnh hot ng thay v ci t ban u bi ch th tin x l nh cch trn.
12.2.2 Cc hm truyn d liu
Putc(character)
Hm gi 1 byte qua RS232
Puts(cstring)
Hm gi 1 chui qua RS232
Printf(option)
Hm gi d liu qua RS232 (xem thm bi LCD)
12.2.3 Cc hm nhn d liu
Value = Getc()
Hm nhn mt byte d liu t RS232, hm tr v kiu int8

gets(string) hoc Value = fgets(string, stream)
Hm nhn 1 chui t RS232, hm tr v d liu string. Stream l ID ca thit b
12.3 BI TP
Bi tp 1:
Vit chng trnh truyn nhn 1 byte qua chun RS232
Bi tp 2:
Gi cc d liu thu thp c t ADC bi 11 ln my tnh

Bi 13 : PWM / CAPTURE / COMPARE
13.1 TNG QUAN V PWM/CAPTURE/COMPARE
13.1.1 PWM l g?
PWM (Pulse-Width Modulation) cn gi l chc nng iu ch rng xung c ng dng
rt nhiu trong cc lnh vc in t, iu khin... Chc nng ny thc cht l thay i gi tr trung
bnh ca in p (dng in,...) bng cch iu chnh rng xung kch mc cao trong mt chu
k. Chc nng ny thng c ng dng trong vic iu chnh in p u ra, iu chnh tc
ca ng c DC...

Hnh 13.1 - Nguyn l phng php iu rng xung
Cc thng s c trng ca xung s dng trong phng php iu rng xung
Bin xung: L in p 2 ngng ca xung, ta gi cc mc in p ny l V+ v V-
Tn s xung: L tn s xung ng vo, thng s ny khng thay i khi ta s dng phng php
rng xung. Tuy nhin tn s xung l mt trong nhng tham s quan trng tnh ton nhp
nh ca p ng ra (thng dng trong cc ngun xung). K hiu tn s: f
rng xung: y l khong thi gian xung mc V+ trong mt chu k. K hiu rng: w
Cng thc tnh ton in p ng ra
.
Trong : . ; T l thi gian xung mc cao.

13.2 QUY TRNH S DNG MODULE PWM TRONG PIC
13.2.1 Quy trnh s dng PWM
Khai bo s dng chc nng PWM
Ci t timer 2
Tnh ton v ci t Period
Tnh ton v ci t duty cycle
13.2.2 Cc hm tng tc PWM trong CCSC
Setup_CCPX(mode)
Hm ci t cc ch hot ng ca module CCP.
Trong :
- X l s module CCP (X nhn cc gi tr s 1, 2, 3....)
- mode l danh sch cc ch , c nh ngha chi tit trong header file ca tng dng
PIC. Nu c nhiu mode th cc mode ny cch nhau bi du ,. Mt s ch c
trnh by bng 13.1
Bng 13.1 Mt s ch hot ng ca CCP
STT Loi Tn ngha
1 K CCP_OFF Tt module CCP
2
Capture
mode
CCP_CAPTURE_FE Ch capture cnh ln
3 CCP_CAPTURE_RE Ch capture cnh xung
4 CCP_CAPTURE_DIV_4 Ch capture /4
5 CCP_CAPTURE_DIV_16 Ch capture /16
6
Compare
mode
CCP_COMPARE_SET_ON_MATCH Ch compare to xung ln
7 CCP_COMPARE_CLR_ON_MATCH Ch compare to xung xung
8 CCP_COMPARE_INT Dng ngt compare
9 CCP_COMPARE_RESET_TIMER Reset timer khi compare
10
PWM
mode
CCP_PWM Ch PWM
11 CCP_PWM _H_H Ch PWM high to high

12 CCP_PWM _H_L Ch PWM high to low
13 CCP_PWM _L_H Ch PWM low to high
14 CCP_PWM _L_L Ch PWM low to low
Setup_timer2(prescaler, period, postscaler)
Hm ci t cho timer 2 dng trong module PWM. Trong
- Prescaler: h s chia trc (xem trong header file phn timer)
- Postscaler: h s chia sau
- Period: l mt s nguyn 8 bit, th hin chu k ca xung PWM c tnh theo cng
thc: (T trong cng thc tnh theo n v l giy)
= (
4. .
)
Set_PWMX_duty(duty cycle)
Hm dng ci t gi tr duty cylce cho b iu ch rng xung PWM. Gi tr duty
cycle l mt con s t 0 255 c tnh ton theo t l phn trm da trn thng s period.
13.3 BI TP
Bi tp 1:
S dng chc nng PWM iu khin tc ng c DC
Bi tp 2:
Thit k h thng gim st tc ng c DC bng my tnh
Bi tp 3:
Thit k h thng iu chnh tc ng c DC (u vo c th l analog hoc digital)
13.4 PHN M RNG - ENCODER
13.4.1 Encoder l g?
iu khin c mt ng c DC ng vi vn tc hay v tr cn thit, chc chn rng chng
ta phi c c vn tc hay v tr hin ti ca n. T ta c 3 phng php chnh:
Dng tachometer (Tachometer l mt cm bin o gc)
Dng bin tr xoay (thng phng php ny dng xc nh v tr, t khi no dng xc
nh vn tc)
Dng optical enocoder.


Hnh 13.2 - Encoder l g ???
Encoder l mt loi cm bin bao gm 2 phn chnh:
Mt b thu pht tn hiu quang hc (cm bin quang)
Mt a kim loi c khc vch.
chnh xc ca mt encoder ph thuc rt ln vo s vch khc trn a kim loi, cng nh
thi gian p ng ca b cm bin quang hc.
13.4.2 Phn loi encoder:
C 2 loi encoder:
Encoder tuyt i : thng c ng dng nhiu trong cc h thng o v tr.
Encoder tng i: loi encoder ny dng rt nhiu v kh ph bin. Nn t nay chng
ta thng nht khi ni n encoder, th chnh l encoder tng i.
13.4.3 Tn hiu u ra encoder:
Mt encoder thng c 5 chn, bao gm cc chn sau:
2 chn cho ngun v mass.
1 chn cho pharse A
1 chn cho pharse B
1 chn cho pharse Z


Hnh 13.3 - Tn hiu ng ra phase A, B trong encoder
Tn hiu Pharse A v pharse B thng lch nhau chu k, thng th chng ta dng hai tn
hiu ny nhn bit chiu quay ca encoder.
13.4.4 Cc phng php c tn hiu encoder:
Dng chc nng Capture:
Ta dng chc nng capture o chu k ca encoder, t chng ta c th tnh ton c vn
tc ca ng c DC.
Dng chc nng Timer1:
Ta dng chn T13CKI thu nhn tn hiu t encoder gi v (xem xung t encoder nh mt
ngun xung). Bn cnh ta c th kt hp thm chc nng Timer 0 tnh ton vn tc ca ng
c DC.
Dng chc nng ngt ngoi:
Dng cc knh ngt INTx thu nhn tn hiu t encoder (xem xung t encoder nh mt ngun
kch). Bn cnh , ta c th kt hp thm chc nng Timer0 (o thi gian) tnh ton vn tc
ca ng c DC.

Bi 14 : SPI I2C
V CC PHNG PHP LU TR D LIU
14.1 TNG QUAN V SPI
SPI (Serial Peripheral Bus) l mt chun giao tip ng b - ni tip do hng Motorola xut.
SPI l mt chun giao tip theo kiu Master Slave, vi mt chip Master iu khin hot ng
truy xut ca hng lot chip Slave. SPI cng l mt chun giao tip song cng (full duplex), theo
d liu truyn v nhn ng thi. mt s ti liu, ngi ta cn gi chun SPI l chun giao
tip 4 dy, vi 4 ng truyn:
SCK : xung gi nhp cho giao tip SPI, xung clock c pht ra t chip Master v chip
Slave s nhn xung v ng b qu trnh truyn nhn. Nh c chn SCK m qu trnh
truyn nhn din ra t li hn, v nhanh hn.
SDI : chn pht d liu cho Master / Slave.
SDO : chn thu nhn d liu cho Master/Slave.
SS (Select Slave) : i vi Master th y s l chn chn chip Slave no s truyn, cn
i vi chip Slave th y l chn cho php c truyn nhn vi chip Master.
14.2 HOT NG CA SPI
14.2.1 Phn cng ban u bao gm
Chn Master SDI ni vi chn Slave SDO.
Chn Master SDO ni vi chn Slave SDI.
Chn SCK ca 2 chip ni vi nhau.
Mt chn IO bt k ca Master ni vi chn SS ca Slave.

Hnh 14.1 - Truyn nhn qua SPI
14.3 SPI TRONG PIC
// GV s trnh by ti lp

14.4 M RNG I2C
14.4.1 Kin thc c bn v giao tip I2C:
I2C (Inter-Intergrade Circuit) l mt chun truyn thng do hng Philip Semiconductor xut.
I2C l chun ng b - ni tip, tuy nhin I2C c mt c im kh hay l giao tip ny l mt
giao tip a ch, tc l mt chip va c th l Slave m cng c th l Master. Trong mt mng
I2C vi cc chip ng chc nng (cng h tr Master Slave) th trong mt thi im mt chip c
th l Master nhung mt thi im khc n c th l Slave. Nhng i vi cc chip nh do thit
k ca cc nh sn xut n ch h tr ch Slave.
14.4.2 Cu hnh phn cng ca giao tip I2C:
Master l chip gi vai tr iu phi thng tin trong mng iu khin, khi cn giao tip
vi Slave no th Master ch vic gi a ch n Slave , v bt u qu trnh giao
tip.
Slave l chip thc thi trong mng giao tip, trong mi chip Slave c chc mt a ch
trong mng giao tip.
SDA l ng truyn d liu chnh cho c giao tip, tt c d liu phi c truyn
trn ng d liu ny.
SCL l ng xung nhp ng b ha vic truyn nhn cho giao tip.
14.4.2.1 Cc bit iu khin cho giao tip I2C:
Start: iu kin bt u t trng thi ngh, khi Master mun bt u qu trnh truyn
nhn, th bt buc Master phi ko SDA t cao xung thp trong khi SCK vn mc
cao.
Stop: iu kin kt thc, khi Master mun kt thc vic truyn nhn d liu th bt
buc Master phi ko SDA t cao xung thp trong khi SCL vn cn ang mc cao.
Quy trnh Stop xy ra ch khi vic truyn nhn kt thc.
Repeat: Khi vic truyn nhn kt thc thay v Master kt thc qu trnh truyn truyn
nhn bng Stop bit, nhng Master li gi tip Start bit , trong trng hp ny ta gi
l Repeat Start. Trng hp ny xy ra khi Master mun nhn d liu lin tip t
Slave.
ACK: y l bit dng bo hiu xem vic truyn d liu hon thnh cha.
Thng bit ny c gi t Slave, Slave dng n bo cho Master mnh nhn
d liu.

14.4.2.2 a ch Slave:
a ch thng c gi i t Master n Slave, a ch cha Slave m n mong mun truyn
ti. a ch cng l gi d liu u tin ca mt ln truyn. Cu trc gi a ch bao gm:
7 bits a ch.
1 bit iu khin hng truyn (Read/Write).

14.4.2.3 Kt cu mt gi truyn:
Mt gi truyn c bn bao gm:

Thng thng ngi ta phi hp gia gi a ch v gi d liu:

14.4.2.4 Cuc gi chung:
Cuc gi chung l cuc gi m a ch c dng 0000000W (a ch = 0 v bt iu khin hng
l W). Cuc gi chung xy ra khi Master mun truyn d liu cho tt c Slave. Tt nhin, trong
trng hp ny Slave c th nhn hay khng nhn cuc gi chung t Master (ty theo Slave c
c ci t ch cho php nhn cuc gi chung hay khng).

14.5 CC PHNG PHP LU TR D LIU
Vi nhng d liu tn ti lu di theo thi gian ta bt buc phi lu tr. Vic lu tr d liu
trong lin quan ti PIC c th c chia lm 2 loi: c b nh ngoi v khng c b nh ngoi.
Nu khng dng b nh ngoi d liu c lu tr trong EEPROM c h tr ca PIC. Nu
dng b nh ngoi c th dng EEPROM ngoi hoc cc thit b lu tr khc nh th nh, USB,
my tnh ni dung bi ny ch trnh by 2 vn : Data EEPROM Memory v Extenal
EEPROM Memory.
14.5.1 Ti liu tham kho:
Chng 7, 17, 18 Datasheet 18F4620
14.5.2 Data EEPROM Memory
14.5.2.1 Kin trc
Nh chng ta bit EEPROM l b nh c th c, ghi bng cc tn hiu in v hon ton
khng b mt khi ngt ngun nui. Chnh v th b nh ny c dng lu tr cc d liu tn
ti lu di theo thi gian k c khi h thng dng hot ng.
V mt t chc, Data EEPROM c t chc theo dng mng (hon ton tng t mt bank ca
RAM). Chnh v th vic truy xut d liu trong Data EEPROM c th thc hin bng phn mm
trong sut qu trnh hot ng ca PIC. Hot ng truy xut ny c thc hin thng qua vic ci
t cc gi tr ca 5 thanh ghi: EECON1, EECON2, EEDATA, EEADR, EEADRH
14.5.2.2 Cc hm tng tc vi EEPROM ni trong CCSC
a. c d liu
value = read_eeprom (address)
Hm c nh ti a ch address trong ROM ni v lu vo bin value
Trong :
- address l a ch ti vng nh cn c trong EEPROM. a ch ny l mt con s bt u
t 0x00 v c gii hn trn ph thuc vo dung lng ca b nh EEPROM
- value l gi tr 8 bit
b. Ghi d liu
Write_eeprom (address, value)
Hm ghi mt gi tr s 8 bit value vo vng a ch address trong ROM ni.

14.5.3 Extenal EEPROM Memory
Cc IC lu tr (chip nh) ngoi thng c giao tip ng b vi h thng (PIC) thng qua 1
trong 2 chun giao tip: SPI v I2C. Mi hot ng truy xut b nh u c thc hin thng
qua cc chun giao tip ny. Chnh v th vic ci t v hot ng truy xut b nh ngoi l
vic ci t v hot ng cc chun SPI hoc I2C. (xem bi 15).
14.5.4 Bi tp
Lu tr d liu nhit tham kho bi tp tng kt vo DataEEPROM Memory.

Bi 15 : BI TP TNG KT
15.1 YU CU

Hnh 15.1 - S phn cng ca mch th nghim
Vi s phn cng trn ta c th gii quyt nhiu bi ton ng dng trong thc t, trong
ni dung bi tp ca kho hc yu cu c t ra nh sau:
Yu cu: Thit k h thng t ng gim st nhit c giao tip vi my tnh
u vo:
- Cm bin nhit (analog sensor)
- Bin tr ci t gi tr nhit tham kho
- Nt nhn chn ch hot ng
u ra:
- Hin th gi tr nhit hin ti v gi tr nhit tham kho ra LCD
- iu khin vn tc ng c qut (DC motor) iu ho nhit
- Kt qu c truyn ln my tnh lu tr, x l
- Optional: b nh ngoi EEPROM
Hot ng:
H thng c vai tr gim st v t ng iu chnh nhit ca mi trng.
- Nhit tham kho c ci t thng qua bin tr trong ch ci t (c chn bi nt
nhn (c th dng ngt hoc counter).

- Khi nhit cao hn gi tr tham kho, h thng s t ng khi ng qut lm gim
nhit ca thit b cn gim st.
- Gi tr nhit tham kho v gi tr nhit hin thi c hin th ln 2 dng ca LCD.
- Sau mt thi gian nht nh h thng s t ng gi d liu nhit ln my tnh gim
st, kim tra.
- Optional: C th lu tr gi tr d liu vo chp nh ngoi
15.2 M T PHN CNG
- Vi iu khin PIC18F4620 hoc PIC18F4550
- Kt ni cc chn PORT s c hng dn ti lp
15.3 GII THUT
GV hng dn ti lp
15.4 CHNG TRNH
Thi gian hon thnh chng trnh l 4 ting ng h (2 bui hc)

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