5

5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
ALi M3328C DVB-S Solution
F_LOCK PANEL LOCK LED( 0: LI GHT) GPI O0
PANEL CLOCK
GPI O5
NEED PULL HI GH
LNB_CUT
NOTE
F_COM2
NEED PULL HI GH
F_KEY2
F_COM3
GPI O2
LNB POWER CUT( 1: OFF)
PANEL KEY DETECT 1
PANEL COM1
Change List:
Number
GPI O18
GPI O8
PANEL KEY DETECT 2
GPI O9
F_DATA
PANEL COM2
F_COM1
PANEL DATA
GPI O4
GPIO MAPPING:
F_CLOCK
USAGE DETAIL
F_KEY1
CB-M3328c-TC-01V01
PANEL COM3 GPI O17
USAGE
ITEM Change DATE BY
1
2
Created CB-M3328C-TC-01V01 2005-06-10 qinhe
Changed some GPIO of panel. 2005-06-20 Tom
Changed DiSEqC Control Circuit Tom 2005-06-20
3
NEED PULL HI GH
NEED PULL HI GH
NEED PULL HI GH
4 Add a FLASH as 39LV040
2005-07-6 Tom
GPI O3
M3328C CB 1.0
COVER
A
1 7 Thursday, July 14, 2005
Title
Size Document Number Rev
Date: Sheet of
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DISEQ
M3328C
Audio
Amplifier
SDRAM(2M
byte)
27MHz
ANALOG
AUDIO/VIDEO
OUTPUT
E
J
T
A
G
FRONT PANEL
FLASH ROM
512K
x8bit
R
S
2
3
2
VI DEO
2CH
I2C I/F
Power
Supply
3.3V
5V
1.8V
24V
TUNER
MODULE
M3328C CB 1.0
Module
A
2 7 Thursday, July 14, 2005
Title
Size Document Number Rev
Date: Sheet of
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SDRAM I/F
FLASH I/F
EJTAG I/F
TUNER I/F
AV I/F
PERIPHERAL
RESET CIRCUIT
Crystal
QPSK-ADC
Audio-DAC
PLL
TV-Encoder
FRONT PANEL I/F
See the front panel
circuit
C
2 E 1
3
2N3906( SOT- 23)
PNP
B
Option
M3328C CB 1.0
M3328C
C
3 7 Thursday, July 14, 2005
Title
Size Document Number Rev
Date: Sheet of
P_D_BADDR0
P_D_DQ[0..15]
P_D_ADDR[0..10]
P_D_CS0J
ROM_AD[0..18]
ROM_DA[0..7]
ROM_OEJ
ROM_WEJ
P_D_RASJ
P_D_WEJ
P_D_CASJ
P_D_CLK
TRSTJ
TDO
TCK
TMS
TDI
DISEQC_H/V
DISEQC_OUT
XAGC
VIDEODA1
TXD
VDD18
GND
X27IN
X27OUT
GND
P_D_ADDR8
GPIO3
VDD33
GPIO4
P_D_ADDR9
VDD18
P_D_CLK
GND
P_D_DQ5
P_D_DQ0
P_D_DQ4
P_D_DQ15
P_D_DQ14
P_D_DQ6
P_D_DQ3
P_D_DQ1
P_D_DQ2
P_D_DQ7
P_D_DQ11
P_D_ADDR5
P_D_DQ8
P_D_DQ10
P_D_ADDR4
GND
P_D_DQ9
VDD18
P_D_ADDR6
P_D_ADDR7
P_D_DQ12
P_D_DQ13
V
D
D
3
3
P
_
D
_
A
D
D
R
3
G
N
D
P
_
D
_
A
D
D
R
2
P
_
D
_
A
D
D
R
1
P
_
D
_
A
D
D
R
0
P
_
D
_
A
D
D
R
1
0
G
P
IO
5
P
_
D
_
B
A
D
D
R
0
P
_
D
_
W
E
J
G
N
D
IR
P
_
D
_
C
A
S
J
P
_
D
_
R
A
S
J
P
_
D
_
D
Q
M
0
R
O
M
_
O
E
J
V
D
D
1
8
P
_
D
_
C
S
0
J
R
O
M
_
D
A
1
T
C
K
R
O
M
_
D
A
3
T
D
O
R
O
M
_
D
A
5
T
D
I
R
O
M
_
D
A
6
R
O
M
_
A
D
1
8
G
N
D
T
M
S
R
O
M
_
D
A
4
G
P
IO
8
R
O
M
_
D
A
0
T
R
S
T
J
R
O
M
_
D
A
7
R
O
M
_
W
E
J
R
O
M
_
A
D
1
5
G
P
IO
9
ROM_AD11
GND
ROM_AD12
VDD18
ROM_AD16
VDD33
GND
ROM_AD0
VDD33
ROM_AD5
ROM_AD1
DISEQC_OUT
ROM_AD2
ROM_AD10
ROM_AD13
ROM_AD17
GPIO17
ROM_AD3
ROM_AD14
DISEQC_H/V
ROM_AD7
GND
IIC-DA
IIC-SCK
GPIO18
XAGC
ROM_AD9
ROM_AD8
ROM_AD4
CPURSTJ
ROM_AD6
X
2
7
O
U
T
P
L
L
A
V
S
S
A
D
A
C
_
V
D
D
V
ID
E
O
D
A
0
A
-
G
N
D
IE
X
T
T
V
_
IR
E
F
A
_
V
1
5
R
A
U
D
IO
_
D
L
T
V
D
A
C
3
V
3
R
X
A
D
C
_
V
D
D
A
V
ID
E
O
D
A
2
P
L
L
A
V
C
C
R
X
D
G
P
IO
1
V
ID
E
O
D
A
1
A
U
D
IO
_
D
R
V
ID
E
O
D
A
3
A
_
IR
E
F
X
2
7
IN
A
_
V
1
5
L
R
X
A
D
C
_
V
D
D
T
X
D
G
P
IO
0
A
N
A
_
T
S
T
D
V
D
D
GPIO2
T
G
N
D
A_V15R
ANA_TST
RXADC_VDD
DVDD
A_IREF
TVDAC3V3
ADAC_VDD
PLLAVCC
PLLAVSS
A_V15L
PLLAVSS
TV_IREF
IEXT
IIC-SCK
IIC-DA
AUDIO_DR
VIDEODA0
VIDEODA2
VIDEODA3
AUDIO_DL
CPURSTJ
RXD
F_COM3 GPIO17
F_CLOCK GPIO4
F_LOCK GPIO0
IR
GPIO18
R
O
M
_
D
A
2
F_COM2 GPIO9
F_COM1 GPIO8
P_D_DQM0
TGND
A-GND
A
-
G
N
D
F_KEY2 GPIO2
F_KEY1 GPIO3
VDD33
F_DATA GPIO5
P_D_BADDR0 [4]
P_D_CLK [4]
P_D_DQ[0..15] [4]
P_D_WEJ [4]
P_D_RASJ [4]
P_D_CASJ [4]
P_D_ADDR[0..10] [4,6]
P_D_CS0J [4]
ROM_AD[0..18] [4]
ROM_WEJ [4]
ROM_OEJ [4,6]
ROM_DA[0..7] [4]
TRSTJ [4]
TDI [4]
TDO [4]
TMS [4]
TCK [4]
DISEQC_H/V [6]
DISEQC_OUT [6]
IIC-SCK [6]
IIC-DA [6]
XAGC [6]
VIDEODA2 [5]
AUDIO_DR [5]
VIDEODA1 [5]
VIDEODA0 [5]
VIDEODA3 [5]
TXD [4]
P_D_DQM0 [4]
AUDIO_DL [5]
QOUT+ [6]
IOUT+ [6]
RXD [4]
LNB_CUT [6]
VDD18
5VD
VDD33
DVDD
PLLAVCC
VDD33
VDD18
A-GND
TVDAC3V3
PLLAVSS
VDD33
A-GND
VDD33
A-GND
VDD33
RXADC_VDD
ADAC_VDD
PLLAVSS
RXADC_VDDA
5VD VDD33
VDD33
PLLAVSS
TC1
10uF/16V
C3 0.47uF
R4 10K
TP19
TP
BC17
0.01uF
L8
50nH
TP18
TP
R2 560R 1%
TP17
TP
BC8
0.1uF
R3
330R
TP16
TP
TP15
TP
TC8
10uF/16V
BC2
0.1uF
BC6
0.1uF
C7 27pF
BC12
0.1uF
J1
CON16 (1x16 2.0MM)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
BC9
0.1uF
D2
4.3V(ZENER Diode)
2
1
R1 20K
L7
BEAD
BC5
0.1uF
TC4 33uF/16V
BC7
0.1uF
R8
1M R9 33R
R13
10K
L4
BEAD
TC2
10uF/16V
BC3
0.01uF
TC9
10uF/16V
C5 0.1uF
TC5
33uF/16V
TP22
TP
BC10
0.1uF
BC1
0.1uF
BC19
0.1uF
Q1
2N3906
1
2 3
TP21
TP
U1
M3328C
1
1
2
7
3
1
2
8
2
4
6
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
3
3
3
4
3
5
3
6
3
7
3
8
3
9
4
0
4
1
4
2
4
3
4
4
4
5
4
6
4
7
4
8
4
9
5
0
5
1
5
4
5
2
6
1
6
2
6
3
6
4
66
68
69
70
71
72
73
65
74
67
75
76
77
78
80
82
83
84
85
86
87
79
5
3
81
6
0
5
9
5
8
5
7
5
6
5
5
88
89
90
91
92
93
94
95
96
9
7
9
8
9
9
1
0
0
1
0
3
1
0
4
1
0
1
1
0
2
1
0
5
1
0
6
1
0
7
1
0
8
1
0
9
1
1
0
1
1
1
1
1
2
1
1
3
1
1
4
1
1
6
1
1
5
1
1
7
5
7
1
1
8
1
1
9
1
2
0
1
2
1
1
2
2
1
2
3
1
2
4
1
2
5
1
2
6
XVDDIO
X
U
A
R
T
_
T
X
/G
P
IO
[0
]
XVSSIO
X
U
R
A
T
_
R
X
/G
P
IO
[1
]
GPIO[2]
GPIO[3]
XDMCLK
GPIO[4]
XADDR[9]
XADDR[8]
XADDR[7]
XADDR[6]
XADDR[5]
XADDR[4]
XVSSCORE
XDQ[8]
XVDDCORE
XDQ[9]
XDQ[10]
XDQ[11]
XDQ[12]
XDQ[13]
XDQ[14]
XDQ[15]
XDQ[0]
XDQ[1]
XDQ[2]
XDQ[3]
XDQ[4]
XDQ[5]
XDQ[6]
XDQ[7]
X
V
D
D
IO
X
A
D
D
R
[3
]
X
V
S
S
IO
X
A
D
D
R
[2
]
X
A
D
D
R
[1
]
X
A
D
D
R
[0
]
X
A
D
D
R
[1
0
]
G
P
IO
[5
]
X
B
A
[0
]
X
C
S
J
[0
]
X
R
A
S
J
X
C
A
S
J
X
W
E
J
X
D
Q
M
[0
]
X
V
S
S
C
O
R
E
X
IR
R
X
X
V
D
D
C
O
R
E
X
R
O
M
_
O
E
J
X
V
S
S
C
O
R
E
X
R
O
M
_
D
A
[1
]
X
R
O
M
_
W
E
J
X
R
O
M
_
A
D
D
R
[1
8
]
G
P
IO
[8
]
G
P
IO
[9
]
X
R
O
M
_
A
D
D
R
[1
5
]
XROM_ADDR[16]
XROM_ADDR[17]
XROM_ADDR[14]
XROM_ADDR[13]
XROM_ADDR[12]
XROM_ADDR[11]
XROM_ADDR[10]
XVDDIO
XROM_ADDR[9]
XVSSIO
XROM_ADDR[8]
XROM_ADDR[7]
XROM_ADDR[6]
XROM_ADDR[5]
XROM_ADDR[4]
XROM_ADDR[3]
XROM_ADDR[2]
XROM_ADDR[1]
XROM_ADDR[0]
XPCRST
XDFT_TM
XVSSCORE
X
R
O
M
_
D
A
[0
]
XVDDCORE
X
R
O
M
_
D
A
[7
]/P
_
J
_
R
S
T
X
R
O
M
_
D
A
[6
]/P
_
J
_
T
D
I
X
R
O
M
_
D
A
[5
]/P
_
J
_
T
D
O
X
R
O
M
_
D
A
[4
]/P
_
J
_
T
M
S
X
R
O
M
_
D
A
[3
]/P
_
J
_
C
L
K
X
R
O
M
_
D
A
[2
]
XSDA
XSCL
GPIO[17]
XAGC
GPIO[18]
XDISEQC_HV
XVDDIO
XDISEQC_OUT
XVSSIO
X
R
X
A
D
C
_
IP
X
R
X
A
D
C
_
IN
X
R
X
A
D
C
_
A
V
D
X
R
X
A
D
C
_
A
V
S
X
R
X
A
D
C
_
D
V
S
X
R
X
A
D
C
_
D
V
D
X
R
X
A
D
C
_
Q
P
X
R
X
A
D
C
_
Q
N
X
P
_
X
2
7
IN
X
P
_
X
2
7
O
U
T
X
D
V
D
D
X
P
L
L
A
V
S
S
X
P
L
L
A
V
C
C
X
V
D
D
_
A
D
A
C
X
V
S
S
_
A
D
A
C
X
V
1
5
L
X
V
1
5
R
X
V
IR
E
F
X
A
N
A
_
T
S
T
X
A
D
A
C
O
L
X
A
D
A
C
O
R
XVSSCORE
XVDDCORE
X
IO
U
T
3
X
IO
U
T
2
X
T
V
_
IR
E
F
X
V
S
S
A
X
V
D
D
A
X
ID
U
M
P
X
IE
X
T
X
IO
U
T
1
X
IO
U
T
0
L2
BEAD
TP20
TP
TC10
10uF/16V
TP23
TP
L5
BEAD
BC4
0.1uF
R7
1K
C6 27pF
D1
1N4148
2
1
L3
BEAD
C2 0.47uF
BC14
0.01uF
C4 0.47uF
L6
50nH
TC6 10uF/16V
L9
BEAD
R6
1K
BC15
0.1uF
BC18
0.1uF
TC3 33uF/16V
R5
10K
R10
4K7
Y1
27MHZ
R14
10K
R11
4K7
R12
4K7
L1
BEAD
TC7
33uF/16V
BC13
0.1uF
BC16
0.1uF
BC11
0.1uF
C1 0.47uF
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
EJTAG Connector
RS232 Connector
SDRAM
Only for debug
FLASH
OPTIONAL
M3328C CB 1.0
FLASH DRAM
Custom
4 7 Thursday, July 14, 2005
Title
Size Document Number Rev
Date: Sheet of
TCK
TDO
TMS
TDI
TRSTJ
P_D_ADDR4
D_CASJ
P_D_RASJ
P_D_ADDR0
P_D_DQ10
D_RASJ
D_CLK
P_D_ADDR9
P_D_RASJ
P_D_CS0J
D_RASJ
D_CASJ
P_D_WEJ D_WEJ
D_DQM0
P_D_CASJ
P_D_CASJ
P_D_BADDR0
P_D_ADDR10
P_D_DQ3
P_D_BADDR0
P_D_DQ15
P_D_DQ8
P_D_ADDR1
P_D_DQM0
P_D_DQ14
D_BADDR0
P_D_DQ11
P_D_DQ[0..15]
D_CS0J
P_D_CS0J
D_CLK
P_D_DQ2
P_D_DQ5
P_D_DQ13
P_D_ADDR[0..10]
P_D_DQ7 P_D_ADDR7
P_D_DQ4
D_DQM0
P_D_ADDR3
P_D_ADDR5
P_D_DQ1
P_D_DQ0
D_WEJ
P_D_ADDR6
P_D_CLK
P_D_DQ9
P_D_DQ6
P_D_CLK
P_D_WEJ
D_CS0J
P_D_ADDR8
P_D_DQ12
P_D_ADDR2
D_DQM0
D_BADDR0
P_D_DQM0
D_CKE
ROM_AD16
ROM_AD7
ROM_AD18
ROM_AD13
ROM_AD3
ROM_OEJ
ROM_AD[0..18]
ROM_DA6
ROM_OEJ
ROM_AD6
ROM_AD15
ROM_AD14
ROM_AD9
ROM_DA1
ROM_DA4
ROM_AD8 ROM_DA7
ROM_DA0
ROM_DA2
ROM_DA3
ROM_AD12
ROM_DA5
ROM_AD0
ROM_AD2
ROM_DA[0..7]
ROM_AD10
ROM_WEJ
ROM_AD4
ROM_AD17
ROM_WEJ
ROM_AD1
ROM_AD5
ROM_AD11
ROM_AD4
ROM_AD0
ROM_DA1
ROM_AD3
ROM_AD2
ROM_DA3
ROM_AD16
ROM_AD6 ROM_DA6
ROM_AD10
ROM_AD1
ROM_DA0
ROM_AD8
ROM_AD14
ROM_AD7 ROM_DA7
ROM_AD18
ROM_DA5
ROM_AD13
ROM_AD12
ROM_OEJ
ROM_DA2
ROM_AD11
ROM_AD5
ROM_WEJ
ROM_DA4
ROM_AD9
ROM_AD17
ROM_AD15
D_BADDR0
TRSTJ [3]
TDI [3]
TMS [3]
TCK [3]
TDO [3]
TXD [3]
RXD [3]
P_D_BADDR0 [3]
P_D_CLK [3]
P_D_WEJ [3]
P_D_ADDR[0..10] [3,6]
P_D_CASJ [3]
P_D_DQ[0..15] [3]
P_D_RASJ [3]
P_D_DQM0 [3]
P_D_CS0J [3]
ROM_WEJ [3]
ROM_DA[0..7] [3]
ROM_AD[0..18] [3]
ROM_OEJ [3,6]
D_BADDR0 [6]
VDD33
VDD33 5VD
VDD33
VDD33
VDD33
VDD33
VDD33
R17 33R
R29 33R
R22 33R
R25
10K
R18 33R
R21 33R
TP1
TP
R23
4K7
BC20
0.1uF
R27
10K
TP2
TP
U3
HY57V161610D 1MX16 (TSOP50)
21
22
23
24
27
28
29
30
31
32
20
19
17
16
15
36
14
2
3
5
6
8
9
11
12
39
40
42
43
45
46
48
49
18
35
34
37
33
1
7
13
25
38
44
26
50
4
10
41
47
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
BA
RAS
CAS
WE
UDQM
LDQM
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
CS
CLK
CKE
NC
NC
VCC
VCCQ
VCCQ
VCC
VCCQ
VCCQ
VSS
VSS
VSSQ
VSSQ
VSSQ
VSSQ
R19 10K
BC21
0.1uF
R24
4K7
BC24
0.1uF
R16 33R
BC23
0.1uF
R28 33R
R30 33R
R15 33R
BC22
0.1uF
J3
CON6 (1x6 2.0MM)
1
2
3
4
5
6
BC25
0.1uF
U2
MX29LV400B (TSOP48)
25
24
23
22
21
20
19
18
8
7
6
5
4
3
2
1
48
17
26
28
11
27
46
29
31
33
35
38
40
42
44
30
32
34
36
39
41
43
45
12
47
15
9
10
13
14
16
37
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
CE
OE
WE
GND
GND
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15/A-1
RESET
BYTE
RY/BY
A19(NC2)
NC2
NC3
NC4
A18(NC1)
VCC
R20 33R
J2
CON4 (1x4 2.0MM)
1
2
3
4
R26
10K
U7
39LV040 (PLCC32)(NC)
25
26
27
28
29 31
32
2
3
4
5
6
7
8
24
23
22
21
20
19
18
17
16
15
14
13 12
11
10
9
30
1
A11
A9
A8
A13
A14 WE
VDD
A16
A15
A12
A7
A6
A5
A4
OE
A10
CE
DQ7
DQ6
DQ5
DQ4
DQ3
GND
DQ2
DQ1
DQ0 A0
A1
A2
A3
A17
A18
BC26
0.1uF
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
TV RF
VIDEO AUDIO
J5/J6 only one
M3328C CB 1.0
AUDIO/VIDEO
B
5 7 Thursday, July 14, 2005
Title
Size Document Number Rev
Date: Sheet of
XDR XDL
DR
RFV
RF
R
F
V
XCVBS0
XDR
XDL
DR
RF XCVBS0 RF
XDL
VIDEODA1 [3] VIDEODA3 [3]
VIDEODA0 [3]
VIDEODA2 [3]
AUDIO_DR [3]
AUDIO_DL [3]
A-GND
A-GND
5VD
A-GND
A-GND
A-GND
A-GND A-GND
A-GND
A-GND
A-GND
A-GND
12VA
A-GND A-GND
A-GND
A-GND
L10
1.8uH
R42
75R
TC19
33uF/16V
R41
24K
R34
75R
D3 12V(Zener Diode)
2 1
C8
150pF
R47
4K7
R46
220R
R49
100K
C14
2.7nF
J5
AV Connector
1
3
4
6 2
5
1
3
4
6 2
5
TC17
47uF/16V
TC14
47uF/16V
R50 33R
R37
4K7
R44
75R
R36
220R
TC18
10uF/16V
R39
100K
C15
6.8nF
TC12
47uF/16V
C13
150pF
J6
AV Connector
1
3
4
6
2
5
1
3
4
6
2
5
TC15
10uF/16V
R43
75R
R38 3K3
TP3
TP
+
-
U4A
4558 (SO-8)
3
2
1
8
4
TP4
TP
TP5
TP
C12
6.8nF
C10
470pF
TC11
100uF/16V
C11
2.7nF
D4
UMZ6.8N
1
2
3
+
-
U4B
4558 (SO-8)
5
6
7
8
4
C9
470pF
TC16
10uF/16V
TC13
220uF/16V
R40
4K7
J4
RF MODULE
1
2
3
4
5
67
R35
330R
R45
330R
BC27
0.1uF R31
33R
R32
5K6
R33
24K
R48
3K3
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
NPN
C
E
2N3904( SOT- 23)
3
1 B 2
close to M3328c chip close to
tuner
M3328c Hardware Config
1. CPU_PROBE_EN
STRAPIN[0]: ROM_OEJ
0: Disable(DEFAULT)
1: Enable
4. CHIP_MODE
STRAPIN[11:9]: [P_D_ADDR10:8]
000: Mode0(Flash muxed 8-bit MODE) (DEFAULT)
001: Mode1(Flash and GPIO muxed MODE)
3. MEM_PLL_M
STRAPIN[6:4]: P_D_ADDR[5..3]
000: 135M (DEFAULT)
001: 120M
010: 98M
011: 108M
2. CPU_PLL_M
STRAPIN[3:1]: P_D_ADDR[2..0]
011: 216M (DEFAULT)
100: 180M
101: 154M
( NC)
( NC)
( NC)
5. CRYSTAL SELECT
STRAPIN[12]: [P_D_BADDR0]
0: 27MHz (DEFAULT)
1: 13.5MHz
M3328C CB 1.0
TUNER
B
6 7 Thursday, July 14, 2005
Title
Size Document Number Rev
Date: Sheet of
MODULE_AGC
P_D_ADDR2 STRAPIN3
P_D_ADDR8 STRAPIN9
P_D_ADDR4 STRAPIN5
P_D_ADDR[0..10]
ROM_OEJ
P_D_ADDR3 STRAPIN4
ROM_OEJ STRAPIN0
STRAPIN2 P_D_ADDR1
P_D_ADDR0 STRAPIN1
MODULE_AGC
VLNBA
VLNBA
D_BADDR0 STRAPIN12
D_BADDR0
LNB_CUT [3]
DISEQC_H/V [3]
DISEQC_OUT [3]
QOUT+ [3]
IOUT+ [3]
IIC-SCK [3]
XAGC [3]
ROM_OEJ [3,4]
P_D_ADDR[0..10] [3,4]
IIC-DA [3]
D_BADDR0 [4]
24V
RF_5V
RF_5V
VDD33
VDD33
R59 2K2
R56
2K2
R69 4K7
R67 4K7
R64
1K
TP10
TP
C17
1200P
R51
240R
R65 1K
R83 4K7
Q2
2N3904
1
2
3
R60
1K
R68 4K7
TP6 TP
BC28
0.1uF
R62
120R
C18
1000pF
R63
NC
TP7 TP
R57
NC
R53 4K7
R78 10K
R58 10K
C16
0.1uF
JP1
1 2
D5
FR105
2 1
R71 4K7
R72 4K7
R52
2K2
U5
LM317(TO-220)
3
1
2
4
5
IN
A
D
J
OUT
OUT
OUT
TP8
TP
C19
1000pF
Q4
2N3904
1
2
3
R61 2K2
TP9
TP
Q3
2N3904
1
2
3
R70 4K7
R66 1K
R54 4K7
J7
TIANCHENG 2118 TUNER
1
2
3
4
5
6
7
8
9
10
11
12
1
3
1
4
1
5
1
6
NC
LNBA
5VA
AGC
IOUT
QOUT
5V
30V
10M
GND
SCL
SDA
G
N
D
G
N
D
G
N
D
G
N
D
TC20
22uF/35V
R55 2K2
R73 4K7
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VDD18
ANALOG GND
TUNER RF GND
DIGITAL 5V
GND
M3328C VIDEO DAC 3.3V
M3328C QPSK DIGITAL 3.3V
M3328C QPSK ANALOG 3.3V
Digital GND
Audio OP POWER 12V
M3328C IO PART 3.3V
RF_5V
24V
TVDAC3V3
TUNER POWER 5V
LNB POWER 24V
VDD33
RXADC_VDDA
RXADC_VDD
TGND
M3328C CORE 1.8V
A-GND
5VD
12VA
bead
bead
AS1117
( 1. 8V)
12VA
RF_5V
STB POWER
SUPPLY
5V
3. 3V
VDD18
TVDAC3V3
24V
24V
RXADC_VDD RXADC_VDDA
5VD
VDD33
bead
bead
2. 2K
System Board Power Connector
1. 8V bead
R77 For Power f i ne
adj ust
Option
M3328C CB 1.0
POWER
B
7 7 Thursday, July 14, 2005
Title
Size Document Number Rev
Date: Sheet of
VDD33 VDD18
RF_5V
GND
24V
5VD
12VA
VDD33
A-GND
VDD18
R74 2K2
TC23
470uF/16V
L12 BEAD
TC21
470uF/16V
R76
56R 1%
R75
120R 1%
R77
910R 1%
U6
LD1117A 1.8V(TO-252,800mA])
3
1
2
IN
A
D
J OUT
TC24
470uF/16V
D8
1N4001(NC)
2 1
1
2
3 4
5
6 7 8 9
1
2
3 4
5
6 7 8 9
BC29
0.1uF
L11 BEAD
TP24
TP
BC32
0.1uF
BC30
0.1uF
L13 22uH
BC31
0.1uF
D7
1N4001(NC)
2 1
1
2
3 4
5
6 7 8 9
1
2
3 4
5
6 7 8 9
TP11
TP
TC22
100uF/16V
JPS1
CON8 (1x8 2.54MM)
1
2
3
4
5
6
7
8
TP12
TP
TP13
TP
TP14
TP