library IEEE;

use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity Colabotativo 2 is
Port (
Q3: in std_logic;
Q2: in std_logic;
Q1: in std_logic;
Q0: in std_logic;
J0: out std_logic;
K0: out std_logic;
J1: out std_logic;
K1: out std_logic;
J2: out std_logic;
K2: out std_logic;
J3: out std_logic;
K3: out std_logic
);
end Colabotativo 2;
architecture behavioral of Colabotativo 2 is
begin
J0<=((not(Q3)))
K0<=((Q1) or (Q2) or (Q3))
J1<=((Q2 and not(Q0)) or (not(Q2) and Q0))
K1<=((not(Q0)) or (Q2))
J2<=((Q1) or (Q3 and not(Q0)))
K2<=((Q0) or (Q1))
J3<=((Q2 and Q1 and not(Q0)) or (Q2 and not(Q1) and Q0))
K3<='1'
end behavioral;