DATA TRANSFER

Data transfer between the central computer

and I/O devices

This transfer is controlled by different

modes.
i. Programmed I/O

ii.

Interrupted-initiated I/O

iii.

Direct memory access(DMA)

Programmed I/O
Data transfer is initiated by an instruction in the
program.
Usually data transfer is between cpu register and
peripheral devices.
Even data transfer between cpu and memory is
carried on .
The peripherals are monitored constantly.
cpu stays in a program loop unit the I/o unit
indicates that the device is ready.
Its a time consuming process since the processor
is kept busy un-necessarily.

APPLICATIONS
It is very useful in small low speed
computers or in system that are
dedicated to monitor a device
continuously.

INTERRUPT I/O
Interface keep on monitoring the device.
When the interface senses that data is available
for transfer it simply sends the interrupt request
signal.
Interrupt signals are used to initiate the transfer
of data.
Interrupt request signal is issued only when the
data are available for transfer.

PRIOTY INTERRUPT
In this each and every device is established
with priority as there would be many devices
at a time requesting for services.
Device with higher priority is served first and
device with low next.

PRIORITY INTERRUPT
PRIORITY INTERRUPTS CAN BE ESTABLISHED
BY: Hard ware
software
Software method of initializing is known
as polling.
Daisy chaining priority method is used for
hardware method of establishing priority

POLLING
In this each device is polled sequentially.
It has got only one branch address.
the order in which they are tested decides
the priority of the interrupt.
It is a software method used to identify the
highest priority source.

DAISY CHAINING PRIORITY

The device with higher priority is first
followed with lower priority devices.
The interrupt request line is common to all
devices.
This is a hard ware methods of establishing
priority
In this all the devices with services request
are arranged sequentially.

DIRECT MEMORY
ACCESS(DMA)

It is technique where the memory bus is directly

controlled by the peripheral device to speed the
transfer of data.
During dma transfer the cpu is i.E it has no
control over the memory bus.
It mainly uses two signal for process:

* Bus request(BR)
* Bus grant(BR)

Conclusion
Transfer of data from one location
to another without changing the
binary information content. It
provides the user greater flexibility
to carry out various computational
class.