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Chng 4 : Hot ng nh thi

HOT NG NH THI

4.1 M U
Ni dung ca chng ny kho st cc b nh thi ( timer ) ca chip 8051. Ta hy
bt u t quan im n gin v cc b nh thi thng c s dng cho cc b vi
x l hoc cc b vi iu khin.
Mt b nh thi l mt chui cc flipflnp vi mi flipflop l mt mch chia 2,
chui ny nhn mt tn hiu ng vo lm ngun xung clock. Xung clock t vo
flipflop th nht, flipflop ny chia i tn s xung clock. Ng ra ca flipflop th nht
tr thnh ngun xung clock cho flipflop th hai, ngun xung clock ny cng c chia
cho 2, v.v... V mi mt tng k tip nhau u chia cho 2 nn mt b nh thi c n tng
s chia tn s xung clock ng vo ca b ny cho 2n.
Ng ra ca tng cui cng lm xung clock cho mt flipflop bo trn b inh thi
hay cn goi l c trn ( overflow flag ), c trn ny c kim txa_bi_phn mm hoc
to ra mt ngt. Gi tr nh phn trong cac flipflop ca b nh thi l s" m ca cc
xung clock t khi b nh thi bt u m. Th d mt b nh thi 16-bit s m t
0000H n pFFFH. C trn c set bng 1 khi xy ra trn s m t FFFFH xung
0000H.
Hot ng ca mt b nh thi n gin c minh ha trong hnh 4.1, b nh
thi 3-bit. Mi mt tng l mt D.FF kch khi cnh m hot ng nh mt mch chia
cho 2 do ta ni ng ra Q vi ng vo D. Flipflop c n gin l mt mch cht D c
set bng 1 bi tng cui ca b nh thi. Gin thi gian hnh 4.1.b cho thy tng
th nht (Qo) chia 2 tn s xung clock, tng th hai chia 4 tn s' xung clock v v.v...
S" m ( count ) c ghi dng thp phn v c kim tra d dng bng cch kho
st trng thi ca 3 liplop. Th d s' m l 4 xut hin khi Q 2 = 1, Qi = 0 v Qo = 0 (
4io = 1002 ). Cc liplop hnh
4.1 l cc flipflop tc ng cnh m ( ngha l ng ra Q ca cc flipflop i trng thi
theo cnh m ca xung clock ). Khi s" m trn t 11 la

i66

H vi diu khin 8051

xung 0002, ng ra Q2 c cnh m ( 1 -> 0 ) lm cho trng thi ca flip- flop c i t 0


ln 1 ( ng vo D ca flipflop ny lun lun logic 1 ).
B nh thi c s dng trong hu ht cc ng dng hng iu khin v 8051 vi
cc b nh thi trn chip khng phi l trng hp ngoi l. 8051 c hai b nh thi 16bit, mi b c bn ch hot ng. B nh thi th ba vi ba ch hot ng dc
thm vo i vi chip 8052. Cc b nh thi c dng d :
(a)

nh thi trong

(b)

m s kin.

(c)

To tc baud

mt khong thi gian.

cho port ni tip ca chip

8051.

Timer flip flops (3)


Flag"

LSB
MSB
"Fla g

Clock

BTI
Qo(LSB)

QI

i
!, (MSB7|_

'
Q:

Count

3i4

5I6

7I0

Flag

Flag IS set on 7-to-0 timer


overflow

Hnh 4.1 : Mt b nh thi 3-bit (a) s logic (b) gin thi gian
Timer flipflops : cc flipflop nh thi
Flag flipflop : flipflop c Count : s
m
Flag is set on 7-to-0 timer overflow : c' c set khi C trail b nh thi ( s m trn
t 7 xung 0 )
Vi b nh thi 16-bit, tng cui cng ( tng th 16 ) chia tn s 'ung clock
ng vo ca b nh thi cho 2 - 655^6.

Chng 4 : Hot ng nh thi

67 g)

Trong cc ng dng nh thi trong mt khong thi gian, b nh thi c lp trnh


sao cho s trn sau 1 khong thi gian qui nh v set c trn ca b nh thi bng 1. C
trn c s dng ng b chng trnh nhm thc hin mt cng vic nh l kim
tra trng thi ca cc ng nhp hoc gi d liu n cc ng xut. Cc ng dng khc c
th s dng xung clock qui nh ca b nh thi o khong thi gian gia 2 s kin
( th d o rng xung ).
Vic m s kin c dng xc nh s ln xut hin ca mt s kin hn l o
thi gian gia cc s kin. T s kin l mt kch thch bn ngoi cung cp mt chuyn
trng thi t 1 xung 0 ti mt chn ca chip 8051. Cc b nh thi cng c th cung
cp xung clock tc baud cho port ni tip bn trong 8051.
Cc b nh thi ca 8051 dc truy xut bng cch s dng 6 thanh ghi chc nng
c bit ( xem bng 4.1 ). Vi b nh thi th ba ca chip 8052, ta c thm 5 thanh ghi
chc nng dc bit na truy xut b nh thi ny.
SFR ca b
nh thi

Mc ch

a
ch

nh a
chi bit

TCON

iu khin

88H

TMOD

Chn ch

89H

Khng

TLO

Byte thp ca b nh thri 0

8AH

Khng

TL1

Byte th'p ca b nh thi 1

8BH

Khng

THO THI

Byte cao ca b nh thi 0


Byte cao ca b nh thi 1

8CH
8DH

Khng
Khng

T2CON

iu khin b nh thi 2

C8H

RCAP2L

Nhn byte thp ca b nh thi 2

CAH

Khng

RCAP2H
TL2

Nhn byte cao ca b nh thi 2


Byte thp ca b nh thi 2

CBH
CCH

Khng
Khng

TH2

Byte cao ca b nh thi 2

CDH

Khng

Bng 4.1 : Cc thanh ghi chc nng c bit ca b

nh thi

4.2 THANH GHI CH NH THI ( TMOD )


Thanh ghi TMOD ( timer mode register ) cha hai nhm 4-bit dng thit lp ch
hot ng cho b nh thi 0 v b nh thi 1 ( xem bng 4.2 v 4.3 ). TMOD khng
c inh a ch tng bit v iu ny cng khng cn thit. Mt cch tng qut, TMOD
c np mt ln bi

H vi iu khin 1951
phn mm thi im bt u ca mt chng trnh khi ng ch hot ng
ca b nh thi. Sau , b nh thi c th c dng, bt u, v.v... bng cch truy
xut cc thanh ghi chc nng c bit khc ca b inh thi.
Bit
7

Tn
GATE

B nh thi M t
1
Bit iu khin cng. Khi dc set ln 1,
b nh thi ch hot ng trong khi
NT1 mc cao.

C/T

Bit chn chc nng m hoc nh thi :


1 = m s kin
0 = nh thi trong mt khong thi gian

MI

Bit chn ch th nh't (xem bng 4.3)

MO

Bit chn ch th hai (xem bng 4.3)

GATE

Bit iu khin cng cho b dnh thi 0

C/T

Bit chn chc nng m hoc dinh thi


cho b nh thi 0

MI

Bit chn ch d th nht

MO

Bit chn ch th hai.

Bng 4.2 : Thanh ghi chn ch nh thi

MI

MO

Ch

M t

Ch d

Ch

Ch

Ch d
B dnh thi 0 : TLO l mt b nh thi 8-bit dc iu
khin bi cc bit chn ch ca b nh thi 0. THO,
tng t TLO ch khc l c iu khin bi cc bit chn
ch ca b nh thi 1.
B nh thi 1 : dng, khng hot ng.
Bng 4.3 : Cc ch nh thi

9 (S3

Chng 4 : Hot ng nh thi

4.3 THANH GHI ll KHIEN NH THJl ( TCN )


Thanh ghi TCON cha cc bit iu khin v trang thi ca b nh thi 0 v b nh
thi 1 ( xem bng 4.4 ). Bn bit cao trong TCON ( TCON.4 - TCON.7 ) c dng
iu khin cc b nh thi hot ng hoc ngng ( TRO, TRI ) hoc bo cc b nh
thi trn (TF0, TF1). Cc bit ny c dng rng ri trong cc th d ca chng ny.
Bn bit th'p ca TCON ( TCON.O - TCON.3 ) khng dng iu khin cc b nh
thi, chng c dng pht hin v khi ng cc ngt ngoi. Vic tho lun v cc bit
ny c hon li cho n chng 6, chng cp n cc ngt.
Bit
K hiu a ch bit M t
TCON.7

TF1

8FH

Bit diu khin hot dng ca b dinh thi 1. Bit


ny c set hoc c xa bi phn mm d
iu khin b nh thi hot ng hay ngng hot
ng.

TCON.6 TRI 8EH

v/

TCON.5

TF0

8DH

TCON.4

TRO

8CH

TCON.3 IE1

TCON.2 IT1

C trn ca b nh thi 1. Cf ny c set bi


phn cng khi c trn, dc xa b'i phn mm,
hoc bi phn cng khi b vi x l tr n trnh
phc v_agt.

8BH

8AH

C trn ca b nh thi 0
Bit diu khin hot dng ca b nh thi 0.
C ngt bn ngoi 1 ( kch khi cnh ). C' ny
c set bi phn cng khi c canh m ( xung )
xut hin trn chn 1NT1. c xa bi phn
mm, hoc phn cng khi CPU tr n trinS phc
v ngt.
C ngt bn ngoi 1 ( kch khi cnh hoc mc ).
C ny dc set hoc xa bi phn mm khi xy
ra cnh m ( xung ) hoc mc thp ti chn
ngtngoi.

VTCON.1

IEO

89H

ngoi 0 ( kch khri cnh ).

TCON.O
C ngt bn

ITO

88H

C ngt bn ngoi 0 ( kch khi cnh hoc mc


).

Bng 4.4 : Thanh ghi diu khin nh thi TCON<:

IS 70

H vi iu khin 8051

4.4 CC CH NH THI V C TRN


Tng b nh thi s c cp n trong mc ny. Do ta c hai b nh thi trn
chip 8051, k hiu X c s dng ch hoc b nh thi 0 hoc b nh thi 1;
th d THx c ngha l THO hoc THI ty theo b nh thi l 0 hay 1. S sp xp cc
thanh ghi TLx, THx v cc c' trn TFx ca b nh thi c trnh by trong hnh 4.2
cho tng ch nh thi.
Timer

TLx

clock

(5 bit.s)

THx

TFx

(8 bits)
Overflow
flag

UI) Mode 0

Timei*
clock
Overflow
flag

,t I
clock

Timer

(a) Mode 1

(a)

Mode 2

TLx

Timer
clock

Tilx

Overflow
flag

Timer
clock

/
12F.

Overflow
flag

(aJ Mode 3

Hnh 4.2 : Cc ch nh thi (a) ch 0 (b) ch 1 (c) ch 2 (d) ch


3
Timer clock : xung clock cho b nh thi
Overflow flag ; c' trXI Mode 0, 1, 2. 3 : ch

0, 1, 2, 3 Reload : np li
1/12

; 1/12 tn s ca mch dao ng trn chip

Chng 4 : Hot ng nh thi

71 g)

4.4.1 Ch nh thi 13-bit ( ch 0 )


Ch 0 l ch nh thi 13-bit cung cp kh nng tng thch vi b vi iu
khin tin nhim 8048. Ch ny khng c dng cho cc thit k mi ( xem hnh
4.2a ). Byte cao ca b nh thi THx c ghp cascade vi 5bit thp ca byte thp ca
b nh thi TLx to thnh mt b nh thi 13-bit. Ba bit cao ca TLx khng s
dng.

4.4.2 Ch' nh thi 16-bit ( ch 1 )


L
Ch 1 l ch nh thi 16-bit v c cu hnh ging ch nli thi 13-bit, ch
khc nhau ch by gi l b nh thi 16-bit. Xung cock t vo cc thanh ghi nh
thi cao v thp kt hp ( TLx/THx ). Khi c xung clock n, b nh thi (jm ln :
0000H, 0001H, 0002H, .... Mt trn s xut hin khi c s chuyn s m t FFFFH
xung 0000H, s kin ny s set c trn bng 1 v b nh thi tip tc m. C trn l
bit TFx trong~hanh ghi iu khin nh thi TCON, bit ny c c hoc ghi bi phn
mm ( xem hnh 4.2.b ).
Bit c ngha ln nht ( MSB ) ca gi tr trong cc thanh ghi ih thi l bit 7 ca
THx v bit c ngha thp nht ( LSB ) l bit 0 ca TLx. Bit LSB thay i trng thi v
chia 2 tn s xung clock nh thi ng vo trong khi bit MSB thay i trng thi v
chia cho 65536 ( tc l 210 ) tn s xung clock nh thi ng vo. Cc thanh ghi nh
thi ( TLx / THx ) c th c c hoc ghi mt thi im bt k bi phn mm.

4.4.3 Ch' t np li 8-bit ( ch 2 ) - TH

/
Ch 2 l ch t np li 8-bit. B.yte th7p ca b inh thi ( TLx ) hoat, ng
nh thi 8-bit trong khi bv.e caq ca b nh thi lu gi gi tr np li. Khi s m trn
t FFH xung 00H, khng ch c trn ca b nh thi c set ln 1 m gi tr trong
THx cn c nap vo TLx ; vic m s tip tc t gi tr ny cho n khi xy ra 1 trn
( FFH > 00H ) k tip, v.v... Ch ny kh tin li do bi vic t.rn b nh thi xy
ra nhng khong thi gian xc nh v tun hon mt khi cc thanh ghi TMOD v THx
d c khi ng ( xem hnh 4.2c ).

4.4.4 Ch .nh thi chia x ( ch 3 )


Ch 3 l ch nh thi chia x v c hot ng khc nhau cho tng b inh
thi. B inh thi 0 ch 3 c chia thnh 2 b nli thi 8-bit hot ng ring r
TLO v THO, mi b nh thi s sct. cc c Trrt0npil|f'T.b'U v TFvhTxa ra
trn.
B nh thi 1 khng hot ng ch 3 nhng c th c khi ng bng
cchrchuyn b ii thi ny vo mt trong cc ch khc.
Gii hn duy nht l c trn TF1 ca b nh thi 1 khng b nh hng bi b nh thi
1 khi b ny xy ra trn v TF1 c ni vi b nh thi 8-bit THO.
Cl> 3 ch yu cung cp thm mt b nh thi 8 bit na ; ngha l 8051 c thm

IS 72

H vi iu khin 8051

b nh thi th ba. Khi b nh thi 0 ch 3, b nh thi 1 c th hoat nff hoc


ngng bng cch chuyn b ny ra khoi ch 3 hoc vo ch 3. B nh thi c
th c s dng bi port ntip ( lc ny b nh thi 1 lm nhim v ca b to
xung *C?0C:tc baud ) hoc c s dung theo mt cch no nhng hng yu
cu ngt ( v b nh thi 1 lc ny khng cn ni vi TF1 ).

4.5 NGN XUNG CLOCK NH THI


Hnh 4.2 khng trnh by cch to ra ngun xung clock nh thi cho cc b nh
thi. C 2 kh nng to ra ngun xung clock ny, vic la chn kh nng no do ta thit
lp bit C/T ( counter / timer ) ca thanh ghi TMOD bng 1 hay 0 khi b nh thi c
khi ng. Mt ngun xung clock c dng nh thi trong mt khong thi gian,
ngun xng clock cn li c dng m s kin.
/4.5.1 nh thi mt khong thi gian
Nu C/T = 0, hot ng nh thi c chn v ngun xung clock ca b nh thi
do mach dao ng bn trong chip tao ra. Mt mch chia 12 tng c thm vo gim
tn s xung clock n mt gi tr thch hp vi hu ht cc ng dng. Lc ny b nh
thi c dng nh thi trong mt khong thi gian. Cc thanh ghi nh thi ( TLx /
THx ) m ln vi tn s xung clock bng 1/12 tn s ca mch dao ng trn chip
[ ngha l nu thch anh l 12MHz, tn s xung clock l 1MHz ]. B nh thi s trn
sau mt s xung clock c nh ph thuc vo gi tr ban u np cho cc thanh ghi nh
thi ( TLx / THx ).

4.5.2 m s kin
Nu C/T = 1, b nh thi c cung cp xung clock t 1 ngun to xung bn ngoi.
Trong a s cc ng dng, ngun xung clock ny cung 'cp cho b nh thi mt xung
da trn vic xy ra mt s kin - b nh thi by gi m s kin. S cc s kin c
xc nh trong phn mm bng cch c cac~tKnh ghi nh thi ( TLx / THx X gi tr
16-bit trong cc thanh ghi ny tng theo mi s kin. Hai chn ca port 3 ( P3.4 v
P3.6 ) by gi tr thnh ng vo xung clock cho cc b nh thi. Chn P3.4 l ng vo
xung clock cho b nh thi 0 ( ta cn gi l chn TO ng cnh ny ), chn P3.5 hoc
TI l ng vo xung clock cho b nh thi 1 ( xem hnh 4.3 ).

Chng 4 : Hot ng nh thi

73 g)

Hnh 4.3 : Ngun xung clock Crystal : tinh th thch anh On-chip oscillator : b dao
ng bn trong chip TO or TI pin : chn TO hoc TI
0 = Up ( interval timing ) : 0 = v tr trn ( nh thi mt khong thi gian )
1 = Down ( event counting ) : 1 = v tr di ( m s kin )
Timer clock : xung clock nh thi
Trong cc ng dng m s kin, cc thanh ghi nh thi tng mi khi xy ra chuyn
trang thi t. 1 xung 0 ng vo Tx ( TO hoc TI ). Ng vo Tx c ly mu trong
sut thi gian S5P2 ca mi mt chu k my, vy th khi ng vo mc cao trong mt
chu k v mc thp trong chu kv k. s m c tng. Gi tr mi xut hin trong cc
thanh ghi nh thi trong sut thi gian S3P1 ca chu k tip theo chu k pht hin s
chuyn trng thi. T ta thy phi mt 2 chu k my ( 2|.IS ) nhn bit s chuyn
trang thi t 1 xung 0. tn s cc i cua ngun xung clock bn ngoi l 500 KHz ( vi
gi s chip vi iu khin Hot d0rig~v3i thch anh 12 MHz X

4.6 KHI NG, DNG V DIEU KHIN CC B NH THI


Hnh 4.2 minh ha cc cu hnh khc nhau ca cc thanh ghi nh thi TLx, THx v
cc c trn ca b nh thi, TFx. Hai kh nng cung cp xung clock cho b nh thi
cho hnh 4.3. By gi chng ta kho st vic khi ng, dng v iu khin cc b nh
thi.
Cch n gin nht khi ng v dng cc b nh thi l s dng bit iu khin
hot ng TRx trong thanh ghi TCON. TRx c xa khi thit lp li h thng ; ngha l
cc b nh thi ngng hot ng. ( xem hnh 4.4 ).
Do thanh ghi TCON l thanh ghi c nh a chi tng bit, ta d dng khi ng
hoc dng cc b nh thi bng chng trnh.

IS 74

H vi iu khin 8051

Hnh 4.4 : Bt u v dng cc b nh thri Timer clock : xung clock dnh thi Timer
registers : cc thanh ghi nh thi
0 = Up ( timer stopped ) : 0 = v tr trn ( b nh thi dng )
1 = Down ( timer started ) : 1 = v tr di ( b nh thi c khi ng )
Th d b nh thi 0 c khi ng bng lnh :
SETB TRO
jg.-r-----------------------------------------------------

v c iu khin dng bng lnh :


CLR TRO
Trnh dch hp ng s thc hin vic bin i k hiu TRO thnh a ch bit.
Lnh SETB TRO ng ngha vi lnh SETB 8CH.
Mt phng php khc iu khin cc b nh thi l s dng bit GATE trong
thanh ghi TMQD v ng vo INTx. Bng cch set bit GATE ln 1 ta cho php b nh
thi c iu khin bi INTx. Phng php ny thng c dng rng xung
nh c trnh by sau y.
Gi s INTO mc thp ri chuyn sang mc cao trong mt khong thi gian v ta
o khong thi gian ny. Ta khi ng b nh thi 0 ch 2, ch nh thi 16-bit
vi TLO/THO = 0000H, GATE = 1 v TRO = 1. Khi INTO chuyn ln mc cao, b nh
thi c m cng v nhn xung clock c tn s 1MHz. Khi INTO chuyn xucng mc
thp, b nh thi b kha cng khng nhn xung clock na v rng xung tnh bng |
4.s l s m trong TLO / THO ( INTO c th c lp trnh to ra 1 ngt khi chn
ny chuyn tr v mc thp ).
Hnh 4.5 minh ha b nh thi 1 hot ng ch 1 ( b nh thi 16-bit ). Cng
vi cc thanh ghi TLl/THl v c trn TF1, s hnh 4.5 trnh by cc kh nng cp
ngun xung clock, khi ng, dng v iu khin b nh thi 1.

Chng 4 : Hot ng nh thi

Hnh 4.5 : Hot ng ch 1 ca b nh thi 1 On-chip osc : mch dao ng bn


trong chip

4.7 KHI NG V TRUY XUT CC THANH GHI NH THI


Cc b nh thi thng c khi ng mt ln thi im bt u chng trnh
d thit lp ch hot ng theo yu cu. Trong thn ca chng trnh, cc b nh thi
c iu khin hot ng, dng, kim tra cc bit c v xa, cc thanh ghi nh thi
c c hoc cp nht v v.v... ty theo yu cu ca ng dng.
TMOD l thanh ghi dc khi ng trc tin v dy l thanh ghi thit lp ch
hot ng. Ly th d lnh sau y khi ng b nh thi 1 hot ng ch 16-bit
( ch 1 ), xung clock c cp t mch dao ng trn chip ( nh thi mt khong thi
gian ) :
MOV TMOD, #00010000B
Kt qu ca lnh ny l thit lp Ml = 0 v MO = 1 n nh ch 1, C/T = 0 v
GATE = 0 s dng xung clock trn chip, xa cc bit chn ch ca b nh thi 0
( xem bng 4.2 ). D nhin trn thc t b nh thi khng bt u cng vic nh thi
cho n khi bit iu khin hot ng TRI c set bng 1.
Trong trng hp cn n s' m ban u, cc thanh ghi nh thi TL1/TH1 cng
phi c khi ng. Cn nh l cc b nh thi m ln v thit lp c trn bng 1 khi
xy ra trn s m t FFFFH xung 0000H, vy th mt khong thi gian 100 |J.S c
th c nh thi bng cch khi ng Til/THl chTsQ em nKo hn OOOOH mt
lng l 100. ngha a -100 hay FF9CH. Cc lnh sau thc hin iu ny :

IS 76

H vi iu khin 8051

MOV TL1, #9CH MOV THI,


#0FFH
K n b nh thi bt u hot ng bng cch thit lp bit iu khin hot ng
bng 1 nh sau :
SETB TRI
C trn c t ng thit lp sau khong thi gian 100 .s. Phn mm c th cha
mt vng lp tr hon thi gian 100 .s bng cch s dng mt lnh r nhnh v lp li
chnh lnh ny trong khi c trn cha c set bng 1 :
WAIT: JNB TF1, WAIT
Khi b nh thi trn, ta cn dng b nh thi v xa c trn bng phn mjD-
CLR TRI

; dng b nh thi

CLR TF1

; xa c' trn

c b nh thi ang hot ng


Trong mt s ng

dng
ta

cn
cgi
tr ( ni dung ) cha
trong cc thanh ghi nh thi ang hot ng.

phi

Do ta phi c 2 thanh ghi nh thi bng 2 dng lnh lin tip ( do khng c lnh
c ng thi c hai thanh ghi nh thi ny ), mt sai pha ( phase error ) c th xut
hin nu c trn i-byte thp chuven sang bvte cao-gia 2 lrTc v do^vy ta khng
th c ng c gi tr cn c. Gii php a ra l trc tin ta phi c byte cao, k
n .c byt thp v ri c byte cao ln na. Nu byte cao thay i gi tr, ta lp li
cc thao tc c va nu. Cc lnh sau y c ni dung ca cc thanh ghi nh thi TL1
/ THI, a vo cc thanh ghi R6 / R7 v gii quyt vn va nu :
AGAIN :

MOV A, THI
MOV R6, TL1 '
CJNE A, THI, AGAIN
MOV R7, A

4.8 KHONG THI GIAN NGAN V KHONG THI GIAN DI


Tm no ca cc khong thi gian c th nh thi c ? Vn ny c kho st
bng cch gi s 8051 hot ng vi thch anh ni vi mch dao ng ni c tn s hot
ng l 12 MHz. Mch ao ng trn chip c chia ch 12 v cc xung clock cp cho
mch nh thi co

Chng 4 : Hot ng nh thi

77 g)

tn s' 1 MHz. Khong thi gian ngn nht c th nh thi c b gii hn khng
phi bi tn s ca xung clock nh thi m bi phn mm ngha l thi gian thc thi cc
lnh to ra gii hn i vi cc khong thi gian nh thi rt ngn. Lnh ngn nht ca
8051 thc hin trong mt chu k my hay 1 0.S. Bng 4.5 tm tt cc k thut c
dng o ra cc khang thi
gian nh
thi khc nhau.
K thut
iu chnh phn mm 'S'

Khong thi gian


*

B nh thi 8-bit t ng np li. B

10

256

nh thi 16-bit v'

65536
khng gii hn

B dnh thi 16 bit + cc vng lp

Bng 4.5 : Khong thi gian nh thi cc di ( ns )


Th d 4.1 : To dng xung
Vit 1 chng trnh to dng xung tun hon trn chn Pl.o c tn s cao c th c
c. Tn s v chu k nhim v ca dng xung l bao nhiu ?
Cc khong thi gian rt ngn (
c ngha l tn s cao
) cth c
lp trnh mkhng cn s dng
n cc b .nh
trnh sau :
Th
d
chng
LOOP: ORG 8100H

SETB Pl.o

; 1 chu k my
CLR Pl.o

; 1 chu k my

SJMP LOOP

; 2 chu k my

END
Chng trnh trn to ra dng xung trn chn Pl.o, xung c chu k l 4 (J.S : thi gian
mc cao l 1 (J.S v thi gian mc thp l 3 (J.S trong mt chu k. Tn s ca xung l 250
KHz v chu k nhim v l 25% (xem hnh 4.6)
I-*-----------------4ns --------------------*-1
|SETB Pl.o CLR Pl.o I SJMP loop SETB Pl.o etc.
Pl.o

One machine cycle (1J.JS)

Hnh 4.6 : Dng xung ca th d 4.1

i78

H vi diu khin 8051

SJMP loop : vng lp' SJMP


One machine cycle ( 1 US ) : mt chu k my ( lus )

Lnh SETB Pl.o thc t khng st bit 0 ca port 1 ln 1 cho n khi kt thc lnh
ny, trong thi gian S6P2, v cc lnh tip theo cng tng t. Chu k ca tn hiu ng
ra c th ko di thm mt t bng cch chn cc lnh NOP ( khng ton hng ) vo trong
vng lp. Mi lnh NOP c chn thm lm cho chu kv ca tn hiu ng ra c cng
tin 1 sT Th diTeTta chn 2 lnh NOP sau lnh SETB Pl.o, chng tfh s to
ng ra mt xung vung c chu k 6 ns v tn s l 166.7 KHz. Tuy vy ta cn thy rng
vic iu chnh phn mm nh trn s tr nn cng knh v vng v, cch la chn tt
nht tr hon vn l s dng b nh thi.
Cc khong thi gian di va phi d dng nhn c bng cch s dng ch t
np li 8-bt, ch 2. Do cc khong thi gian cn c nh thi c thit lp bi
mt s m 8-bit, khong thi gian di nht c th c trc khi trn l 2H = 256 (.LS.
Th d 4.2 : Sng vung 10 KHz
Vit 1 chng trnh to sng vung 10 KHz trn chn Pl.o bng cch s dng b
nh thi 0.
Sng vung 10 KHz yu cu chu k 100 ns vi thi gian mc cao l 50 ns v thi
gian mc thp l 50 ^s. Do khong thi gian ny nh hn 256 ns nn ch 2 c s
dng. Mt trn xy ra sau mi 50 ns yu cu mt gi tr s m nh hn 00H mt lng
l +50 phi c np v np li cho TL0, ngha l gi tr np cho THO l -50. Di y
l chng trnh theo yu cu :
ORG

8100H

MOV

TMOD, #02H

; ch t np li 8-bit

MOV

THO, #-50H

; THO cha gi tr -50

SETB

TRO

; b nh thi hot dng

TF0, LOOP

; ch trn 1

CLR

TF0

; xa c trn

CPL

Pl.o

; di trng thi bit Pl.o

LOOP: JNB

SJMP

LOOP

; lp li

END

Chng trnh trn s dng lnh ly b bit CPL thay v l lnh STB v CLR nh
trong th d 4.1. Gia hai thao tc ly b c mt tr hon

Chng 4 : Hot ng nh thi

Bit

K hiu

a ch bit

T2CON.7

TF2

CFH

T2CON.6

EXF2 CEH

C trn ca b nh thi 2. (khng c


set khi TCLK hoc RCLK = 1)
C ngoi ca b nh thi 2. C c set khi c
s thu nhn hoc np li xy ra do bi s
chuyn trng thi 1 -> 0 ' chn T2EX v
EXEN2 = 1 ; khi cc ngt do b nh thi c
php, EXF2 = 1 lm cho CPU tr ti trnh phc
v ngt. EXF2 c xa bi phn mm.

Clock thu ca b nh thi 2. Khi c set,


b nh thi 2 cung cp tc baud (khi
T2CON.5

T2CON.4

T2CON.3

T2CON.2

thu) cho port ni tip; b nh thi 1 cung cp


tc baud (khi pht).

RCLK CDH

Clock pht ca b nh thi 2. Khi c set, b


nh thi 2 cung cp tc baud pht; b
nh thi 1 cung cp tc baud thu.

TCLK CCH

Cho php t bn ngoi. Khi dc set, vic thu


nhn v np li xut hin khi c s chuyn
trng thi 1 > 0 chn T2EX.
Bit iu khin hot ng b nh thi 2. Bit ny
c set hay xa bi phn mm iu khin
b nh thi 2 hot dng hoc ngng.

EXEN2 CBH

TR2

CAH

Bit chn chc nng m hoc nh thi ca b


nh thi 2.1 = m s kin; 0 = nh thi mt
khong thi gian.
C thu nhn/np li ca b nh thi 2. Khi

c set, vic thu nhn xu't hin khi c s


C/T2 C9H
T2CON.1
T2CON.O

CP/RL2C C8H

M t

chuyn trng thi 1 > 0 T2EX nu EXEN2 =

1; khi c xo, t dng np li xut hin khi


c trn b nh thi hoc s chuyn trng thi '
T2EX nu EXEN2 = 1 ; nu RCLK hoc TCLK
= 1, bit ny dc b qua.

Bng 4.6 : Thanh ghi iu khin nh thi T2CON

84

H vi iu khin 8051

Vic np li xy ra khi c trn s' m t FFFFH xung 0000H TL2/TH2 v thit


lp c TF2 bng 1. iu kin ny c xc nh bi phn mm hoc c lp trnh
to ra mt ngt. Vi c 2 cch va nu, TF2 phi c xa bi phn mm trc khi c
ny c set ln na.
Bng cch set bit EXEN2 trong thanh ghi T2CON bng 1, vic np li cng xut
hin khi c s chuyn trng thi 1 > 0 ca tn hiu dt vo chn T2EX ( chn Pl.l ).
S chuyn trng thi 1 -> 0 T2EX cng thit lp bng 1 cho mt bit c mi trong b
nh thi 2 : bit EXF2. Cng vi TF2, bit EXF2 cng c kim tra bi phn mm
hoc to ra mt ngt. EXF2 phi c xa bi phn mm. Ch t np li ca b nh
thi 2 dc trnh by hnh 4.9.

4.9.2 Ch thu nhn


Khi CP/RL2 = 1, ch thu nhn c chn. B nh thi 2 hot ng nh mt b
nh thi 16-bit v thit lp c TF2 bng 1 khi xy ra trn s m t FFFFH xung
0000H TL2/TH2. Trng thi ca TF2 c kim tra bi phn mm hoc to ra 1 ngt.
cho php ch ny hot ng, bit EXEN2 trong T2CON phi c set bng .
1. Nu EXEN2 = 1, s chuyn trng thi 1 -> 0 T2EX ( Pl.l ) s a gi tr trong cc
thanh ghi nh thi TL2 / TH2 vo trong cc thanh ghi RCAP2L v RCAP2H. Vic np
gi tr ny c iu khin bi xung clock. C EXF2 trong T2CON cng c set v
nh cp phn trn, c kim tra bi phn mm hoc to ra mt ngt.
Ch d thu nhn ca b nh thi 2 dc trnh by hnh 4.10.

4.10 TO TC BAUD
Mt ng dng khc ca b nh thi l cung cp xung clock tc baud cho port
ni tip ca chip vi iu khin. B nh thi 1 8051 hor b inh thi 1 Ja-44fhhrif4~2_L-8Q52 thc hin c cng vic ny. To tc baud s cp n trong
chng 5.
Trong chng ny ta kho st cc b nh thi ca cc b vi iu khin 8051 v
8052. Cc gii php phn mm cho cc th d lm ni bt nt chung nhng b gii hn.
Cc gii php ny lm mt nhiu thi gian ca CPU. Cc chng trnh thc thi cc
vng lp ch b nh thi trn. iu ny tt cho c mc ch nghin cu hc hi
nhng di vi cc ng dng hng iu khin thc t s dng cc b vi iu khin,
CPU phi thc hin cc nhim v khc cng nh phi p ng vi cc s kin bn
ngoi ( nh l ngi iu khin a vo mt tham s t bn phm chng hn ). Trong
chng kho st hot ng ngt, ta s minh

Chng 4 : Hot ng nh thi

ha vic s dng cc b nh thi trong mi trng c iu khin ngt.


Ta khng cn phi kim tra c trn ca b nh thi bng mt vng lp m s to ra
mt ngt khi c ti-n b nh thi.

Hnh 4.9 : Ch t np li 16-bit ca b nh thi 2

On-chip
osc.

8052
12

TL2

12 MHz
0 = Up
1 - Down

Tl (P1.0)
C/T2

0 = Up
1 = Down

CaplmT

TR2

T2EX .
(Pl.l)
EXEN2

0 = Up
1 = Down

Hnh 4.10 : Ch thu nhn 16-bit ca b nh thi 2

\7 \7

TH2

TF2

H vi iu khin 8051

Ou-chip osc : b dao ng bn trong chip


Reload : np li Capture : thu nhn
0 = p : nu bit iu khin l 0, chuyn mch v tr trn
1 = Down : nu bit iu khin l 1, chuyn mch v tr di

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