Technology and Device Innovations

Submitted to:
MR. VENKATRAO SELAMNENI

Submitted by:
PRUDHVI RAJU
B.Tech+M.Tech(ECE)
9th Semester

Need for Innovation

The high speed low power devices proposed earlier have the following
drawbacks :
Not capable of drawing the capacitance of long interconnects.
Power can lowered to a better extent.
Difficulty of manufacturing.
So, innovations have to be made such that the circuit architectures are
compatible to the characteristics of the devices.

Technology Used
SOI (Silicon-On-Insulator) Technology :
Improves delay and power through a 25% reduction in total
capacitance.
Substrates are produced by one of the following two ways:
Wafer Bonding.
SIMOX(Separation by implantation of oxygen).

Comparison of the methods

WAFER BONDING

SIMOX

Two bulk Si wafers are oxidized

and two oxide layers are held
together and bonded at a
moderately high temperature.
One of the starting wafers is
thinned by polishing followed by
chemical etching until a thin
layer of Si is left over the oxide.

In SIMOX, oxygen is ion

implanted into a Si substrate at
150KeV.
A buried silicon-dioxide layer
with a flat interface is formed
under a thin Si film.

Other ways of reducing capacitances

One way is to use the minimum possible width for the metal
interconnects that carry ac signals.
Another way is to use low-permittivity insulators for inter metal
dielectrics.

Advantages of SOI
The advantages of SOI MOSFETS over the bulk devices is that the
former might have
low capacitance
slightly high drain saturation current
small reduction of the minimum acceptable voltage.
improvement in layout design due to which the speed increases by
40%.
may be traded for lower Vdd and can obtain up to factor 3 in power
savings.

Example of Innovative Device

DYNAMIC THRESHOLD MOS(DTMOS) TRANSISTOR :