Computer-Aided Analysis and Simulation of Switched DC-DC Converters F.C. Lee and Y. Yu Abseract—State-space techniques ae exmployed to drive tn equivalent soolinear recurrent ne-domain tndel that deseribes the switched de-de ‘converter behavior exactly. This model i employed efcctvely to nnalyze both larze signal behavior by propaating the recurrence equation and ‘matching boundary condition chrougs digital compotation and small signal behavior by ineariaing i aboet the equilibria sat. L INTRODUCTION )ULSE MODULATED do-de converters ae characterized in Fig. 1 by the three basic functional blocks: power stage, analog signal processor, and digital signal processor or duty-cycle controller. The power stage as ilustrated in Fig. 1 by a boost converter processes the power flow fram input to urput. The analog signal processor together with the digital smal processor regulates the power flow ftom input to output. An analog signal is derived from the power stage output and is processed to deliver a duty-cycle modulated pulse signal at the digital signal processot output to achieve ‘the required on-off control af the power switch. The discrete ‘time voltage and current pulses generated in the power stage are averaged by a low-pass filter into an analog signal of certain prescribed voltage magnitude atthe power sige output, chus completing the switching regulator contral loop. ‘The converter operation is represented by a cyclic change of two power stage topologies within each switching cycle. One is for the on-time interval as shown in Fig. (2), when the power switch is “on” and the commutating diode is “off,” ‘while the other at shown in Fig, 2(), is forthe offtime inter- val when the power switch is “off” and the diode is “on.” ‘Thest two time interals are modulated by the duty-cycle con- troller in such 2 fashion that the output always maintains a constant voltage level regardless of the change of the input voltage level or the load. Such converters can be characterized as nonlinear time-varying systems and have presented consider- able difficulties in modeling and analysis. Furthermore, either by design intent orchrough light load operation, a steady-state Paper SPCC 78-24, approved by the Static Power Converter Com- mitte of the IEEE Indasuy Applications Society for presentation at ‘the 1978 IEEE Southeast Region Conference, Atlan, GA, APE 20- 12. Manseript roleszed fot publication June 6, 1979. This work was performed under NASA Contract NAS} 19690, “Modeling and analysis Of Power Processing Systems,” by TRW Systems, the prime contacto, and by the Vigina Polytechnic lnstrte and State University under ‘Subcomtac 8020451 F.C. ¥. Lee is with the Department of Electical Engineering, Vipinis Poiytechaie Insitute and State University, Blacksburg, VA Y. ‘Yu i with the TRW Defense and Space Sysums, Redondo Beas, CA 90278. Fig. 1, DC-DC switched boost converter Hee Fig. 2. Circuit topology during (2) Tow ©) Ty, and (©) Tra. cycle invariably contains a third interval during which the inductor magnetomotive force (MMF) vanishes. During this time interval, both the power switch and the diode are in the “off” state. The power stage consists of only the filter capac- itor and the load, as lustrated in Fig. 2(¢). The system order 1s reduced by one, The addition of such 2 zero-current dwell ‘time complicates the analysis even further. Modeling and analysis of de-de converters has been achieved through various small signal linearization techniques [1] ~(6]. ‘The linearized models are limited only to analyzing the small signal stady-state operation when the duty-cycle sinal can be regarded 2s constant. However, in most applications, the con- verter is frequently subjected to large signal step line/load transients, subsequently varying the duty-cyele ratio to main- ‘ain input-output. regulation. Due to the time varying and switching nature of the system, itis impossible to deduce the large signal performances from the small signal linear models. ‘The large signal behavior of the converters is most conven- iently studied by simulation methods. However, due to the nonlinear and discrete nature of such 2 system, iis ineffective and time consuming to simulate the system by the existing cireuit analysis progams (ECAP, ScEPTRE, csuP, SPICE, ete). Jn the present paper, a discrete timedomain technique is (© 1979 JEEE. Reprinied, with permission, from {EEE Transactions on Industrial Applications, Vol. 10.15, NOS, pp. 511-520, ‘September/October 1978. 35employed to characterize the system by three piecewise linear state-space equations, together with three threshold conditions to determine the termination or initiation of each switching time interval. A nonlinear recurrent time-domain equation is erived that characterizes the converter behavior exactly. This ‘onlinear recurrent time expression can be used to study the large signal behavior by propagating the recurrent equation and matching boundary conditions through digital computa- tion. It can aso be used to analyze the small signal behavior by lineaizng it about the equilibrium state 10 obtain a linear discretetime model for small signal performance evaluations, such at stability and input-output transfer characteristics for the use of investigating the avdiorequency rejection capabil- ity at the input, UL NONLINEAR DISCRETE-TIME SYSTEM. It important to recognize that for exact modeling of the pulse modulation process, switched dedc power converters Should be represented 45 discrete-time systems deccrined by state vector difference equations. The switched converter as Ilustated in Fig. 1 operates on the principle of controling ‘he daty cycle with which a primary power source is switched toa Joad in such a manner that a nearly constant Joad voltage is maintained. ‘A donde voltage stepup (boost) converter with a detailed circuit schematic shown as Fig. 3 is employed as an example to demonstrate the modeling and analysis methodology which is equally applicable to other switching converter types. The boost converter as shown in Fig. 3 employs two feedback. ‘control loops: the de Joop and the ac logp. The de loop senses the converter output voltage and compares it with a reference voltage to generate a dc error signal for voltage regulation. The 1c Joop serves two functions. One function is to sense the smnall signal ac voltage across the energy storagt inductor to generate an ac error signal which combines with the de error signal to serve as an input to the error amplifier. The other function is to generate a large signal ramp function by inte- arating the steady-state ac switching voltage appearing across ‘the inductor. It is commonly known that the famp furiction and 2 threshold detector are the necessary ingredients in order ‘to convert an analog signal into a digital signal. conventional singledoop systems employing the de-feedback loop only, the ramp function is generated either by an external ramp gener- ator or by sensing and amplifying the converter output ripple voltage [7]. The twoloop implementation largely improves the dynamic performance of the converter, such as stability ‘and transient response, compared with that of the conven tonal single de-feedback loop method, For detailed descrip: tions of the two-loop system, please refer to [7] and [8]. The following definitions are used to simplify frequent references in this paper. Mode 1 Operation: The current through the inductor is always greater than zero as shown in Fig. $2). The period of ‘each switching cycle can be clearly divided into two time inter- vals, Tow and Try. During Toy the power transistor is “on” and the diode is “off,” and during Tp, the power transinor fs “off” and the diode is “on.” ‘Mode 2 Operation: The current through the inductor re- duces 10 zero anid resides at zet0 for a Tre time interval as shown in Fig. 4(b). In this Tp time interval both the transis- tor and the diode are “off.” The time intervals Toy and Tp Gefined im the mode 1 operation also are valid in the mode 2 operation. The three different circuit topologies corresponding to the three switching time intervals Tow, Tp, and Tp, are yee sented in Fig. 2. Since the circuit topology repeats from cycle to cycle, the converter therefore is described by two or three lineat timeinvariant eystem equations, each valid over a certain well-defined switching time interval of a eycle. ‘The system as shown in Fig. 3 is of the fourth order. The following variables are chosen a8 state vatiables ofthe system: Uc voltage across the output capacitor C, {© curvent thraugh the energy storage inductor L, Up voltage at the RyC compensation network as shown in Fig.3, Ug integrator output voltage. The inductor current waveforms as shown in Fig. 4 are also used to establish some notation regarding the time instant f ‘when each cycle starts and each switching action occurs In steady-state operation, the digital signal processor is implemented by the following duty-cycle control laws: the clock pulse is used to tum on she power switch, the threshold condition estab- lished by the regulator control loop is used to tum off the power switch, the zero inductor current condi- tion is used to turn off the diode, At Eke tates atta feasts treat A teeth ‘The time intervals 43 — tp, te? —te2, anid tee — te? are defined 28 Tox, Tra*, and Tyo", respectively. These time intervals may vary from cycle to cycle. However, the time Anterval between fy and f,+1 is a constant equal to the period of oscillation, ie., for allk. @ Teor te = Try 36