usw {| ] | wv” 98EC020 | Ns M.Tech. Degree Examination, December 2010 CMOS RF Circuit Design Time: 3 hrs. Max. Marks:100 Note: Answer any FIVE full questions. 1 Name any four RF technology applications, with their operating frequency bands. (08 Marks) Justify “RF and wireless design demands increasing more concurrent engineering.” (06 Marks) Draw and explain the receiver block diagram of a digital RF system. (06 Marks) If a sinusoid is applied to a nonlinear system, show that the output contains fundamental frequency and harmonics. (06 Marks) What do you understand by the term — 1 dB compression point? (06 Marks) Discuss the power spectral density function and applications. (08 Marks) Derive the expression for overall noise in case of cascaded stages. (10 Marks) Define the sensitivity of an RF receiver. (05 Marks) Define the cross modulation. (05 Marks) Draw the coherent FSK detector block diagram. Why are non-coherent FSK detector widely used in RF design? (08 Marks) Define the delay spread and antenna diversity. (06 Marks) “CDMA is a special case of spread spectrum communication”. Justify the statement. (06 Marks) Write short notes on: Image reject receivers (06 Marks) MOSFET behaviour at RF frequencies (07 Marks) SPICE model (07 Marks) Bring out the differences between active and passive RF mixers. (05 Marks) Draw the double balanced mixer circuit diagram, What are the important features of CMOS mixers? (10 Marks) Describe the injection pulling of RF oscillator. (05 Marks) Write short notes on: Integer N frequency synthesizer (10 Marks) Design issues in integrated RF filters. (10 Marks) Give the brief account of general considerations made for RF power amplifiers. (10 Marks) Derive the phase error transfer function for the linear model of a PLL (10 Marks) ekeee1) Foy Elehve Me mae se TTT TTI U O8ECO4I M.Tech. Degree Examination, December 2010 Hardware Software Co-desi Prime: 3 hrs. Max. Marks: 100 Note: Answer any FIVE full questions. 1a, Whatare the major subjects of research in hardware and software co-esign? (10 Marks) b, With a neat diagram, discuss the purpose and applications of a abstract hardware/software model. (10 Marks) | 2 a. Explain petrinet and queing model, with a neat diagram. (10 Marks) b. What are the typical metrics that impact the design of embedded system? Explain with the help of a real life example. (10 Marks) 3a. Explain the concept of hardware/sofiware trade-off. What is cross fertilization? Explain , with a block diagram. (10 Marks) b. With a neat block schematic, explain the co-design process. Also explain the role of unified representation in the do-design process. (10 Marks) 4 a. Define function and functional decomposition. Explain the functional decomposition process, with an example. (10 Marks) | b. Illustrate the concept of alternative evaluation with square root function example, (10 Marks) 5 a. Witha block diagram, explain the system design methodology, which supports co-design. (10 Marks) | b. What is hardware/software partitioning? Explain the binary decision making process and | early vis late binding. (10 Marks) 6 a. Define the following terms | i) Abstraction | ii) Level of abstraction | iii) Interpretation iv) Level of interpretation. (10 Marks) b. Write a comparative note on abstraction and interpretation. (10 Marks) 7 a, Withan illustration, explain how performance evaluation is carried out. (10 Marks) b. With the help of a block diagram, explain the process of a stylus tracking system. (10 Marks) Write short notes on : a, ADEPT modelling environment, b. Framework for co-design. c. Phases of hardware development. d. Lattice of HW/SW partition. (20 Marks) wean wl vw Soe 5] a O8EC009 USN patel M.Tech. Degree Examination, December 2010 wise Advances in VLSI Design Time: 3 hrs. Max. Marks:100 Note: I.Answer any FIVE full questions. 2. Missing data, if any, may be suitably assumed. 1 a. Draw the transfer plot of CMOS inverter. Discuss the effect of aspect ratio on the transfer curve, with suitable mathematical analysis. (08 Marks) b. Derive an expression for drain current in MESFET, below pinch off. (08 Marks) c. Bring out the differences between BiCMOS and CMOS technology. (04 Marks) 2 a A n-channel Si JFET has Na = 10" em™, Np = 5x10" cm, L = 30 pum, z = 200 um, a= 1.5 um. Assume M, = 1350 cm’/vs, Determine i) Built in voltage ii) The pinch off voltage iii) Drain current at Ves = 0V, Vos = 4V iv) Vga for Vos= OV, Vos=-2V_v) Ingay for Ves=-2V (10 Marks) b. Describe the construction and working principle of MESFET. (10 Marks) 3a. Derive an expression for the threshold voltage of a MIS structure. Also, comment on the sign of Vr. (10 Marks) b. A n-channel MOSFET has N, = 5x10! cm?, My’ = 500 cm’/Vs , Qms = -0.96V, Qi= 5x10! q/em?, z= 100 pm, d=30 nm, L 9, Ks = 11.9. i) Determine the drain current at gate voltage Vo ~ 2V and a drain voltage Vo = 1V ii) Consider the case, where, the gate voltage is 3V and the drain voltage in 4V, (10 Marks) 4 a, Discuss the small signal operation of MESFET. Derive the expression for cutoff and maximum operating frequency of MESFET. (08 Marks) b. Calculate the cutoff frequency of a MOSFET, given that L = 2 um, M,’ = 1350 em’/Vs, * Vg=5V and Vr= 1.SV. (04 Marks) ¢. Describe the short channel effects as applied to MOS circuit. (08 Marks) 5 a. Show that the threshold voltage and drain current scale linearly with dimensions and voltage in constant electric field scaling method. Also, mention the problems of constant electric field scaling, in brief. (10 Marks) b. Explain the working of a carbon nanotube FET device, with a neat sketch. (06 Marks) c. List the key advantages of materials, used for molecular computing. (04 Marks) 6 a. Construct a2 i/p AND gate and OR gate, using diodes. (05 Marks) b. Explain the working of inverting NMOS super buffer. Draw the circuit and stick diagram. (05 Marks) c. Explain the design of pass transistor logic. Design a NMOS pass transistor logic for an XNOR gate. Write the truth table and K-map. (10 Marks) 7 a. Realize the following: i) | Z=A(@+E)+BC, using the static CMOS AOI technology. Draw the circuit diagram and stick diagram. ii) Draw the circuit diagram for Y =a+b(¢+d) , using the static NMOS technology. (10 Marks) b. Realize the XOR and XNOR gates, using CMOS transmission gates. (06 Marks) c. Explain global routing and local routing. (04 Marks) 8 a. With an example, explain the terms hierarchy, regularity, modularity and locality. (10 Marks) b. Write explanatory notes on i) Programmable logic structure __ ii) Gate array standard cell design. (10 Marks) seenM.Tech USN | [| - eSE 08SCS31 Third Semester M.Tech. Degree Examination, December 2010 Information and Network Security Time: 3 hrs. Max. Marks:100 Note: Answer any FIVE full questions. 1 a. Briefly explain the critical characteristics of information (07 Marks) b. Describe the security systems development lifecycle (07 Marks) c. Enlist the salient features and drawbacks of ISO 17799/ BS 7799 security model. (06 Marks) 2 a. Define policy. Describe the three types of security policies. (08 Marks) b. What is firewall? Explain the different categories of firewalls based on processing mode. (07 Marks) ©. What are the functions of virtual private networks (VPNs)? (05 Marks) 3. a. Enlist the strength and limitations of intrusion detection system(IDS). (06 Marks) b. What are honey pots, honey nets and padded cell systems? What are the advantages and disadvantages of using these approaches? (07 Marks) c. What are the different ways in which authentication is carried out to achieve access control (07 Marks) 4 a. Briefly explain the different security services. (10 Marks) b. What is the limitation of cipher block modes of operation, how it will be resolved with cipher feed back mode. (10 Marks) Sa. Compare i) Link vs end-to-end encryption ii) Session keys vs master key iii) Symmetric vs asymmetric ciphers. (09 Marks) b. What are the requirements of hash function? Explain simple hash function using bitwise XoR. (11 Marks) 6 a. Ina public key system using RSA, intercept the cyphertext C = 10 sent to a user whose public key is e = 5,n=35, what is the plaintext M? (06 Marks) b. Show that the keys produced by two different users are identical in a Diffie-Hellman algorithm. (06 Marks) Briefly explain the Kerberos version 4 authentication dialogue. (08 Marks) 7 a. Enlist Kerberos version 5 ticket flags. (06 Marks) b. Explain how authentication and confidentiality is achieved in a pretty good privacy(PGP), to provide e-mail security. (07 Marks) c. List and explain the various cryptographic algorithms used in S/MIME. (07 Marks) 8 a. What are the applications and benefits of IPSec. (06 Marks) b. Explain briefly the secure socket layer (SSL) architecture. (07 Marks) c. Write a short note on SNMP. (07 Marks) teetermich wi — Blech cse 1 USN | 08SCS321 Third Semester M.Tech. Degree Examination, December 2010 Storage Area Networks ‘Time: 3 hrs. Max. Marks:100 Note: Answer any FIVE full questions. 1a. Explain the server-centric It architecture, with a neat diagram, Explain its limitations. (10 Marks) - b. Explain the storage-centric IT architecture, with a neat diagram. Explain its advantages. (10 Marks) 2 a. Describe with a diagram, the storage virtualization using RAID. (10 Marks) b. Bring out the differences between RAIDO and RAID1. (10 Marks) 3. a. With the help of a diagram, explain the input output path from CPU to the storage system. (10 Marks) b. Explain the SCSI protocol for devices to communicate with each other. (10 Marks) 4 Explain in detail, the fibre channel protocol stack with different layers, with a detailed diagram. (20 Marks) 5 a. Describe the network attached storage, with a diagram. (10 Marts) b. Compare the fibre channel SAN with NAS, in detail (10 Marks) 6 a, Whatare the advantages and disadvantages of storage virtualization on server level? (10 Marks) b. What are the advantages and disadvantages of storage virtualization in the storage network? (10 Marks) 7a. Explain the basic components of Switch’s operating system, illustrating with a diagram. (10 Marks) b. What are the supporting components, apart from the SRR components of Switch’s operating system, which have become very important to the SAN software? (10 Marks) 8 a. Discuss the five systems management disciplines to be considered for managing information technology systems. (10 Maris) b, What are the aspects to be considered for availability metrics for managing availability for storage networks? (10 Marks) eeeeemite 1 cse Eledive USN 08SCS333 Third Semester M.Tech. Degree Examination, December 2010 Distributed Systems Time: 3 hrs. Max. Marks:100 Note: Answer any FIVE full questions. 1 a. Which are the four different types of architecture models? Explain. (08 Marks) b. Discuss why the failure handling is important in distributed systems. (06 Marks) c. Mention the issues of networking that are applicable to a distributed system. Also briefly write about the types of networks possible. (06 Marks) - 2 a. Explain the concept of LP addressing. Give the important features of IPV6. (10 Marks) b. Explain the client-server architecture, with respect to a distributed system. Explain the communication protocol associated with it. (10 Marks) 3 a. Explain the implementation of R.M.I. (10 Marks) b. With an example, explain the events and notification in R.M.L (10 Marks) 4a. Explain in detail, the architecture of a multithreaded server, with the different states, associated with execution environments and threads. (10 Marks) b. Explain the working principles of TEA [Ting Encryption Algorithm]. (10 Marks) Sa. “Digital signatures are an essential requirement for the secure systems”. Justify. (08 Marks) b. Explain the distributed file system requirements. Discuss the file service architecture, (12 Marks) 6 a. Explain the drawbacks of locking. How can they be overcome, using the optimistic concurrency control? (12 Marks) b. Discuss the concurrency control mechanism, based on time stamps. (08 Marks) 7 a. Explain how the two phase commit protocol for nested transactions ensures that, if the top evel transaction commits, all the right descendants are committed or aborted. (12 Marks) b. Consider the edge — chasing algorithm (without priorities). Give examples to show that, it could detect phantom deadlocks. (08 Marks) 8 Write short notes on : a. Distributed shared memory (DSN) b. Distributed deadlocks c. COBRA d. Mach. (20 Marks) feet