‘Question 1(40 marks) (@) Describe the implication of having an input offset voltage on the output voltage of an amplifier. [famplifying de voltage isnot of concern, describe two possible solutions to alleviate this non-ideal characteristic in an operational amplifier (use diagrams if necessary). (7 marks) (©) Two amplifiers, A and B, ae to be connected in cascade between 10-maV, 100-0. source § and a 100-9 load, L, ‘The amplifiers have the following parameters ‘A: Short-cicuit transconductance of 10 A/V, input resistance of 100 Kf, and output resistance of 10.0. B: Opencircuit volage gain of 10,000 V/V, input resistance of 1 MOQ, and output resistance of 10 KO, (© Why are amplifiers considered as dependent sources? (1 mark) i) Draw the equivalent circuit model diagram forthe voltage amplifier model of Amplifiers and B, (® marks) (Gi) For each ofthe two possible cascaded connections betwoen the source S and load L, namely S-A-B-L and $-B-A-L, deaw the equivalent cieuit model. (10 marks) (jv) Find the overall voltage gain fom source to lad, both a rato and in dB, for ‘each cascaded connection. (13 marks) (©) Which amplifier arrangement provides a higher vollage amplification? (1 mark) Page 2 of 12 pagesQuestion 2 (30 marks) Inthe cireuit below, the two switches operate synchronously. When switch 1 isin position a, switch 2 is closed. When switch | is in position b, switch 2 i opened. Switch 1 has been in| position a fora long time. Att 0, switch | moves instantaneously t poston b. (@) Find the curen flowing through the 200 ml inductor, (9, and the voltage across the 400 nF capacitor, v0), atime ¢= 0 (marks) (©) Find the capacitor voltage, ve) fortime 20° (15 marks) (©) Caleulate and plot v0) at time ¢~ 0, 1,2, 3, 4, and 5 ms, clearly labelling the equency ‘of osillton. (10 marks) 0 kn. Page 3 of 12 pagesQuestion 3 (40 marks) (0) Inn experiment, the following measurements were made on a resistive two-pot iui. ondlans: rst sort heit tom 2 an ply 20 0 Fs Measurements: = 1A; iy ‘Condition 2: create aopen circuit at Por 1 and apply SOV 10 Port 2 Measurements: Vi= 400V; f= 3A. Find the maximum power thi this two-pos circuit can deliver to a resistive load at Port 2 when Port is driven by a4 de current source in parallel with an internal resistance of 600, (10 marks) (©). For the cireuit shown below, find r 1 Zeon! v, 19 ©: parameters ofthe two port network (10 marks) (409 oer 0 when vd) = SOU) V. (20 marks) Page 4 of 12 pages‘Question 4 30 marks) Referring tothe circuit shown below, find (@) the transte fnetion 1s) = 13) F(9) 8 fnetion of (marks) (©) the largest value of 1 that will produce a bounded output signal for a bounded input ‘signal, ic transfer fanetion poles must iin the left half ofthe s pane, @ marks) (© 40 for = 065, 0, 1, 1.5 and 2, if (2) =10u(6) A. Comment on your solutions obtained for y= 1.5 and? 20 marks Page $ of 12 pagesQuestion 5 (40 marks) ‘You are required to design a shinorder low pas fier to meet te following design specifications: = 500 Fz, a passband guin oF 10, andthe use of 1 KO resistor, (2) Using op-amps, design a third-order Butterworth low pass filter to mect design specifictions. Draw your circuit and label all omponens. (1S marks) (©) Use. cascade of Srstonder op amp based low pass fers to meet the same design specifications, Draw your eieuit and label all components. (1S marks) (©) Sketch the magnitude response of (a) and (bon the same plot. marks) (8) Outof your two designs, which one provides a better approximation ofan ideal low pass fier. Why? @ marks) ‘The END of EXAM PAPER Page 60f 12 pages