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Ijetae 1012 30
Ijetae 1012 30
I. INTRODUCTION
In recent years, there has been a rapid increase in
wireless network deployment and mobile device market
penetration. With various research that promises higher
data rates, future wireless networks will likely become an
integral part of the global communication infrastructure.
Ultimately, wireless users will demand the same reliable
service as today's wire-line network provides. Through our
device controller we can represent a safe & secure wireless
communication with proper authentication and less loss of
data.
The circuit of our proposed project has two parts:
(i)The hardware part (ii)The software part
The hardware part comprises of microcontroller
AT89C51,
DTMF
decoder
MT8870,
voice
recording/playback device APR9600 and a few discrete
components. Microcontroller AT89C51 is the heart of the
circuit. It is a low-power, high performance, 8bit
microcontroller with 4 KB of flash programmable and
erasable read only memory used as on-chip program
memory, 128 bytes of RAM, 32 individually programmable
input/output lines, a five vector two-level interrupt
architecture, on-chip oscillator and clock circuitry.
The software part consists of a program for the
microcontroller is written using BASCOM microcontroller
programming software.
A. Components Required
Hardware Components: Hardware components comprises
of the following:-
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II. METHODOLOGY
A. Problem Description
In recent years our modern life style becomes so busy
and full of task schedule that we often forget to do some
simple duties. Such as forget to switch of our household
appliances. We don't bother about our these types of
carelessness every time, but this can give us real trouble
sometime. Unnecessarily energy is consumed. For too
much consumption of energy, the generated heat can
Status Indicator
AT89C51
Microphone
Speaker
SwitchTo Decode
Board
Microcontroller
DTMF Decoder
Relay Driver
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Cellphone
B.
Circuit Description
171
SL
No.
1
DIPswitches S17 & S18 and pulled high via resistors R2 and R1,
respectively.
Name of
the
components
AT89C51
APR9600
Values
Ratings
4K PEROM,
0-20 MHz,
CMOS, 8 bit
5V15%
Operating Current:
5V20%
25 mA typical.
Standby Current: 1
uA typical.
3
MT8870
3.579545MHz,
5V 5%
7806
6v
1A, 6V,4% , Ta
= -40C to
+125C
1N4007 diode
8pF junction
Peak reverse
capacitance
voltage:1000v,
peak rev current:
5uA
Resistors
10K,100K, 470K,
W, 5%
220K ,39K,4.7K,
CARBON
Capacitors
33pF, 0.1uF
ceramic
Capacitors
16v, 50v
1000uF
electrolytic
polyester
Capacitors
0.22uF, 0.47uF
10
Crystal
oscillator
MHz
Speaker
16ohm
11
1W
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Port 1
Port 1 is an 8-bit bi-directional I/O port with internal
pull-ups. The Port 1 output buffers can sink/source four
TTL inputs. When 1s are written to Port 1 pins, they are
pulled high by the internal pull-ups and can be used as
inputs. As inputs, Port 1 pins that are externally being
pulled low will source current (IIL) because of the internal
pull-ups. In addition, P1.0 and P1.1 can be configured to be
the timer/counter 2 external count input (P1.0/T2) and the
timer/counter 2 trigger input (P1.1/T2EX), respectively, as
shown in the following table.
Port 2
Port 2 is an 8-bit bi-directional I/O port with internal
pull-ups. The Port 2 output buffers can sink/source four
TTL inputs. When 1s are written to Port 2 pins, they are
pulled high by the internal pull-ups and can be used as
inputs. As inputs, Port 2 pins that are externally being
pulled low will source current (IIL) because of the internal
pull-ups. Port 2 emits the high-order address byte during
fetches from external program memory and during accesses
to external data memory that use 16-bit addresses (MOVX
@ DPTR). In this application, Port 2 uses strong internal
pull-ups when emitting 1s. During accesses to external data
memory that use 8-bit addresses (MOVX @ RI), Port 2
emits the contents of the P2 Special Function Register. Port
2 also receives the high-order address bits and some control
signals during Flash programming and verification.
(II)
Port 3
Port 3 is an 8-bit bi-directional I/O port with internal
pull-ups. The Port 3 output buffers can sink/source four
TTL inputs. When 1s are written to Port 3 pins, they are
pulled high by the internal pull-ups and can be used as
inputs. As inputs, Port 3 pins that are externally being
pulled low will source current (IIL) because of the pull-ups.
Port 3 also serves the functions of various special features
of the AT89C51, as shown in the following table.
VCC
Supply voltage.
GND
Ground
Port 0
Port 0 is an 8-bit open drain bi-directional I/O port. As
an output port, each pin can sink eight TTL inputs. When
1s are written to port 0 pins, the pins can be used as highimpedance inputs. Port 0 can also be configured to be the
multiplexed low-order, address/data bus during accesses to
external program and data memory. In this mode, P0 has
internal pull-ups. Port 0 also receives the code bytes during
Flash programming and outputs the code bytes during
program verification. External pull-ups are required during
program verification.
RST
Reset input. A high on this pin for two machine cycles
while the oscillator is running resets the device.
ALE/PROG
Address Latch Enable is an output pulse for latching the
low byte of the address during accesses to external
memory.
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XTAL1
Input to the inverting oscillator amplifier and input to the
internal clock operating circuit.
XTAL2
Output from the inverting oscillator amplifier.
III. CONCLUSION
So, in this project we have shown that using a simple
extra cellphone, you can control your power hungry home
appliances. This will eventually reduce your carbon
footprint, as well as your electricity bill. Many similar
zigbee based controller are already in market, but that will
limit your within a range upto 100 meters. This cost
effective solution has a great potential in our everyday busy
schedule.
PSEN
Program Store Enable is the read strobe to external
program memory. When the AT89C52 is executing code
from external program memory, PSEN is activated twice
each machine cycle, except that two PSEN activations are
skipped during each access to external data memory.
REFERENCES
EA/VPP
External Access Enable. EA must be strapped to GND in
order to enable the device to fetch code from external
program memory locations starting at 0000H up to FFFFH.
Note, however, that if lock bit 1 is programmed, EA will be
internally latched on reset. EA should be strapped to VCC
for internal program executions.
This pin also receives the 12-volt programming
enablevoltage (VPP) during Flash programming when 12volt programming is selected.
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