Khi x l trung tm - CPU

S khi tng qut v cc thnh phn chc nng ca

CPU

Cc thanh ghi

Khi iu khin

Khi l gic v s hc

System Bus

Tp lnh my tnh

Thy Hunh Trng Tha

Minh ha

Cc thnh phn ca my
tnh
System
Bus

0
1

n-2
n-1

H thng Bus

Data Bus

Mang d liu

Khng c s khc nhau gia d liu v lnh

trong trng hp ny.

rng ca Bus s quyt nh kh

nng chuyn ti d liu ca CPU

8, 16, 32, 64 bit

Address bus

Xc nh ngun v ch ca d liu

CPU cn xc nh a ch ca nh cn c

rng Bus xc nh kh nng nh ti

a ca h thng

8088 dng 16 bit a ch => khng gian a

ch l 64K.

Control Bus

iu khin v nh thi thng tin

Tn hiu c/ghi b nh
Yu cu ngt
Tn hiu ng h

Cc thnh phn chnh ca

CPU
CPU
Computer

Registers

I/O
System
Bus
Memory

Arithmetic
and
Logic Unit

CPU

Internal CPU
Interconnection
Control
Unit

Cu trc bn trong CPU

Nhim v ca CPU

Nhn lnh (fetch instruction):

Gii m lnh (decode instruction ):

nhn d liu mi t b nh hoc cc cngvo/ra

X l d liu (process data):

xc nh thao tc m lnh yu cu

Nhn d liu (fetch data):

CPU c lnh t b nh

thc hin cc php ton s hoc hay logic vi cc d liu

Ghi d liu (write data):

ghi d liu ra b nh hoc cc cng vo/ra

Chu k lnh

2 bc:

Fetch (np lnh)

Execute (thc thi)

Chu k lnh

Nhn lnh
Gii m lnh
Nhn ton hng
Thc hin lnh
Ct ton hng
Ngt

Nhn lnh

CPU a a ch ca lnh cn nhn t b m chng trnh

PC ra bus a ch
CPU pht tn hiu iu khin c b nh
Lnh t b nh c t ln bus d liu v c CPU copy
vo thanh ghi lnh IR
CPU tng ni dung PC tr sang lnh k tip

Gii m lnh

Lnh t thanh ghi lnh IR c a n

n v iu khin
n v iu khin tin hnh gii m lnh
xc nh thao tc phi thc hin
Gii m lnh xy ra bn trong CPU

Nhn d liu

CPU a a ch ca ton hng ra bus a ch

CPU pht tn hiu iu khin c
Ton hng c c vo CPU
Tng t nh nhn lnh

Nhn d liu gin tip

CPU a a ch ra bus a ch
CPU pht tn hiu iu khin c
Ni dung ngn nh c c vo CPU, chnh l a ch ca ton hng
(gin tip)
a ch ny c CPU pht ra bus a ch tm ra ton hng
CPU pht tn hiu iu khin c
Ton hng c c vo CPU

Thc thi lnh

C nhiu dng tu thuc vo lnh

C th l:

c/Ghi b nh
Vo/Ra
Chuyn gia cc thanh ghi
Thao tc s hc/logic
Chuyn iu khin (r nhnh)

Ghi ton hng

CPU a a ch ra bus a ch

CPU a d liu cn ghi ra bus d liu

CPU pht tn hiu iu khin ghi

D liu trn bus d liu c copy n v tr xc nh

V d v thc thi chng

trnh

Lu trng thi Chu k lnh

Ngt (Interrupts)

L k thut cho php cc module khc (I/O) c

th ngt ngang tin trnh x l bnh thng
Cc loi ngt:

Chng trnh (program)

overflow,

division by zero

nh thi (Timer)
c

to bi b nh thi bn trong CPU

c dng ch c quyn trong cc h thng a
nhim

I/O
T

I/O controller

Li phn cng
memory

parity error

Chu k lnh c ngt

Ni dung ca b m chng trnh PC (a ch tr v sau khi ngt) c

a ra bus d liu
CPU a a ch (thng c ly t con tr ngn xp SP) ra bus a ch
CPU pht tn hiu iu khin ghi b nh
a ch tr v trn bus d liu c ghi ra v tr xc nh ( ngn xp)
a ch lnh u tin ca chng trnh con iu khin ngt c np
vo PC

Lu trng thi trong chu k lnh c

ngt

a ngt

Cm ngt

CPU s b qua cc ngt mi, ch thi hnh ngt hin

ti.
Cc ngt mi s phi i v s c kim tra sau
khi ngt hin hnh hon tt.
Cc ngt c thi hnh theo th t m chng xy
ra.

u tin ngt

Cc ngt c u tin thp c th s b ngt bi

cc ngt c u tin cao hn.
Khi ngt c u tin cao hn hon tt, CPU s
c tr v cho ngt trc .

a ngt- Tun t

a ngt- Lng

Minh ha a ngt

ng ng lnh (Instruction
Pipelining)

Chia chu trnh lnh thnh cc cng on v cho

php thc hin gi ln nhau (nh dy chuyn lp
rp)
Chng hn c 6 cng on:

Nhn lnh (Fetch Instruction FI)

Gii m lnh (Decode Instruction DI)
Tnh a ch ton hng (Calculate Operand Address
CO)
Nhn ton hng (Fetch Operands FO)
Thc hin lnh (Execute Instruction EI)
Ghi ton hng (Write Operands WO)

Biu thi gian ca ng ng

lnh

Cc xung t ca ng ng lnh

Xung t cu trc: do nhiu cng on dng chung mt ti nguyn

Xung t d liu: lnh sau s dng d liu kt qu ca lnh trc

Xung t iu khin: do r nhnh gy ra

Cch gii quyt: (bi tp tm hiu cho sinh vin)

Cc thnh phn chnh ca CPU

CPU
Computer

Registers

I/O
System
Bus
Memory

Arithmetic
and
Logic Unit

CPU

Internal CPU
Interconnection
Control
Unit

ALU n v s hc v logic

S hc: cng, tr, nhn, chia, tng gim, o du

Logic: AND, OR, XOR, NOT, php dch bit

CU n v iu khin

Nhn lnh t b nh a vo
thanh ghi lnh

Tng ni dung ca PC tr
sang lnh k tip

Gii m lnh c nhn

xc nh thao tc m lnh yu
cu

Pht ra cc tn hiu iu khin

thc hin lnh

Nhn cc tn hiu yu cu t bus

h thng v p ng vi cc yu
cu

Cc tn hiu a n n v iu khin

Clock: tn hiu nhp t mch to dao ng bn

ngoi.

M lnh t thanh ghi lnh a n gii m.

Cc c t thanh ghi c cho bit trng thi ca CPU.

Cc tn hiu yu cu t bus iu khin

Cc tn hiu i ra t n v iu khin

Cc tn hiu iu khin bn trong CPU:

iu khin cc thanh ghi
iu khin ALU

Cc tn hiu iu khin bn ngoi CPU:

iu khin b nh
iu khin cc mun vo-ra

Tp thanh ghi (Registers)

Chc nng v c im:

Tp hp cc thanh ghi nm trong CPU

Cha cc thng tin tm thi phc v cho hot
ng thi im hin ti ca CPU
c coi l mc u tin ca h thng nh
Tu thuc vo b x l c th
S lng thanh ghi nhiu -> tng hiu nng ca
CPU
C hai loi thanh ghi
Cc

thanh ghi lp trnh c

Cc thanh ghi khng lp trnh c

Phn loi thanh ghi theo chc nng

Thanh ghi a ch:

Thanh ghi d liu:

c th cha a ch hoc d liu.

Thanh ghi iu khin/trng thi:

cha tm thi cc d liu.

Thanh ghi a nng:

qun l a ch ca ngn nh hay cng vo-ra.

cha cc thng tin iu khin v trng thi ca CPU.

Thanh ghi lnh:

cha lnh ang c thc hin.

Mt s thanh ghi in hnh

Cc thanh ghi a ch

B m chng trnh PC (Program Counter)

Con tr d liu DP (Data Pointer)
Con tr ngn xp SP (Stack Pointer)
Thanh ghi c s v thanh ghi ch s (Base
Register & Index Register)

Cc thanh ghi d liu

Thanh ghi trng thi

B m chng trnh PC

Cn c gi l con tr
lnh IP
Gi a ch ca lnh tip
theo s c nhn vo.
Sau khi mt lnh c
nhn vo, ni dung PC
t ng tng tr
sang lnh k tip.

Thanh ghi con tr d liu DP

Cha a ch
ca ngn nh
d liu m CPU
mun truy nhp

Ngn xp - stack

Ngn xp l vng nh c cu trc LIFO

(Last In First Out)
Ngn xp thng dng phc v cho
chng trnh con
y ngn xp l mt ngn nh xc nh
nh ngn xp l thng tin nm v tr
trn cng trong ngn xp
nh ngn xp c th b thay i

Con tr ngn xp - SP

SP cha a ch ca ngn nh nh ngn

xp

Khi ct mt thng tin vo ngn xp:

Ni dung ca SP t ng gim

Thng tin c ct vo ngn nh c tr bi SP

0
1

Khi ly mt thng tin ra khi ngn xp:

Thng tin c c t ngn nh c tr bi SP

Ni dung ca SP t ng tng

Khi ngn xp rng, SP tr vo y

n-2
n-1

Thanh ghi c s v thanh ghi ch s

Thanh ghi c s: cha a

ch ca ngn nh c s
(a ch c s)
Thanh ghi ch s: cha
lch a ch gia ngn nh
m CPU cn truy nhp so
vi ngn nh c s (ch
s)
a ch ca ngn nh cn
truy nhp = a ch c s
+ ch s

Cc thanh ghi d liu

Cha cc d liu tm thi hoc cc kt

qu trung gian
Cn c nhiu thanh ghi d liu
Cc thanh ghi s nguyn: 8, 16, 32, 64
bit
Cc thanh ghi s du chm ng

Thanh ghi a nng (8088/8086)

C nhim v ghi tham s cho m lnh, y cng l ni lnh

tr kt qu v sau khi c thc hin.

AX (accumulator, 16 bit): cha kt qu cc thao tc lnh.

BX (base, 16 bit) : cha a ch c s ca mt bng trong

lnh XLAT.

CX (count, 16 bit): cha s ln lp trong trng hp cc lnh

LOOP.
Thanh ghi thp CL c dng cha (nh) s ln quay
hoc dch ca cc lnh quay v dch.

DX (data, 16 bit): cng thanh ghi AX tham gia vo cc thao

tc ca php nhn hoc chia cc s 16 bit.
DX cn dng cha a ch 16 bit ca cc cng cng (di
hn 8 bit) trong cc lnh truy nhp cc cng ngoi vi.

Thanh ghi on
(8088/8086)

Thanh ghi on : Thanh ghi lch (segment:offset)

a ch vt l = Thanh ghi on x 16 + Thanh ghi

lch

CS (code segment, 16 bit): phi hp vi con tr lnh IP ghi a ch m

lnh trong b nh.

DS (data segment, 16 bit): phi hp vi 2 thanh ghi ch s SI v DI nh

a ch cho d liu.

CS:IP.

D liu cn c vo l DS:SI
D liu cn ghi ra l DS:DI.

SS (stack segment, 16 bit) : a ch nh ca ngn xp c biu din cng

vi con tr ngn xp SP l SS:SP.
ES (extra segment, 16 bit): dng nh a ch mt chui.

ES:DI l a ch chui cn vit n (chui ch)

ES:SI l a ch chui c vo (chui ngun).

Thanh ghi con tr v ch s (8088/8086)

IP (instruction pointer)

BP (base pointer)

tr vo nh ngn xp m a ch on c ghi trong SS

(SS:SP).

SI (source index)

tr v d liu b nh m a ch on c ghi trong DS

(DS:BP).

SP (stack pointer)

tr ti lnh my tip theo.

a ch on c ghi trong CS (CS:IP)

tr vo d liu m a ch on c ghi trong DS (DS:SI).

DI (destination index)

tr vo on d liu m a ch on ghi trong DS(DS:SI).

Thanh ghi trng thi status register

Cn gi l thanh ghi c (Flag Register)

Cha cc thng tin trng thi ca CPU
Cc c php ton: bo hiu trng thi
ca kt qu php ton
Cc c iu khin: biu th trng thi
iu khin ca CPU

Thanh ghi trng thi (8088/8086)

x

CF=1 khi c nh hoc mn t MSB.

Bit 2: PF (parity flag) c parity

PF phn nh tnh chn (parity) ca tng s bit 1 c trong kt qu.

C PF =1 khi tng s bit 1 trong kt qu l chn.

Bit 4: AF (auxliary carry flag) c nh ph dng cho cc php tnh vi

m BCD.

Bit 0: CF (carry flag) c nh

AF = 1 khi c nh hoc mn t mt s BCD thp (4 bit thp)

sang mt s BCD cao (4 bit cao).

Bit 6: ZF (zero flag) c rng, ZF = 1 khi kt qu bng 0.

Thanh ghi trng thi (8088/8086) - tt

x

Bit 7: SF (sign flag) c du, SF = 1 khi kt qu m.

Bit 8: TF (trap flag) c by, TF = 1 khi vi x l trong ch chy

tng lnh.

Bit 9: IF (interrupt enable flag) c cho php ngt

Bit A: DF (direction flag) c hng

IF = 1 cho php cc yu cu ngt che c (maskable interrupt)

c tc ng.
DF = 1 khi CPU lm vic vi chui k t theo th t t phi sang
tri (li).

Bit B: OF (overflow) c trn

OF =1 khi kt qu vt ra ngoi gii hn, xy ra i vi php tnh

c du.

V d c php ton

C Zero (c rng):

C Sign (c du):

c thit lp ln 1 khi kt qu php ton nh hn 0

C Carry (c nh):

c thit lp ln 1 khi kt qu ca php ton bng 0.

c thit lp ln 1 nu php ton c nh ra ngoi bit

cao nht -> c bo trn vi s khng du.

C Overflow (c trn):

c thip lp ln 1 nu cng hai s nguyn cng

du m kt qu c du ngc li -> c bo trn vi s
c du.

V d c iu khin

C Interrupt (C cho php ngt)

Nu IF = 1 -> CPU trng thi cho php

ngt vi tn hiu yu cu ngt t bn ngoi
gi ti
Nu IF = 0 -> CPU trng thi cm ngt
vi tn hiu yu cu ngt t bn ngoi gi
ti

Kin trc b VXL 8088

Tp lnh my tnh

Mi b x l c mt tp lnh xc nh
Tp lnh thng c hng chc n hng
trm lnh
Mi lnh l mt chui s nh phn m b
x l hiu c thc hin mt thao
tc xc nh
Cc lnh c m t bng cc k hiu
gi nh -> chnh l cc lnh ca hp ng

Cc thnh phn ca lnh

my

M thao tc (operation code -> opcode)

M ha cho thao tc m b x l phi thc hin

a ch ton hng: ch ra ni cha cc ton hng

m thao tc s tc ng
Ton hng ngun: d liu vo ca thao tc
Ton hng ch: d liu ra ca thao tc

Cc kiu thao tc

Chuyn d liu
X l s hc vi s nguyn
X l logic
iu khin vo-ra
Chuyn iu khin (r nhnh)
iu khin h thng
X l s du chm ng
X l cc d liu chuyn dng

Cc lnh chuyn d liu

MOVE Copy d liu t ngun n ch

LOAD Np d liu t b nh n b x l
STORE Ct d liu t b x l n b nh
EXCHANGE Trao i ni dung ca ngun v ch
CLEAR Chuyn cc bit 0 vo ton hng ch
SET Chuyn cc bit 1 vo ton hng ch
PUSH Ct ni dung ton hng ngun vo ngn
xp
POP Ly ni dung nh ngn xp a n ton
hng ch
Lnh XLAT Chuyn i s liu

Minh ha lnh MOVE (8088/8086)

MOV Des, Source

V d:
MOV
MOV
MOV
MOV

100H, AX
AX, MEM1
AX, BX
AX, 0FFFFH

Minh ha lnh EXCHANGE (8088/8086)

XCHG Des,Source

XCHG AH, AL
XCHG AL, [BX]
[BX] l nh c a ch
DS:BX

Minh ha lnh LEA

(8088/8086)

Load Effective Address

Ly a ch offset ca bin vo thanh ghi
LEA Des, Source

ch : BX, CX, DX, BP, SI, DI.

Ngun l tn bin trong on DS c ch
r trong lnh hoc nh c th.

LEA DX, MSG ; a a ch MSG vo DX

Minh ha lnh PUSH/POP (8088/8086)

PUSH Ct d liu vo ngn xp

POP Ly d liu t ngn xp
PUSH Ngun (SP SP 2;Ngun
{SP}).
PUSH

BX ; ct BX vo ngn xp, ti v tr
do SP ch ra.

POP ch (ch {SP};SP SP + 2)

POP

DX
; ly 2 byte t nh ngn xp,
a vo DX.

Lnh XLAT

TransLATe

Dch gi tr trong AL thnh gi tr mi

trong bng ti v tr xc nh theo di
bng AL
ng dng chuyn i s liu

C php: XLAT (khng c ton hng)

Input:
BX

cha a ch bng d liu

AL cha byte cn i

Output:
AL

cha gi tr tm thy trong bng ti a ch

BX+AL

Cc lnh s hc

ADD
Cng hai ton hng
SUBTRACT
Tr hai ton hng
MULTIPLY
Nhn hai ton hng
DIVIDE
Chia hai ton hng
ABSOLUTE
Ly tr tuyt i ton hng
NEGATE
i du ton hng (ly b 2)
INCREMENTTng ton hng thm 1
DECREMENT Gim ton hng i 1
COMPARE
Tr 2 ton hng lp c

Minh ha lnh ADD/SUB (8088/8086)

ADD Des,Source
SUB Des,Source
ADD AX, BX
; AX AX+BX
ADD AL, 74H ; AX AX+ 74H
SUB CL, AL; CL CL AL
SUB AX, 0405H; AX AX - 0405H.

V d: Vit on chng trnh ngn ng assembly cng

5H vi 3H, dng cc thanh ghi AL, BL.
MOV AL, 05H ; AL 05H
MOV BL, 03H ; BL 03H
ADD AL, BL
; AL 05H+03H =08H
MOV 100H, AL; Di chuyn kt qu t AL vo v tr nh
DS:100H.

Minh ha lnh MUL (8088/8086)

MUL s nhn ngun

MUL BX
MUL MEM1

S c nhn phi c chuyn vo thanh ghi AX

hoc AL
Khi 2 byte nhn vi nhau th kt qu c gi lu
vo thanh ghi AX

V d. Vit on chng trnh nhn 5H vi 3H, dng thanh ghi CL.

MOV AL, 05H ; AL 05H (s c nhn)
MOV CL, 03H ; CL 03H (s nhn)
MUL CL
; AL 0FH (kt qu)
MOV MEM1, AL ; chuyn kt qu (0FH) t AL vo v tr nh c
nhn MEM1.

Minh ha lnh DIV

(8088/8086)

DIV s_chia_ngun
S b chia phi l mt s khng du 16 bit
cha trong thanh ghi AX.
Kt qu thng s s trong thanh ghi AL,
cn s d th trong thanh ghi AH.
V d: Vit on chng trnh chia 6H cho 3H, dng
thanh ghi CL.
MOV AX, 0006H ;AX 6H
MOV CL, 03H;CL 3H
DIV CL
;AHAL 00H (s d), 02H (thng s)

Minh ha lnh INC/DEC/NEG (8088/8086)

INC ch M t: ch ch +1
DEC ch M t: ch ch -1
NEG ch
MOV AH,2 ;
MOV CX,256
MOV DL,0 ;
INT 21H
INC DL
;
DEC CX
;
NEG AX

hm xut k t
; s k t cn xut 0-255
DL m ASCII ca k t NUL
; thc hin xut k t
tng DL ln k t tip theo
m gim s k t cha in

; o du AX

Minh ha lnh CMP (8088/8086)

CMP - Compare Byte or Word (so snh 2

byte hay 2 t).
Vit lnh: CMP ch, Gc.
Lnh ny ch to cc c, khng lu kt qu so
snh;
Lnh ny thng c dng to c cho cc
lnh nhy c iu kin.
CF ZF
ch = Ngun
ch > Ngun
ch < Ngun

0 1
0 0
1 0.

Cc lnh logic

AND
Thc hin php AND hai ton hng
OR
Thc hin php OR hai ton hng
XOR
Thc hin php XOR hai ton hng
NOT
o bit ca ton hng (ly b 1)
TEST Thc hin php AND 2 ton hng lp c
SHIFT Dch tri (phi) ton hng
ROTATE Quay tri (phi) ton hng

Minh ha cc lnh AND, OR, XOR

Gi s c hai thanh ghi cha d liu nh sau:

R1 <- (R1) AND (R2) = 0000 1010

Php ton AND dng xo mt s bit v gi nguyn mt

s bit cn li ca ton hng.

R1<- (R1) OR (R2) = 1010 1111

(R1) = 1010 1010

(R2) = 0000 1111

Php ton OR dng thit lp mt s bit v gi nguyn

mt s bit cn li ca ton hng.

R1<- (R1) XOR (R2) = 1010 0101

Php ton XOR dng o mt s bit v gi nguyn mt

s bit cn li ca ton hng.

Minh ha lnh TEST (8088/8086)

TEST ch, Ngun

Sau lnh ny cc ton hng khng b thay i v kt qu khng
c lu gi.
Cc c c to ra s c dng lm iu kin cho cc lnh
nhy c iu kin.
Lnh ny cng c tc dng che nh mt mt n.
Tc ng:

Xo: CF, OF
Cp nht: PF, SF, ZF (PF ch lin quan n 8 bit thp)
Khng xc nh: AF.

V d:
TEST AH, AL ;Thc hin php AND AH vi AL to c.
TEST AH, 01H ; Bit 0 ca AH = 0?
TEST BP, [BX][DI] ; Thc hin php AND BP vi nh DS:BX+DI.

Minh ha lnh Dch tri (8088/8086)

SAL- Shift arithmetically Left (Dch tri s

hc)
SHL- Shift (Logically) Left (Dch tri logic).
Vit lnh:

SAL ch, CL
SHL ch, CL
CF

MSB

LSB

CL: s ln dch

Minh ha lnh Dch phi (8088/8086)

SAR - Shift Arithmetically Right (Dch phi s hc).

SHR- Shift (Logically) Right (Dch phi logic).
Vit lnh:

SAR ch, CL
SHR ch, CL

MSB

LSB

CF

SAR

MSB

LSB

CF

SHR

SAR: Dng cho s c du (MSB gi li lm

bit du)
SHR: Dng cho s khng du

Minh ha lnh Quay vng (8088/8086)

ROL - Rotate All Bit to the Left (Quay vng sang tri)
Vit lnh:
ROL ch, CL
CF

LSB

ROR - Rotate All Bit to the Right (Quay vng sang phi).
Vit lnh:
ROR ch, CL
MSB

MSB

LSB

CF

V d:
ROL BX, 1 ; quay vng sang tri thanh ghi BX.
MOV CL, 4 ; t s ln quay vo thanh ghi CL.
ROL AL, CL; quay vng sang tri thanh ghi AL 4 ln.

Cc lnh vo ra chuyn dng (8088/8086)

IN Acc, Port (c d liu t Cng vo thanh ghi)

OUT Port, Acc (a d liu t thanh ghi ra Cng)

IN AL, DX
OUT DX, AX

(DX dng lu a ch cng)

AL (8 bit), AX (16 bit)

Cc lnh chuyn iu khin

JUMP (BRANCH) - Lnh nhy khng iu kin:

JUMP CONDITIONAL - Lnh nhy c iu kin:

iu kin ng -> np PC mt a ch xc nh
iu kin sai -> khng lm g c

CALL - Lnh gi chng trnh con:

Np vo PC mt a ch xc nh

Ct ni dung ca PC (a ch tr v) ra mt v tr xc nh
(thng Stack)
Np vo PC a ch ca lnh u tin ca chng trnh con

RETURN - Lnh tr v t chng trnh con:

Khi phc a ch tr v tr li cho PC tr v chng

trnh chnh

Lnh r nhnh khng iu

kin

Chuyn ti thc
hin lnh v tr
c a ch XXX:
PC <- XXX

Lnh r nhnh c iu kin

Trong lnh c km theo iu kin

Kim tra iu kin trong lnh:

Nu iu kin ng -> chuyn ti

thc hin lnh v tr c a ch XXX
PC

<- XXX

Nu iu kin sai -> chuyn sang

thc hin lnh k tip

iu kin thng c kim tra

thng qua cc c
C nhiu lnh r nhnh c iu
kin

Lnh CALL v RETURN

Lnh gi chng trnh con: lnh

CALL

Ct ni dung PC (cha a ch ca
lnh k tip) ra Stack
Np vo PC a ch ca lnh u tin
ca chng trnh con c gi
->B x l c chuyn sang thc
hin chng trnh con tng ng

Lnh tr v t chng trnh con:

lnh RETURN

Ly a ch ca lnh k tip c ct
Stack np tr li cho PC -> B x l
c iu khin quay tr v thc hin
tip lnh nm sau lnh CALL

Cc lnh iu khin h
thng

NO OPERATION Khng thc hin g c

HALT
Dng thc hin chng trnh
WAIT
Tm dng thc hin chng
trnh, n khi b ng x l pht tn
hiu
l n hon tt tnh ton. Ngn
chn CPU
truy cp b nh m tm
thi c ng
x l s dng.
LOCK
Cm khng cho xin chuyn
nhng bus
UNLOCK
Cho php xin chuyn nhng bus

Cc phng php nh a
ch

Khi nim v nh a ch (addressing)

Ton hng ca lnh c th l:

Mt

gi tr c th
Ni dung ca thanh ghi
Ni dung ca ngn nh hoc cng vo-ra

Phng php nh a ch l cch thc

a ch ho trong trng a ch ca lnh
xc nh ton hng.

Cc phng php nh a ch thng

dng

nh
nh
nh
nh
nh
nh

a
a
a
a
a
a

ch
ch
ch
ch
ch
ch

tc th
thanh ghi
trc tip
gin tip qua thanh ghi
gin tip qua ngn nh
dch chuyn

nh a ch tc th

Ton hng nm ngay trong Trng a ch ca lnh

Ch c th l ton hng ngun
V d:
ADD

R1,5

; R1<- R1+5

Khng tham chiu b nh

Truy nhp ton hng rt nhanh
Di gi tr ca ton hng b hn ch
S nh a ch tc th:

nh a ch thanh ghi

Ton hng c cha trong

thanh ghi c tn trong
Trng a ch ca lnh
Vd:
ADD

R1, R2 ; R1<- R1+R2

S lng thanh ghi t ->

Trng a ch ch cn t bit
Khng tham chiu b nh
Truy nhp ton hng nhanh
Tng s lng thanh ghi ->
hiu qu hn

nh a ch trc tip

Ton hng l ngn nh c

a ch c ch ra trc tip
trong Trng a ch ca
lnh
V d: ADD R1, A ; R1<R1+(A)

Cng ni dung thanh ghi

R1 vi ni dung ca ngn
nh c a ch l A
Tm ton hng trong b nh
a ch A

CPU tham chiu b nh mt

ln truy nhp d liu

MOV MEM1, AL ; chuyn ni dung ca AL vo v tr nh c nhn

nh a ch gin tip qua thanh ghi

Ton hng l ngn nh c

a ch nm trong thanh
ghi
Trng a ch ca lnh cho
bit tn thanh ghi
Thanh ghi c th l ngm
nh
Thanh ghi ny c gi l
thanh ghi con tr
Vng nh c th c tham
chiu kh ln (2n), (vi n l
di ca thanh ghi)

nh a ch gin tip qua ngn nh

Ngn nh c tr bi Trng
a ch ca lnh cha a ch ca
ton hng
C th gin tip nhiu ln
Ging nh khi nim bin con
tr v bin ng trong lp trnh
CPU phi thc hin tham chiu
b nh nhiu ln tm ton
hng -> chm
Vng nh c th c tham
chiu rt ln

nh a ch dch chuyn

xc nh ton hng, Trng a ch ca lnh cha hai

thnh phn:

Tn thanh ghi
Hng s

a ch ca ton hng = ni dung thanh ghi + hng s

Thanh ghi c th c ngm nh

//Thc hin php AND BP vi nh

DS:BX+DI.
TEST BP, [BX][DI]

Kin trc Intel

Kin
Kin
Kin
Kin

trc
trc
trc
trc

4-bit: 4004
8-bit: 8008, 8080, 8085
16-bit: 8086/8088, 80186, 80286
32-bit:

80386, 80486,
Pentium, Pentium II
Celeron, Pentium III,
Pentium IV

Kin trc 64-bit: Itanium

128 bit?

Kin trc 16-bit (IA-16)

Cc thanh ghi bn trong: 16-bit

X l cc php ton s nguyn vi 16-bit
Qun l b nh theo on 64 Kbytes
M u cho dng my tnh IBM-PC

Kin trc 32-bit (IA-32)

Cc thanh ghi bn trong: 32 bit

X l cc php ton s nguyn vi 32-bit
C 3 ch lm vic

Ch 8086 thc (Real 8086 mode): lm vic nh

mt b x l 8086
Ch 8086 o (Virtual 8086 mode): lm vic nh
nhiu b x l 8086 (a nhim 16-bit)
Ch bo v (Protected mode)
a

nhim 32-bit
Qun l b nh o

X l cc php ton s du chm ng (t 80486)

Kin trc 64-bit (IA-64)

Cc thanh ghi bn trong: 64 bit

X l cc php ton s nguyn vi 64-bit
X l cc php ton s du chm ng
Khng tng thch phn cng vi cc b
x l trc
Tng thch phn mm bng cch gi
lp mi trng

Cu trc chung ca cc b x l tin

tin

Cu trc chung ca cc b x l tin

tin (tt)

Cc n v x l d liu

Cc n v s nguyn (IU: Integer Unit)

Cc n v s du chm ng (FPU: Floating
Point Unit)
Cc n v c chc nng c bit (SFU:
Special Function Unit)
X

l m thanh, ting ni.

Hnh nh, vector

Cu trc chung ca cc b x l tin tin

(tt)

B nh Cache

c tch hp trn chip vi x l

Bao gm 2 mc cache
Cache

L1: gm 2 thnh phn tch ri cache lnh v

cache d liu.
Cache L2: dng chung cho c lnh v d liu.
-> Gii quyt xung t khi nhn lnh v d liu

n v qun l b nh

Chuyn i a ch o thnh a ch x l.
Cung cp c ch phn trang/phn on.
Cung cp ch bo v b nh.