ADC~

ADC~
Bi:
Khoa CNTT HSP KT Hng Yn

ADC (Analog to Digital Converter)

Nguyn tc hot ng ca b bin i tng t - s
1111101011000111100010 1 2 3 4 5 6 7 8 Hnh 4-1: th bin i ca ADC 3 bit
(FS-Full Scale)B bin i tng t s DAC ng vai tr quan trng trong x l thng
tin khi m cc lung tn hiu a vo h vi x l l tn hiu dng tng t.
Cc b chuyn i ADC thc hin 2 chc nng c bn l lng t ho v m ho. Lng
t ho l gn cc gi tr ca 1 tn hiu tng t vo vng cc gi tr ri rc c th xy
trong qu trnh lng t ho. M ho l gn gi tr nh phn cho tng gi tr ri rc sinh
ra trong qu trnh lng t ho. i vi DAC ta cng dng cc loi m s nh nh phn,
BCD b 2, b 1 . Hnh 4-1 cho bit c tnh ca ADC 3bit lm vic vi m nh phn t
nhin mt ADC n bit c 2n t hp m ra khc nhau, chng c biu din trn trc tung
ca th thi gian.
Trn trc honh biu din gi tr ca in p vo tng t. ln ca mi n v ly
mu do php lng t ho quy nh l : Q=FS/2n. im gi mi "mu" l gi tr in p
tng t c biu din bng 1 m nh phn ra tng ng vi mu . Th d gia 161 FS
v 163 FS l im 18 FS. gi tr in p vo tng t trong khong t 161 FS n 163 FS c
chuyn sang m s l 001 ng vi gi tr in p vo l 18 FS. Nh vy php lng t ho
t n bao hm sai s l + Q2 trng hp l tng, gi tr M ni ra cho bit mt ga
tr l M

Q
+2
?

?
ni vo (M + nFS+ 1 ). Nh vy ch c th gim sai s ny bng cch tng s
?2

bit cho ADC.

Trong thc tin v c nhng sai s nh sai s lch.sai s phi tuyn nn vic xc nh
nhng im gi tr ca in p vo khng chnh xc. ng thi do sai s ton b ca
mt ADC bao gm c sai s lng t ho nn khng th tng s bit nn qu nhiu, ti
mc sai s lng t ho c th so snh c vi sai s k trn.
Mt ADC n bit c xy dng theo 1 trong 2 phng php l phng php trc tip
v phng php gian tip. Trong php trc tip, in p tng t cn chuyn i c
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ADC~

so snh lin tc vi in p ra ca mt DAC khi m nh phn ni vo ca n lin tc

thay i, khi c s cn bng gi hai in p ny, m nh phn ni vo ca DAC by
gi chnh l kt qu. Trong phng php chuyn i gin tip, in p cn chuyn i
trc ht c chuyn i sang mt i lng trung gian, sau i lng ny mi
c chuyn i sang m s. Phng php ny ni chung c tc chuyn i chm
hn nhiu so vi phng php trc tip. V vy phng php chuyn i trc tip c
s dng ph bin. C hai phng php chuyn i trc tip l phng php ADC c
m (counting ADC) v phng php ADC xp x lin tip.
Trong thc t thng s dng loi ADC xp x lin tip. Trong phng php ny c
mt u im ln l thi gian chuyn i ch t l thun vi s lng bit ca m s v
thi gian ca thanh ghi xp x lin tip ch khng ph thuc vo ln ca in p cn
chuyn i. thc hin qu trnh chuyn i, ngi ta cn t ln lt mi bit ca m
s ln mt, bt u t bit cao nht (MSB). S m t ADC kiu ny c m t hnh
4-2. Thanh ghi SAR (xp x lin tip) iu khin ni vo ca DAC theo tht ton sau:
1. t bit cao nht (MSB) bng 1.
2. Nu ni ra ca mch so snh l 1 th bit ny b xo v 0, nu khng phi th gi tr
c gi nguyn.
3. Bit cao nht tip theo c t nn 1ri lp li bc 2, nu tt c cc bit c xt
th qu trnh chuyn i dc thc hin xong.
Successive Appoximation Register (SAR)DACCLKTn hiu vo tng tMch so
snhTn hiu s u raEOCHnh 4-2: S mt ADC theo phng php xp xThut
ton ny trc ht cn kim tra xem in p vn chuyn i ln hay nh hn FS/2, nu
l ln hn, khi MSB bng 1 ta c in p l logic 0,ta gi nguyn MSB=1 v xt tipbit
cao nht tip theo xem in p vo ln hn hay nh hn 3/4 FS...c nh vy ta xt n
bit cui cng (LSB), lc ni dung ca thanh ghi SAR l m s kt qu. ng thi ti
thi im ny mt u ra ca SAR a ra mt tn hiu EOC (End Of Converter) bo
chuyn i xong.
Thanh ghi xp x lin tip c t chc di dng vi mchvi tt c nhng phn t iu
khin cn thit c th xy dng nhng DAC vi tc cao.Trong thc tin c nhng
thanh ghi xp x lin tip vi cu theo nhng m s s dng khc nhau.
B bin i ADC 8 Bit 0809
B bin i ADC 8 bit 0809 l ADC thng dng c x dng rt rng ri c 8 u vo
tng t v u ra 8 bit s, chuyn i theo phng php xp x lin tip. cc c trng
c bn ca ADC 08089 l:

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ADC~

u ra c b m 3 trng thi ghp trc tip vo knh gi liu ca h Vi x

l
Gii tn hiu ni vo tng t 5v khi ngun nui l +5v, c th m rng thanh
o bng cc gii php k thut cho tng mch c th.
Khng i hi iu chnh"0"
Thi gian bin i 100s
Sai s tng cng 1/2LSB
S dng ngun nui n +5v, hiu sut cao
m bo sai s tuyn tnh trong di nhit t -40 n +850c
S chc nng ca ADC 0809 (hnh 4-3)
8 chanel MUX analog switchesAddress Latched coderSARSwitch treeSwitch treeTriState Output latch buferControl and Timing8 Signal Analog8 bit Digital
outputRef(+)Ref(-)Vcc GNDStart ClockEOCHnh 4-3: S khi b chuyn i ADC
Ghp tn hiu vo ADC 0809
To
xung
nhp+5VVref(+)CLKVccEOCStartALEA,B,COE0-5vAnalog
Input
RangeDB0-DB7GNDVref(-)Hnh 4-4: Hot ng ca ADC 0809 khi u vo l n
cc Trong chu trnh chuyn i dng u vo tn hiu gi nhp 500KHZ dng cho b
ADC 0809 c to ra t bn ngoi v u n chn clock (b chuyn i ADC0809 s
dng tn s Clock c th trong gii 200KHz1MHz).
Ghp tn hiu n cc n u vo ca ADC 0809
To
xung
nhp+EcVref(+)CLKVccEOCStartALEA,B,COE0-5vAnalog
Input
RangeDB0-DB7GNDVref(-)Hnh 4-5: Hot ng ca ADC 0809 khi u vo l lng
cc Khi tn hiu u vo b chuyn i ADC l n cc (mt cc tnh),s nguyn
l lc c lp nh hnh 4-4. Trong trng hp ny thanh o tng ng 5v cho cc
u vo(tc l cc i lng cn o qua cc b cm bin phi a v gii t 0v n 5v,
tng ng vi mc0v u vo l t hp nh phn0000 0000 u ra.)
Ghp tn hiu lng cc n u vo ca ADC0809
Trong thc t kho xt cc i lng cn min i thng l cc tn hiu xoay chiu(tn
hiu vo c hai cc tnh) vi trng hp ny cn m rng thanh o thch hp vi tn
hiu. S nguyn l ca mch th hin dng ny nh hnh 4-5.
m rng thang o, in p so snh c a qua tng lp li da n chn 12
(chn Ref(+)) ca ADC0809.Cc knh ni vo tng t c dn n cc chn Vin0 n
Vin7

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ADC~

Nu chn Vref(+)=+2.5v th t u ra ca cc b cm bin phi u v gii 0 n 2.5v

(cho php o trong gii 2.5v). Khi cn trn ca thang o (+2.49V) tng ng vi t
hp m nh phn u ra l 1111 1111. Cn di thang o (-2.49V) ng vi t hp m
nh phn u ra l 0000 0000. cn mc "0"ca thang o ng vi t hp: 0111 1111.
th thi gian ca ADC 0809
Cc bit a ch li voA.B.C t b gii m a ch s cht v xc nh knh u vo
no c la chn.Tng ng vi knh u vo xc nh trn khi c mt xung dng
t vo chn s 6 (start) vi rng ti thiu ( TWS=200ns) sau thi gian TOEC (Tnh
t sn trc ca xung Sart) B chuyn i bt u thc hin chuyn i v trong sut
thi gian ny chn tn hiui ra EOC lun mc thp. ng thi u ra 3 trng thi ca
ADC 0809 b th ni ( trng thi tr khng cao)

Sau thi gian 0=100s ADC0809 htc hin chuyn i xong d liu u vo c a
n b m u raba trng thi, ng thi chn tn hiu EOC chuyn nn mc cao bo
hiu cho h VXL bit c kt qu vo.
Ghp ADC 0809 vi h Vi x l
Gii m a chEOCOEStartALEA B CCSIORDIORWD0-D7BUS h thngBo cho h
VXL bit bin i xongHnh 4-6: Ghp ADC 0809 vi h VXL Ghp ADC0809 vi
h vi x l c th hin trn hnh 4-6, cc knh vo analag c ni vi cc u vo
tng ng ca ADC (c 8 knh nh vy). Mi knh c a ch ring do t hp 3 bit a
ch ADC quy nh. Cc dy a ch ny c th x dng trc tip cc dy a ch ca knh
a ch h vi x l. Thng l ABC ca ADC 0809 c ni vi A0A1A2 ca h VXL.
Cc dy a ch cao ca h VXL to tn hiu chn chip CS cho ADC 0809.Tn hiu
CS c a ti u vo ca mch OR khi ng ADC (Start) khi c tn hiu IOWR
ng thi cht a ch (ALE) ca knh hin hnh c gi tr ba bit A,B,C. Tn hiu CS
cng c a ti u vo ca mch OR th 2 to tn hiu OE cng vi IORD nhm
cht d liu bin i xong u ra.
Khi bin i xong, ADC 0809 dng tn hiu OEC bo cho h VXL bit m nh phn
tng ng vi mc tn hiu u vo uwc to ra. OEC thng c ni vi u vo
ngt ca CPU hay ca PIC8259A. Trong mt s trng hp, ngi ta dng tr thi gian
khng nh qu trnh bin i hon tt th khng cn s dng tn hiu EOC.
Sau y l chng trnh minh ho cho s ghp ni trong hnh 4-6 s s dng phng
php to tr khng nh qu trnh bin i ADC bng th tc Delay_100_Microsec.
Chng trnh con Read_ADC khi c gi s iu khin 8 knh vo Analog theo
phng php qut vng v thc hin ly 256 mu cho mi knh. D liu ny c lu
tr trong vng m BUF_ADC c dung lng 8x256byte. a ch c s ca knh l
300h (ng vi knh u tin).
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ADC~

CODE_SEG SEGMENT
ASSUME CS:CODE_SEG
ORG 100H ;To file .COM
;Khai bo d liu cho chng trnh
chot EQU 300h ;cng ra cht knh v cng vo d liu
size_of_buf EQU 256 ;kch thc b m cho mi knh l 256 byte
buf_ADC DB 2048 DUP(?) ;dung lng 8 b m knh
;Chng trnh chnh
MAIN PROC
CALL read_ADC
;Cc lnh khc (nu cn thit)
MAIN ENDP
;Chng trnh con read_ADC
read_ADC PROC
PUSH AX;y cc thnh ghi AX,BX,CX,DX,DI vo ngn xp
PUSH BX
PUSH CX
PUSH DX
PUSH DI
MOV DI,0 ;Khi to vng m
MOV BX,OFFSET buf_ADC;a ch b m knh
L1:

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ADC~

ADD BX,DI ;BX tr ti ngn nh ny

MOV DX,chot;ly a ch cht ca knh u tin
MOV CX,08h;lp cho 8 knh
L2:
OUT DX,AL;khi ng knh hin hnh
CALL delay_100_microsec ;tr 100 micro giy
IN AL,DX;ni dung knh hin hnh c c vo h
MOV [BX],AL;chuyn vo b m tng ng
ADD BX,size_of_buf ;nhy ti b m tip theo
INC DX;tng a ch knh 1 n v
LOOP L2 ;lp li 8 knh
INC DI ;tr ti byte tip theo
CMP DI,256 ;cho ht 256 byte
JNZ L1 ;v lp li qu trnh
POP DI ;Ly ra t ngn xp
POP DX
POP CX
POP BX
POP AX
read_ADC ENDP
;Chng trnh con to tr 100 micro giy bng vic thc hin 100 ln lnh NOP.
;Mi lnh NOP (Khng hnh ng) nhng c mt khong thi gian thc hin chng

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ADC~

delay_100_microsec PROC
MOV CX,100
L3:
NOP
LOOP L3
delay_100_microsec PROC
END MAIN

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