Algorithmic state machines (ASM)

An alternative to a state diagram which is sometimes nicer when our hardware is

implementing an algorithm that can be drawn as a flowchart.

The ASM is tied closely with a hardware implementation.

The ASM consists of three types of elements:

State Box.

Decision Box.

Conditional Output Box.

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ASM charts state boxes

The state box is equivalent to the state bubble in a state diagram; it represents one
state of the system.

The state can have a name, and its binary encoding.

Moore machine outputs (those outputs that depend on the current state of the
system) can be shown inside of the box.

State Name

Binary Code

Moore Machine
Outputs

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ASM charts decision boxes

The decision box represents a choice (conditional expression) that depends on one or
more inputs to the circuit (control unit).

0 (false)

ECE124 Digital Circuits and Systems

Conditional
Expression

1 (true)

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ASM charts conditional output boxes

The conditional output box allows for specifying outputs that depend on both the
current state and the current inputs.

In other words, it contains Mealy outputs.

Mealy Outputs
(Conditional
Outputs)

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Comments

If the ASM Chart does not have any conditional output boxes, then the ASM Chart is
describing a Moore Machine.

If the ASM chart does have conditional output boxes, then the ASM Chart is describing
a Mealy Machine.

Also, when we have outputs, we only need to label the output values (in either a state
box or a conditional box) when the outputs are 1. If not shown, we can assume the
outputs are 0.

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Design steps given an ASM

Design of a clocked sequential circuit from an ASM chart is the same as from a state
diagram in so far as we start by generating a state table.

We determine the number of states from the number of ASM state boxes.

We perform state assignment for the ASM state boxes.

We use the ASM conditional output boxes, ASM state boxes and ASM decision
boxes to determine output values.

We use decision boxes to determine the next state from the current state.

Of course, once we have a state table, we are pretty much go to go using what we
have talked about previously in the course.

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Example design from ASM (1)

Assume we have an ASM Chart for a circuit

with three states (S0, S1 and S2), three
inputs (G, W and Z) and one output (A).

S0

A=1

00

G=1

Assume state assignment has already been

performed:

S0
S1
S2

<<<-

00
01
10

S1

01

A=1

S2

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W=1

10

Z=1

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Example design from ASM (2)

We can obtain our state table from the ASM Chart

S0

00

A=1

G=1

S1

01

W=1

A=1

From here, we would proceed as normal in order to

get a circuit implementation Pick FF type, generate
equations, etc

S2

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10

Z=1

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Example design from ASM (3)

A few comments:

There is an extra arrow shown entering into S0. This is the reset signal, so S0 is
the initial state.

If an output is not explicitly shown to be assigned a non-zero value, then it is

assumed that the output is 0 (I made this comment before).

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One-hot encoding and ASM

ASM Charts are closely tied with hardware if we use DFF and one-hot encoding We
can go directly from an ASM Chart to a circuit!!!

Each type of box in the ASM has a direct circuit translation.

So the connections shown between different boxes in the ASM correspond to

connecting small sub-circuits together to make a larger circuit.

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Circuit for an ASM state box

State Box becomes a DFF. Any specified outputs can be implemented later using
extra logic.

Entry
State Name

Entry

Binary Code
D

Moore Machine
Outputs

Exit

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Exit

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Circuit for an ASM decision box

Decision Box becomes a few AND gates and a NOT gate

Entry

Exit0

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Entry

Exit1

Exit0

Exit1

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Circuit for an ASM conditional output box

We simply tap off the signal and feed it to other circuitry to generate outputs.

Entry

Exit1

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Entry

Exit1

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Circuit for an ASM join

When edges join together, we can implement with an OR gate.

Entry0

Entry1

Exit

ECE124 Digital Circuits and Systems

Entry0

Entry1

Exit

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ASM Charts One Hot Encoding Implementation

S0

00

A=1
D

G=1

S1

01

W=1

A=1

S2

10

Z=1

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Design Example Shift/Multiply

Suppose we need to design a circuit that has two, n-bit inputs and one 2n-bit output.
The output is the product (multiplication) of the inputs.

We did see a combinatorial circuit for this operation the binary array multiplier.

We want to build the circuit in a different way (use only 1, n-bit adder rather than an
array of adders).

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Design Example Shift/Multiply

Recall how we do multiplication of binary numbers:

Multiplication is a shift and add operation.

We shift the multiplicand to the left (if multiplier bit is non-zero) and add.

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Design Example Shift/Multiply

Rather than shifting the multiplicand to the left and adding, consider shifting the
partial product to the right and adding:

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Design Example Shift/Multiply

To multiply 2, n-bit numbers we need to ADD and SHIFT n times. We can skip some
ADD operations if the multiplier bit is 0.

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Design Example Shift/Multiply

Design system by grabbing a bunch of functional blocks to perform necessary

operations:
dec

load1

n-1

clear

load2

multiplicand

ceil(log(n))
en

strt
valid

load1

multiplier

ld

down counter

n-bit register

zero

dec

load1
control

cout

clear

n-bit adder

shift
din

sum

load2
lsb

n
d

dout

din

shift
dout

din

dout

1-bit shift register

n-bit shift register

n-bit shift register

lsb

n
product

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Design Example Shift/Multiply

We can draw an ASM chart that generates the
correct control signals:

S0
clear=1
load1=1

strt

Completing the design from the ASM Chart

to a schematic for the control part of the
design is straightforward, using stuff we
learnt before.

MUL0

valid=1
0

lsb
1
load2=1
MUL1
dec=1
shift=1

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Design Example Shift/Multiply

Waveforms for our 4-bit example (1001 x 1101 = 01110101):

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