SRR ENGINEERING COLLEGE,PADUR

SET - A
DEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING
MID SEM III
GE 2151 BASIC ELECTRICAL AND ELECTRONICS ENGINEERING
YEAR/SEM : I/II
DATE :
TIME
: 1 Hrs
MARKS : 50
SECTION A (5*2=10)
1. Write any two salient points on a p-n junction.
2. When a transistor should be biased. Name two common biasing currents.
3. Give the applications of zener diode.
4. What are the basic properties of Boolean algebra?
5. What are universal gates? Why do we call them so?
SECTION B (16*2=32)
6(a). (i). Explain the mechanism of avalanche breakdown and zener breakdown.
(ii). Explain the working principle of half wave and full wave rectifier with neat
waveform.
(OR)
(b). (i). Explain various characteristics of BJT in common emitter configuration with neat
diagram.
(ii). Sketch a common emitter amplifier circuit with an NPN transistor.
7(a). (i). Explain in detail about RS,JK flip flop.
(ii). Reduce the following expressions using Boolean algebra postulates and realize any
one using NAND gates.
1. abc+abc+abc+abc
2. [(A+B)+C]
3. xyz+xyz
4. xy+xz+yz
5. (A+B+C)(A+B+C)(C+D)(C+D+E)
6. (ABC)+(ABC)
(OR)
(b). (i). Convert 95.062510 into binary and 10.012 , 101.112 and 0.1012 into decimal
equivalent.
(ii). Draw the logic diagram for a four bit parallel input and parallel output
register. Indicate input, output and negative edge triggered clock.
SECTION C (8*1=8)
8(a).
With a neat diagram explain how a voltage regulator circuit regulates the output
voltage under the following conditions.
1. Load resistance Increases
2. Input voltage decreases
(OR)
(b).
Show that NAND and NOR gstes are universal building blocks. And Implement
Half adder using NAND gate.

SRR ENGINEERING COLLEGE,PADUR

SET - A

DEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING

MID SEM III
GE 2151 BASIC ELECTRICAL AND ELECTRONICS ENGINEERING
YEAR/SEM : I/II
DATE :
TIME
: 1 Hrs
MARKS : 50
SECTION A (5*2=10)
1. Write any two salient points on a p-n junction.
2. When a transistor should be biased. Name two common biasing currents.
3. Give the applications of zener diode.
4. What are the basic properties of Boolean algebra?
5. What are universal gates? Why do we call them so?
SECTION B (8*5=40)
6. Explain the mechanism of avalanche breakdown and zener breakdown.
7. Explain the working principle of half wave and full wave rectifier with neat
waveform.
8. Explain in detail about RS,JK flip flop.
9. Reduce the following expressions using Boolean algebra postulates and realize any
one using NAND gates.
i. abc+abc+abc+abc
ii. [(A+B)+C]
iii.
xyz+xyz
iv. xy+xz+yz
v. (A+B+C)(A+B+C)(C+D)(C+D+E)
vi. (ABC)+(ABC)
10. With a neat diagram explain how a voltage regulator circuit regulates the output
voltage under the following conditions.
a. Load resistance Increases
b. Input voltage decreases