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Bo co thc tp tt nghip

Phn I Tm hiu mt s linh kin

8255
1. Cu trc ca 8255
Vi mch 8255 l vi mch c ln LSI, thng c gi l mch phi ghp vo/ra
song song lp trnh c. Do kh nng mm do trong cc ng dng thc t n l
mch phi ghp c dng rt ph bin cho cc h vi x l 8, 16, 32 bit, Vi mch 40
chn ny c cc chn nh sau:
34
33
32
31
30
29
28
27
5
36
9
8
35
6

U1
D0
D1
D2
D3
D4
D5
D6
D7

PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7

RD
WR
A0
A1
RESET
CS

PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
PC0
PC1
PC2
PC3
PC4
PC5
PC6
PC7

4
3
2
1
40
39
38
37
18
19
20
21
22
23
24
25
14
15
16
17
13
12
11
10

8255

C 24 ng dn li vo/ra xp thnh 3 cng song song ( portA, portB, portC).

Mt na cng C ( PC4 PC7) thuc nhm A, cn na kia thuc nhm B.
Chn Reset phi c ni vi tn hiu Reset chung ca ton h thng (khi Reset
cc cng c nh ngha l cng vo khng gy ra s c cho cc mch iu
khin).
Tn hiu CS c ni ci mch to xung chn thit b t mch 8255 vo mt
a ch c s no . Cc tn hiu a ch A0, A1 s chn ra 4 thanh ghi bn trong
8255: mt thanh ghi ghi t iu khin (CWR control word register) cho hot
ng ca 8255 v 3 thanh ghi khc ng vi cc cng l PA, PB, PC ghi c d
liu theo bng:
A1

A0

CS

RD

WR

Lnh (ca VXL)

0
0
1
1
0
0
1
1

0
1
0
1
0
1
0
1

0
0
0
0
0
0
0
0

0
0
0
0
1
1
1
1

1
1
1
1
0
0
0
0

c PortA
c PortB
c PortC

Ghi PortA
Ghi PortB
Ghi PortC
Ghi thanh ghi
iu khin
Vi mch trng
thi tr khng
cao

Tm hiu mt s linh kin

Hng chuyn s liu vi

VXL
PortA D0 D7
PortB D0 D7
PortC D0 D7
Khng c gi tr
D0 D7 PortA
D0 D7 PortB
D0 D7 PortC
D0 D7 Thanh ghi
iu khin
Khng c trao i s liu
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Tnh linh hot ca vi mch ny th hin kh nng lp trnh. Ta c th t cc

mode hot ng thng qua thanh ghi iu khin. Cc chn D0 D7 to nn knh d
liu 2 hng c rng 8 bit. Tt c d liu khi truy nhp ghi hoc c c dn qua
knh d liu ny.
Trng thi logic ghi/c c nhn bit qua cc tn hiu iu khin CS , RD , WR .
Trao i thng tin vi 8255 ch c th c tin hnh khi CS = 0. Khi RD = 0 d liu
ca cng c chn c a ra knh d liu v c th c s dng bi cc vi mch
khc. Khi WR = 0, th moi vic xy ra ngc li. Cc bit a ch A0 v A1 cng vi
cc tn hiu ghi c bo cho bit s truy nhp ln cng no.
S khi m t chc nng ca 8255:

iu
khin
nhm
A
D0D7

PortA

PA0PA7

(8)

m
s liu
4

PortC
na
cao (4)

PC7PC4

RD
WR
A1
A0

Logic
i
khin
c
ghi

iu
khin
nhm
B

Reset

PortC
na
thp
(4)

PortB

PC3PC0

PB0PB7

(8)
8

CS
2. Cc ch lm vic ca 8255
C 2 loi t iu khin cho 8255:
T iu khin nh ngha cu hnh cho cc cng PA, PB, PC.
T iu khin lp/xo tng bit u ra ca PC.
Tu theo lnh ghi vo thanh ghi iu khin khi khi ng vi mch m ta c
cc PortA,B,C hot ng :
Cc ch 0, 1, 2 khc nhau.
Tm hiu mt s linh kin

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Chiu trao i s liu khc nhau.

2.1. T iu khin nh ngha cu hnh cho cc cng
Dng thc t iu khin nh ngha cu hnh cho 8255:
D7
C =1

D6
MA1

D5
MA0

D4
A

D3
CA

D2
MB

D1
B

D0
CB
Nhm B
PCL(thp):

Nhm A
Chn ch
00: mode 0
01: mode 1
1x: mode 2

1: vo
0: ra
PB:
1: vo
0: ra

PA:
1: vo
0: ra

Chn ch :
1: vo
0: ra

PCH:
1: vo
0: ra

2.2. T iu khin lp xo bit ra PCi

Dng thc ca t iu khin d lp xo PCi:
D7
D6
D5
D4
D3
0
0
0
0

D2

D1

1: Lp PCi
0: Xo PCi

1 1 1 1 0 0 0 0
1 1 0 0 1 1 0 0
1 0 1 0 1 0 1 0

PC7PC6 PC5PC4 PC3 PC2PC1 PC0

D0
S/R

3 bit a ch
ca 8 bit PC

Cc ch lm vic ca 8255 c th c nh ngha bng t iu khin

CWR. 8255 c 3 ch lm vic:
Mode 0: Vo/ra c s. Trong ch ny mi cng PA, PB, PCH
v PCL u c th c nh ngha l cc cng vo hoc ra.
Mode 1: Vo/ra c xung cho php. Trong ch ny mi cng
PA,PB c th c nh ngha thnh cng vo hoc ra vi cc tn
hiu mc ni ( handshaking ) do cc bit tng ng ca cng PC
trong cng nhm m nhn.
Mode 2: Vo/ra 2 chiu. Trong ch ny ch ring cng PA c
th c nh ngha thnh cng vo ra 2 chiu vi cc tn hiu mc
Tm hiu mt s linh kin

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ni do cc bit ca cng PC m nhim. Lc ny cng PB c th

lm vic trong ch 0 hoc 1.
Trong ch 0, ngi ta c th dng cc bit ca PC lp xo iu khin
hoc i thoi vi cc thit b ngoi vi, ch ny cn gi l ch lp xo
tng bit ca PC:

Mode 0

WR, RD

D0 D7

PB0 PB7

Mode 1

Ca vo

PB0 PB7

Ca ra

PB0 PB7

A0,A1,
A

PA0 PA7

PC0 PC3 PC4 PC7

PC0

PC3

PC4

PC5 PC6

PC1

PC2

IBFB

STBB INTRA STBA IBFA

INTRB

OBFACK
B
B

I/O

I/O

I/O

PC7

I/O

PA0 PA7

A PA0 PA7
ACKOBF
A

i thoi ca A

i thoi ca B

Mode 2
B

PB0 PB7

PC0

PC1

PC2

I/O ( mode 0)
i thoi (mode 1)

Ca B mode 0 hoc 1

PC3

INTRA

PC4

PC5

STBA IBFA

PC6

PC7

ACK A PA0 PA7

OBF A

i thoi ca A

Ghp ni 8255 vi h vi x l
8255 lm vic mode 0
Trong ch 0, 8255 cho mt kh nng xut v nhp d liu n gin qua 3
cng A,B,C. PA, PB, PC c s dng c lp vi nhau, 3 ng dy u c dng
trao i s liu hoc thng tin v iu khin v trng thi mt cch bnh ng vi
nhau v tu la chn:
PA0 PA7

8255

PC0 PC3
PC4 PC7
PB0 PB7

Tm hiu mt s linh kin

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8255 lm vic mode 1

L ch vo/ra c cht, tc l c s i thoi gia ngoi vi v h vi x l thng
qua cc bit PortC. C 2 nhm:
Nhm A: gm PortA dng trao i s liu v na PortC cao( PC4 PC7 )
i thoi gia vi x l v ngoi vi.
Nhm B: gm PortB dng trao i s liu v na PortC thp( PC0 PC3 )
i thoi gia vi x l v ngoi vi.
Hng v ch 1 ca PortA, PortB do t lnh iu khin quyt nh, cc tn hiu
i thoi PCi ph thuc hng cng vo hay ra.
Xut d liu ra trong mode 1
Cng PA, PB c tn hiu i thoi tng t nhau. Tn hiu OBFA, OPFB bo rng
b m ra y cho ngoi vi bit CPU ghi d liu vo cng chun b a ra.
Tn hiu ny thng ni vi tn hiu STR ca thit b nhn.
Tn hiu ACKA, ACKB l tn hiu ca ngoi vi cho bit n nhn c d liu t
cc cng PA, PB.
Tn hiu INTRA, ITRB l tn hiu yu cu ngt t PA, PB.
INTEA, INTEB l tn hiu ca mt mch lt bn trong 8255 cho php hoc
cm yu cu ngt INTRA hoc INTRB ca PA hoc PB.
INTEA c lp/xo thng qua bit PC6
INTEB c lp/xo thng qua bit PC2
Khi lm vic ch xut thng tin mode 1, thanh ghi trng thi ca 8255 cung
cp cc thng tin phn nh trng thi hin hnh ca mnh

S ghp ni ca 8255 mode 1

RA

INTEA

VO
PA0 PA7
PC7

OBFA

PC6

ACKA

PC3

PC2

PC0

OBFB
ACKB
INRB

PB0 PB7
PC4,5

PA0 PA7

STBA

PC4

INRA

INTEB
PC1

INTEA

PC5

IBFA

PC3

INTE

PC2

STBB

PC1

IBFB

INTEB

INRB

PC0

PB0 PB7
I/O

PC6,7

I/O

OBFA (Output Bufer A full) Cng A c d liu ri

Tm hiu mt s linh kin

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OBFB (Output Bufer B full) Cng B c d liu ri

INTEA ( Interrupt Enable For PortA) cho php PA chy ch ngt.

INTEB ( Interrupt Enable For PortB) cho php PB chy ch ngt.
INTRA ( Interrupt PortA ) PA ngt
INTRB ( Interrupt PortB ) PB ngt
Ni dung thanh ghi trng thi ca 8255 mode 1 cho hng ra:
D7
D6
D5
D4
D3
D2
D1
D0
INTEA
IO
IO
INTRA INTEB
INTRB
OBFA
OBFB
Nhn d liu vo trong mode 1
Khi nhn d liuvo trong mode 1 cc cng PA, PB c tn hiu i thoi tng t
nhau:
STB ( cho php cht d liu). Khi d liu sn sng trn knh PA, PB ngoi vi
phi dung STB bo cho 8255 bit cht d liu vo cng PA hoc PB.
Sau khi 8255 cht c d liu do thit b ngoi vi a n, n a ra tn hiu IBF
(In Buffer full) bo cho ngoi vi bit.
Ni dung thanh ghi trng thi ca 8255 mode 1 cho hng vo:
D7
D6
D5
D4
D3
D2
D1
D0
IO
IO
INTEA
INTRA
INTEB
INTRB
OBFA
OBFB
8255 lm vic mode 2
Ch ny ch dng cho cng PA vi vo/ra 2 chiu cc bit PC3 PC7 dng
lm tn hiu i thoi.
Mch logic ca 8255 mode 2 v cc tn hiu i thoi:
Vo

INTE 2

Ra

PA0 PA7

PC3

PC7

PC6

INTE 2

INRA

INRA

PC3

OBFA

OBFA

PC7

ACKA

INTE 1

PA0 PA7

ACKA

PC6

INTE 1
PC5

PC4

IBFA

STBA

PC5

IBFA

STBA

PC4

PB0 PB7
PB0 PB7
PC0,2

I/O

Tm hiu mt s linh kin

OBFB

PC1
PC2
PC0

ACKA
8

INTRB

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Cng PB c th lm vic mode 1 hoc mode 0 tu theo bit iu khin trong

thanh ghi CWR.
INTRA: yu cu ngtcho d liu 2 chiu vo/ra.
INTE 1, INTE 2: l l 2 tn hiu ca 2 mch lt bn trong 8255 cho php hoc
cm yu cu ngt ca PA, cc bit ny c lp xo bi PC6 v PC4.
Khi dng 8255 trong ch bus 2 chiu trao i d liu theo cch thm d,
phi kim tra xem bit IBFA c bng 0 (m vo rng) hay khng trc khidng lnh
IN nhn d liu t cng PA.
Khi lm vic ch truyn thng tin 2 chiu ca mode 2, thanh ghi trng thi
ca 8255 cung cp cc thng tin phn nh trng thi hin hnh ca mnh.
Ni dung thanh ghi trng thi:
D7
D6
D5
D4
D3
D2
D1
D0
IBFA
INTE2 INTRA
x
x
x
OBFA INTE1
Nhm B

Nhm A

Tm hiu mt s linh kin

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8254( 8253 )

Mch nh thi gian lp trnh c 8254/8253 l mt mch ph rt quan trng

trong cc h vi x l ca Intel. N c th p ng c cc yu cu ng dng khc
nhau trong h vi x l: m thi gian, m s kin, chia tn s, to ra dy xung
c im ca 8254/8253:
Hot ng tn s cc i l 8MHz.
Nh da trn cng ngh CMOS nn t c tc cao v tiu th nng lng
thp.
Hot ng ch hon ton tnh.
C 3 b m li ( Down- counter ) c lp 16 bit.
Ngun cung cp t 3V 6V.
C th m nh phn hoc thp phn.
MSM82C53-2RS c 24 chn.
MSM82C53-2JS c 28 chn.
MSM82C53-2GS-VK c 32 chn.
S khi chc nng:
CLK0 GATE0 OUT0

CLK1 GATE1 OUT1

Counter
#0

CLK2 GATE2 OUT2

Counter
#1

Counter
#2

Read/
Write logic

Control
word
regisrer

Data bus
buffer
8
D7 D0
Vcc GND

WR RD A0 A1 CS

Chn chn v (CS) ca vi mch 8254/8253 phi c ni vi u ra ca mt b

gii m nh a ch c bn cho mch. Cng vi a ch c bn, cc chn a ch
A1 v A0 s cung cp cc a ch c th ca cc thanh ghi bn trong 8254/8253 khi
ghi ( lp trnh ) hoc c thng tin ca mch. l thanh ghi cho 3 b m v mt
thanh ghi cho t iu khin. Ni dung ban u ca mi b m u c th lp trnh
t CPU thay i c. Ngoi ra cn c th iu khin hot ng ca cc b m
bng tn hiu t bn ngoi qua cc chn ca ( GATE ) cho php bt u m
( GATE = 1) hay kt thc qu trnh m ( GATE = 0). Gi tr ca b m c th
t bng byte hoc word.
Truyn d liu gia bus d liu( data bus ) v thanh ghi bn trong c m t bi
bng sau:
Tm hiu mt s linh kin

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CS

RD

WR

0
0
0
0
0
0
0
0
1
0

1
1
1
1
0
0
0
0
X
1

0
0
0
0
1
1
1
1
x
1

A1
0
0
1
1
0
0
1
1
X
X

A0
0
1
0
1
0
1
0
1
x
x

Bo co thc tp tt nghip
Chc nng
Counter#0 ghi d liu t data bus
Counter#1 ghi d liu t data bus
Counter#2 ghi d liu t data bus
Ghi thanh ghi t iu khin
Data bus c d liu t counter#0
Data bus c d liu t counter#1
Data bus c d liu t counter#2
Data bus trng thi cao tr

1. Khi u cho 8254/8253

Cng nh cc vi mch lp trnh c khc ph tr cho CPU, sau khi bt in mch
8254/8253 phi c khi u c th hot ng theo ng yu cu. Mt iu cn
ch l trng thi ca 8254/8253 sau khi bt in l khng xc nh.
khi u cho 8254/8253 ta phi ghi t iu khin vo thanh ghi t iu khin
ca n. Dng thc t iu khin ca 8254/8253 nh sau:
D7
SC1

D6
SC0

Select
counter

D5
RW1

D4
RW0

Ghi/c

D3
M2

D2

D1
M1

D0
M0

BCD

Chn ch

Chn b m ( select counter ) qua CS1 v CS0:

SC1
0
0
1
1

SC0
0
1
0
1

Chn ra
Counter#0 c chn
Counter#1 c chn
Counter#2 c chn
Lnh c ngc

Ghi/c :
RW1 RW0
0
0
Lnh cht b m
0
1
c/ghi byte c trng s nh nht(LBS)
1
0
c/ghi byte c trng s ln nht(MBS)
1
1
c/ghi byte LBS, tip theo l MBS
t ch :
M2 M1 M0
0
0
0 Mode 0- to yu cu ngt khi m ht
0
0
1 Mode 1- a hi i lp trnh c
0
1
0 Mode 2- b chia tn s cho N
0
1
1 Mode 3- to xung vung
1
0
0 Mode 4- to xung cho php mm
1
0
1 Mode 5- to xung cho php cng
Tm hiu mt s linh kin

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t ch m qua bit BCD: bit BCD = 0 m nh phn 16bit, bit BCD = 1 m

thp phn 4 decades.
Thanh ghi t iu khin dng cha t iu khin cho c 3 b m. Vi cc bit
SC0, SC1 ta c th chn ra b m lm vic theo cch thc do t iu khin quyt
nh. Trng hp c bit khi SC1 v SC0 = 1 ta c th dng lnh c ngc c c ni dung hoc trng thi ca b m trong thi im hin ti.
Cc b m ca 8254/8253 u lm vic ch m li. Nh vy s m ln
nht m ta c th a vo b m bt u m l 10000H hoc 10000, v sau khi
li 1 ta c ni dung mi ca b m l FFFFH hoc 9999 tu theo bit BCD = 0 hay
BCD =1.
Cc bit M2,M1,M0 s xc nh cc ch lm vic ca b m, trong cc
u vo GATE c nhng tc ng khc nhau n cc u ra OUT.
Cc bit RW1,RW0 cho php chn cch thc ghi/c vi cc b m. Ta c th
ghi/c tch ring tng byte ca b m. Nu mun ghi/c lin tip 2 byte ca b
m th ta phi tun theo th t byte thp trc v tip theo l byte cao.
2. Cc ch lm vic ca 8254/8253
Mode 0 To yu cu ngt khi m xong ( terminal count)
ch ny t iu khin CW= 10H, ch c/ghi LSB v ch m theo h 16
cho b m s 0. Sau khi ghi t iu khin vo thanh ghi t iu khin th OUT= 0.
Tip theo ta hgi LSB = 4l phn thp ca s m cho b m. Gi tr ny s c
chuyn vo b m chu k ng h sau. Lc ny GATE = 1 nn b m bt u
m ngc. Khi b m t ti 0 th OUT =1. iu c ngha nu ta np vo LSB =
N th sau N+1 xung ng h ta c OUT = 1. sau khi t 0000H th b m tip tc
m li t FFFFH nu nh n khng c np gi tr m mi. Xung OUT c th c
dng nh l xung yu cu ngt i vi CPU bo l t s m ( terminal
count ).
Khi b m ang lm vic m GATE = 0 th ni dung ca b m c gi khng
i cho n khi GATE = 1, lc ny b m li tip tc m li.
Khi b m ang lm vic m c xung iu khin np ni dung s mi, ni dung
mi ch c a n b m ti xung ng h tip theo. Sau b m li tip tc
m li vi s m mi.
Mode 1- a hi i vi thi gian lp trnh c
ch ny ta c CW = 12H, ch c/ghi LSB v ch m theo h 16 cho b
m 0. Sau khi ghi t iu khin vo thanh ghi t iu khin th OUT = 1. Tip theo
ta ghi LSB = 3 l phn thp ca s m cho b m. Gi tr ny s c chuyn vo
b m. Lc ny GATE = 0 nn b m cha lm vic. Khi c xung kch GATE = 1
th b m bt u lm vic chu k ng h sau. T y OUT=0 v bt u qu
trnh m ngc. Khi b m t ti 0 th OUT = 1. iu c ngha l nu ta np
vo LSB = N v GATE = 1 th OUT = 0 trong N xung ng h. B m sau khi t
0000H th s m li t FFFFH nu nh n khng c np gi tr m mi v mi khi
c xung GATE = 1 n li to ra xung OUT = 0 trong N xung ng h.
Khi b m ang lm vic v cha t c s m m c xung GATE = 1 th s
m c c np li cho b m chu k ng h sau. T lc ny b m li tip tc
m li. OUT = 0 cho n khi m ht.
Khi b m ang hot ng m ta c xung iu khin np s m mi th ni
dung mi ch c a n b m ti xung ng h tip theo sau khi c xung GATE
= 1.
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Mode 2-To xung c tn s fin/N

ch ny ta c CW = 14H, tc l ch c/ghi LSB v ch m theo h 16
cho b m s 0. Sau khi ghi t iu khin vo thanh ghi t iu khin th OUT = 1.
tip theo ta ghi LSB = 3 l phn thp ca s m cho b m. Gi tr ny c chuyn
vo b m ti chu k sau ca xung ng h. Lc ny GATE= 1 nn b m bt u
lm vic. T y bt u qu trnh m ngc. Khi b m t n 1 th OUT = 0
trong thi gian 1 xung ng hv qu trnh m ngc li c bt u vi OUT = 1
v vi s m c. iu c ngha l khi ta np LSB=N vo b m th c sau N
xung ng h, ta c u ra OUT = 0 trong thi gian 1 xung ng h.
Khi b m ang lm vic v cha t c s m m c xung GATE = 0 th gi
tr hin thi ca b m c c gi nguyn trong sut thi gian GATE = 0. Khi
GATE = 1 th b m li tip tc m li.
Khi b m ang hot ng v cha t s m m c xung iu khin np s
m mi th b m vn tip tc vi s m c, ch ti khi b m m n 1 th
s m mi mi c p dng.
Mode 3- To dy xung vung
ch ny ta c CW = 16H, ch c/ghi LSB v ch m theo h 16 cho b
m s 0. Sau khi ghi t iu khin vo thanh ghi t iu khin th OUT = 0. Tip
theo ta ghi LSB = 4 l phn thp ca s m cho b m. Gi tr ny s c chuyn
vo b m ti xung ng h sau. Lc ny GATE = 1 nn b m bt u ngay qu
trnh m ngc. Khi b m t ti (4/2)=2 th OUT = 0 trongtrong thi gian (4/2)
=2 xung ng h cn li v qu trnh m li c bt u vi OUT = 1 v vi s
m c. iu c ngha l sau khi ta np LSB = N (s chn) vo b m th c sau
N xung ng hta c OUT = 1 trong N/2 xung ng h v OUT = 0 trong N/2 xung
ng h. Nu N l s l th c sau N xung ng h ta c OUT = 1 trong (N+1)/2
xung ng h v OUT = 0 trong (N-1)/2 xung ng h cn li.
Khi b m ang hot ng m c xung GATE = 0 th b m khng thay i
ni dung chng no cn c GATE = 0, khi GATE = 1 n tip tc m li t gi tr
hin thi.
Mode 4- To xung cho php bng chng trnh
ch ny ta c CW = 18H, ch/c ghi LSB v ch m theo h 16 cho b
m s 0. Sau khi ghi t iu khin vo thanh ghi t iu khin thi OUT = 1. Tip
theo ta ghi LSB = 3 l phn thp ca s m cho b m. Gi tr ny s c chuyn
vo b m ti xung ng h sau. Lc ny GATE = 1 nn b m bt u ngay qu
trnh m ngc. Khi b m t ti 0 th OUT = 0 trong thi gian 1 xung ng h v
qua trnh m li tip tc t FFFFH vi OUT = 1. Tc l nu ta np s m N th
sau N+1 xung ng h th ta s c c xung cho php tch cc thp ko di 1 xung
ng h.
Sau khi b m c np s m n vn cha lm vic chng no cha c xung
GATE = 1.
Khi b m ang m v cha t s m m ta c xung iu khin np s m
mi th s m mi s c np v bt u m li ti xung ng h tip ngay sau .
Mode 5- To xung cho php bng xung iu khin GATE
ch ny ta c CW = 1AH, ch c/ghi LSB v ch m theo h 16 cho
b m s 0. Sau khi ghi t iu khin vo thanh ghi t iu khin th OUT = 1. Tip
theo ta ghi LSB = 3 l phn thp ca s m cho b m. Lc ny GATE = 0 nn b
m cha lm vic. Khi c xung kch GATE = 1 th chu k ng h sau b m bt
u qu trnh m ngc. Khi b m t ti 0 th OUT = 0trong thi gian mt xung
Tm hiu mt s linh kin

13

Tim boi : nguyenvanbientbd47@gmail.com

Bo co thc tp tt nghip

ng h v qu trnh m li tip tc t FFFFH vi OUT = 1 nu khng c xung

GATE =1 mi. Tc l nu ta np s m l N v xung GATE=1 th sau N+1 xung
ng h ta s c xung cho php tch cc thp ko di 1 xung ng h.
Khi b m ang m li v cha t s m c xung GATE = 1 b m c np
li s m c v n bt u m li ti xung ng h tip ngay sau .
Khi c lnh np s mi b m vn tip tc m li vi s m c cho ti khi
nhn c xung GATE =1 th s m mi mi c p dng xung ng h sau.

CW=10

LSB= 4

WR
Clk
GATE
OUT
N
CW=10

LSB=3

WR
Clk
GATE
OUT
N
CW=10

N
LSB=3

LSB=2

WR
Clk
GATE
OUT
N

Biu thi gian ca 8254/8253 mode 0

Tm hiu mt s linh kin

14

Tim boi : nguyenvanbientbd47@gmail.com

CW=12

Bo co thc tp tt nghip

LSB=3

WR
Clk

GATE
OUT
N

CW=12

LSB=3

WR
Clk
GATE
OUT
N

CW=12

LSB=4

LSB=2

WR
Clk
GATE
OUT
N

Biu thi gian ca 8254/8253 mode 1

Tm hiu mt s linh kin

15

Tim boi : nguyenvanbientbd47@gmail.com

CW=14

Bo co thc tp tt nghip

LSB=3

WR
Clk
GATE
OUT
N

CW=14

LSB=3

WR
Clk
GATE

OUT
N

CW=14

LSB=4

LSB=5

WR
Clk
GATE
OUT
N

Biu thi gian ca 8254/8253 mode 2

Tm hiu mt s linh kin

16

Tim boi : nguyenvanbientbd47@gmail.com

CW=16

Bo co thc tp tt nghip

LSB=4

WR
Clk
GATE
OUT
N

CW=16

LSB=5

WR
Clk
GATE
OUT
N

CW=16

LSB=4

WR
Clk
GATE

OUT
N

Biu thi gian ca 8254/8253 mode 3

Tm hiu mt s linh kin

17

Tim boi : nguyenvanbientbd47@gmail.com

CW=18

Bo co thc tp tt nghip

LSB=3

WR
Clk
GATE
OUT
N

CW=18

LSB=3

WR
Clk
GATE
OUT
N

CW=18

LSB=2

LSB=3

WR
Clk
GATE
OUT
N

Biu thi gian ca 8254/8253 mode 4

Tm hiu mt s linh kin

18

Tim boi : nguyenvanbientbd47@gmail.com

CW=1A

Bo co thc tp tt nghip

LSB=3

WR
Clk
GATE
OUT
N

CW=1A

LSB=3

WR
Clk
GATE
OUT
N

1
CW=1A

LSB=5

LSB=3

WR
Clk
GATE
OUT
N

Biu thi gian ca 8254/8253 mode 5

Tm hiu mt s linh kin

19

Tim boi : nguyenvanbientbd47@gmail.com

Bo co thc tp tt nghip

7400 l IC gm 4 phn t NAND 2 u vo:

S chn:
Vcc
14 13

11 10

12

7
GND

IC7400

7402 l IC gm 4 phn t NOR 2 u vo:

S chn:
Vcc
14 13

11 10

12

IC7402

7
GND

11

10

7
GND

10

7
GND

7404 l IC gm 6 phn t NO :
S chn:
Vcc
14 13 12

IC7404

7432 l IC gm 4 phn t OR 2 u vo:

S chn:
Vcc
14 13

12

11

IC7432

Tm hiu mt s linh kin

20

Tim boi : nguyenvanbientbd47@gmail.com

Bo co thc tp tt nghip

74LS138 l mch gii m:

S chn:
Vcc Y0 Y1 Y2 Y3 Y4 Y5 Y6
16 15 14 13 12 11 10 9

74LS138

1
A

3 4 5 6 7 8
C G2A G2B G1 Y7 GND

2
B

Bng chc nng ca 74LS138:

Cc u vo
Chn
Cho php
C

X
X
X
0
0
0
0
1
1
1
1

x
x
x
0
0
1
1
0
0
1
1

x
x
x
0
1
0
1
0
1
0
1

G2 B

G2 A

1
x
x
0
0
0
0
0
0
0
0

x
1
x
0
0
0
0
0
0
0
0

Cc u ra

G1 Y 0

x
x
0
1
1
1
1
1
1
1
1

1
1
1
0
1
1
1
1
1
1
1

Y1

Y2

Y3

Y4

Y5

Y6

Y7

1
1
1
1
0
1
1
1
1
1
1

1
1
1
1
1
0
1
1
1
1
1

1
1
1
1
1
1
0
1
1
1
1

1
1
1
1
1
1
1
0
1
1
1

1
1
1
1
1
1
1
1
0
1
1

1
1
1
1
1
1
1
1
1
0
1

1
1
1
1
1
1
1
1
1
1
0

74273 l IC gm 8 D FF ng b theo sn xung, mch ra 3 trng thi:

S chn:
Vcc 8Q 8D 7D 7Q 6Q 6D 5D 5Q Clock

clear1Q 1D 2D 2Q 3D 3Q 4D 4Q GND
74273

Bng chc nng:

Clear
L
H
H
H

Clock
x

D
x
H
L
x

Tm hiu mt s linh kin

Output(Q)
L
H
L
Q0

21

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Bo co thc tp tt nghip

S chn ca 373:
Vcc 8Q 8D 7D 7Q 6Q 6D 5D 5Q G

Output 1Q 1D 2D 2Q 3D 3Q 4D 4Q GND
Control
373

Bng chc nng ca 373:

Output Control
L
L
L
H

G
H
H
L
x

D
H
L
x
x

Output(Q)
H
L
Q0
T

H: Mc High, L: Mc Low, T: Ba trng thi, Q0: D liu c lu nh

ADC0808, ADC0809. L b chuyn i tng t s 8 bits, 8 knh u vo, u ra
3 trng thi.
c im:
phn gii 8 bits.
Ngun cung cp n 5V.
8 knh u vo.
Cng sut tiu th: 15mW.
u ra 3 trng thi.
in p u vo tng t 0V 5V.
Cc u ra nh s t 2-8 2-1.
Cc u chn a ch: A, B, C.
S chn:

IN2IN1 IN0 A

2-2 2-3 2-4 2-5REF(-)

C ALE 2-1

28 27 26 25 24 23 22 21 20 19 18 17 16 15

ADC0808
ADC0809

3 4

7 8

EDC 2-8
IN3 IN4 IN5IN6 IN7
START

9 10 11 12 13 14-7
Clock

Output
Enable

Vcc

GND 2
REF(+)

Tm hiu mt s linh kin

22

Tim boi : nguyenvanbientbd47@gmail.com

Chn knh vo
IN0
IN1
IN2
IN3
IN4
IN5
IN6
IN7

Bo co thc tp tt nghip

C
L
L
L
L
H
H
H
H

u chn a ch
B
A
L
L
L
H
H
L
H
H
L
L
L
H
H
L
H
H

DAC0808. L b bin i s tng t 8 bits.

c im:
Kh chnh xc: sai s 0.19%.
Cng vo khng o, giao tip c vi TTL v CMOS.
Gii in p cung cp 4.5V 18V.
Cng sut 33mW ( 5V).
Cc gi tr danh nh:
in p ngun:
Vcc +18V
VEE - 18V
in p u vo s: 10V +18V.
in p ra: -11V +18V
Dng chun: 5mA.
Cng sut tiu tn theo v: 1000mW
S chn:

NC
GND
VEE

16

15 VREF(-)

14 VREF(+)

I0 4
A1

13
DAC0808

12

11

A3 7

10

A4

A2

COMPENSATION

Vcc
A8
A7
A6
A5

Tm hiu mt s linh kin

23

Tim boi : nguyenvanbientbd47@gmail.com

Bo co thc tp tt nghip

245 Thng dng lm b khuych i m

S chn:

c im:

Giao din bus 2 chiu.

u ra 3 trng thi.
S chc nng:

Bng chc nng:

Inputs
OE

L
L
H
Z - trng thi cao tr.

DIR
L
H
x

Inputs/outputs
An
Bn
A=B
Inputs
Inputs
B=A
Z
Z

Tm hiu mt s linh kin

24