TRNG I HC BCH KHOA H NI

VIN IN T - VIN THNG

BI TP LN MN THIT K TNG HP H THNG S

TI:

Thit k khi s hc s thc du phy ng

Gio vin hng dn

: TS. V L Cng.

Nhm 20:
Sinh
vin

inh Vn Nam

20091814

TVT 01 K54
Nguyn Mnh Trung 20115803
TT 1-k56

H Ni, 12/2014
1

CNT-

Mc Lc.

Mc Lc 1
Danh mc hnh nh. ..2
Li cm n 3
Tm tt. 4

Chng 1. Gii thiu. ..5

1.1
1.2
1.3
1.4
1.5

Gii thiu5
FPU l g? ..5
Tiu chun IEEE754 ..7
Gii thiu ti..8
Kt lun chng. 9

Chng 2. L Thuyt. 10
2.1 Gii thiu. ..10
2.2 S thc du phy ng 10
2.3 Biu din s thc du chm ng thc hin trong d n.11
2.3.1 Biu din s b 2 ca s nhi phn 4 bt. 11
a. Phn phn s F(fraction). ..12
b. Phn s m E(exponent).13
2.4 Nhn hai s thc du phy ng. 13
2.5 Cng s thc du phy ng.18
2.6 Tr hai s thc du phy ng. 19
2.7Kt lun chng21
2

Chng 3 M phng v kt qu..22

3.1 Gii thiu chng22
.

3.2 S khi23
3.3 Kt qu m phng24
3.3.1 Kt qu m phng trn quartus24
3.3.2 Kt qu m phng trn Modulesim..25
3.4 Kt lun chng..29

Chng 4 Kt Lun30
Ti liu tham kho32
Ph Lc 33

Danh mc hnh nh, bng biu.

3

Hnh v, Bng biu

Hnh 2.1
Hnh 2.2
Hnh 2.3
Hnh 2.4
Hnh 3.1
Bng 3.1
Bng 3.2
Bng 3.3
Hnh 3.1
Hnh 3.4
Hnh 3.5
Bng 3.4

M t
Thut ton nhn s thc du phy ng.
Thut ton nhn hai s nguyn khng du
Thut ton cng s thc du phy ng.
Thut ton tr s thc du phy ng.
S khi ca chng trnh.
M t chn d liu trong s khi.
Bng m t gi tr ca m php ton.
Bng chuyn i s nh phn 4 bt hin th trn led 7 thanh.
Kt qu m phng thnh cng trn quartus
S lung d liu dataflow
Bng kt qu trancript.
Tng hp kt qu m phng.

Li cm n.
Chng ti mun by t lng bit n chn thnh i vi ngi hng dn ca
chng ti TS V L Cng, Vin in T Vin Thng, i Hc Bch Khoa H Ni
4

gim st, to ng lc v trn tt c l s gip trong ton b thi gian ca d n ca

chng ti m nu khng c th d n khng th hon thnh.
Chng ti thc s bit n n tt c bn b ca chng ti, nhng ngi c
nhng gp qu bu trong thi gian chng ti lm d n. Chng ti cng phi tha nhn
cc ngun ti nguyn hc tp m chng ti nhn c t nhiu ngun khc nhau.
Chng ti xin gi li cm n ti gia nh, chnh l ngun lc ng vin chng ti
phn u trong hc tp v cuc sng.
Tuy c nhiu c gng trong qu trnh hc tp cng nh thi gian lm d n nhng
khng th trnh khi nhng thiu st, ti rt mong c s gp qu bu ca tt c cc
thy c gio v cc bn d n ca chng ti c hon thin.
Chng ti xin chn thnh cm n!!
H Ni, ngy 4 thng 5 nm 2015.
Sinh Vin
inh Vn Nam
Nguyn Mnh Trung

Tm tt.

Khi s thc du phy ng rt thng dng trong b ng x l ton hc. N l

mt phn ca mt h thng my tnh c thit k c bit thc hin cc hot ng
tnh ton trn cc s thc du chm ng. Mt s hot ng tnh ton trn khi FPU nh:
cng, tr, nhn, chia. Mc ch l xy dng mt CPU hiu qu thc hin cc chc
nng c bn cng nh chc nng siu vit vi vic lm gim phc tp ca logic c
s dng lm gim hoc t nht gii hn thi gian tng ng nh dng x87 v lm gim
b nh cng nhiu cng tt. thc hin cc chc nng nh: cng, tr, nhn , chia.
cc s thc du phy ng phi chuyn i d liu sang nh dng chun IEEE 754. Tt
c thut ton trn c ng b ha v nh gi theo mi trng Spartan 3E
Synthesis. Tt c cc chc nng c xy dng bi cc thut ton c hiu qu vi mt s
thay i kt hp cui trong phm vi cho php.

Chng 1. Gii thiu.

1.1 Gii thiu chng.
6

Khi s thc du phy ng rt thng dng trong b ng x l ton hc. N c

thit k thc hin cc hot ng tnh ton trn s thc du phy ng. Mt s hot
ng tnh ton trn khi FPU nh: cng, tr, nhn, chia. FPU cng c thc hin mt s
hot ng tnh ton khc nh: hm m, lng gic. Cc s thc du phy ng c
chun ha theo chun IEE754.
chng ny chng ti gii thiu nhng ni dung sau:
FPU l g? trong mc 1.2.
Gii thiu tiu chun IEEE754 trongmc 1.3.
Sau tm tt v d n trong mc 1.4.
Tm tt chng, mc 1.5.
1.2 FPU l g?
Khi mt CPU thc hin mt chng trnh c gi n mt s thc du phy
ng (FP) hot ng, c ba cch n c th thc hin. Th nht, n c th gi l mt s
thc du phy ng gi lp, l mt th vin s thc du phy ng, s dng mt lot
cc php tnh s hc s thc du phy ng c thc hin trn khi ALU. Cc gi lp c
th lu trn cc phn cng b sung ca mt FPU nhng chm ng k. Th hai, n c th
s dng mt thm mt FPU c hon ton tch bit vi CPU, n ch cn thit tng
tc tnh ton . Cn li l s dng tch hp FPU c trong h thng.
FPU c thit k bi vi chnh xc theo tiu chun IEEE754. N khng ch
gii quyt cc php tnh c bn vi s thc du phy ng nh: cng, tr, nhn, chia m
cn c th x l cc hot ng nh dch, xc nh cn bc v cc chc nng siu vit nh
sin, cos.
1.3 Tiu chun IEEE754.
IEEE754 l tiu chun cng ngh c thnh lp bi t chc IEEE754 v n c
s dng rng ri trong vic tnh ton s thc du phy ng, theo sau bi nhiu phn
7

cng( CPU v FPU) v thc hin trn phn mm. nh dng mt s thc du phy ng
chim 32 bit trong b nh ca my tnh. Phin bn hin ti, IEEE 754-2008 ra mt vo
thng Tm nm 2008. Trong phin bn IEEE754-2008 Trong IEEE 754-2008, 32-bit vi
2 nh dng chnh thc l: single precision hoc binary32. Cc tiu chun IEEE754 quy
nh mt s tc du phy ng l c bt du hiu c chiu di 1 bt,mt s m c chiu
di 8 bit v phn nh tr c chiu di 24 bit trong 23 bit l c lu tr mt cch r
rng v 1bt l tim n .
Bt du xc nh du ca s thc du chm ng. Bng 0 th s mang du dng,
bng 1 s mang du m. Phn m s dng s nguyn 8 bt c gi tr t -128 n 127 hoc
dng s nguyn khng m c gi tr t 0 n 255. Phn nh tr cha 23 bt phn bn phi
ca im nh phn v bt tim n(nm bn tri im nh phn). Vi s c gi tr bng 1
th tt c cc bt phn m u bng 0. Nh vy ch c 23 bit xut hin phn nh tr
trong cc nh dng b nh nhng tng cng chnh xc l 24 bit.
V d:
S

EEEEEEE

FFFFFFFFFFFFFFFFFFFFFFF

E
31

30

23 22

IEEE 754 nh ngha v cc inh dng nht nh n l mt tp hp cc i din

ca cc gi tr v k hiu ca s.
nh ngha cc tiu chun [4]:
nh dng s hc m l tp hp cc s du chm ng nh phn v thp
phn, trong bao gm cc s hu hn v s khng, mt gi tr c bit
c gi l "khng phi l mt con s" (NaN) v v hn.
nh dng trao i l mt chui bt (m ha) c s dng trao i mt
d liu s thc du phy ng trong mt hnh thc thu gn v hiu qu.
8

 Quy tc lm trn l gi tr ca s thc u phy ng phi c a v gi

tr ph hp khi lm php tnh s hc .
Trng hp ngoi l l ch ra cc trng hp c bit (nh chia cho s khng,
trn bt trn, trn bt di, vv) xy ra trong qu trnh thc hin php tnh.
Trong nm trng hp ngoi l. Tt cc gi tr u c a v gi tr mc nh.
Nm trng hp ngoi l c l:
Php tnh khng chnh xc l cn bc hai vi s m, u ra trong khng tn
ti
Chia cho khng l mt php tnh trn mt ton hng hu hn trong kt
qu l v hn v d, 1/0 hoc log (0) mc nh tr v v cng m hoc v
cng dng.
Trn bt xy ra khi mt php tnh c kt qu qu ln nm ngoi di g tr
cho php. Kt qu tr v gi tr mc nh( lm trn n gi tr gn nht).
Underflow xy ra khi mt php tnh c kt qu qu nh nm ngoi khong
gi tr thng thng v khng chnh xc theo mc nh.
1.4 Gii thiu ti.
Thit k khi s hc s thc du phy ng(Floating Point Arithmetic unit) . Mi mt
s thc du phy ng gm c 4 bt biu din phn gi tr s thc v 4 bt biu din phn
s m, vi s m biu din dng b 2. Khi s hc s thc du phy ng c cc khi
lnh sau:

010 FPA Cng cc ton hng s thc du phy ng.

011 FBS Tr cc ton hng s thc du phy ng.
100 FBM Nhn cc ton hng s thc du phy ng.
101 FPD Chia cc ton hng s thc du phy ng.

Kt qu s c th hin dng s thc du phy ng dng c chun ha v

c hin th trn LED 7 thanh. S dng LED 7 thanh ch ra phn trn b nh.

D liu u vo ca khi s thc du phy ng s c ly t bn phm in thoi

kch thc 4x4. Gi s cc u vo u dng chun hoc bng 0. H thng phi gm
c khi phn s thc, khi phn s m, khi iu khin, v khi hin th chuyn s nh
phn 4 bt hin th trn led 7 thanh.
1.5 Kt lun chng.
Chng ny m t ngn gn ngha ca khi FPU v tiu chun IEEE 754, ch
lm trn s, nh dng s hc, trng hp ngoi l v hon i nh dng. Chng ny
cng a ra mt ci nhn tng quan ca d n.

Chng 2. L thuyt.
2.1 Gii thiu chng.
Trong chng ny, phn 2.2 gii thiu tng qut v s thc du chm ng, phn 2.3
gii thiu v s thc du chm ng thc hin trong ti, phn 2.4 gii thiu v thut
ton nhn s thc du phy ng, phn 2.5 gii thiu v thut ton cng hai s thc du
10

chm ng, phn 2.6 gii thiu v thut ton tr hai s thc du phy ng V cui
cng, phn 2.7 a ra mt bn tm tt ca chng.
2.2 S thc du phy ng.
S thc du phy ng(Floating Point Number) biu din cho s thc .
Tng qut: mt s thc X c biu din theo kiu s du phy ng nh sau:
E
X=M* R

M l phn nh tr (Mantissa),
R l c s (Radix),
E l phn m (Exponent).
Chun IEEE 754.
C s R = 2
Cc dng:
Dng 32-bit
Dng 44-bit
Dng 64-bit
Dng 80-bit.

V d dng 32 bt.
31

30

23

22

m
11

S l bit du:
S = 0 s dng
S = 1 s m
e (8 bit) l m excess-127 ca phn m E:
e = E+127 E = e 127
gi tr 127 gi l l lch (bias)
m (23 bit) l phn l ca phn nh tr M:
M = 1.m
Cng thc xc nh gi tr ca s thc:
S
e127
X = (1) *1.m * 2
.

2.3 Biu din s thc du chm ng thc hin trong d n.

2.3.1Biu din s b 2 ca s nhi phn 4 bt.
a.Phn phn s F(fraction).
Chng ta s biu din phn phn s bng s b hai nh sau:
0.1012

0
1
2
3
= 02 + 12 +02 + 12 =(5/8)10 .

1.0112

1
2
3
= 1+02 +12 +12 =(5 /8)10

Bt ngoi cng bn tay tri l bt du. Nu bt du bng 0 th s mang du dng

con bng 1 th s mang du m. Nhn chung s F(fraction) mang gi tr m c biu

din dng b 2 s c tnh nh sau: F =2F .

V d -5/8 c hiu l: 10.000-0.101=1.011 . Khi dch chuyn n-1 bt sang bn tri

n1
th gi tr ca s phi chia cho 2
. phn phn s th s 1.000 l mt trng hp

c bit l 2-1=1 do 10.000-1.000=1.000 nhng chng ta khng th biu din s +1

dng b hai v s dng ln nht trong h thng s phn s l 0.111(7/8).
b. Phn s m E(exponent).
12

Chng ta biu din phn s m bng s b hai nh sau:

01012

3
2
1
0
= 02 + 12 +02 + 12 =5 10 .

10112

3
2
1
0
= 12 +02 +12 + 12 =510

Bt bn ngoi cng bn tri l bt du nu bt du bng 0 th s mang du dng

cn nu bt du bng 1 th s mang du m. Di gi tr ca phn s m nm trong
khong t

10002

01112

tng ng t

810

710

2.3.2 Biu din s thc du phy ng trong d n.

S thc du phy ng N c xy dng t phn phn s F(fraction) v s m
E
E(exponent). Khi N= F* 2 . Phn phn s v s m c trnh by dng nh phn

b 2. c trng s thc du phy ng trong h thng th chiu di ca F l t 16 n 64

bt, chiu di ca E l 8 n 15 bt. Nhng trong d n ny, d dng thc hin chng
ti ch s dng 4 bt cho phn thp phn v 4 bt cho phn s m. V d nh sau:
F
0.101

E
0101

1.011

1011

5
(-5/8)* 2

1.000

1000

1
(-1)* 2

5
(5/8)* 2

Nu F khng dng chun chng ta c th chuyn v dng chun bng cch dch
v bn phi cho n khi bt du v bt k tip ca n khc nhau. Vic dch bt v bn tay
phi ng ngha vi vic gi tr ca F c nhn thm vi 2 v vy chng ta phi gim
gi tr ca E xung 1 gi tr ca N khng thay i. Sau khi chun ha xong . Sau y
l mt s v d v vic chun ha F:

Bng 2.1 Chun ha F.

13

Trng thi
Cha chun ha(Unnormalized)

F
0.0101

E
0011

Chun ha(Normalized)

0.101

0010

2
(5/8)* 2 =5/2

Cha chun ha(Unnormalized)

1.11011

1100

4
(-5/32)* 2 =

3
(5/16)* 2 =5/2

9
5* 2

Dch tri F

1.1011

1011

5
(-5/16)* 2 =

9
5* 2

Chun ha(Normalized)

1.011

1010

6
(-5/8)* 2 =

9
5* 2

S 0 khng th chun ha c, V vy khi F=0 khi N=0. Do s c rt nhiu

gi tr s m E c th c dung biu din s N, cho nn thng nht mt cch biu
din ngi ta ly s m c gi tr m nh nht trong di gi tr ca E( 1000 n 0111) l
1000. V vy khi F v E biu din bng s nh phn 4 bt th s khng c biu din nh
sau:
F=0.000

E=1000

N=0

S thc du phy ng dng nh nht biu din trong d n ny c gi tr l

8
0.001x 2
. Mt s h thng s thc du phy ng s dng h s m biased nh l

E=0 i km vi F=0 khi biu din s 0.

2.4 Nhn hai s thc du phy ng.
Trong phn ny chng ta s thit k b nhn cho s thc du phy ng. Chng ta s
dng s nh 4 bt cho phn F(fraction) v 4 bt cho phn E( exponent) , vi s m th

14

c biu din dng s b 2. Cng thc tng qut khi thc hin nhn 2 s thc du
phy ng nh sau:
E1

F1

* 2 xF 1 * 2

Gi s u vo chng ta c

F1

F
E +E
E

= )x 2
=F* 2 .

E2

F2

c chun ha v chng ta mun

kt qu u ra cng c chun ha. Khi thc hin nhn phn phn s( fraction) v cng
phn s m s xy ra mt s trng hp c bit cn phi ch .
u tin nu F=0 th mc nh gi tr E=1000(-8).
Th hai khi nhn -1 vi -1 (1.000 x 1.000) khi kt qu s l +1 nhng chng ta
khng th biu din s 1 dng b 2 phn phn s. Chng ta gi l trng hp
fraction overflow . gii quyt vn ny chng ta gn F=1/2(0.100) v cng 1 vo
E( E=E+1).
Khi nhn phn phn s(fraction) th kt qu s cha chun ha. V d:
0.100 * 2E x 0.100 * 2E =
1

0.010
E +E
E + E 1

)x 2
=0.100* 2

Trong v d trn chng ta chun ha kt qu bng vic dch tri phn phn s mt v
tr v tr i mt phn s m. Kt thc nu phn s m khng nm trong di cho php
ca phn s m trong h thng th s xy ra trng hp trn bt phn s m. Chng ta s
dng 4 bt cho phn s m th di gi tr cho php l: 1000 n 0111(-8 n 7). Khi xy ra
trn bt th s c tn hiu bo trn. Sau y l s thut ton cho vic nhn s thc du
phy ng.
Vi u vo l 2 s thc du phy ng
E
N= F* 2 .

15

N 1 v N 2

v kt qu l N.

N1

E
= F1 * 2 .

N2

E
= F2 * 2 .

Vi

F1

E1 , F 2

E2

u l s nh phn 4 bt c biu din dng b 2

c trnh by mc 2.3.1
Bt u
F1
=0
Y
F=0, E=
-8

F2
=0
Y

Nhn phn
nh tr, cng
phn s m

Trn
bt

F=1/2,
E=E+1

E
Trn
bt

Chun
ha

F <<1
E=E-1
Y
Bo trn
E

Kt
thc
Hnh 2.1 Thut ton nhn hai s thc du phy ng.

16

Sau y l thut ton khi nhn hai s khng m :Vi C bt nh, A l tng.

Bt u
C0,
A0
MS b
nhn
QS nhn
B m : i
N

Q[0]=1
b1

Y
C,A A+M

Dch phi
C,A,Q
B m i=i-1
B m
i=0

Y
Kt thc
Hnh 2.2 Thut ton nhn hai s nguyn khng du.
V d v nhn hai s nguyn khng du:

17

S b nhn M = 1011 (11)

S nhn Q = 1101 (13)
Tch
= 10001111 (143)

C
A
Q

0
0000 1101 Cc gi tr khi u

+ 1011

0
1011 1101 A A + M

0
0101 1110 Dch phi

0
0010 1111 Dch phi

+ 1011

0 1101 1111 A A + M

0 0110 1111 Dch phi

+ 1011

1 0001 1111 A A + M

0 1000 1111 Dch phi

Khi nhn hai s nguyn c du th ta s lm cc bc nh sau:

Bc 1. Chuyn i s b nhn v s nhn thnh s dng tng ng
Bc 2. Nhn hai s dng bng thut gii nhn s nguyn khng du, c tch ca
hai s dng.
Bc 3. Hiu chnh du ca tch:
Nu hai tha s ban u cng du th gi nguyn kt qu bc 2.
Nu hai tha s ban u l khc du th odu kt qu ca bc 2.
Khi cng phn s m th s c mt s trng hp c th xy ra trn bt nh sau:
Nu E1 v E2 l s dng m tng E l s m.
Nu E1 v E2 l s m m tng E l s dng.
Kt qu biu din dng s b 2 s th xy ra trn bt.
Tuy nhin mt s trng hp c th chnh sa trn bt s m bng cch cng hoc
tr 1 n v trong khi chun ha kt qu phn phn s(fraction) . Trong trng hp cho
php. Chng ta s to thanh ghi X c chiu di 5 bt. Khi ti s m

E1

t thnh ghi X

th chng ta s m rng bt du. V vy chng ta c th biu din s dng b 2. Nu c

18

2 bt du th khi cng

E1

E2

trong trng hp xy ra trn bt th bt du thp nht

s b thay i cn bt du cao nht khng thay i. Sau y l mt s v d:

7+6= 00111 +00110=01101=13 (gi tr ln nht l 7).
(-7)+(-6)=11001+11010=-13(gi tr nh nht l -8).
Tuy nhin sau y l mt trng hp c bit trong trng hp ch ra trn bt phn
s m v trn bt phn phn s nhng vic trn b phn s m c th sa li sau khi chnh
sa trn b phn phn s.
3
6
9
8
1.000* 2 x 1.000* 2 =1.000* 2 =0.100* 2 .

2.5 Cng s thc du phy ng.

Khi cng hai s thc du chm ng th s c cng theo cng thc sau:
F1
F1

Gi s
cn cng hai

F1

F2

E
E
E
* 2 + F 1 * 2 =Fx 2 .
1

E1

u c chun ha v Nu

F2

sau chun ha kt qu. Nu

bng

E1

E2

th ta ch

khng bng

E2

th

chng ta phi dch chuyn thay i phn s m ca s c s m nh hn v dch chuyn

phn phn s ca s m nh hn v bn phi. Chng ta s x l thng qua v d sau:
F1

Do

E1

F1

E
5
* 2 = 0.111x 2 .
1

E2

nn dch chuyn

F2

E
3
* 2 =0.101x 2 .
2

sang phi 2 n v v cng 2 vo

3
4
5
0.101x 2 =0.0101x 2 .= 0.00101x 2 .

19

E2

Sau khi dch phi mt n v th gi tr ca s s chia cho 2 nn cn phi cng vo s

m 1 gi tr ca s khng thay i. Sau khi dch chuyn cho 2 s m bng nhau
chng ta tin hnh cng phn phn s(fraction).
5
5
5
0.111x 2 + 0.00101x 2 = 01.00001x 2 .

Lc ny chng ta thy phn phn s (fraction) xy ra hin tng fraction overflow.

Nn chun ha chng ta dch phi 1 phn phn s v cng them 1 phn s m.
E
6
Fx 2 =0.100001x 2 .

Khi mt trong hai s

F1

F2

l s m th khi cng phn phn s s xy ra

hin tng kt qu cng phn phn s cha c chun ha. V d:

2
1
1.100x 2 +0.100x 2

1
1
F1
= 1.110x 2 +0.100x 2 (sau khi dch phi 1 ca
)

1
= 0.010x 2
(kt qu cha chun ha)

2
= 0.100x 2
(sau khi dch tri phn phn s 1 v tr 1 phn s m).

Tm li th vic cng hai s thc du phy ng s thc hin theo cc bc sau:

Bc 1: Nu hai phn m khng bng nhau th dch chuyn sang bn phi phn phn s,
s c s m nh hn 1 n v v cng vo s m nh hn 1 n v. Lp li cc bc trn
cho n khi hai s m bng nhau.
Bc 2: Cng phn phn s.
Bc 3: Xy ra 3 trng hp.

20

a. Khi s F b trn th dch phi F 1 n v v cng thm 1 vo phn s m s

li trn bt.
b. Khi F cha chun h th dch tri F 1 oen v v tr phn s m E i 1.
c. Nu F bng 0 th gn E=-1.
Bc 4: Kim tra trn s m.
E1

Nu

>>

E2

F2

F2

l s dng th tt c cc bt ca

s tr thnh 0

ngay sau khi chng ta dch chuyn v bn phi hai s m bng nhau v kt qu l F=
F1

E1

v E=

. Nu

E1

>>

E2

F2

l s m th tt c cc bt ca

F2

s tr

thnh 1 khi chng ta dch chuyn v bn phi hai s m bng nhau. V th khi cng hai
phn fraction s cho kt qu sai. V vy trnh vn ny xy ra th khi
ta c: F=

F1

v E=

E1

. Nu

E 2 E1

th F=

F2

v E=

E2

chng ta s dng 4 bt cho c phn fraction v exponent nn khi |

E1

>>

E2

. Trong d n ny
E1

E2 3 th

qua phn dch chuyn sang bn phi.

Sau y l thut ton cho vic cng hai s thc du phy ng.
E
N= F* 2 .

N1

E
= F1 * 2 .

N2

E
= F2 * 2 .

Vi

F1

E1 , F 2

E2

u l s nh phn 4 bt c biu din dng b 2

c trnh by mc 2.3.1

21

Bt
u
E1
=E
2

F=F1+F
2

Shift_F=|
E1-E2|

Shift
_F
>3

F=
0

Tng phn
s m nh
hn gi tr
Shift_F=|
E1-E2|
Dich sang
phi phn
nh tr s
nh hn
Shift_F

Gn kt
qu l s
c s m
ln hn

Kt
thc

F>>1,
E=E+
1

F
b
tr
n

F=0,
E=-8

Kt
thc

F
Ch
un
hoa

E
b
tr
n

N
F<<1,
E=E-1

Bo
trn E

Kt
thc
Hnh 2.3 S thut ton cng hai s thc du phy ng.
2.6 Tr hai s thc du phy ng.
Khi tr hai s thc du chm ng th s c cng theo cng thc sau:
F1

E
E
E
* 2 F1 * 2 =Fx 2 .
1

Cc bc tr hai s thc du chm ng cng ging nh trong cng hai s thc

du phy ng ch khc bc 2 ta chuyn vic cng phn fraction thnh tr.
Sau y l thut ton tr hai s thc du chm ng vi cc thng s sau:
E
N= F* 2 .

N1

E
= F1 * 2 .

N2

E
= F2 * 2 .

Vi

F1

E1 , F 2

E2

u l s nh phn 4 bt c biu din dng b 2

c trnh by mc 2.3.1

22

Bt
du
E1
=E
2

F=F1-F2

Shift_F=|
E1-E2|

Shift
>3

Y
E1
>E
2
F=~F2
+1
E=E2

F=F1
E=E1

Kt
thc

F=
0

Tng phn
s m nh
hn gi tr
Shift_F=|
E1-E2|
Dich sang
phi phn
nh tr s
nh hn
Shift_F

F>>1,
E=E+
1

F
b
tr
n

E
b
tr
n

Y
F=0,
E=-8

Kt
thc

F
Ch
u
n
ho
a

N
F<<1,
E=E-1

Y
Bo
trn E

Kt
thc
Hnh 2.4 Thut ton tr hai s thc du phy ng.

2.7 Kt lun chng

trong chng hai chng ti trnh by tng qut v s thc du phy ng, gii
thiu v s thc du phy ng c thc hin trong ti. ng thi cng gii thiu
c v thut ton cng, tr, nhn hai s thc du chm ng.

23

Chng 3 M phng v kt qu.

3.1 Gii thiu chng.
chng ny s gii thiu v s khi ca chng trnh phn 3.2, phn 3.3
gii thiu v cc phn mm s dng dng vit chng trnh v m phng, phn 3.3 l
kt qu m phng v gii thch kt qu. Cui cng phn 3.4 l kt lun ca chng.
3.2 S khi.

24

F1

led_overflow

E1
F2

led_frac

FPU

E2

led_exp
opcode

Hnh 3.1 S khi ca chng trnh.

u vo ca chng trnh bao gm 2 ton hng

N1

F1

E
N2
F2
* 2 ,
=
*
1

2E . v m php ton (opcode) . Mi ton hng gm c hng gm c 2 phn: phn

2

phn s(fraction) v phn s m(exponent). u ra gm 3 thng s gm c: chn bo

hiu trn bt (led_overflow), kt qu phn phn s trn led 7 thanh(led_frac) v kt qu
phn s m trn led 7 thanh(led_exp).
Hot ng ca chng trnh l: Khi mt trong cc thng s u vo thay i th s c
kt qu u ra tng ng.

Bng 3.1 M t chn d liu trong s khi.

Tn chn

rng

Loi

M t

F1

(bt)
4

Input

Phn phn s (fraction) ca s th nht

F1

E1

Input

Phn phn s (fraction) ca s th nht

E1

F2

Input

Phn phn s (fraction) ca s th nht

F2

25

E2

Input

opcode
led_overflo

3
1

Output
Output

M php ton
Nu kt qu nm ngoi gi tr cho php s bo trn

w
led_frac
led_exp

7
7

Output
Output

Kt qu php ton phn phn s(fraction)

Kt qu php ton phn s m(exponet)

Phn phn s (fraction) ca s th nht

E2

Bng 3.2 Bng m t gi tr ca m php ton.

M php ton

Php ton

(Opcode)
010
011
100
101

Cng
Tr
Nhn
Chia

Bng 3.3 Bng chuyn i s nh phn 4 bt hin th trn led 7 thanh.

S nh phn 4 bt(a)
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111

Gi tr led dng nh phn(seg)

000_0001
100_1111
001_0010
000_0110
100_1100
010_0100
010_0000
000_1111
000_0000
000_0100
000_1000
110_0000
011_0001
100_0010
011_0000
100_1111

26

Gi tr hin th
0
1
2
3
4
5
6
7
-8
-7
-6
-5
-4
-3
-2
-1

3.3 Kt qu m phng.
Trong d n s dng phn mm ModelSim PE student Edition 10.4a. v phn
mm Quartus 9.0 .
3.3.1 Kt qu m phng trn quartus.
Kt qu m phng thnh cng trn quartus.

Hnh 3.1 Kt qu m phng thnh cng trn quartus

S khi module display.

27

Hnh 3.2 S khi module display.

T s khi ta thy module display c 1 u vo ACC c di 8 bt v 3 u ra
gm c led_exp v led_frac c di 6 bt v led_overflow c di 1 bt.
Module cng cha 2 module khc l led7.
S khi module led7 .

28

Hnh 3.3 S khi module led7.

Module c chc nng chuyn t s nh phn 4 bt hin th trn led 7 thanh.
3.3.2 Kt qu m phng trn Modulesim.
S dng d liu dataflow

29

Hnh 3.4 S lung d liu dataflow.

Bng kt qu trancript.

Hnh 3.5 Bng kt qu trancript.

30

T bng kt qu trancript kt hp vi bng 3.3, bng 3.2 ta c bng tng kt sau:

Bng 3.4 Tng hp kt qu m phng.
F1

ST
T

E1

F2

E2

opcode F

Ove

Biu thc

0111 0001

0111

0011

010

0100

0100

flow
0

100

1101

1000

1001

010

1000

1101

3
7
1.000x 2 +1.000x 2 .= 1.000x 2

10

0
101

0111

1010

0010

010

1010

0111

7
2
7
1.010x 2 +1.110x 2 .= 1.010x 2

15

0
100

0111

1001

0111

010

1001

1000

7
7
8
1.001x 2 +0.111x 2 .= 1.001x 2

20

1
000

0011

1001

1001

010

1101

1001

3
7

0.000x 2 +1.001x 2 .= 1.001x 2

25

0
000

0011

0000

1001

010

0000

1000

3
7

0.000x 2 +0.000x 2 .= 0.000x 2

30

0
100

0011

0100

0111

010

0000

1000

3
3
8
1.001x 2 +0.111x 2 .= 0.000x 2

35

1
1100 1110

0100

1111

010

0100

1110

2
1
1.100x 2 +0.100x 2 .= 0.100x 2

40

0111 0001

0111

0011

011

1010

0011

1
3
4
0.111x 2 -0.111x 2 .= 0.100x 2 .

45

100

1101

1000

1001

011

1000

1101

3
7

1.000x 2 -1.000x 2 .= 1.000x 2

50

0
101

0111

1010

0010

011

1010

0111

7
2
7
1.010x 2 -1.110x 2 .= 1.010x 2 .

55

0
100

0111

1001

0111

011

0000

1000

7
7
8
1.001x 2 -0.111x 2 .= 0.000x 2

60

1
000

0011

1001

1001

011

0011

1001

3
7
7
0.000x 2 -1.001x 2 .= 0.011x 2

65

0
0111 0001

0111

1000

100

0110

1001

1
8
7
0.111x 2 *0.111x 2 =0.110x 2

70

100

1011

0001

100

0100

1010

8
3

1.001x 2 *1.011x 2 .= 0.100x 2

1001

1
31

1
3
4
0.111x 2 +0.111x 2 .= 0.100x 2

75

100

0111

1000

1001

100

0100

0001

7
7
1
1.000x 2 *1.000x 2 .= 0.100x 2

80

0
010

0111

1011

1001

100

1001

1111

7
7

0.101x 2 *1.011x 2 .= 1.001x 2

85

1
000

1000

0000

1000

100

0000

1000

8
8

0.000x 2 *0.000x 2 .= 0.000x 2

90

0
0111 0111

1001

0011

100

0000

1000

7
3
8
0.111x 2 *1.001x 2 .= 1.000x 2

95

0110 0111

1010

1001

100

1011

0000

7
7
0
0.110x 2 *1.010x 2 .= 1.011x 2

Nhn xt: Kt qu m phng ng vi kt qu tnh ton thc t sau khi lm trn.

3.4 Kt lun chng.
Qua chng ny nhn vo kt qu m phng chng ta hiu r l thuyt hn. Nhn
vo kt qu m phng chng ta nhn thy kt qu m phng ng vi kt qu tnh ton
thc t sau khi lm trn.

32

Chng 4 Kt Lun.
Khi s thc du phy ng rt thng dng trong b ng x l ton hc. N l
mt phn ca mt h thng my tnh c thit k c bit thc hin cc hot ng
tnh ton trn cc s thc du chm ng. Mt s hot ng tnh ton trn khi FPU nh:
cng, tr, nhn, chia. Mc ch l xy dng mt CPU hiu qu thc hin cc chc
nng c bn cng nh chc nng siu vit vi vic lm gim phc tp ca logic c
s dng lm gim hoc t nht gii hn thi gian tng ng nh dng x87 v lm gim
b nh cng nhiu cng tt. Chnh v th m vn ny nhn c s quan tm rt ln
ca cc c nhn, t chc, trng i hc v nhiu vin nghin cu trn th gii. Trong d
n ny tm hiu v: Thit k khi s hc s thc du phy ng. C th d n t
c cc kt qu sau.
Nhng iu t c.
-Trnh by l thuyt khi FPU trong my tinh.
-Tm hiu l thuyt chun ha IEEE754 trong tnh ton s hc s thc du phy
ng.

33

-Trnh by thut ton cng, tr, nhn, chia s thc du phy ng vi 4 bt phn
nh tr v 4 bt phn s m. Tt c s m phn nh tr v s m c th hin
dng nh phn b hai.
-Vit c chng trnh cho khi s hc s thc du phy ng bng verilog HDL
vi cc php tnh cng, tr, nhn.
Nhng hn ch.
-Chng trnh cha thc hin cho php tnh chia hai s thc du phy ng.
-Cha vit c khi keypad dng nhp s t bn phm in thoi kch thc
4x4.
-Code chng trnh cn di, cha ti u c mt s on code c th rt gn.
Hng pht trin ca ti.
-Xy dng chng trnh hon thin hn, d liu nhp c t thit b ngoi vi nh
bn phm in thoi...
-Ti u code chng trnh ngn gn v d hnh dung hn.
-Tm hiu v vit thm phn php tnh chia cho khi s hc s thc du phy ng.
V thi gian nghin cu c hn, trnh hiu bit ca bn chng em cn nhiu hn
ch nn bi bo co ca chng em khng trnh khi nhng thiu st, em rt mong nhn
c s gp qu bu ca tt c cc thy c gio bo co ca chng em c hon
thin hn.
Chng em xin chn thnh cm n!

34

Ti liu tham kho.

1. Digital Systems Design Using VHDL Hardcover March 30, 2007
by Jr. Charles H. Roth (Author), Lizy K. John (Author) .
2. Advanced Digital Design with the VERILOG HDL by Michael D. Cileti.
3. Digital Design and Computer Architecture By Julius Marpaung
Lab 5: Introduction to 4x4 Matrix Keypad and Verilog.
4. Design of a Floating-Point Fused Add-Subtract Unit Using Verilog
Mayank Sharma, Prince Nagar, Ghanshyam Kumar Singh & Ram Mohan
Mehra ,Department of Electronics and Communication Engineering
School of Engineering & Technology Sharda University, Knowledge Park-III,
Greater Noida, (UP), India.
5. Slide Bi ging kin trc my tinh-Chng 3-Nguyn Kim Khnh - HBKHN
6. IMPLEMENTATION OF FLOATING POINT ARITHMETIC ON FPGA DIGITAL SYSTEM ARCHITECTUREWINTER SEMESTER-2010 by
SUBHASH C (200911005); A N MANOJ KUMAR (200911030); PARTH
GOSWAMI (200911049)
7. Design of Floating Point Multiplier for Signal Processing Applications A. Rakesh Babu, R. Saikiran and Sivanantham S. School of Electronics Engineering,
VIT UniversityVellore 632014, Tamilnadu, India.
{rakesh40622348,saikiran.18692}@gmail.com , ssivanantham@vit.ac.in

35

Ph Lc
1. Code file alu.v
module alu(F1,E1,F2,E2,opcode, led_overflow, led_frac, led_exp);
input [3:0] F1,E1,F2,E2;
input [2:0] opcode;
output led_overflow;
output [6:0] led_frac, led_exp;
reg [4:0] shift_F;
reg [7:0] F;
reg [6:0] f;
reg [4:0] E;
reg [8:0] ACC;
reg [7:0] f1,f2;
reg [4:0] e1,e2;
reg
overflow;//tran bit
reg
sosanh;//so sanh hai so mu
reg [3:0] a,b,c,f11,f21;
reg [4:0] addout; // cong 4 bit nen can 5 bit de luu tru
reg [2:0] i;
parameter add = 3'b010,
sub = 3'b011,
mult= 3'b100,
div = 3'b101;
always @(*) begin
a=0; b=0;c=0; addout = 0; i =0; f1=0; f2=0;e1 =0; e2 =0; shift_F=0; overflow=0; sosanh=0;
F=0;E=0; f11=0; f21=0; f=0;
if(E1[3]) begin
if(E2[3]) begin
if(E1[2:0]>E2[2:0]) sosanh =1'b1;
else
sosanh=1'b0;
end
else sosanh=1'b0;//E2[3]=1'b0
end
else begin
if(E2[3]) sosanh=1'b1;
else begin
if(E1[2:0]>E2[2:0]) sosanh=1'b1;
else
sosanh=1'b0;
end
end
case(opcode)
add,sub: begin
if(F1==4'b0000) begin
if(F2==4'b000) begin
F=8'b0000_0000;
E=5'b01000;
36

overflow=1'b0;
end
else begin
if(opcode==add) begin
F = {F2[3], F2, 3'b000};
E = {E2[3], E2};
overflow=1'b0;
end
else begin
c=~F2+1;
F = {c[3], c, 3'b000};
E = {E2[3], E2};
overflow=1'b0;
end
end
end
else if(F2==4'b0000) begin
F = {F1[3], F1, 3'b000};
E = {E1[3], E1};
overflow=1'b0;
end
else begin
if(E1 == E2)begin
E = {E1[3], E1};
shift_F =0;
f1 = {F1[3], F1, 3'b000};
f2 = {F2[3], F2, 3'b000};
if(opcode==add) F = f1 + f2;
else F = f1 - f2;
if(F == 8'b0000_0000) begin
E= 5'b01000;
overflow = 1'b0;
end
else if(F[7]!=F[6]) //tran phan dinh tri
begin
E=E+1;//cong phan so mu 1 don vi
F = {F[7], F[7-:7]};//dich phai 1 don vi
if(E[4] != E[3] ) overflow = 1'b1;//tran so mu
else overflow = 1'b0;
end
else if (F[6] == F[5]) begin //chuan hoa
if(E != 5'b01000) begin
F = F << 1;
E= E-1;
if(E[4] != E[3] ) overflow = 1'b1;//tran
else overflow = 1'b0;
end
else overflow = 1'b1;
end
37

else begin
E=E;
F=F;
overflow = 1'b0;
end
end
else if ( sosanh==1'b1) begin
shift_F = E1 - E2;
E={E1[3], E1};
if(shift_F > 2'b11) begin
F = {1'b0, F1,3'b000};
overflow = 1'b0;
E={E1[3], E1};
end
else begin // else cua if (shift_F > 2'b11)
f1 = {F1[3], F1, 3'b000};
f2 = {F2[3], F2, 3'b000}>> shift_F;
if(F2[3])
f2 = f2 + ({8'b1111_1111} << ( 8 - shift_F)) ;
if(opcode==add) F = f1 + f2;
else F = f1 - f2;
if(F == 8'b0000_0000) begin
E= 5'b01000;
overflow = 1'b0;
end
else if(F[7]!=F[6]) begin//tran phan dinh tri
E=E+1;//cong phan so mu 1 don vi
F = {F[7], F[7-:7]};//dich phai 1 don vi
if(E[4] != E[3] ) overflow = 1'b1;//tran so m
else overflow = 1'b0;
end
else if (F[6] == F[5]) begin //chuan hoa
if(E != 5'b01000) begin
F = F << 1;
E= E-1;
if(E[4] != E[3] ) overflow = 1'b1;//tran so mu
else overflow = 1'b0;
end
else overflow = 1'b1;
end
else begin
E=E;
F=F;
overflow = 1'b0;
end
end
end
38

else if(sosanh==1'b0) begin // else cua if (E1 > E2)

shift_F = E2 - E1;
E={E2[3],E2};
if(shift_F > 2'b11) begin
if(opcode==add) F = {1'b0,
F2,3'b000};
else begin
c=~F2+1;
F = {1'b0, c,3'b000};
end
overflow = 1'b0;
E={E2[3],E2};
end
else begin // else cua if (shift_F > 2'b11)
f1 = {F1[3], F1, 3'b000} >> shift_F;
f2 = {F2[3], F2, 3'b000};
if(F1[3])
f1 = f1 + ({8'b1111_1111} << ( 8 - shift_F)) ;
if(opcode==add) F = f1 + f2;
else F = f1 - f2;
if(F == 8'b0000_0000) begin
E= 5'b01000;
overflow = 1'b0;
end
else if(F[7]!=F[6]) //tran phan dinh tri
begin
E=E+1;//cong phan so mu 1 don vi
F = {F[7], F[7-:7]};//dich phai 1 don vi
if(E[4] != E[3] ) overflow = 1'b1;//tran so mu
else overflow = 1'b0;
end
else if (F[6] == F[5]) begin //chuan hoa
if(E != 5'b01000) begin
F = F << 1;
E= E-1;
if(E[4] != E[3] ) overflow = 1'b1;//tran so mu
else overflow = 1'b0;
end
else overflow = 1'b1;
end
else

begin
E=E;
F=F;
overflow = 1'b0;
end

end
end
39

end
end//end add
mult:begin
if((F1==4'b0000))
begin
F=8'b0000_0000;
E=5'b01000;
overflow=1'b0;
end
else if(F2==4'b0000)
begin
F=8'b0000_0000;
E=5'b01000;
overflow=1'b0;
end
else begin
if(F1[3]) f11=~F1+1;
else f11=F1;
if(F1[3]) f21=~F2+1;
else f21=F2;
a = 4'b000;
b = f11;
for(i=0; i<3; i=i+1)
begin
if(b[0]) begin
addout = a +f21;
a = {f21[3], addout[3-:3]};
b = {addout[0], b[3-:3]};
end // end if
else begin
b = {a[0], b[3-:3]};
a = {a[3], a[3-:3]};
end // end else
end // end for
if(b[0]) begin
addout = a + (~f21) +1;
a = ({~f21[3], addout[3-:3]});
b = {addout[0], b[3-:3]};
end // enf if
else begin
b = { a[0], b[3-:3] };
a = { a[3], a[3-:3] };
end // end else
f = { a[2-:3], b};
e1 = {E1[3], E1};
e2 = {E2[3], E2};
E = e1 + e2;
if(F1[3]==1'b1) begin
if(F2[3]==1'b1)F= {1'b0,f};
else begin
40

f=~f+1;
F={1'b0,f};
end
end
else begin
if(F2[3]==1'b0)F= {1'b0,f};
else begin
f=~f+1;
F={1'b0,f};
end
end
if(F == 8'b0100_0000) begin
F = F >> 1;
E=E+1;
if(E[4] != E[3] ) overflow = 1'b1;//tran so mu
else overflow = 1'b0;
end
else if (F[6] == F[5]) begin //chuan hoa
if(E != 5'b01000) begin
F = F << 1;
E= E-1;
if (F[6] == F[5]) begin //chuan hoa
if(E != 5'b01000) begin
F = F << 1;
E= E-1;
if(E[4] != E[3] ) overflow = 1'b1;//tran so mu
else overflow = 1'b0
end
else overflow=1'b1;
end
if(E[4] != E[3] ) overflow = 1'b1;//tran so mu
else overflow = 1'b0;
end
else overflow=1'b1;
end
else begin
if(E[4] != E[3] ) overflow = 1'b1;//tran so mu
else overflow = 1'b0;
end
end// end if(E1=4'b000)
end//end mult
default: begin
E = 5'b00000;
F=8'b0000_0000;
overflow=1'b0;
end
endcase
ACC[8] = overflow; // dua overflow ra thanh ghi ACC
41

ACC[7-:4] = F[6-:4]; // dua F ra thanh ghi ACC, lay 4 bit dau cua F
ACC[3-:4] = E[3-:4];
end // end always
display u4(.ACC(ACC), .led_overflow(led_overflow), .led_frac(led_frac),
.led_exp(led_exp));
endmodule
module display ( ACC, led_overflow, led_frac, led_exp);
//input clk;
input [8:0] ACC;
output led_overflow;
output [6:0] led_frac, led_exp;
assign led_overflow = ACC[8];
led7 segF (ACC[7-:4], led_frac);
led7 segE (ACC[3-:4], led_exp);
endmodule
module led7(a, seg);
input [3:0] a;
output [6:0] seg;
reg [6:0] seg;
always @(*) begin
seg = 7'b111_1110; // khoi tao "-"
case (a)
4'b0000: seg = 7'b000_0001; // 0
4'b0001: seg = 7'b100_1111; // 1
4'b0010: seg = 7'b001_0010; // 2
4'b0011: seg = 7'b000_0110; // 3
4'b0100: seg = 7'b100_1100; // 4
4'b0101: seg = 7'b010_0100; // 5
4'b0110: seg = 7'b010_0000; // 6
4'b0111: seg = 7'b000_1111; // 7
4'b1000: seg = 7'b000_0000; // - 8
4'b1001: seg = 7'b000_0100; // -7
4'b1010: seg = 7'b000_1000; // -6
4'b1011: seg = 7'b110_0000; // -5
4'b1100: seg = 7'b011_0001; // -4
4'b1101: seg = 7'b100_0010; // -3
4'b1110: seg = 7'b011_0000; // -2
4'b1111: seg = 7'b011_1000; // -1 //led_frac = 001_0010, led_exp=100_1111
endcase
end
endmodule
2. Code file test_bench.v.
module test_bench;
reg [2:0] opcode;
reg [3:0] F1,E1,F2,E2;
wire led_overflow;
wire [6:0] led_frac, led_exp;
alu u1 (F1,E1,F2,E2,opcode, led_overflow, led_frac, led_exp);
42

initial
$monitor($time, " F1 = %b, E1= %b,F2 = %b, E2= %b,opcode= %b, led_overflow=
%b,led_frac = %b, led_exp=%b",F1,E1,F2,E2,opcode, led_overflow, led_frac, led_exp);
//initial state = 2'b00;
initial begin
//cong
F1 = 4'b0111; E1=4'b0001;F2=4'b0111;E2=4'b0011;opcode=3'b010;//((7/8)x2^1)+((7/8)x2^(3)))
F1 = 4'b1000; E1=4'b1101;F2=4'b1000;E2=4'b1001;opcode=3'b010;//((-1)x2^(-3))+((-1)x2^(-7)))
#5 F1 = 4'b1010; E1=4'b0111;F2=4'b1110;E2=4'b0010;opcode=3'b010;//((-3/4)x2^7)+((-1/8)x2^(2)))
#5 F1 = 4'b1001; E1=4'b0111;F2=4'b1001;E2=4'b0111;opcode=3'b010;//((-7/8)x2^7)+((-7/8)x2^(7)))
#5 F1 = 4'b0000; E1=4'b0011;F2=4'b1101;E2=4'b1001;opcode=3'b010;//((0)x2^3)+((-3/8)x2^(-7)))
#5 F1 = 4'b0000; E1=4'b0011;F2=4'b0000;E2=4'b1001;opcode=3'b010;//((0)x2^3)+(0x2^(-7)))
#5 F1 = 4'b1011; E1=4'b0011;F2=4'b1011;E2=4'b0011;opcode=3'b010;//((-5/8)x2^3)+(-5/8x2^(3))
//tru
#5 F1 = 4'b0111; E1=4'b0001;F2=4'b0111;E2=4'b0011;opcode=3'b011;//((7/8)x2^1)-((7/8)x2^(3)))
#5 F1 = 4'b1000; E1=4'b1101;F2=4'b1000;E2=4'b1001;opcode=3'b011;//((-1)x2^(-3))-((-1)x2^(-7)))
#5 F1 = 4'b1010; E1=4'b0111;F2=4'b1110;E2=4'b0010;opcode=3'b011;//((-3/4)x2^7)-((-1/8)x2^(2)))
#5 F1 = 4'b1001; E1=4'b0111;F2=4'b1001;E2=4'b0111;opcode=3'b011;//((-7/8)x2^7)-((-7/8)x2^(7)))
#5 F1 = 4'b0000; E1=4'b0011;F2=4'b1101;E2=4'b1001;opcode=3'b011;//((0)x2^3)-((-3/8)x2^(-7)))
//nhan
#5 F1 = 4'b0111; E1=4'b0001;F2=4'b0111;E2=4'b1000;opcode=3'b100;//((7/8)x2^1)*((7/8)x2^(-8)))
#5 F1 = 4'b1001; E1=4'b1001;F2=4'b1001;E2=4'b0001;opcode=3'b100;//((-7/8)x2^1)*((-7/8)x2^(-8)))
#5 F1 = 4'b1000; E1=4'b0111;F2=4'b1000;E2=4'b1001;opcode=3'b100;//((-1)x2^7)*((-1)x2^(-7)))
#5 F1 = 4'b0000; E1=4'b1000;F2=4'b0000;E2=4'b1000;opcode=3'b100;//((0)x2^(-8))*((0)x2^(-8))
#5 F1 = 4'b0111; E1=4'b0111;F2=4'b1001;E2=4'b0011;opcode=3'b100;//((7/8)x2^7)*((-7/8)x2^(3)))

43

#5

#5 $stop;
end
endmodule

44