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Application note
STEVAL-ISV002V1, STEVAL-ISV002V2 3 kW
grid-connected PV system, based on the STM32F103xx
Introduction
The STEVAL-ISV002V2 demonstration board is the same as the STEVAL-ISV002V1, but
assembled in a metal suitcase. In recent years, the interest in photovoltaic (PV) applications
has grown exponentially. As PV systems need an electronic interface to be connected to the
grid or standalone loads, the PV market has started appealing to many power electronics
manufacturers. Improvements in design, technology and manufacturing of PV inverters, as
well as cost reduction and high efficiency, are always the main objectives, [see References
1, 2].
This application note describes the development and evaluation of a conversion system for
PV applications with the target of achieving a significant reduction in production costs and
high efficiency. It consists of a high frequency isolated input power section performing DCDC conversion and an inverter section capable of delivering sinusoidal current of 50 Hz to
the grid. The system operates with input voltages in the range of 200 V to 400 V and is tied
to the grid at 230 Vrms, 50 Hz, through an LCL filter. Other peculiar characteristics of the
proposed converter are the integration level, decoupled active and reactive power control
and flexibility towards the source. A prototype has been realized and a fully digital control
algorithm, including power management for grid-connected operation and an MPPT
(maximum power point tracking) algorithm, has been implemented on a dedicated control
board, equipped with a latest generation 32-bit (STM32F103xx) microprocessor.
Figure 1.
November 2012
3 kW PV system image
1/55
www.st.com
Contents
AN3095
Contents
1
System description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
DC-DC converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
DC-AC converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Schematic description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Experimental results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Conclusions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
10
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
2/55
AN3095
List of tables
List of tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
System specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
MOSFET electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Diode rectifier electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
HF transformer specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
STGW35HF60WD electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Operating modes of grid-connected voltage source inverter . . . . . . . . . . . . . . . . . . . . . . . 38
Execution time of the main control functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
3/55
List of figures
AN3095
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Figure 10.
Figure 11.
Figure 12.
Figure 13.
Figure 14.
Figure 15.
Figure 16.
Figure 17.
Figure 18.
Figure 19.
Figure 20.
Figure 21.
Figure 22.
Figure 23.
Figure 24.
Figure 25.
Figure 26.
Figure 27.
Figure 28.
Figure 29.
Figure 30.
Figure 31.
Figure 32.
Figure 33.
Figure 34.
Figure 35.
Figure 36.
Figure 37.
Figure 38.
Figure 39.
Figure 40.
Figure 41.
Figure 42.
Figure 43.
4/55
3 kW PV system image. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Block scheme of hardware implementation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
DC-DC and DC-AC converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
DC-DC converter control signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
DC-DC converter equivalent circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Current flow in mode 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Current flow in mode 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Current path in mode 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
DC-DC converter operating waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Modulation and transformer current in DCM. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Power transfer function for different input voltages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Variation of parameter d with input voltage for n=1.2. . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Conversion systems with modified DC-AC inverter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Schematic of the power stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Output sensing and relay board schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Schematic of the AC voltage measurement circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Line current conditioning circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
ADC interrupt service routine . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
STM32F103xx microcontroller schematic. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
DC-DC converter driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
DC-AC converter driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
5 V,1 A flyback converter with VIPER17HN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Multi-output flyback converter with VIPER27HN. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Block diagram of the implemented control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Stationary reference frame and rotating reference frame . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Implemented PLL structure. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
DQ components of the current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Block diagram of the implemented MPPT algorithm. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Grid angle and Vd component . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Grid angle and grid voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Grid angle (yellow), grid voltage (red), 90 phase-shifted voltage (blue) . . . . . . . . . . . . . . 46
DC-DC phase-shift modulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
Phase-shifted signals, transformer current in CCM, power MOSFET M1 drain current . . . 47
Power MOSFET M1- Ch1 gate signal; Ch2 drain-source voltage and drain current Ch4. . 47
Phase-shifted gate signals (Ch1, Ch2), primary and secondary transformer voltage
(Ch3, Ch4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
DC-AC voltage and current in standalone mode (open-loop operation) . . . . . . . . . . . . . . . 48
Grid voltage (blue), inverter voltage (red), injected current (green); injected power (math
function) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
Inverter voltage (green) and current (blue) at 800 W,PF=0.97 . . . . . . . . . . . . . . . . . . . . . . 48
Inverter voltage (green) and current (yellow) at 2500 W, PF . . . . . . . . . . . . . . . . . . . . . . . 48
DC-DC converter efficiency at different input voltages . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
System efficiency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
MOSFET M1- Ch1 gate signal, Ch2 drain-source voltage and Ch 4 drain current. . . . . . . 49
Phase-shifted gate signals (Ch1, Ch2), primary and secondary transformer voltage (Ch3,
Ch4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
AN3095
Figure 44.
Figure 45.
List of figures
Low-side device modulation (red and blue track); high-side device modulation (yellow
track and green track) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
High-side device modulation in leg 1 (yellow track); high-side device modulation in leg 2
(green track); inverter output voltage (blue track) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
5/55
System description
AN3095
System description
A general description of the system is shown in Figure 2 with a block scheme representing
hardware implementation.
Figure 2.
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!-V
The system may be completed by adding two additional boards with input and output EMI
filters which, at the moment, are not included in the final prototype.
The main power board is a dual-stage converter using DC-DC to adapt voltage levels and
impedance from the PV array and a sinusoidal PWM DC-AC to perform grid connection at
230 Vrms and 50 Hz, [see References 3]. Gate driving circuitry, input and output voltage
sensors of the DC-DC converter, as well as high frequency (HF) transformers, are also
placed on the power board. The principle reason for using a HF transformer is the galvanic
isolation provided between the PV module and the grid, to minimize the risk of hazardous
operations on the PV side caused by a fault on the grid side; voltage step-up and also
interruption of the resonance path formed by the parasitic capacitances to ground of the PV
array and the inductance of the LCL filter. Another advantage is the elimination of high
common mode currents allowing the use of unipolar pulse-width modulation for the inverter
with a consequent reduction in current harmonic content compared to bipolar pulse-width
modulation, [see References 4, 5].
Both the multi-output power supply board and control board are connected to the main
power board by means of a 34-pin connector. In this way, the connection/disconnection of
the ancillary boards is very easy and allows the separation of debug and characterization.
6/55
AN3095
System description
The output sensing and relays board was realized to interface the power system and the
grid. This task is accomplished with the implementation of a proper control algorithm which
requires both grid-current and grid-voltage sensing. For this reason, the board is equipped
with current and voltage Hall effect sensors. Two relays, controlled by an I/O of the
microcontroller, are also placed on the same PCB to interrupt/connect phase and neutral of
the system to phase and neutral of the grid. Moreover, this board is provided with two-way
connectors for electrical wiring of the LCL filter to the main power board.
The multi-output power supply board implements two independent offline flyback
converters, with wide input voltage range, based on VIPER technology, to generate the
following output voltages:
The main advantage of an offline solution is the availability of a power supply for circuits
dedicated to communication and data transfer even at night or in the case of weak PV field
energy production. The price to pay for such an advantage is higher power consumption
during standby mode of the main power unit.
The specifications in Table 1 for the PV system are used as inputs for the design of the
boards mentioned above. All parameters are assumed to be equal to their nominal value if
not otherwise stated.
Table 1.
System specifications
Specification
Value
200 V - 400 V
450 V
230 Vac
3 kW
17 kHz
35 kHz
1.2
Grid voltage
Grid frequency
50 Hz
>0.9
<5 %
7/55
DC-DC converter
AN3095
DC-DC converter
The dual-stage inverter for grid-connected applications includes a DC-DC converter to
amplify the voltage and a DC-AC inverter to control the current injected into the grid.
Figure 3.
The DC-DC converter is depicted in Figure 3 together with the DC-AC converter and LCL
filter. The converter consists of an input capacitor, C1, six switches, M1 - M6, six
freewheeling diodes, two rectifier diodes, D1 and D2, a HF transformer with turns ratio equal
to 1.2 and a DC link capacitor C2.
The transformer provides voltage isolation between the PV array and the grid, improving
overall system safety. Its leakage inductance is used as a power transfer element,
eliminating device overvoltage problems and the need for snubber circuits. Proper phaseshift control between input bridge legs (M1-M4) and active rectifier legs (M5-M6) allows
transformer current shaping, therefore achieving ZCZVS for all the power devices, as well as
voltage step-up. The adopted phase-shift modulation is shown Figure 4.
Figure 4.
VGSM2
VGSM5
VGSM6
AM05398v1
The same drive signal used for device M1 also controls M4, as the one controlling M3 is also
used for M2. The effect of the input bridge modulation is to generate a square wave on the
8/55
AN3095
DC-DC converter
input of the HF transformer which varies between +Vin and -Vin, while the effect of the
modulation on the active rectifier is to generate, on the secondary of the HF transformer, a
square wave varying between +Vbus and -Vbus, where Vbus is the voltage on capacitor C2,
phase shifted with respect to the primary one of an angle , equal to the phase shift of the
modulating signals, as shown in the equivalent circuit of figures 5, 6, 7, 8, 9, 10, and 11.
Figure 5.
7;
6,K
6BUS
6IN
!-V
As a result, the primary voltage and the secondary transformer voltage reflected to the
primary determine the rising and falling slope of the current in the leakage inductance.
According to leakage inductance current waveforms, two operating modes may be
distinguished for the converter:
Both in CCM and DCM, three main operating modes or intervals may be distinguished in
half the switching period. Considering the modulation shown in Figure 9, in CCM the
leakage inductance current may be calculated as follows:
At t0 M1 and M4 are turned on at ZVS, M6 is also on. The voltage across the leakage
inductance is:
Equation 1
VLK = Vin +
Vbus
n
iL k (t) =
d=
1
Vin (1 + d)(t t1 ) + iLk (t 0 )
Lk
Vbus
Vin n
Since this current is negative, as shown in Figure 9, it flows in the circuit as demonstrated in
Figure 6.
9/55
DC-DC converter
Figure 6.
AN3095
Current flow in mode 1
0
0
'
/ON
0
7;
&
&
9LQ
0
0
'
/
2
$
'
0
!-V
This mode ends when leakage inductor current reaches zero at t=t1.
When the leakage inductor current reaches zero, D1 and D2 turn-off with soft switching, as
the current naturally reaches zero. After t=t1 M6 is still on, primary current changes polarity
and flows through M1 and M4. On the secondary side the transformer is shorted through M6
and D2, as shown in Figure 7. Inductor current may be written as:
Equation 3
iL k (t) =
Figure 7.
1
Vin t t1 + iLk (t 0 )
Lk
0
0
'
/ON
0
7;
&
&
9LQ
0
0
'
/
2
$
'
0
!-V
At t=t2 M6 is turned off and M5 is turned on under ZVS. A positive voltage equal to +Vbus is
applied on transformer secondary winding. Leakage inductor current is given by:
Equation 4
iL K (t) =
1
Vin (1 d)(t t2) + iLlk (t 2 )
Lk
10/55
AN3095
DC-DC converter
Figure 8.
0
'
/ON
0
7;
&
&
0
0
'
/
2
$
'
0
!-V
Figure 9.
t0 t1 t2
t3 t4 t5
t6 t0
M1,M4
M2,M3
M5
M6
IM1,IM2
IM3,IM4
Vpri, Vbus
ILK.
IM5,IM6
ID1
ID2
AM05603v1
11/55
DC-DC converter
AN3095
Due to symmetry during the two halves of the switching period, current expressions and
current paths may be derived with similar considerations for the second half of the switching
period.
If d >1 the current in the leakage inductor may reach zero and there is a boundary between
CCM and DCM.
In DCM there are also three modes of operation, as shown in Figure 10.
At t=t0 inductor current is zero. After t=t0 devices M1and M4 are turned on under zero
current and inductor current rises according to the following equation:
Equation 5
iL k (t) =
1
Vin t t1 + iLk (t )
Lk
t1
t2
t3
AM05604v1
At t1 M6 turns off and M5 turns on with zero current. Inductor current expression is given by:
Equation 6
iL K (t) =
1
Vin (1 d)(t t 2 ) + iLlk (t 2 )
Lk
Mode 3, t2-t3
Equation 7
iL K (t) = 0
The boundary between DCM and CCM depends on the phase-shift angle, input voltage,
output voltage and transformer turns ratio and is given by:
12/55
AN3095
DC-DC converter
Equation 8
B =
d 1
By integrating the leakage current expression over the switching period and multiplying the
result by the input voltage value the expression of power transfer may be derived as:
Equation 9
P =
P =
Vin2
d
2
sL k 2(d 1)
< B
Vin2
d
F()
sL k 2(2 + d)2
> B
where s=2fs is the switching frequency in rad/s, =st is the phase-shift angle and
F() = (1 + d 2d 2 ) + 4(1 + d + d 2 ) 2
2
.
(2 + 2d + d 2 )
once the operation of the converter has been described, based on the specification in
Table 1, the power transfer function may be plotted as shown in Figure 11.
Figure 11. Power transfer function for different input voltages
0OWER TRANSFER FUNCTION WITH 6IN 6 6 6
0OWER ;7=
0HASE SHIFT ANGLE ;RAD=
!-V
As the converter operates in boost mode the value of parameter d must be kept greater
than 1 for every value of input voltage in order to maintain controllability, also at low power
levels. In fact, if d<1 the converter is characterized by a minimum power level under which
the converter cannot be controlled. For this reason, transformer turns ratio has been chosen
at equal to 1.2. The value of leakage inductance must also be chosen carefully and it is a
compromise between peak current value and the maximum energy transfer between input
and output.
13/55
DC-DC converter
AN3095
0ARAMETER D
)NPUT 6OLTAGE ;6=
!-V
14/55
AN3095
Equation 10
Pin =
Pout
= 3333 W
0.9
Equation 11
Iin =
Pin
3333
=
= 16.66 A
Vin min
200
Equation 12
Iout =
Pout
= 7.5 A
Vout min
Equation 13
1+ K + K 2
3(K + 1)2
Where K=0 for triangular waveforms and K=1 for rectangular waveforms. This said, the
maximum RMS current value in DCM is:
Equation 14
1+ K + K 2
3(K + 1)
=2
Dmax
IIn =13.6 A
3
1+ K + K 2
3(K + 1)2
Equation 16
VBrk Mos = 1.3 VMPPT max = 1.3 * 400 = 520 V
15/55
AN3095
As the converter operates in boost mode, to avoid problems of controllability for low power
levels, the value of parameter d must always be greater than one:
Equation 17
d 1 n
Vout
1.12
dVin MAX
Moreover, considering the voltage drop across the leakage inductor it is possible to operate
the converter with n=1.2 without incurring regulation problems for high input voltage values
at low power.
According to the calculations above, four STW55NM60ND MOSFETs were selected for the
input bridge and also two STW55NM60NDs for the active rectifier. The main characteristics
of this MOSFET are reported in Table 2 and 3:
Table 2.
VDS@Tjmax
RDSon_max
ID@100C
Coss
Qg
650 V
0.06
29 A
900 pF
190 nC
Two STTH60L06s are selected for the diode leg. The main characteristics are shown in
Figure 3:
Table 3.
Vrrm
Trr_max
IF
IRM
1.4 V
600 V
85 n
60 A
10.5 A
The input capacitor, C1, is designed to smooth the high frequency ripple at the input of the
PV array. If the current generated by the module is assumed to be constant and the current
drawn by the converter is assumed to be a pulse train, the following equation gives the value
of the input capacitance:
Equation 19
C1 >
16/55
Parray
2fs v array Vinmin
AN3095
where:
Parray is the PV field maximum output power, Varray is the allowable peak-to-peak voltage
ripple at the input of the array, fs is the switching frequency and Vinmin is the minimum
operating value for the input voltage. Assuming 90 % efficiency for the converter and 0.1 %
of admissible peak-to-peak ripple voltage the input capacitance value is:
Equation 20
Parray
C1 >
3333 .33
= 1.1 mF
2 * 35000 * 0.2 * 200
Three 330 F, 450 V electrolytic capacitors are connected in parallel at the input of the
converter to limit the effect of the high frequency ripple on the PV generator.
In a similar way the value of the C2 bus capacitor may be calculated, taking the fact that the
ripple is sinusoidal at twice the grid frequency into account:
Equation 21
C2 >
Pout
3000
=
= 1.17 mF
2grid v bus Vbus 2 * 2 * * 50 * 9 * 450
HF transformer design:
The design is based on the core geometry method. The transformer specifications are
shown in Table 4:
Table 4.
HF transformer specifications
Specification
Symbol
Value
Vin
300 V
Vinmax
400 V
Vinmin
200 V
Input current
Iin
27 A
Vout
450 V
Output current
Iout
22.5 A
Switching frequency
35 kHz
Efficiency
99 %
Regulation
0.15
Bm
0.15 T
Window utilization
Ku
0.3
Duty cycle
Dmax
0.5
Tr
70 C
17/55
AN3095
P0
1
+ P0 = ( + 1)V0I0 = 6061 W
Pt =
( )
2
K e = 0.145 K 2f f 2 Bm
10 -4
( )
Kg =
Pt
= 2.65 cm 5
2K e
K gCORE =
Wa A 2cK u
MLT
K gCORE =
Wa A 2cK u
>Kg
MLT
The number of primary turns for the design flux swing is:
Equation 28
N1 =
Vinmin Dmax T
B 2 A c
= 14 turns
N2 = n N1 = 17turns
18/55
AN3095
The next step is to choose the wire size in order to realize primary and secondary windings.
At 35 kHz, current penetration depth is:
Equation 31
6.62
f
= 0.035 cm
d = 2 = 0.07 cm
And the conductor section is:
Equation 33
AW =
d2
= 0.0038 cm2
4
AWG21, having d=0.072 cm and a wire area of AWAWG22=0.0040 cm2, may be used for this
design. Considering a current density of J=500 A/cm2, the number of primary wires is given
by:
Equation 34
Snp =
A wp
A w AWG26
where
Equation 35
A wp =
Irms CCM
J
= 0.054 cm2
Since the AWG21 has a resistance of 420 /cm, the primary resistance is:
Equation 36
rp =
420 / cm
= 30 / cm
14
Rp = N1 2 MLT rp = 13.7 m
With the same procedure for the secondary winding it is:
Equation 38
A ws =
Irms _ CCM
nJ
= 0.045 cm 2
Sns =
A ws
= 11
A wawg21
rs =
420 / cm
= 38 / cm
11
R s = N2 2 MLT rs = 21.1 m
19/55
AN3095
PV = 20
kW
m3
2 Ve = 4 W
24.9
T = 1
* 100 = 99.17%
3000
The transformer temperature rise is:
Equation 42
R th = 6.4
20/55
C
W
AN3095
DC-AC converter
DC-AC converter
The DC-AC inverter is a standard single-phase full bridge based on IGBTs with ultrafast copack diodes, as depicted in Figure 3. The connection to the grid is realized by means of
current control performed in DQ rotating reference frame. An LCL filter is placed between
the bridge and the grid in order to reduce the current harmonics generated by the unipolar
sinusoidal pulse-width modulation (USPWM) at 17 kHz. L filters or LC filters may also be
chosen for the application, but in the first case large values of inductance are required to
perform good high frequency noise damping and large currents through the capacitor may
arise in the second case together with high voltage harmonics. LCL filters show good
performance in terms of current harmonic reduction but they may lead to instability of the
control loop in the presence of large grid impedance. This instability is due to the presence
of extra poles introduced by the additional inductor. The problem may be solved with proper
filter design and by adding a damping resistor in series with the filter capacitor.
The value of Lf is designed in order to limit the current ripple to about 10 % of the nominal
current value according to:
Equation 44
Lf =
(V
BUS
Vgrid _ pk D
2 i fsw
The filter capacitor value is designed to limit the exchange of reactive power below 5 % of
nominal active power:
Equation 45
Preactive =
Xc
C
2
Vgrid
Xc
2
Vgrid
0.05Pn
0.05Pn
= 352.6
1
= 9 uF
X c
To avoid resonance problems for the filter, due to low and high order harmonics, its resonant
frequency, given by
fres =
1 Lg + L f
2 L f L g C f
In fact, if the resonant frequency is too small the filter resonance increases the low
frequency harmonics and, in the same way, if it is too high it increases the harmonics
multiple of the switching frequency.
With a filter capacitor value of 3.3 F and a grid inductor value of 2 mH the resulting
resonant frequency is 2771 Hz, which is in the specified range.
21/55
DC-AC converter
AN3095
The LCL filter is effective only if proper damping is added. Passive damping, realized with a
resistor series connected to the filter capacitor was used for this application. The value of
the resistor is chosen to be one third of the impedance of the capacitor at the resonant
frequency:
Equation 47
R damp =
1
3 * res * C
= 5.8
The semiconductors selected for the DC-AC section are 600 V, 35 A IGBTs with internal fast
diodes used to minimize the effect of recovery at turn-on. The choice of IGBTs is a trade off
between cost and efficiency. The part number of the device used is STGW35HF60WD,
which shows very good performance in terms of switching losses. The electrical
characteristics of this device are shown in Table 5.
Table 5.
Part number
STGW35HF60WD
Saturation voltage
Collector
current
IC@100 C
1.8 V
37 A
Eoff
Eon
300 J Rg=56
Gate
charge
Qg
102 nC
The power losses in each IGBT may be calculated considering conduction losses, switching
losses and diode losses.
Conduction and switching losses in IGBTs may be evaluated according to the following
equations:
Equation 48
1 1
1 ma
cos ) = 9.6 W
+ ma cos ) + R CE * I2 pk * ( +
2 8
8 3
Eon
fsw = 1.94 W
Eoff
Psw _ off =
fsw = 1.62 W
Psw _ on =
Where
VCE = 1.8 V
ma =
Vgrid _ pk
Vbus
325
= 0.72
450
cos = 1
R CE = 0.02
22/55
AN3095
DC-AC converter
1 ma
Pdiode _ DC = VF * Ipk * (
cos ) = 1.3 W
8 3
1
Pdiode _ RR = Irr trr Vpk fSW = 0.45 W
8
where
Equation 50
Vpk = 450 V
Irr = 5.4 A
t rr = 88 ns
The resulting total losses for the single-phase inverter are calculated below:
Equation 51
resulting in 98% theoretical efficiency for the inverter stage. A simple modification of the
control strategy, together with a different choice of power devices, may improve the
efficiency and performance of the DC-AC stage. The modified circuit is shown in Figure 13.
Figure 13. Conversion systems with modified DC-AC inverter
0
0
0
=
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The low-side power devices, Z2 and Z4, are low-drop IGBTs switching at 50 Hz according to
grid polarity while the high-side devices are MOSFETs switching at high frequency with
pulse-width modulation. Compared to the standard topology, the main advantages are lower
conduction losses of both MOSFETs and low-drop IGBTs, absence of switching losses for
the low-side devices and, eventually, the possibility of using higher switching frequencies
with a reduction of reactive components size and cost and wider bandwidth for the control
loop.
The possible implementation of this solution may be based on the use of STW55NM60ND
for the high-side and STGW35NB60SD, connected in parallel to an external SiC diode, for
the low side. A gain in efficiency between of 0.5 % and 1 % may be measured with such an
implementation.
23/55
Schematic description
AN3095
Schematic description
The power board schematic is shown in Figure 14. The input voltage, produced by the PV
array and comprising between 200 V and 400 V, is fed to the power circuit through
connector J7. The input filter consists of 3 high voltage electrolytic capacitors and two 0.1 F
polypropylene capacitors connected at the input of the bridge, to reduce the effects of
parasitic inductances due to cables and PCB tracks. Each of the four input power
MOSFETs, STW55NM60ND, are connected in parallel to a STTH30R06, 600 V 30 A ultrafast, soft recovery diode. This diode carries only a small amount of current during ZVS
operation of the DC-DC converter due to the relatively lower forward voltage of the MOSFET
body diode.
The power MOSFETs in the active rectifier are connected in parallel to 4.7 nF, 630VDC
polypropylene capacitors used as voltage snubbers to minimize turn-off losses.
The HF transformer is realized using two E70/33/32 cores with N87 ferrite. In a transformer
having only a primary and a secondary winding, the value of the leakage inductance is
determined by the number of turns in each of the two windings and by the spatial
arrangements of these windings. The leakage inductance increases with an increasing
number of turns and with an increasing distance between the windings. However, the spatial
arrangement of the windings cannot be chosen arbitrarily, mainly because of mechanical
restrictions introduced by the core geometry chosen for the specific application. Then, if a
high value of leakage inductance is needed, an additional coil may be added in series to the
primary or a bigger core may be selected for the transformer. The leakage inductance of the
transformer in this application is designed without an additional external coil to achieve a
more compact set-up and lower cost.
A bank of four 330 F, 500 V electrolytic capacitors, connected in parallel, is placed on the
inverter bus to filter the 100 Hz ripple, together with a 2.2 F, polypropylene capacitor to
filter the high frequency component generated by the DC-DC converter. The output of the
DC-DC converter is connected to J9, a two-way connector mounted on the PCB in
order to allow the independent operation of both conversion stages. For example, by
connecting an electrical load to J9 and a DC voltage source to J7 the operation of the DCDC converter may be evaluated independently from the inverter. In the same way,
connecting a DC voltage source to J9 and disabling the modulation of the DC-DC converter
the operation of the DC-AC inverter may be evaluated both in standalone or grid-connected
operation. In standalone mode of operation the system is controlled in open loop, while in
grid connection mode the system operates with closed loop control.
The full bridge inverter consists of two legs implemented with STGW35HF60WD IGBTs.
A 0.1 F, 630VDC polypropylene capacitor (CF1, CF2) is connected across each leg. The
mid point of each leg is then reported on J8 to allow the connection of the two 1 mH
inductors used as high frequency filters together with capacitor C1 (Figure 15). This
capacitor, placed on the output sensing and relays board, is connected to the filter inductors
through a two-way connector J7, placed on the same board. The current in the filter inductor
is sensed by means of a Hall effect sensor CS1 and is used as a feedback for the control
algorithm. Also the grid voltage, sensed with LV1, is a feedback for the control algorithm and
is used for current synchronization to obtain unitary power factor.
Hall sensors provide inherent galvanic isolation between the grid and the control circuitry
and are very simple to use, requiring only a +15 V/-15 V supply voltage and a measurement
resistor. Despite these advantages, their cost is higher compared to other sensing solutions.
24/55
AN3095
Schematic description
For example, a cheaper solution may be implemented using a simple voltage divider or a
shunt resistor together with an analog opto-isolator to provide galvanic isolation between the
power stage and control section. The price to pay in this case is the added complexity of the
sensing circuitry.
The physical connection to the grid is realized by means of two relays, placed on line and
neutral, which are controlled by an I/O of the control board with the STM32F103xx
microcontroller, and supplied by the 24 V bus generated by the multi-output power supply.
The feedback signals are sent to the control board by means of coaxial shielded cables
connected to J14 and J15 on the relays board.
25/55
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