Clase 5 DLP

----------------------------------------------------------------------------------- Company:
-- Engineer:
--- Create Date: 08:20:52 05/13/2015
-- Design Name:
-- Module Name: BARRIDO_LEDS - Behavioral
-- Project Name:
-- Target Devices:
-- Tool versions:
-- Description:
--- Dependencies:
--- Revision:
-- Revision 0.01 - File Created
-- Additional Comments:
----------------------------------------------------------------------------------library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
-- Uncomment the following library declaration if using
-- arithmetic functions with Signed or Unsigned values
--use IEEE.NUMERIC_STD.ALL;
-- Uncomment the following library declaration if instantiating
-- any Xilinx primitives in this code.
--library UNISIM;
--use UNISIM.VComponents.all;
entity BARRIDO_LEDS is
Port ( CLK_50MHZ : in STD_LOGIC;
LED : out STD_LOGIC_VECTOR (7 downto 0));
end BARRIDO_LEDS;
architecture Behavioral of BARRIDO_LEDS is
--SEALES
SIGNAL RELOJ_1:STD_LOGIC;
SIGNAL CONTA16:NATURAL RANGE 0 TO 15 :=0;
begin
RELOJ: PROCESS (CLK_50MHZ)
VARIABLE CONTADOR:NATURAL RANGE 0 TO 25000000 :=25000000;
VARIABLE LED_CUENTA:STD_LOGIC :='0';
BEGIN
if RISING_EDGE(CLK_50MHZ) THEN
IF CONTADOR=0 THEN
CONTADOR:=25000000;
LED_CUENTA:=NOT LED_CUENTA;
ELSE
CONTADOR:=CONTADOR-1;

END IF;
RELOJ_1 <=LED_CUENTA;
END PROCESS;

END IF;

CUENTA: PROCESS (RELOJ_1)

VARIABLE CONTA:NATURAL RANGE 0 TO 16 :=0;
BEGIN

IF RISING_EDGE(RELOJ_1) THEN
CONTA:=CONTA+1;
IF CONTA=16 THEN
CONTA:=0;
END IF;
END IF;

CONTA16<=CONTA;
END PROCESS;

LEDS: PROCESS (CONTA16)

VARIABLE SALIDA:STD_LOGIC_VECTOR (7 DOWNTO 0);
BEGIN
CASE CONTA16 IS
WHEN 0 => SALIDA := "11000000";
WHEN 1 => SALIDA := "11100000";
WHEN 2 => SALIDA := "01110000";
WHEN 3 => SALIDA := "00111000";
WHEN 4 => SALIDA := "00011100";
WHEN 5 => SALIDA := "00001110";
WHEN 6 => SALIDA := "00000111";
WHEN 7 => SALIDA := "00000011";

END CASE;
LED<=SALIDA;
END PROCESS;

end Behavioral;

WHEN
WHEN
WHEN
WHEN
WHEN
WHEN
WHEN
WHEN

8 => SALIDA := "00000011";

9 => SALIDA := "00000111";
10 => SALIDA := "00001110";
11 => SALIDA := "00011100";
12 => SALIDA := "00111000";
13 => SALIDA := "01110000";
14 => SALIDA := "11100000";
15 => SALIDA := "11000000";

TIEMPOS QUE TENEMOS