Nghien Cuu Va Ung Dung Card Dieu Khien So DSP de Thiet Ke Bo Dieu Khien So Trong Dieu Khien Chuyen Dong 1286

I HC THI NGUYN
CNG HO X HI CH NGHA VIT NAM
TRNG HKT CNG NGHIP
c lp - T do - Hnh phc
-----------***-----------
THUYT MINH
LUN VN THC S K THUT
TI
NGHIN CU V NG DNG CARD IU KHIN S DSP

THIT K B IU KHIN S TRONG IU KHIN
CHUYN NG
Hc vin: inh Vn Nghip

Lp: CHK10
Chuyn ngnh: T ng ho
Ngi HD Khoa hc:TS. Bi Chnh Minh
Ngy giao ti: 01/02/2009
Ngy hon thnh: 31/07/2009
KHOA T SAU I HC
CB HNG DN
TS. Bi Chnh Minh
S ha bi Trung tm Hc liu i hc Thi Nguyn
HC VIN
inh Vn Nghip
http://www.lrc-tnu.edu.vn
I HC THI NGUYN
TRNG I HC K THUT CNG NGHIP

----------------***----------------
LUN VN THC S K THUT
NGHIN CU V NG DNG CARD IU

KHIN S DSP THIT K B IU KHIN
S TRONG IU KHIN CHUYN NG
Ngnh: T NG HA
M s:
Hc vin: INH VN NGHIP
Ngi HD Khoa hc: TS. BI CHNH MINH
THI NGUYN 2009

I HC THI NGUYN
TRNG I HC K THUT CNG NGHIP

----------------***----------------
LUN VN THC S K THUT

NGNH: T NG HO
NGHIN CU V NG DNG CARD IU

KHIN S DSP THIT K B IU KHIN
S TRONG IU KHIN CHUYN NG
INH VN NGHIP
THI NGUYN 2009
LI CAM OAN
Tn ti l: inh Vn Nghip
Sinh ngy 25 thng 12 nm 1981
Hc vin lp cao hc kho 10 - T ng ho - Trng i hc K thut
Cng nghip Thi Nguyn.
Hin ang cng tc ti khoa in - Trng i hc K thut Cng nghip
Thi Nguyn.
Xin cam oan: ti Nghin cu v ng dng Card iu khin s DSP
(Digital signal Processor) thit k b iu khin s trong iu khin chuyn ng
do thy gio TS. Bi Chnh Minh hng dn l cng trnh nghin cu ca ring
ti. Tt c cc ti liu tham kho u c ngun gc, xut x r rng.
Tc gi xin cam oan tt c nhng ni dung trong lun vn ng nh ni
dung trong cng v yu cu ca thy gio hng dn. Nu sai ti hon ton
chu trch nhim trc Hi ng khoa hc v trc php lut.
Thi Nguyn, ngy 31 thng 7 nm 2009

Tc gi lun vn
inh Vn Nghip
http://www.lrc-tnu.edu.vn 1
LI CM N
Sau su thng nghin cu, lm vic khn trng, c s ng vin, gip
v hng dn tn tnh ca thy gio TS. Bi Chnh Minh, lun vn vi ti
Nghin cu v ng dng Card iu khin s DSP (Digital signal Processor) thit
k b iu khin s trong iu khin chuyn ng hon thnh.
Tc gi xin by t lng bit n su sc n:

Thy gio hng dn TS. Bi Chnh Minh tn tnh ch dn, gip tc
gi hon thnh lun vn ny.
Khoa o to Sau i hc, cc thy gio, c gio thuc b mn T ng ho
Khoa in - Trng i hc K thut Cng nghip Thi Nguyn gip tc
gi trong sut qu trnh hc tp cng nh qu trnh nghin cu thc hin lun vn.
Trung tm Th nghim Trng i hc k thut Cng Nghip, c bit l cc
cn b phng th nghim t ng ho tn tnh gip tc gi xy dng h thc
nghim.
Ton th cc ng nghip, bn b, gia nh v ngi thn quan tm, ng
vin, gip tc gi trong sut qu trnh hc tp v hon thnh bn lun vn.
Tc gi lun vn
inh Vn Nghip
MC LC
Ni dung
Trang
Trang ph ba
Li cam oan
Li cm n
Mc lc
Danh mc cc hnh v, th
CHNG 1. TNG QUAN V H IU KHIN S
11
1.1. L thuyt v h iu khin s
11
1.1.1. Cu trc in hnh ca h iu khin s
11
1.1.2. C s ca iu khin s
21
1.1.2.1. Bin i Z
21
1.1.2.2 Tn hiu v ly mu tn hiu trong h iu khin s
24
1.2. Tng hp h iu khin s
27
1.2.1. L lun chung.
27
1.2.2. iu kin tng hp c b iu khin s trong h.
29
1.2.3. Chn tn s ly mu.
30
1.2.4. Thit k b iu khin s theo phng php lin tc.
32
1.2.4.1. Phng php vi phn
32
1.2.4.2. B iu khin s c xc nh theo hm truyn t
34
1.2.4.3. Phng php dng bin i z
36
1.2.4.4. Tng hp b iu khin c tnh phn t lu gi (ZOH)
37
1.2.5. Thit k b iu khin s theo phng php trc tip
38
1.2.5.1. Phng php qu o nghim s trn mt phng z.
38
1.2.5.2. B nh hng ca khu tr

1.2.5.3. H n nh v tn
40
1.2.6. Dng matlab tng hp h iu khin s
41
1.3. iu khin s trong iu khin chuyn ng
41
1.3.1. Mt s cu trc iu chnh c s dng
41
1.3.2. Thit k v m phng h thng bng my tnh
47
CHNG 2. GII THIU CARD DSP DS1104
49
2.1. Gii thiu chung
49
2.2. Cu trc phn cng ca DS1104
51
2.2.1. Cu trc tng quan
51
2.2.2. Ghp ni vi my ch (Host Interface)
53
2.2.3. Cc thnh phn ch yu ca DS1104
59
2.2.3.1. B x l tn hiu s DSP TMS320F240.
59
2.2.3.2. H con AD (Analog to Digital).
65
2.2.3.3. H con DA (Digital to Analog).
67
2.2.3.4. H con Vo/Ra s (Digital I/O)
70
2.2.3.5. H con b m ho so lch
73
2.2.3.6. Thanh ghi iu khin vo ra IOCTL
75
2.2.3.7. S chn I/O Connector ca DS1104
76
2.3. Phn mm dSPACE
78
2.3.1. Ci t dSPACE
79
2.3.2. Cc khi dSPACE trong Simulink
80
2.3.2.1. Cc iu khin vo/ra tng t
81
2.3.2.2. Cc iu khin vo/ra s
81
2.4. Mt s cc tnh nng c bn ca Card DS1104 cho iu khin
81
chuyn ng.
2.4.1. Cc iu khin v tr Encoder
81
2.4.2. iu khin PWM (Pulse Width Modulation)
82
2.5. To ng dng vi dSPACE v Simulink
88
2.5.1. To ng dng vi Control Desk
93
2.5.2. Hin th cc iu khin, quan st vi Instrumentation
94
Management Tools.
CHNG 3.
XY DNG H IU KHIN CHUYN
100
NG S DNG CARD DS 1104

3.1. Tng hp h iu khin chuyn ng v tr DC servo(theo phng
100
php tng t)
3.1.1. M hnh ton hc ca h
100
3.1.2. Cu trc h iu khin v tr v phng php tng hp cc

mch vng
3.1.3. Tnh ton cc thng s h iu khin v tr v cu trc h iu
104
110
khin v tr
3.1.4. M phng h trn Matlab
114
3.2.H iu khin v tr ng c DC Servo dng b iu khin Fuzzy logic
115
ng dng Card DS1104
3.3. Xy dng h thng iu khin chuyn ng
121
3.3.1 Gii thiu cc thit b trong h thng thc
121
3.3.2. Lp trnh iu khin h
123
3.3.3. Cc c tnh thc nghim h iu khin chuyn ng
124
KT LUN VA KIN NGHI
129
TI LIU THAM KHO
129
DANH MC CC BNG, HNH V, TH

Bng 2.2. M t thanh ghi trng thi
Bng 2.3. M t thanh ghi ci t
Bng 2.4. Cc ngt cng ca DSP
Bng 2.5. Qun l cc ngt cng
Bng 2.6. Cc a ch thanh ghi ca h con AD
Bng 2.7. Cc a ch thanh ghi ca h con DA
Bng 2.8. M t thanh ghi ch DA
Bng 2.9. Thanh ghi cng vo/ra
Bng 2.10. Tn cc chn ca DS1104 trn P1A
Bng 2.11. Tn cc chn ca DS1104 trn P1B
Bng 2.12. Bng m t cc chn ca DS1104
Bng 2.13.Cc iu khin v tr encoder ca DS1104
Bng 2.14. Tn cc chn ca cc knh phht xung
Bng 2.15. Tn cc xung PWM 3 pha
Bng 2.16.Tn ca cc knh pht xung PWM 3 pha
Bng 2.17. Tn cc xung PWM 3 pha vector
Bng 2.18.Tn ca cc knh pht xung PWM 3vector
Bng 3.1. Cc thng s cho trc
Bng 3.2. Lut iu khin
Hnh 1.1. Cu trc h iu khin s
Hnh 1.2. S nguyn l b chuyn i s - tng t trong h iu khin s
Hnh 1.3. S nguyn l b DAC
Hnh 1.4. Tn hiu ra ca b DAC
Hnh 1.5. B bin i DAC vi mng in tr
Hnh 1.6. B bin i DAC dng mng in tr R v 2R
Hnh 1.7. S nguyn l chuyn i A/D
Hnh 1.8. S chuyn i A/D song song
Hnh 1.9. S chuyn i A/D theo phng php b
Hnh 1.10. B bin i A /D theo nguyn tc servo

Hnh 1.11 : Hm thi gian
Hnh 1.12. Tn hiu lin tc
Hnh 1.13.Tn hiu ri rc
Hnh1.14:B ct mu
Hnh 1.15: Mi quan h qu trnh gin on v lin tc

Hnh 1.16
Hnh 1.17
Hnh 1.18
Hnh 1.19
Hnh 1.20
Hnh 1.21
Hnh 1.22
Hnh 1.23
Hnh 1.24
Hnh 1.25
Hnh 1.26. Cu trc c bn ca iu chnh tc quay
Hnh 1.27. Cu trc ti gin phc v thit k xp x
Hnh 1.28. Cu trc c bn iu chnh gc
Hnh 1.29. Cu trc c bn iu chnh gc ti gin
Hnh 1.30. Cu trc iu chnh b sai s gi tr t
Hnh1.31. Cu trc iu chnh b nhiu
Hnh1.32. Cu trc iu chnh b ngc
Hnh 1.33. Cu trc iu chnh b xui bng phng php m hnh
Hnh1.34. Cc giai on ca mt qu trnh chuyn ng
Hnh 1.35. Cu trc iu khin tng qut ca mt nhnh truyn ng
Hnh 1.36.Cc lut thng dng nhm iu khin chnh xc chuyn ng
Hnh 1.37. Trnh t thit k v m phng h thng bng my tnh
Hnh 2.1- Card DS1104
Hnh 2.2. S khi ca DS1104

Hnh 2.3. Vi x l tn hiu s DSP TMS320F240
Hnh 2.4.Bn b nh ca DSP
Hnh 2.5.Bn b nh ngoi vi ca DSP TMS320F240
Hnh 2.6. S khi ca h con AD
Hnh 2.7. nh dng d liu ca ADC 16-bit
Hnh 2.9. Mch u vo ca ADC
Hnh 2.10. S khi ca h con DA
Hnh 2.11. nh dng d liu ca DAC 12-bit
Hnh 2.12. nh dng d liu ch DA
Hnh 2.13. Mch u ra ca DAC
Hnh 2.14. S cu trc ca giao din encoder so lch
Hnh 2.15. Mch u vo ca encoder
Hnh 2.18. To ngun 1,5V t ngun 5V
Hnh 2.16. nh dng ca thanh ghi IOCTL khi c
Hnh 2.17. nh dng ca thanh ghi IOCTL khi ghi
Hnh 2.18. Cc khi ca DS1104 Master PPC
Hnh 2.19. Cc khi trong th vin ca DS1104
Hnh 2.20. Tn hiu encoder v gii hn m
Hnh 2.21. Tn hiu PWM ca Card DS1104
Hnh 2.22. Tn hiu PWM ch i xng
Hnh 2.23. Tn hiu PWM ch khng i xng
Hnh 2.24. iu ch xung PWM ca Card DS1104
Hnh 2.25. iu ch vector khng gian
Hnh 2.26. Cc vector SPWM1, SPWM3, SPWM5 ca DS1104
Hnh 2.27. Lu thut ton thc hin mt ng dng vi Simulink v Control
Desk: (a)- Bc 1; (b)- Bc 2
Hnh 2.28. V d minh ho
Hnh 2.29. Thay i tham s khi Transfer Fcn

Hnh 2.30. Kt qu m phng
Hnh 2.31. Cu trc iu khin trn Matlab Simulink
Hnh 2.32. Downloading and Building
Hnh 2.33. Giao din Control Desk
Hnh 2.34. Ca s New Experiment
Hnh 2.35. Th Variable Manager v cc bin m phng
Hnh 2.36. Ca s New Layout
Hnh 2.37. Chn Slider v v hnh ch nht trong Layout1
Hnh 2.38. Thay i tham s ca Slider
Hnh 2.9. iu khin Slider sau khi gn bin cn iu khin
Hnh 2.40. V mt Plotter quan st tn hiu
Hnh 2.41.Thit lp c tnh cho th
Hnh 2.42. Thit lp thng s quan st
Hnh 2.43. iu khin s thc thi ca DSP (a) v iu khin Animation (b)
Hnh 3.1.S cu trc chung ca h iu chnh v tr
Hnh 3.2. S mch thay th ng c mt chiu
Hnh 3.3. S mch thay th mch in phn ng
Hnh 3.4. M hnh tuyn tnh ho ng c in mt
Hnh 3.6. M hnh tuyn tnh ho m phng ng c mt chiu kch t c lp
Hnh 3.7. S khi mch chnh lu c iu khin
Hnh 3.8. S mch vng iu chnh dng in
Hnh 3.9
Hnh 3.10: S cu trc ca h iu chnh v tr.
Hnh 3.11
Hnh 3.12
Hnh 3.13
Hnh 3.14. Cu trc h iu khin v tr trong matlab Simulink
Hnh 3.15. c tnh m phng h iu khin chuyn ng

Hnh 3.16. Cu trc h iu khin v tr vi Card DS1104
Hnh 3.17 Cu trc iu khin m v tr vi Card DS1104
Hnh 3.18. H iu khin m v tr vi Card DS1104
Hnh 3.19. Hm lin thuc ca bin sai lch v tr
Hnh 3.20. Hm lin thuc ca bin thay i sai sv tr
Hnh 3.21. Hm lin thuc ca tn hiu iu khin
Hnh 3.22. Surface lut iu khin m
Hnh 3.23. Vi phn sai lch v tr
Hnh 3.24. Sai lch v tr
Hnh 3.25. Cu trc h iu khin v tr vi b iu khin m
Hnh 3.26. M phng lut iu khin m
Hnh 3.27.Cu trc h thng thc nghim
Hnh 3.28.Card DS1104 trong h thc nghim
Hnh 3.29. Driver DC servo motor
Hnh 3.30.DC servo motor
Hnh 3.31. Chn thi gian ly mu cho h
Hnh 3.33. Mn hnh ControlDesk vi h thc nghim
Hnh 3.34.Chng trnh iu khin h thng thc nghim
Hnh 3.35. Chng trnh iu khin h thng thc nghim dng b iu khin m
Bng 2.1. Dung lng cc b nh ca DS1104
http://www.lrc-tnu.edu.vn10
CHNG 1. TNG QUAN V H IU KHIN S

1.1. L thuyt v h iu khin s.
1.1.1. Cu trc in hnh ca h iu khin s.
Ngy nay vi nhng thnh tu ni bt trong cng ngh my tnh, chng ta c
th thc hin cc b iu khin s bng my tnh thay th cc b iu khin
truyn thng. Do vy iu khin s lin quan ti thut ton iu khin trong thit b
iu khin s, c th l Card s v my tnh s. Chng ta c th tn dng s tin b
trong iu khin logic v s linh hot v mm do ca iu khin s thay v vic
thc hin cc b iu khin tng t truyn thng. Mt khc chng ta cng cn s
giao din kt ni gia i tng iu khin v my tnh. C th nh:
- cc php o c thc hin ti cc thi im ri rc
- cc d liu cng phi c ri rc ho cho php x l d liu s
Mt khc cc b iu khin s c th x l c d liu ri rc theo khng gian v
thi gian. Cch ri rc ho thng c thc hin bng cch ly mu v sau l
lng t ho. Vi hai c im ny khin h thng iu khin s khc hn vi cc
h thng thng iu khin tuyn tnh thng thng v h thng iu khin thi gian
bt bin.
i tng
Chng trnh
iu khin
My tnh s
Hnh 1.1: Cu trc h iu khin s

a. B chuyn i s-tng t (D/A converter).
B chuyn i s-tng t bin i mt chui cc i lng u(kT) thnh tn hiu
lin tc u(t) iu khin h thng. B chuyn i D/A c m phng bi b lu
11
gi, nhn thi im kT xung c bin t l vi tr s u(kT) c rng rt b so

vi T (tn hiu ly mu) v duy tr hng s y sut c chu k T. Nh vy p ng
vi mt chui xung l mt chui bc thang c di T. Qu trnh bin i ny l
tc thi v khng c tr.
B lu gi bc khng y tng ng vi c cu nh hnh vi xung ch nht, h
s lp y =1. Nhng b lu gi bc cao to nn nhng dng sng phc tp hn
nhng chnh xc cao hn.
Hnh 1.2: S nguyn l b chuyn i s tng t trong h iu khin s

Nguyn tc lm vic ca DAC
Chuyn i s tng t l qu trnh tm li tn hiu t n s hng (n bits) bit
ca tn hiu s. B chuyn i s tng t (DAC) tip nhn mt m s n bits song
song u vo v bin i thnh tn hiu lin tc u ra.
Hnh 1.3: S nguyn l b DAC
Hnh 1.4- Tn hiu ra ca b DAC
12
Tn hiu ny c a qua b lc thng thp. u ra ca b lc l tn hiu tng t

UA bin thin lin tc theo thi gian, l tn hiu ni suy ca Um. Vy b lc thng
thp ng vai tr l b ni suy.
Cc c tnh quan trng ca DAC
- phn gii: lin quan n s bit ca mt DAC. Nu s bit l m th s trng thi
n
tn hiu ca s nh phn a vo l 2 v tn hiu ra s c 2 mc khc nhau, do

n
phn gii l 1/ 2 . phn gii cng b th tn hiu u ra c dng lin tc gn

vi thc t.
- tuyn tnh: Trong mt DAC l tng s tng tn hiu s u vo s t l vi
s tng tn hiu s u ra.
- chnh xc ca mt DAC cho bit s khc bit gia tr s thc t ca U A v tr
s l thuyt cho bi mt gi tr bt k ca tn hiu s u vo. S sai khc ny
cng nh th chnh xc cng cao.
- Thi gian thit lp: Khi tn hiu s u vo ca mt DAC thay i, tn hiu
u ra khng th thay i ngay lp tc m phi sau mt khong thi gian no gi
l thi gian thit lp. Thi gian thit lp phn nh tnh tc ng nhanh ca mt
DAC.
Mt s mch DAC in hnh
Bin i DAC vi mng in tr trng lng
Mch gm mt ngun
in p chun Uch, cc
b chuyn mch v in
tr c gi tr R, R/2,
R/4... v mt mch
khuch i thut ton.
Khi mt kho in no
c ni vi ngun
in th chun th s
Hnh 1.5. B bin i DAC vi mng in tr
13
cung cp cho b khuch i thut ton dng in cng l:
Ii =
Uch
R.2i
(i=0n-1)
Cng dng in ny c lp vi cc kha cn li, c th thy ngay bng bin

in p Ura ph thuc vo ch kho no c ni vi Uch tc l ph thuc vo gi
tr ca bit tng ng trong tn hiu s a vo mch chuyn i.
Mch c u im l n gin, nhng nhc im l chnh xc v tnh n nh
ca kt qu ph thuc nhiu vo tr s ca cc in tr v kh nng bin thin nh
nhau theo mi trng ca cc in tr ny. Ch to cc in tr theo ng t l
chnh xc nh vy thng kh khn v tn km. Ngoi ra Ura cn ph thuc vo c
chnh xc v tnh n nh ca ngun in p chun.
B bin i D /A dng mng in tr R v 2R
Hnh 1.6. B bin i DAC dng mng in tr R v 2R

DAC vi thang in tr R - 2R khc phc c mt s nhc im ca DAC mng
in tr trng lng. Mch ch gm hai loi in tr R v 2R vi nhiu chuyn
mch (mi chuyn mch cho 1 bitm) v mt ngun in p chun Uch. i lng
cn tm l Ith vo mch khuch i khi c mt s chuyn mch ni vi Uch.
Lc ta c: Ura=-Ith.Rf
14
Xt ti chuyn mch tng ng vi bit th i, nt tng ng trn mch l nt 2i. Khi

b chuyn i ng vo Uch th in th tng ng ti nt 2i s l Uch/ 2 v ngun
tng ng c ni tr l R (theo nh l Thevenin). Nh vy ti nt 2i+1 ta c
ngun tng ng tr s l Uch/ 4 v ni tr l R.
T nhng kt qu trn ta suy ra rng khi di chuyn v pha mch khuch i
thut ton in th ti mi nt bng na tr s ca nt k cn bn tri n. Nh vy
nu t nt th 2i n nt 2n-2 c k nt (k c nt th 2n-2) th in th ti nt 2n-2 do
chuyn mch 2i gy ra l Uch/ 2k v dng in t-ng ng l Uch/(2k.2R). Ti nt 2n-1
do c tnh ca khuch i thut ton m in th ti y c coi l 0V.
Tm li, mt cch tng qut ta c cng thc tnh in p ra ca mt DAC n bit
(t B0 Bn-1) vi mng in tr R - 2R.
Ura =-Uch
Rf
2n-1Bn-i +2n-2 Bn-2 +...+20 B0
n
2R
Trong B0 Bn-1 c gi tr 0 hoc 1.

Cc DAC theo phng php ny phi dng s in tr kh ln, v d nh
DAC n bit th phi dng 2 (n-1) in tr, trong khi theo phng php in tr trng
lng ch phi dng n in tr. Nhng b li n khng rc ri v ch cn dng c 2
loi in tr m thi. Nn chnh xc v tnh n nh ca tn hiu ra c m
bo.
b. B chuyn i tng t - s (A/D Converter)
Qu trnh chuyn i tng t - s khng th tc thi, cn c thi gian tr
bin i tn hiu tng t l mt i lng vt l (in p) u vo thnh tn hiu
s u ra.
Hnh 1.7. S nguyn l chuyn i A/D
15
B chuyn i A/D c ba chc nng: ly mu (lng t ho theo thi gian), lng

t ho theo mc v m ho (h nh phn).
Nguyn l lm vic ca ADC c minh ho trn s khi.
Tn hiu tng t UA c a n mch ly mu, mch ny c hai nhim v:
Ly mu nhng tn hiu tng t ti nhng thi im khc nhau v cch u.
Thc cht y l qu trnh ri rc ho tn hiu v mt thi gian.
Gi cho bin tn hiu ti cc thi im ly mu khng thay i trong qu trnh
chuyn i tip theo (qu trnh lng t ho v m hoq). Qu trnh lng t ho
thc cht l qu trnh lm trn s. Lng t ho c thc hin theo nguyn tc so
snh tn hiu cn chuyn vi cc tn hiu chun. Mch lng t ho lm nhim v
ri rc tn hiu tng t v mt bin . Trong mch m ho, kt qu lng t ho
c sp xp lai theo mt quy lut nht nh ph thuc loi m yu cu u ra b
chuyn i.
Nhiu loi ADC, qu trnh lng t ho v m ho xy ra ng thi, lc khng
th tch ri hai qu trnh, php lng t ho v m ho c gi chung l php bin
i AD.
Cc tham s c bn ca ADC
Cc tham s c bn ca b bin i ADC gm di bin i ca in p tng t
u vo, chnh xc ca b chuyn i, tc chuyn i.
- Di bin i ca in p tn hiu tng t u vo l khong in p m s t 0
n mt s dng hoc s m no , hoc cng c th l in p hai cc tnh:
-UAUA.
- chnh xc ca ADC: Tham s u tin c trng cho chnh xc ca ADC l
phn gii. Tn hiu u ra ca mt ADC l cc gi tr c sp xp theo mt
quy lut ca mt loi m no . S cc s hng ca m s u ra (s bits trong t
m nh phns) tng ng vi gii bin i ca in p vo cho bit mc chnh xc
ca php chuyn i. V d mt ADC c s bits u ra l n = 8 th s phn bit
c 28 mc trong di bin i in p vo ca n. Nh vy trong thc t dng s
16
bits nh gi chnh xc ca mt ADC khi gii bin i in p vo l khng

i.
Lin quan n chnh xc ca mt ADC cn c cc tham s khc nh: mo phi
tuyn, sai s khuch i, sai s lch khng, sai s lng t ho.
- Tc chuyn i cho bit s kt qu chuyn i trong mt giy, c gi l tn
s chuyn i fc. Cng c th dng tham s thi gian chuyn i Tc c trng
cho tc chuyn i. Vi mt ADC thng th fc < 1/Tc v gia cc ln chuyn i
phi c mt thi gian cn thit ADC phc hi li trng thi ban u. Mt ADC
c tc chuyn i cao th chnh xc gim v ngc li.
Cc phng php chuyn i tng t - s : C nhiu cch phn loi ADC,
nhng hay dng hn c l phn loi theo qu trnh chuyn i v mt thi gian.
Trong n ny ch gii thiu mt s phng php in hnh.
Chuyn i A /D theo phng php song song
Nguyn tc hot ng. :Tn hiu tng t UA c ng thi a n cc b so
snh t S1 n Sm. in p chun U ch c a n u vo th 2 ca cc b so
snh qua thang in tr R. Do cc in p chun t vo cc b so snh ln cn
khc nhau mt lng khng i v gim dn t S1 n Sm. u ra ca cc b so
snh c in p ln hn in p chun ly trn thang in tr c mc logic "1", cc
u ra cn li c mc logic "0". Cc u ra ca mch so snh c ni vi mch
AND, mt u mch AND c ni vi mch to xung nhp. Ch khi c xung nhp
a n u vo AND th cc xung trn u ra ca b so snh mi a vo mch
nh Flip_Flop (FF). Nh vy c sau mt khong thi gian bng chu k xung nhp
li c mt tn hiu c bin i v a n u ra. Xung nhp m bo qu trnh so
snh kt thc mi a xung nhp vo b nh. B m ho s bin i tn hiu v
di dng m m thnh m nh phn.
Mch bin i song song c tc chuyn i nhanh nn c gi l ADC nhanh
nhng kt cu ca mch rt phc tp v d nh ADC n bits cn phi dng 2n-1 b so
snh. V vy phng php ny ch yu dng trong cc ADC c tc chuyn i
cao nhng s bit nh.
17
Hnh 1.8. S chuyn i A/D song song

Chuyn i A /D theo phng php b
Hnh 1.9. S chuyn i A/D theo phng php b

Ti thi im ban u b m c t trng thi khng bi xung Cl, nh vy u
ra ca n cng c tn hiu khng. Mch so snh thit lp gi tr mt tn hiu nhp H
qua cng AND c a vo mch m. Mch m lm vic cho ra tn hiu s t
Q0Qm-1 ng thi qua b bin i D /A s c in p U0 cho n khi U0 = UA th
b so snh lt gi tr, u ra ca n c gi tr 0 cng AND s kho v b m s
dng. Trn u ra b m Q0Qm-1 dng s t l vi in p vo U A, s ny c
xp vo b ghi. Tip theo b m c xo v chun b cho chu k bin i tip
18
theo. Sau mi chu k b ghi s ghi s liu mi ca b m. Nu nh b m nh

phn c m bits th in p vo cc i UmaxA: UmaxA =2m -1
in p UA c lng t theo gia s: U A =
U maxA
2m -1
in p UA c din t bng phng trnh: UA =
U maxA
N
2m -1
Trong N l tng s bc ca b m v dung lng ca n y sau khi kt thc

qa trnh m.
Thi gian bin i: TA =
N
,Trong fn l tn s xung nhp.
fn
Thi gian bin i ph thuc ln in p. Tc thay i in p c th t gi

tr cc i.
U A U Amax .N f n U Amax
dU A
=
.
=
fn
=
2m -1 N 2m -1
dt max T
Nu tc bin i in p UA ln hn tc cc i th pht sinh sai s ng ca

b bin i. Sai s tnh ca b bin i l sai s lng t U. gim thi gian
bin i, b m nh phn ta s dng mch iu khin chng trnh.
B bin i A /D theo nguyn tc servo
B bin i ny c ba phn t c bn: mch so snh, mch m hai chiu v b bin
i D /A.
Hnh 1.10. B bin i A /D theo nguyn tc servo
19
Tn hiu in p vo UA so snh vi in p ra D /A. Nu U A > U0 th b bin m

m theo chiu tin. Nu UA < U0 th b m m theo chiu li cho n khi U A =
U0 th b m dng, tng t nh c cu servo. Tuy vy tc bin i in p vo
UA lun lun phi nh hn tc ca b m v b bin i D /A. Nn thi gian
bin i ph thuc vo tn s xung nhp fH v phn ng ca b so snh.
c. My tnh s hoc b vi x l.
My tnh thc hin cc thut ton nh: dch chuyn, cng, nhn, lu gi: n
to nn tn hiu iu khin uk=u(kT) theo chu k, l hm ca cc i lng uk-1, uk-2,
uk-q cc thi im trc v cc i lng sai lch ek-1, ek-2, ek-q. Angorit
m t hm y c dng tuyn tnh nh:
n
k=0
k=1
u(mT)= bk e (m-k)T - a k u (m-k)T
u k =a1u k-1 +a 2 u k-2 +...+a q u k-q +b0ek +b1ek-1 +...+bpek-p
Yu cu l xc nh cc h s aj v bj sao cho p ng ca h s i vi i lng

t xd(kT) l thch hp mc d c nhiu tc ng n h thng hay n cm bin.
Trong angorit, sai lch e(kT) xut hin ng thi vi iu khin, i hi chu k
lng t ho T ln (t nht l 20 ln ) so vi thi gian tnh u(kT). Thi gian ly
mu v thi gian bin i tn hiu u cn tnh n ch T.
Chu k ly mu T nh hng rt ln i vi cht lng ca h kn. Nu T qu ln
h c th mt n nh. Nu T v mc lng t ho (m qu trnh phn tch khng
quan tm n) b th tn hiu s cng nh tn hiu ri rc c th xem nh lin
tc.
Ngy nay vi s pht trin vt bc ca cng ngh thng tin, in t cc nh
sn xut tch hp cc h vi x l tn hiu s thay th cc my tnh trong h
iu khin s. Cc h vi x cng vi cc b chuyn i A/D,D/A c tch hp trn
mt Board n (Card). C nhiu hng sn xut nhiu Card iu khin s DSP
ng dng trong cng nghip v nghin cu, in hnh l cc Card DS1102,DS1104,
DS1103, DS1105.
20
1.1.2. C s ca iu khin s.
1.1.2.1. Bin i Z
Khi phn tch h iu khin tuyn tnh lin tc th ta dng php bin i Laplace
lc hm truyn ca h thng l t s gia hai a thc theo bin t. Trong h iu
khin s th hm truyn ca h thng khng cn l mt a thc i s theo p m a
thc i s theo e Tp . n gin ta t e Tp z lc hm truyn ca h thng
tr thnh a thc i s theo z. Ta c th s dng cc kt qu kho st h tuyn
tnh lin tc cho h iu khin s.
1.1.2.1.1. Php bin i z
Cho tn hiu ri rc x(nT) th bin i z ca tn hiu ny s l:
X(z) x(nT )z n
Cng thc trn c gi l cng thc bin i Z theo hai pha. Trong k thut
iu khin s ta thng dng bin i Z theo mt pha (0 +).
X(z)= X( nT )z n
0
Xt hm lin tc f(t) c hm ri rc l: f(nT)= f ( t )( t nT )

0
Trong (t nT ) l xung irc

*
Bin i Laplace ta c: F(p) f ( nT )e tp dt f (t )(t nT )e tp dt
F(p) f (nT )e nTp Vi
Z = eTp p =
0
*
1
F (p) = p ln Z = F(z) =
T
Bin i Z ca hm 1(t):
f (nt )z
1
lnZ
T
f(t) = 1(t)
f(nT) = 1(n) vi T = 1
Z 1( t ) =
1(n )2
0
=1+
1 1
z
2 +=
z z
z 1
21
Bin i Z ca hm f(t)
f(nT) = f(n) vi
Z e at =
na
= e-aT vi a = const
T = 1 = e-na
z n = 1 + e-az-1 + e-2az-2 + ...
l cp s nhn li v hn vi q = e-nz-1 l cng bi
1
Vy Z e =
=
1q
at
ea z
z
= a
=
1
e z 1 z e a
1 a
e z
1.1.2.1.2. Cc tnh cht ca bin i Z

a. Tnh dch gc
Nu hm f(n) c bin i Z l F(z) th hm f(n + 1) c nh l:
ZF(z) Zf(0) ( f(0) l iu kin u )
Tng qut:
Z f (n m = Z m F(z) -
m 1
f ( j)z
( m j )
j0
b. Tnh cht tuyn tnh

Nu f1 (n) F1 (z) v f2 (n) F2 (z) th:
Za f1 (n) b f2 (n) a F1 (z) b F2 (z)

c. Gi tr u ca hm gc ri rc
f ( n 0) f (0) Lim
F(z )
z
Xut pht t bin i Z: V
Z fn f ( n)z n f (0) f (1)z 1 ... f ( n)z n

0
Lim
F(z ) f (0) lim
f ( n)
z
n0
d. Gi tr cui ca hm gc ri rc
lim
f (n) lim
(1 z 1 )Fz
n
z 1
V Zf ( n 1) f ( n) lim f ( n 1) f ( n)z n
m
n 0
Z F(z) F(z) lim

f
(
n
1
)
f
(
n
)
z
m
m
n 0
22
(z 1)F(z) f (0) lim

f (m 1) f (0)
lim
z 1
m
Lim
f ( n) Lim
(1 z 1 )F(z)
n
z 1
e. Bin i Z ca sai phn tin ( f ( n) )
f(n)=f(n+1)-f(n)
Z f(n) =Z f(n+1)-f(n) =Z f(n+1) -Z f(n)
Z f(n) =zF(z)-zF(0)-F(z)=(z-1)F(z)-zf(0)
Tng t i vi sai phn cp hai:
Z2 f ( n) (z 1) Zf ( n) z f (0) (z 1) 2 F(z) z(z 1)f (0) z f (0)

f. Bin i Z ca sai phn li
f ( n) f ( n) f ( n 1)
Zf ( n) F(z) z 1 F(z) F(z)(1 z 1 )
1.1.2.1.3. Bin i Z ngc: Cho hm F(z) tm f(n). C ba cch thc hin:

a. Phn tch thnh nhng phn thc n gin
Phn tch thnh nhng phn thc n gin sau s dng bng nh gc v
cc tnh cht bin i Z s c kt qu.
b. Phn tch thnh chui lu tha
F ( z ) f ( n )z n f 0
f (1) f2
2 ...
z
z
Suy ra f(n) thi im ly mu ta xc nh c gi tr thi gian.

c. Dng phng php tch phn ngc
e(nt) =
1
F(z )z n 1 dz
L
2j
Trong ng cong L ly sao cho bao kn nghim (ng cong kn L l

ng trn n v). Phng php ny t dng.
d. S dng my tnh s
Chuyn F(Z) thnh phng trnh sai phn, sau gii phng trnh sai phn
bng my tnh.
23
1.1.2.1.4. Bin i Z pht trin

Bin i Z pht trin l mt cng c xc nh hm thi gian gia cc ln
ly mu khi m s ln ly mu khng phi l s nguyn ca tn s ly mu.
Trong trng hp ny ta thay php bin i Z thng thng bng cch thm
vo h thng d liu ly mu mt s tr hon thi gian tng tng. Khi php
bin i ny s m t cc chui xung c lm r bi cc hm thi gian, vi bi s
khng nguyn ca tn s ly mu.
Bng cch thay i thi gian tr ta c th tm c tn hiu lin tc gia cc
ln ly mu.
- Xt hm thi gian nh hnh v (Hnh 1.11). Hm c lm tr mt khong
thi gian giy. Nu l s nguyn th bin
i Z ca hm e(t T ) l :
e(t)
Ze(t T) z E(z)
Nu chn n 1 n th sai s gia
nT v
(n-1)
(n+1)
l :
T nT T n
Trong l mt s dng v 0 1 .
Gi thit E(p) l bin i Laplace ca e(t)
Hnh 1.11 : Hm thi gian

e(t)
v E(p, ) l bin i laplace ca e(t-
T )
Le(t T ) E(p, E(p) e Tp )
Thay n ta c:
E(p, ) E(p) e nTp e Tp

Bin i Z pht trin:
E(z, ) z n ZE(p) e Tp E(z, ) E n T z n
1.1.2.2 Tn hiu v ly mu tn hiu trong h iu khin s
24
1.1.2.2.1. Ly mu tn hiu
Trong h iu khin s lun tn ti hai loi tn hiu l tn hiu lin tc v tn
hiu ri rc. Tn hiu a vo my tnh l tn hiu
x(t)
ri rc, cn tn hiu a vo i tng iu khin

v i tng o lng l tn hiu lin tc.
tn hiu a vo my tnh s ta phi
bin i cc tn hiu o lng vn l lin tc
thnh tn hiu ri rc v n c gi l qu trnh
ct mu tn hiu.
T
Xt mt tn hiu lin tc nh hnh v (Hnh
2T 3T
nT
Hnh 1.12. Tn hiu lin tc
1.12):
Ta gi thit ly mu tn hiu nhng im cch
x(nT)
u nhau. Vi cch ly mu nh th th hm x(t)

c m t bi chui cc con s ri rc x(0), x(T),
x(2T), x(3T), ., x(nT). N m t cc gi tr ca
hm x(t) ti cc thi im ri rc v thi gian.
Cc gi tr ca hm ti cc im khc nh
2
x ( T ) . ch c th c c nh phng php
5
ni suy.
Hnh 1.13.Tn hiu ri rc
2T 3T
nT
Trong thc t cc khu iu khin v i tng iu khin thng l tng

t, v vy tn hiu ri rc sau khi ly mu phi c xy dng thnh tn hiu lin
tc, trong sut khong thi gian gia hai ln ly mu. Qu trnh ny c gi l qu
trnh lu gi d liu (Hold), c hai cch lu gi d liu l: lu gi bc
khng v lu gi bc mt.
1.1.2.2.2. Cc c tnh ly mu
Mt b ly mu l tng c m t nh hnh v(H-21) sau:
25
x(t)
x(nT)
B ct mu
x(t)
x(nT)
Hnh1.14:B ct mu
Vi b ct mu l tng trn s to ra mt chui xung n v ri rc t hm lin

tc. Gi thit thi gian p ng ca b ct mu nh hn nhiu thi gian gia hai ln
ly mu lin tip (chu k ly mu), khi gi tr ri rc x(nT) chnh l cc gi tr
ca hm khi b ct mu ng.
m t ton hc qu trnh ly mu ta c th coi b
ly mu nh mt cng c thc hin php nhn tn hiu
0 T 2T
3T .(t-nT)
nT
x(t) vi hm ly mu (t). Vic ny tng ng nh
vic iu ch tn hiu, trong sng mang l hm (t)

v ta c x(nT) =x(t).(t). Hm ly mu tt nht l chui xung n v, chui xung
ny c b rng v cng hp, bin v cng ln (chnh l o hm ca hm 1(t) )
n l cc hm (t), (t-T), (t-2T), (t-nT)
Trong thc t cc b ly mu vn c mt khong thi gian tc ng nht
nh, do hm ly mu thc t c mt din tch xc nh khc mt (din tch A).
Ta ch c th coi cc hm ly mu c din tch bng mt khi thi gian ly mu nh
hn nhiu hn so vi hng s thi gian ca h thng (thng gp trong thc t).
Gi thit hm ly mu c m t bi chui xung n v:
(t) = (t nT)
n
0 vi t nT
Trong : (t-nT) =
vi t nT
sao cho ( t nT ) dt =1 chnh l o hm ca
*
Khi hm x(t) c iu ch nh sau: x (t )
d
1(t-nT)
dt
x(nT)(t nT)
26
Trong : x(nT) l gi tr ca hm ti thi im ly mu. V hm (t-nT) ch

c gi tr xc nh ti thi im nT, do c th thay x(nT) = x(t). Mt khc, x(t)
xc nh t thi im t = 0.
*
T ta c: x (t )
x(nt ) (t nT )
1.2. Tng hp h iu khin s

1.2.1. L lun chung.
H iu khin s c tng hp theo hai hc ch yu: trong min tn s v
trong khng gian trng thi. Tng hp trong min tn s ch yu da vo m t
ng hc ca h tng bng cc bin i Laplace v Fourier (cn gi l phng php
tng hp dng k thut bin i). Hng th hai l tng hp h iu khin s trong
khng gian trng thi.
Phng php dng k thut bin i c cc phng php gin tip (phng
php tng t) v phng php trc tip.
phng php gin tip, mt b iu khin lin tc l tng G c(s) c tng
hp sau mt t hp CAD - b iu khin gin on -DAC c chn sao cho
tng ng vi Gc(s) nh hnh 1.15. Phng php ny c nhng ngi quen
dng iu khin tng t a chung v ch cn bin i t k thut tng t sang
s. Tuy nhin vic gin on ho b phn iu khin s cho kt qu km chnh xc
v:
1. Tn hin lin tc dng bc thang t phn t lu gi khng th to nn tn
hiu l tng u*(t).
2. Tn hiu l tng y ph thuc lin tc vo y(t), cn b iu khin s ch o
c y(t) thi im ly mu.
Tuy nhin, nu so vi ph ca cc tn hiu u vo, u ra m chn tn s
lng t ho ln, c th chn c b phn iu khin gin on gn nh G c(s).
Phng php chn gin n nht l theo:
Gc(z) = Gc(s)|s = (z-1))/T
27
Mt phng php chun xc hn:

Gc(z) = Gc(s)s = 2(z-1))/T(z+1).
Qu trnh gin on (i vi b iu khin)
Gc(z)
Khi iu khin, s
(theo thi gian gin on)
DAC
phn t lu gi
G1(s)
Qu trnh
lin tc
ADC
phn t ly mu
B iu chnh lin tc (i vi qu trnh)

Hnh 1.15: Mi quan h qu trnh gin on v lin tc
Phng php th hai l phng php bin i n ng (bin i kp, bi i
Tustin) duy tr c iu kin n nh ca hm truyn: nu Gc(s) n nh th Gc(z)
cng n nh do php bin i chuyn min bn trong ng trn n v mt
phng z sang na mt phng tri ca s. Tuy nhin iu khng c ngha l nu
Gc(s) n nh c qu trnh th b iu khin gin on CAD - Gc(z) - DAC
cng s n nh c qu trnh. Do vy sau khi chn b phn iu khin s cn
nh gi li sai lch v tnh n nh ca h.
Ch rng phn t lu gi bc khng to tr trung bnh l
T
(nh hnh
2
1.16) cho nn b iu khin G c(s)esT/2
.
Lng t ho c tn s ln,
khong 10 n 20 ln tn s ring ca
i tng.
phng php trc tip qu
Hnh 1.16
28
trnh lin tc cng vi cc phn t lu gi v ly mu c xem nh mt qu trnh

gin on, tng hp trong min z, cho php khai thc tnh nng mm do ca my
tnh m phng php tng t b hn ch.
Tn hiu lin tc u vo u(t) c xc nh hon ton bi uk. Kt qu l y(t)
= G1(s)u(t) v tn hiu c ly mu yk c xc nh hon ton bi uk. Nh vy
vic dng b iu khin gin on iu khin mt qu trnh gin on c u
vo uk v u ra yk s khng cn n s xp x no. Phng php trc tip c s
trn p ng c xc nh trc (p t) i vi tn hiu vo hay nhiu nht nh,
nhm tho mn nhng yu cu t ra nh chnh xc, lng qu iu chnh, thi
gian qu hay nhng ch tiu c trng khc i vi h xung nh n nh v tn,
thi gian cc tiu
Tuy nhin cn ch rng vic gin on ho s lm mt kh nng quan st

( r l
r
c v iu khin c i tng. Mc d iu ny ch xy ra khi T= n
tn s ring ca i tng) v ch h n bin. Do cn chn T<

Ti
2r
trnhtrng hp ngcng T= n
Ti
. Nh vy tn s lng t ho ln cn l loi
tr mt kh nng quan st c v iu khin c.

Nu n nh c qu trnh gin on (ngha l xk 0) th bo m c
s n nh ca qu trnh lin tc (ngha l x(t) 0).
1.2.2. iu kin tng hp c b iu khin s trong h.
hnh 1.17 c s khi ca h xung m my tnh s thc hin chc nng
ca h iu hnh Gc*(s).
H kn c hm truyn
Wk*(s) =
Gc * ( s)G ( s)
Y * ( s)
X * ( s) 1 Gc * ( s)G * ( s)
Hnh 1.17
vi G*(s) l phn khng thay i ca h xung
29
B iu khin c xc nh bi: G*(s) =
Wk * ( s)
1
G * ( s) 1 Wk * ( s)
(*)
Gc*(s) c th thc hin c nu bc ca mu s ln hn hoc bng bc ca

t s; ni cch khc tn hiu ra khng vt trc tn hiu vo.
Nu Wk*(s) = wke-k thut + wk+1e-(k+1)T+ v sau khi chia t cho mu s ca
hm truyn G*(s) ta c: G*(s) = gnenT+gne-(n+1)T+.
Biu thc (*) c dng : Gc*(s) =
Wk e kT Wk 1e( k 1)T ...

( g ne nT ...)(1 Wk e kT ...)
=Ck - ne-(k-n)T + Ck-n+1e-(k-n+1)+.

iu kin thc hin c l k n tn hiu ra ca b iu khin khng th c
c khi cha c tn hiu vo.
Nh vy, bc ca hm truyn h kn mong mun Wk*(s) khng thp hn bc
ca thnh phn khng bin i G*(s) ca h.
1.2.3. Chn tn s ly mu.
Vic chn tn s lng t ho 0 (hay thi gian ly mu T) rt quan trng.
Nu 0 qu b s c hin tng mo tn hiu, mt lng thng tin, gim cht lng,
thm ch cn c th mt n nh. Nu chn 0 qu ln (hay T qu b) mt mt h c
p ng gn vi h lin tc mong mun, tng hp theo phng php bin i, mt
khc i hi tc tnh phi nhanh, gi thnh s cao, tuy rng hn ch v phng
din ny ngy cng gim nh do cng ngh v my tn ngy cng pht trin. Vic
chn ng tn s lng t ho vn cn mang tnh cht ngh thut hn l tnh cht
khoa hc.
1. Vic chn tn s lng t ho hp l trc tin da vo bn cht ca qu
trnh.
- Cc phn ng ho hc l qu trnh chm c thi gian iu khin tnh bng
gi.
- Cc qu trnh nhit, thi gian iu khin tnh bng pht.
- Cc h iu khin tu thu chng hn tc ng vo cn li i hi nhiu giy
dn tu ng hng.
30
- Cc qu trnh c hc tc ng nhanh (nh ngi my chng hn) thi gian y

tnh n phn trm ca giy.
Trong trng hp th nht chu k lng t ho T khng phi b gii hn bi
cng sut v tc tnh ca my. Trong trng hp cui nhng hn ch v kinh t
(gi thnh ca my tnh cht lng cao) li t ra. Ngoi ra cn phi tnh n nhng
kh khn khc: Khi T 0 cc m hnh ca qu trnh tr nn th thin (F = I, G =
0) tt c cc nghim cc u bng 1. Do vic tnh ton cc b iu khin s c
kh khn. Cc phng trnh truy hi tr nn km chnh xc thi gian thc, cc
phng php xy dng h n nh v tn, thi gian cc tiu khng cn ngha.
Do vic xc nh T (hay 0) hp l l cn thit, tuy rng cc kh khn trn u
c bin php khc phc .
2. Tn s lng t ho 0 c chn phi tho mn nh l Kachenhicov .
Khi c tn hiu lin tc gin on ho cn c phc hi th tn s lng t
ho t nht phi gp i tn s ln nht ca tn hiu y 0. i vi h iu khin
kn, tn s lng t ho khng b hn hai ln di thng tn cn thit 0 m dung
lng ph tn hiu vo ph thuc vo 0 nn:
0
2
b
l gii hn thp nht c th. Trong thc t gii hn ny c th qu thp i

vi p ng thi gian chp nhn c. m bo chnh xc cn thit v ti ca
my tnh, thng c chn: 4
0
20
b
Hay T c chn khong 1/10 hng s thi gian b nht ca i tng.

qu trnh qu , khi lng t c tr s xc lp vi thi gian p ng t m
ca h cn c 2 n 4 chu k lng t ho T.
3. Trong nhiu trng hp, cn c trn cao i vi hm qu . Mc
trn tu thuc vo i tng c th; i vi ng c in, chu k gin on c th
ln hn i vi c cu tha hnh thy lc. i khi gia phn t lu gi (ZOH) v
c cu tha hnh thu lc c b lc h tng. Mc trn cn tu thuc vo phm
vi ng dng ca h. i vi con ngi, tc ng c nh hng trc tip, i hi
31
mc trn cao hn so vi cc thit b iu khin v tinh khng c ngi. V d

vi h c tm=1sec (gii thng tn l 0,5Hz) cn chn 0 t 3 n 20Hz p ng
trn v hn ch lng qu iu chnh. Do cn chn: 6
0
40
d
Nhiu tc ng vo i tng rt a dng, t nhiu bc thang n n trng

(Whitenoise). i vi tn s lng t ho th nhiu ngu nhin c tn s cao l c
nh hng nht. Mt h lin tc chng nhiu tt l h c sai s o nhiu to nn l
b. Nu dng iu khin s i vi h ny th cht lng y s gim. Nu t s
0
cng b th s suy gim cht lng do lng t ho ln khi c nhiu l n trng
d
tc ng. i vi h iu khin c b quan st th t s ti u
0
20.
d
Nu chu k lng t ho ln hn thi gian p ng ca qu trnh th nhiu s tc

ng vo qu trnh trc khi b iu khin c tc ng hiu chnh. Do tn s
lng t ho c chn trn c s nh gi ng hc ca qu trnh v nhiu, ng
hc ca qu trnh v kh nng ca my tnh. Cc b iu khin trn thng trng
vi t mch vng iu khin c chu k lng t ho b v c nh.
1.2.4. Thit k b iu khin s theo phng php lin tc.
Phng php thng thng thit k h iu khin s l chn b iu khin
Gc(s) cho h lin tc tng ng, ri xp x ho b iu khin lin tc y vi b
lc s cn tm Gc(s) (hay Gc(z)). C nhiu phng php thc hin.
1.2.4.1. Phng php vi phn:
B iu khin s c m t bng phng trnh lp, rt gn vi phng trnh
vi phn ca b iu khin tng t. V d b iu khin PID c hm truyn v
phng trnh vi phn tng ng.
1
U(s)
G c (s)=k p +k i +k d s=
s
E s
t
de
u(t)=k p e(t)+k i e(t)dt+k d
dt
0
(1-7)
32
C ba phng php xp x ho tn hiu lin tc e(t) thnh tn hiu gin on

e(kT).
1. Xp x sai phn hu hn bc mt i vi tch phn.
a) Lut ch nht theo tch phn tin
Din tch di ng cong e(t) c
xp x bng din tch ch nht nh hnh
1.18. Tch phn ca e(t) ti t=kT c xp x
bi:
u(kT) = u[(k-1)T] + Te(kT)
(1-8)
Nu ly bin i z cho c hai v, hm

truyn ca khu tch phn gin on l:
Gi(z) ki U ( z ) ki Tz
E( z)
z 1
(1-9)
b) Lut ch nht theo tch phn li

Nh hnh 1.19 tch phn ca e(t) ti t = Kt
c xp x bi:
u(kT) = u[(k-1)T]+Te[(k-1)T
(1-10)
Hnh 1.19
v hm truyn ca khu tch phn gin on l:

Gi(z) ki U ( z ) ki T
E z
z 1
(1-11)
c) Lut hnh thang theo tch phn gia

Din tch di ng cong c xp x
bng hnh thang nh hnh 1.20.
u(kT) = u[(k-1)T] +
T
{e(kT)+e[(k-1)T]}
2
Hnh 1.20
(1-12)
Hm truyn ca khu tch phn gin on l:
Gi(z) ki U ( z ) ki T z 1
E z
2 z 1
(1-13)
2. Xp x sai phn hu hn bc mt i vi o hm:
33
o hm ca e(t) ti t=kT c th c xp x theo sai phn li bng cch xc

nh e(t) thi im t=kT v (k-1)T:
de(t )
dt
t kT
1
(e(kT ) e(k 1)T )
T
Ly bin i z cho c hai v ta c: u(z) =
(1-14)
1
z 1
(1 z 1 ) E ( z )
E( z)
T
Tz
Phng php xp x ni trn tng ng vi:

Z = etS 1+Ts v s
z 1
T
Tng hp thnh phn t l, tch phn v vi phn ta c b iu khin PID vi

hm truyn theo:
a) Lut ch nht tch phn tin:
kd
2k
k
Tki z 2 k p d z d
kp
T
T
T
Gc(z) =
z ( z 1)
b) Lut ch nht tch phn li

kd 2
2k
k
k p z Tk i k p d z d
T
T
T
Gc(z) =
z ( z 1)
c) Lut tch phn hnh thang :

2k
k
Tk k d 2 Tk
z k p d z d
kp
2 T 2
T
T
Gc(z) =
z ( z 1)
S khi thc hin b iu khin PID gin on nh hnh 1.21.

1.2.4.2. B iu khin s c xc nh theo hm truyn t
V z = eTs nn hm truyn t ca b iu khin s v nguyn tc c th c
xc nh bng cch thay th s =
1
ln(z). Tuy nhin biu thc xc nh Gc(z) l siu
T
vit . tng hp b iu khin c th dng phng php khai trin ln(z) v ch gi

li thnh phn th nht hoc ch p dng biu thc z=eTs nghim khng ca Gc(s).
1. Bin i tuyn tnh kp:
34
Khai trin ln(z) di dng
Ln(z) = 2 v
v3
...
3
V biu thc s =
|v| =
1 z 1
1
1 z 1
1
ln(z)
T
by gi c dng
2 1-z-1 2 z-1 w(z)

.
= .
=
T 1+z-1 T z+1
(1.15)
w l i lng xp x
Hnh 1.21
ca s.
Phng php xp x ny (phng php Tustin) tng ng vi phng php

tch phn gia - lut tch phn hnh thang.
(k-1)T
u(kT) =
kT
e(t)dt+
e(t)dt
(1.16)
e (k-1)T +e(kT)
2
(1.17)
(k-1)T
t : u(kT) = u[(k-1]+T
Bin i z ca phng trnh sai phn trn l:

u(z) = z - 1u(z) + (z - 1 + 1) E(z)
u(z) T 1 z -1 T z 1
.
.
1
E(z) 2 1 z
2 z 1
(1.18)
Biu thc (1-13) v (1.18) ch khc nhau h s ki m b iu khin tch phn

c cho trc.
2. Phng php tng nghch nghim cc v nghim khng
Nh bit, nghim cc v nghim khng s j ca Gc(s) nh x vo nghim cc
v nghim khng ca G c(z) tng ng vi zj = esjT, cn h s khuych i ca Gc(z)
th tho mn iu kin.
35
G0(z)|z=1 = Gc(s)|a=0
(1.19)
Nu Gc(s) c nhiu
nghim khng kh
th Gc(s) 0. iu y
tng ng vi Gc*(s) = 0
di
tn
th
nht
0 0
2 , 2 v G0(z) = 0
vi z = 1. V vy, bc
ca t s v mu s nh
nhau, cn thm nhn t
(z+1) (z+1)q-p m q v p
l bc ca mu s v t s
ca Gc(s).
1.2.4.3.
Phng
php dng bin i z

phng php ny,
Gc(z) c xc nh theo
bin i z i vi Gc(s)
sao cho hm trng lng
hay hm qu ca
Hnh 1.22
chng nh nhau. y phn t lu
gi
(ZOH) ch to nn dng bc thang ca hm trng lng hay hm qu , xp x vi

hm lin tc tng ng. H kn s cho cht lng xp x km. V d vi hm trng
lng Gc(z) = cz{Gc(s)} hng s c c xc nh theo iu kin (1.19).
p ng tn s ca b lc s v tng t khc nhau tn s cao nn phng
php ny ch dng cho cc b iu khin c p ng tt nhanh tn s cao vi thi
gian ly mu T b ph n chng ln nhau. Hnh 1.22 c p ng tn ca b lc
bc hai nhm so snh cc phng php xp x khc nhau ni trn. Chu k lng t
36
ho T=1s l nh so vi chu k ring ca b lc T0=2 . Phng php xp x theo

ch nht v bin v pha u khc xa vi p ng tng t lm chun. H s
khuch i tnh khng cn nh trc sau khi dng bin i z p ng hm trng
lng. Bin i z vi c phn t lu gi (p ng hm qu ) cho p ng tt v
bin nhng khng tt v pha do tr T/2. Bin i tuyn tnh kp bin dng
c p t cng bin tn s ring r 1rad / sec cho kt qu chp nhn c
v bin cng nh pha, nhng tn s gii hn
bin bng khng. Phng

T
php tng thch nghim khng v nghim cc c bin thp hn p ng tng

t. Kt qu so snh ny gii thch v sao bin i tuyn tnh kp thng c dng
cc b lc s.
1.2.4.4. Tng hp b iu khin c tnh phn t lu gi (ZOH)
cc phng php nu trn, phn t lu gi khng c tnh n khi xc
nh Gc(z).Phn t lu gi c th thay th bi Gca(s) = e-Ts/2 v tn hiu u ra ca
n chm sau mt thi gian
-Ts
Gob(s) =
1-e
s
T
T
hoc bi Gob(s) =
suy ra t
Ts
2
1+
2
Ts
2 .
v e-Ts =
Ts
1+
2
1-
Vic chn b iu khin tng t t trc G0a(s) G1(s) hay Gob(s), G1(s)
c thc hin nh h lin tc. Tuy nhin cn bit trc chu k lng t ho T.
Mt phng php khc c thc hin theo cc bc sau:
G1 (s)
* Tnh phn khng bin i ca h :G(z) = (1-z-1) z

* Dng bin i tuyn tnh kp bng cch thay z bi
2 wT
c G(w).
2 - wT
* V ng cong Bode L(*) v (*) .

* Chn khu hiu chnh dng G c(w) = k
wa
chng hn, tho mn iu kin
wa
n nh v chnh xc.
37
* Gin on ho khu hiu chnh Gc(w) c Gc(z)

1.2.5. Thit k b iu khin s theo phng php trc tip.
Nh nu, phng php gin tip khng khai thc ht kh nng linh hot ca
my tnh trong iu khin s. V d cc nghim khng v nghim cc ca thit b
b u nm trn phn m ca trc thc mt phng s. Cc nghim y tng ng
vi phn dng ca trc thc trn mt phng z. Th nhng cc b iu khin s cho
php c nghim cc v nghim khng c phn m v phn dng ca trc thc
trn mt phng z nn iu kin hn ch c m rng hn. iu khin s cn cho
php tng hp cc b iu khin c hm truyn h kn mong mun.
1.2.5.1. Phng php qu o nghim s trn mt phng z.
y ch nu nhng im chnh.
Hm truyn ca h gin on kn c xc nh bi:
G0 ( z )G ( z )
1 G0 ( z )G ( z )
Wk(z) =
G1 ( s )
vi: G(z) = (1-z-1)z
Phng trnh c trng : 1+Gc(z)G(z) = 0

Phng php qu o nghim s thng dng xc nh thng s K c cu
iu khin nn c th vit phng trnh c trng di dng:
r
(z-z )
i
1+K
i=1
n
=0
(z-p )
j
j=1
M pj v zi l nghim cc v nghim khng ca h xung h. T :

n
(z-p )
j
-K=
j=1
r
(z-pi)
i=1
Qu o nghim s ca h gin on c xy dng theo nhng quy tc

tng t nh h lin tc.
38
1. Qu o nghim s i xng vi trc thc v gm c n nhnh xut pht t n

nghim cc ca phng trnh c trng khi K = 0; trong s r nhnh kt thc r
nghim khng v n - r nhnh i v v tn khi K = .
2. Qu o tim cn khi K (n - r) tia i xng to vi trc honh mt gc
.
n-r
n nh h thng, c th dng
c cu b dng:
Gc(z) = K
z-a
; 0 b < a < 1
z-b
vy
K.Gc(z)G(z)
(z-a)(z+1)
T2
;K=K'
K
(z-b)(z-1)2
2
By gi qu o nghim s s c
Hnh 1.23
ba nhnh v h c ba nghim cc p1 = p2
=1; p3 = b. Mt nhnh n nghim khng
z1 = -1, nhnh th hai n z2 = a v nhnh
th hai tin n - .
C th c hai trng hp:
1. C ba nghim u thc nm ng
thi trn hai on thng ca qu o [b, a] v
Hnh 1.24
[-1, -], trong trng hp y hai nghim b

hn -1 trn on [-1, -] v h s khng n
nh.
2. Kh nng h n nh l ch mt
nghim thc duy nht nm gia a v b, hai
nghim khc l nghim phc c mun
nh hn 1, nm trong ng trn n v.
Hnh 1.25
39
1.2.5.2. B nh hng ca khu tr .

Nu thnh phn khng bin i ca h c tr, trong trng hp thi gian tr l
bi s ca thi gian ly mu.
= n0T; (n0 = 1, 2, 3, _
G(z) = G1(z) z-n0
hnh 1.23 trng hp a) khu tr nm trong mch vng s lm nh hng
n tnh n nh ca h. hnh 1.24 trng hp b) khu tr nm ngi mch vng v
s khng nh hng n h. yu cu t ra l tm c cu iu khin G c(z) sao cho
nh hng ca khu tr khng cn na, ngha l ta c th ng tr hai s khi hnh
1.24 v 1.25.
Gc ( z )G1 ( z ) z n 0
G1 ( z ) n 0
z
n 0
1 Gc ( z )G1 ( z ) z
1 G1 ( z )
Gc ( z )
1
n 0
1 Gc ( z )G1 ( z ) z
1 G1 ( z )
Hay Gc(z) + Gc(z)G1(z) = 1 + Cc(z) G1(z) z-n0

Gc(z) [1 + G1(z) (1-z-n0)] = 1
Cui cng ta xc nh c: Gc(z) =
1
1 Gc ( z )(1 z n 0 )
S thc hin c cu iu khin s nh hnh 1.24. Nh vy vic dng c

cu iu khin s nh trn tng ng vi vic a phn t tr ra ngoi mch hi
tip. Tht vy v:
WK(z) =
Gc ( z )G1 ( z )
G1 ( z ) n 0
z
1 Gc ( z )G1 ( z ) 1 G1 ( z )
Khi c tr, h s khuych i ca
h c th ln hn so vi h khng c phn t tr nn nhiu khi khng cn b ton

b thi gian tr m ch cn mt phn ca n.
1.2.5.3. H n nh v tn.
Hm truyn ca h xung kn c dng
40
WK(z) =
G c (z)G(z)
vi E(z) = X(z) - Y(z) = X(z)[1-WK(z)]
1+G c (z)G(z)
T b iu khin c xc nh bi: Gc(z) =
1
WK ( z )
.
G ( z ) 1 WK ( z )
Vic chn Gc(z) t cht lng mong mun gp phi nhng iu kin hn
ch:
1. iu kin thc hin c i hi bc ca h kn ln hn hoc bng bc ca
phn lin tc quy i (kn):
2. Sai lch trng thi xc lp, theo (4-58b) v theo nh l ti hn
3. n nh v tn t c khi sai lch trng thi xc lp ca cc tr ri rc
bng khng, k c mt thi im hu hn.
1.2.6. Dng matlab tng hp h iu khin s
- Tng hp theo c tnh tn Bode
- Tng hp theo qu o nghim s
1.3. iu khin s trong iu khin chuyn ng.
1.3.1. Mt s cu trc iu chnh c s dng.
1-Khu C
2-iu khin mmen
3-ng c
4-Khu o
Hnh 1.26. Cu trc c bn ca iu chnh tc quay
41
Hnh 1.27. Cu trc ti gin phc v thit k xp x

lin tc
Hnh 1.28. Cu trc c bn iu chnh gc
Hnh 1.29. Cu trc c bn iu chnh gc ti gin

Hm truyn c trng ca vng iu chnh v tr:
Gi thit gi tr t c dng hm dc tuyn tnh:

Gc ra c dng:
d sai lch gc:
42
Hnh 1.30. Cu trc iu chnh b sai s gi tr t
Hnh1.31. Cu trc iu chnh b nhiu
43
Hnh1.32. Cu trc iu chnh b ngc
Hnh 1.33. Cu trc iu chnh b xui bng phng php m hnh

chun
44
Hnh1.34. Cc giai on ca mt qu trnh chuyn ng
Hnh 1.35. Cu trc iu khin tng qut ca mt nhnh truyn ng
45
Hnh 1.36.Cc lut thng dng nhm iu khin chnh xc chuyn ng
46
1.3.2. Thit k v m phng h thng bng my tnh.
Hnh 1.37. Trnh t thit k v m phng h thng bng my tnh

Hnh trn gii thiu v d khi s dng mi trng thit k trn nn MATLAB &
47
Simulink vi phn cng c vi x l tn hiu (Digital Signal Processor: DSP) ca

tp on Texas Instruments. S ch ra r rng: kt hp vi MATLAB v cc
Toolbox, ta c th tin hnh cc bc:
Bc 1: Xc nh hm truyn ca i tng, thit k b iu chnh bng l thuyt.
Bc 2: M phng Offline bc u xc nh tham s ca thut ton C.
Bc 3: B xung thm cc khi xut/nhp d liu (v d:cc khi ADC hoc
DAC) vo s cu trc vng C.
Bc 4: S dng C-compiler to m C np xung card hardware, ci xen vi
h thng phn mm iu khin theo ngt.
Xu hng pht trin ca ngnh t ng ho l ngi ta tn dng trit
nhng thnh tu khoa hc k thut mi nht. Trong c k thut iu khin s,
do c nhiu u im hn hn k thut tng t v c kh nng linh hot cao nn
iu khin s c ng dng ngy cng nhiu, c bit l trong iu khin
chuyn ng.
-
ng dng k thut iu khin s trong cc h iu khin chuyn ng mang

li nhiu tnh nng vt tri so vi k thut iu khin chuyn ng truyn
thng nh: linh hot trong vic thay i thng s b iu chnh khi yu cu
cng ngh thay i, thay i cc phng php iu khin tin tin; tng kh
nng chng nhiu. Tuy nhin thc hin mt b iu chnh s li mt nhiu
thi gian v gp nhiu kh khn.
ng dng k thut iu khin s vo cc h iu khin chuyn ng, hin

nay ch yu ngi ta s dng cc h vi x l tn hiu s (DSP), cc my tnh
s.
Trong cng nghip cc h iu khin chuyn ng s ng dng cc my tnh,

cc Card iu khin chuyn dng c tch hp h vi x l tn hiu s(DSP).
Trong nghin cu, c bit trong cc trng i hc k thut vic nghin cu

cc h iu khin s thng c thc hin trn cc Card iu khin s a
nng nh: DS 1102, DS 1104, DS 1103, DS 1105
48
CHNG 2. GII THIU CARD DSP DS1104

2.1. Gii thiu chung
thc hin c cc thut ton phc tp trong cc h thng sn xut hin
i, linh hot, cc nh sn xut phi t ng ho qu trnh thit k, rt ngn thi
gian th nghim, nhanh chng a thit b vo sn xut v m bo ti u cht
lng sn phm. iu ny ch c c vi s tr gip ca my tnh, qua cc bc
sau:
- Trong giai on phn tch: M phng thng c s dng phn tch i
tng, phc v cho vic thit k h thng. Cho php gim chi ph trong qu trnh
nghin cu khi chun b cho mt sn phm mi.
c im ca m phng l my tnh cn c thi gian cn thit tnh ton
tin trnh ca h thng. Vi m hnh n gin, kt qu tnh ton nhanh v m hnh
m phng phn nh c c im ng hc ca i tng. Tuy nhin, vi m hnh
phc tp th vic tnh ton mt nhiu thi gian hn.
- Sau khi qua giai on phn tch: Kim tra b iu chnh thit k tm ra
thng s ti u trc khi em i sn xut mch cng. V vy, cn phi ni i
tng thc vi b iu chnh c m phng bng thi gian thc.
c im chnh ca m phng thi gian thc l qu trnh m phng phi din
ra nhanh nh h thng thc ang chy, do n cho php ta kt hp m phng v
i tng thc.
- Khi b iu khin c m phng: c th iu khin c i tng
thc, ta bt u sn xut b iu chnh thc. Bc th nghim cui cng, ta ni b
iu chnh thc vi m hnh ca i tng (c m phng bng thi gian thc)
m bo chc chn rng b iu chnh khng cn li c th dn n ph hng i
tng thc, k thut ny c gi l m phng c phn cng trong mch vng.
Trong c hai cng on trn th m phng thi gian thc l rt cn thit. Tc
tnh ton yu cu cho m phng thi gian thc ph thuc vo c im ca m
49
hnh c m phng. Vi nhng m hnh phc tp, s lng php tnh ln th thi
gian m phng l vn cn c quan tm.
Hnh 2.1- Card DS1104

DS1104 l Card iu khin s do hng dSPACE ca c sn xut da trn b
x l tn hiu s DSP (Digital Signal Processor) du phy ng (floating-point) th
h th ba, h TMS320Cxx ca hng Texas Instruments (M). DS1104 c thit k
c bit pht trin cc b iu khin s a bin tc cao v m phng thi gian
thc. N thng c dng trong cc lnh vc sau:
- Robot.
- Cc c cu chp hnh bng in v thu lc.
- iu khin servo cc truyn ng a (disk drive).
- iu khin truyn ng in.
- iu khin cc phng tin c gii.
- iu khin trn ng tch cc.
- Trong cc my CNC,
v n cng rt thch hp cho cc tc v c lin quan n x l tn hiu s ni
chung.
Ht nhn ca DS1104 l b x l tn hiu s du phy ng (floating-point)
th h th ba TMS320F240 ca hng Texas Instruments. B x l tn hiu s c
50
b sung thm mt lot thit b ngoi vi thng c s dng trong cc h thng

iu khin s. Cc b bin i tng t-s v s-tng t, mt b x l tn hiu s
da trn cc h con vo ra s v cc giao din cm bin so lch (incremental sensor)
lm cho DS1104 tr thnh mt gii php bo mch n l tng cho mt di rng
cc bi ton iu khin s.
DS1104 l Card c thit k theo chun PC/AT, do n c th cm vo
my tnh qua cng m rng ISA. N cng c th gn vo hp m rng dSPACE
giao tip vi my tnh. Hnh 2.1 l hnh dng bn ngoi ca DS1104.
2.2. Cu trc phn cng ca DS1104
2.2.1. Cu trc tng quan
DS1104 c xy dng trn c s vi x l tn hiu s TMS320F240 ca hng
Texas Instruments.
ON-CHIP MEMORY (WORDS)
RAM
FLASH
Ngun nui
EEPROM
(V)
DATA
DATA/PROG
PROG
288
256
16K
Chu k (ns)
S chn
20
PQ 132P
Bng 2.1. Dung lng cc b nh ca DS1104

Ngoi ra, n cn c h con ngoi vi khc phc v cho cc ng dng x l tn
hiu s, giao tip vi my tnh v bn ngoi,
B x l chnh:
MPC8240, PowerPC 603e core, 250 MHz

32 kByte internal cache
Timer:
Mt b Timer c lng ly mu, b m li 32 bit

Bn b Timer a mc ch, 32 bit
phn di 64 bit o thi gian
51
B nh:
32 Mbyte RAM DRAM (SDRAM)

8 Mbyte b nh Flash cho cc ng dng
Cc ngt iu khin:
Cc ngt bi timer, giao tip ni tip, DSP t, incremental encoder, ADC,

PC ch, 4 u vo t bn ngoi.
Ngt ng b PWM
u vo tng t:
4 knh ADC, 16 bit, a thnh phn

Di in p u vo 10V
Thi gian ly mu 2us
H s tn hiu/ nhiu >80 dB
4 knh ADC , 12 bit
Di in p 10V
Thi gian ly mu 800ns
H s tn hiu/ nhiu >65 dB
u ra tng t:
8 knh DAC, 16 bit, thi gian n nh max 10us

Di in p ra 10V
Incremental Encoder:
2 u vo s, TTL hoc RS422

Knh encoder c phn di 24 bit
Tn s xung max u vo l 1.65MHz. gp 4 ln xung m ti 6.6MHz
Ngun sensor 5V/0.5A
Vo/ra s:
Vo/ra s 20 bit
Dng ra 5mA
52
Giao tip:
RS232, RS485 v RS422

H con DSP t:
Texas Instruments DSP TMS320F240

4 kWord of dual-port RAM
3 pha u ra PWM, 4 u ra n PWM
14 bit vo/ra s
c im vt l:
Ngun nui 5 V, 2.5 A / -12 V, 0.2 A /12 V, 0.3 A

Yu cu cn c khe PCI 32 bit
Hnh 2.2. S khi ca DS1104
2.2.2. Ghp ni vi my ch (Host Interface):

DS1104 ghp ni vi my ch qua mt khi gm 4 cng vo/ra (I/O port) 16bit v 3 cng vo/ra 8-bit. Giao din vo/ra c s dng thc hin vic ci t
53
cho bo mch, ti chng trnh xung v truyn d liu thi gian thc. Vic ci t
b iu khin bus kim tra v truyn d liu cng c thc hin vi giao din
vo/ra.
ng b ho s thc thi ca DSP v cc chng trnh ca my ch DS1104
s dng mt cng ngt hai chiu cho php my ch c th ngt DSP v ngc
li.
Giao din vo/ra gia my ch v DS1104 bao gm mt khi vi 7 cng
vo/ra lin tip. chn cc a ch c s ca khi ny trong di a ch vo ra 64K
ca PC/AT (my ch), DS1104 s dng cc chuyn mch DIP (Dual In-line
Package v hai hng chn) gn trn bo mch.
Giao din vi my ch ca DS1104 cha nhng thanh ghi c di khc nhau
(8 hoc 16 bit). Khi truy cp vo mt thanh ghi c th th phi s dng lnh vo/ra
tng ng, chng hn nh mun truy cp vo thanh ghi 8-bit th phi s dng lnh
vo/ra 8-bit, cn mun truy cp vo thanh ghi 16-bit th phi dng lnh vo/ ra 16
bit. Nu s dng cc lnh vo/ra 8-bit cho mt thanh ghi rng 16-bit th kt qu s
b li. Nu s dng ngn ng cp cao lp trnh cho cc thanh ghi giao din vi
my ch th cn phi m bo rng chng trnh dch Compiler to ra cc dng lnh
chnh xc.
Mt s thanh ghi giao din vi my ch phi c truy cp theo mt th t
c bit. ghi hoc c b nh ca DSP th mt trnh t c bit l bt buc.
a. Thanh ghi d liu (Data Register): a ch Offset: 00H v 02H
Thanh ghi d liu l mt thanh ghi c/ghi rng 32 bit c s dng truy
cp vo cc b nh off-chip (bn ngoi chip) ca DSP. Cc hot ng ghi v c
trn thanh ghi d liu lun c thc hin ti v tr b nh hin ang c chn bi
cc thanh ghi a ch LAR (Lower Address Register) v UAR (Upper Address
Register). V my ch ti mt thi im ch c th truy cp 16 bit nn thanh ghi d
liu 32-bit c chia thnh hai thanh ghi 16-bit: thanh ghi d liu thp hn LDR
(Lower Data Register) v thanh ghi d liu cao hn UDR (Upper Data Register).
chuyn mt t d liu 32-bit gia b nh ca my ch v ca DSP cn c hai
54
php ghi hoc c lin tip. u tin, 16 bit thp hn c truy cp bng cch s
dng LDR. Sau , 16 bit cao hn c truy cp thng qua UDR. Mch chuyn i
rng bus trn bo mch (on-board) lu tr tm thi gi tr 32-bit v thc hin ch
mt truy cp 32-bit n vo b nh ca DSP. mch chuyn i rng bus hot
ng chnh xc th th t truy cp LDR-UDR nh c m t trn l bt buc.
Ni dung ca cc thanh ghi LAR v UAR phi khng i trong mt truy cp 32-bit.
V cc thit b ngoi vi trn bo mch ca DS1104 c sp xp trong b nh
ca DSP nn thanh ghi d liu cng c th dng truy cp vo cc thit b ny.
Thanh ghi d liu c th c truy cp thm ch c khi DSP dang chy cho php
chuyn d liu chy thc gia my ch v DSP.
b. Thanh ghi a ch (Address Register): a ch Offset: 04H v 06H
Thanh ghi a ch l mt thanh ghi ghi/c c rng 19-bit c s dng
chn v tr ca b nh chng trnh ca DSP. V tr b nh m thanh ghi a ch
ang tr ti c th c ghi v c thng qua thanh ghi d liu. Thanh ghi a ch
c xy dng bng hai thanh ghi, thanh ghi 16-bit cha 16 bit a ch thp
A0A15 (LAR) v mt thanh ghi 3-bit cha cc bit a ch cao A16A18 (UAR).
Thanh ghi a ch c mt ch t ng tng/gim cho php chuyn khi gia b
nh ca my ch v ca DSP. Mun cho php ch ny th bit AUTOEN trong
thanh ghi ci t (Setup Register) phi c t ln 1. Sau bit UPDOWN s
chn chiu m. Nu ch t ng tng/gim c cho php th ni dung ca
thanh ghi a ch s c t ng tng/gim sau khi hon tt mt php ghi hoc c
thanh ghi d liu 32-bit. iu ny cho php truy cp lin tip cc khi ca b nh
DSP m khng cn thay i thanh ghi a ch cho mi ln chuyn.
truy cp thanh ghi a ch thp LAR cn c mt ch lnh vo/ra my ch
16-bit, cn truy cp vo thanh ghi a ch cao UAR cn phi s dng mt ch
lnh vo/ra my ch 8-bit. truy cp ln sau vo cng mt v tr b nh thanh ghi
a ch ch cn c ghi mt ln. Ch t ng tng/gim phi c loi b
(disable) cho nhng ng dng kiu ny. Nm bit cao ca UAR khng xc nh khi
c v c gi tr 0 khi ghi.
55
c. Thanh ghi trng thi (Status Register): a ch Offset: 07H

Thanh ghi trng thi (STS) l mt thanh ghi ch c 8-bit cung cp thng tin
v trng thi ca DS1104. N cho php my ch c nhiu ng iu khin ca
DSP, b iu khin kim tra bus (TBC - Test Bus Controller) v mt phn ca
thanh ghi ci t.
UPDOWN AUTOEN DSPRDY14 TBCRDY TBCRST RSTDSP TBCINT RESET14
STS:
Bit
Chc nng
Tn
0 RESET14
1 TBCINT
2 RSTDSP
3 TBCRST
4 TBCRDY
Trng thi ti lp (reset) Slave-DSP. RESET14=1 biu th SlaveDSP b thit lp li, RESET14=0 biu th Slave-DSP ang chy.
Trng thi ngt TBC. TBCINT=1, mt ngt TBC ti my ch hot
ng. TBCINT=0, my ch hon tt dch v ngt.
Trng thi ti lp TMS320C31. RSTDSP=1, DSP c reset.
RSTDSP=0, DSP ang chy.
ng reset TBC. TBCRST=1, TBC c reset. TBCRST=0,
TBC ang chy.
ng sn sng ca TBC. TBCRST=0 khi TBC ang thc thi mt
lnh. TBCRST=1 khi TBC kt thc mt lnh.
C sn sng truyn thng Slave-DSP. DSPRDY14=1, Slave-DSP
5 DSPRDY14 kt thc vic thi hnh lnh. DSPRDY14=0, TMS320C31 ghi

mt lnh v Slave-DSP cha kt thc vic thi hnh lnh
6 AUTOEN
7 UPDOWN
AUTOEN =1, Cho php ch t ng tng/gim. AUTOEN =0,

loi b ch t ng tng/gim.
Chn ch tng/gim. Ch tng nu UPDOWN=1. Ch
gim nu UPDOWN=0.
Bng 2.2. M t thanh ghi trng thi
d. Thanh ghi ci t (Setup Register): a ch Offset: 07H

56
Thanh ghi ci t (STP) l mt thanh ghi ch ghi 8-bit dng iu khin rt

nhiu ch hot ng v trng thi ca cc tn hiu iu khin ca DS1104, chng
hn trng thi khi ng li ca DSP, Slave-DSP, TBC, cc yu cu ngt t my
ch ti DSP v ch t ng tng/ gim ca thanh ghi a ch.
UPDOWN AUTOEN IRQEOI IRQDSP TBCRST RSTDSP RSTDAC RESET14
STP:
Bit
Chc nng
Tn
Trng thi reset Slave-DSP. Ghi 1 reset Slave-DSP. Ghi 0 s

0 RESET14
khi ng li (restart) Slave-DSP. RESET14 phi gi mc logic

cao t nht 2ms. Khi khi ng Slave-DSP b reset.
Reset DAC. Ghi 1 s t DAC trong ch reset. in p ra c
t xung 0 v thanh ghi ch DA c t ch khuch i
ng nht mt cc. Ghi 0 s ngt ng reset DAC. Khi khi ng
1 RSTDAC
RSTDAC=1.
Lu rng thanh ghi ch DA phi c t ch khuch i
ng nht v hai cc sau khi RSTDAC c p dng
Reset TMS320C31. Ghi 1 reset DSP. Ghi 0 s ngt ng reset
2 RSTDSP
v cho php DSP bt u thc thi chng trnh. Khi khi ng,
TMS320C31 b reset.
3 TBCRST
4 IRQDSP
5 IRQEOI
6 AUTOEN
Reset TBC. Ghi 1 s reset TBC. Ghi 0 s khi ng li TBC. Khi

khi ng TBCRST =1
Yu cu ngt ca my ch ti DSP. Ghi 1 s yu cu mt ngt DSP
trn ng DSPINT3. Ghi 0 s khng tc ng g.
Kt thc ca ngt my ch.
Cho php ch t ng tng/gim thanh ghi a ch.
AUTOEN=1, Cho php ch t ng tng/gim. AUTOEN =0,
ch
tng/gim.
t ng tng/gim.
AUTOEN=1
7 UPDOWN loi
Chnbch
Ch Khi
tngkhi
nung
UPDOWN=1.
Ch
57
gim nu UPDOWN=0. Khi khi ng UPDOWN=1

Bng 2.3. M t thanh ghi ci t
e. Thanh ghi d liu TBC: a ch Offset: 08H
Thanh ghi d liu TBC (TBCDR) l mt thanh ghi ghi/c 16-bit dng truy
cp vo TBC trn bo mch. TBC c 24 thanh ghi a ch 16-bit, cc thanh ghi ny
c th c chn thng qua thanh ghi a ch TBC (TBCAR). truy cp vo mt
thanh ghi bt k, u tin a ch thanh ghi phi c t bng cch ghi vo thanh
ghi a ch TBC, sau php ghi hoc c c thc hin bng cch s dng thanh
ghi d liu TBC.
f. Thanh ghi a ch TBC: a ch Offset: 0AH
Thanh ghi a ch TBC (TBCAR) l mt thanh ghi ghi/c 8-bit gm 5 ng
a ch TBC A0A4. Trc khi c hoc ghi mt thanh ghi TBC, TBCAR phi
c t ti mt a ch thanh ghi tng ng. Sau khi thit lp TBCAR, d liu c
th c chuyn s dng TBCDR. Lu khi ghi th 3 bit cao ca TBCAR nn t
bng 0.
g. Cng ngt DSP ti my ch:
DS1104 c mt cng ngt hai chiu cho php DSP yu cu ngt my ch v
ngc li. Cng ngt DSP ti my ch bao gm hai bit iu khin (ATREQ v
IRQAT) trong thanh ghi IOCTL v bit IRQEOI trong thanh ghi STP.
yu cu mt ngt DSP ti my ch th DSP phi t bit ATREQ. iu ny
to ra mt yu cu ngt trn ng ngt my ch c chn bi chn chn ngt.
Sau khi hon thnh dch v ngt, my ch s t bit IRQEOI trong thanh ghi STP.
C IRQAT trong thanh ghi IOCTL biu din trng thi ca ng ngt my ch,
cho php DSP nhn ra khi my ch kt thc phc v ngt.
yu cu mt ngt my ch ti DSP, my ch phi t bit IRQDSP trong
thanh ghi ci t STP. iu ny s t c IRQDSP trong thanh ghi IOCTL v to ra
mt ngt INT3 ti DSP. Nu INT3 c cho php trong thanh ghi cho php ngt
(IE) ca TMS320F240 v bit cho php ngt ton cc (GIE) c t ln 1 trong
58
thanh ghi trng thi ca DSP, mt li gi ngt ti a ch 000004H c thc hin.

Sau khi ngt my ch ti DSP c phc v, DSP phi thng bo cho my ch bit
phc v ngt hon tt. iu ny c thc hin bng cch ghi vo bit DSPEOI3
trong thanh ghi IOCTL, c DSPINT3 v ng ngt INT3 s b reset. Sau c
ngt trong thanh ghi c ngt ca DSP phi c xo.
2.2.3. Cc thnh phn ch yu ca DS1104
2.2.3.1. B x l tn hiu s DSP TMS320F240:
B x l tn hiu s DSP TMS320F240
TMS320F240 (F240) l mt thnh vin ca h b iu khin DSP da trn nn tng
b x l tn hiu s 16 bit TMS320C2xx. H vi x l ny c ti u ho cho
cc ng dng iu khin s ng c v chuyn ng. Cc b iu khin s DSP
phi hp TMS320 c tng cng li CPU C2xLP khi thit k vi chi phi thp, c
nhiu kh nng x l hiu xut cao v mt s im ni tri trong ti u ho ngoi vi
cho cc ng dng iu khin ng c v chuyn ng. Ngoi vi bao gm module
qun l s kin to ra cc Timer a mc ch v b ghi so snh to ra 12 u
ra PWM, v cc b bin i tng t - s kp 10 Bit (ADC).
Mt s c trng quan trng ca TMS320F240:
- Hiu sut cao vi ng dng cng ngh CMOS
+Tng thch vi h TMS320C2xx
- Li l h CPU T320C2xLP
+ M ngun tng thch vi TMS320C25
+ C th nng cp tng thch vi TMS320C5x
+ Tch hp trong v Plastic 132 chn
+ Thi gian thc hin lnh 50ns
- Thch hp vi nhit trong cng nghip v cc phng tin chuyn ng
- B nh
+ 544 Words 16 Bits of On-Chip Data/Program Dual-Access RAM
59
+ 16K Words 16 Bits of On-Chip Program ROM (C240)/Flash EEPROM

(F240)
+ 224K Words 16 Bits of Total Memory Address Reach (64K Data, 64K Program
and 64K I/O, and 32K Global Memory Space)
- Module qun l cc s kin
+ 12 knh so snh v iu ch rng xung PWM
+ 3 b Timer a mc ch 16 bit vi 6 ch , bao gm c ch m tin li
+ 3 b so snh 16 bit vi vng cht
+ 3 b so snh n 16 bit
+ 4 b thu thp d liu
Hnh 2.3. Vi x l tn hiu s DSP TMS320F240

60
- Module kp bin i 10-Bit Analog-to-Digital

- 28 chn vo/ra c th lp trnh n v a nng
- Phase-Locked-Loop (PLL)-Based Clock Module
- Watchdog Timer Module (With Real-Time Interrupt)
- Module giao thc truyn thng ni tip (SCI)
- Module giao thc ngoi vi ni tip (SPI)
- 6 ngt m rng (Power Drive Protect, Reset, NMI, and Three Maskable Interrupts)
- 4 ch hot ng tt km nng lng
- c lng vng qut c bn
- Pht trin cc cng c sn c
+Texas Instruments (TI) ANSI C Compiler, Assembler/Linker, and C-Source
Debugger
+ Scan-Based Self-Emulation (XDS510)
+ h tr pht trin iu khin m, hng iu khin s ng c th 3
Trn y ch gii thiu mt s c trng cn thit c bn ca TMS320F240
gip hiu kin trc v hot ng ca DS1104. DS1104 s dng tnh nng qun l
bus ca TMS320F240 gip my ch c th truy cp vo tt c cc b nh off -chip,
cho php cc hot ng download nhanh m khng yu cu mt chng trnh gim
st chy trn DSP.
DS1104 cn bao gm mt giao din ni tip tc cao c th c s dng
cho truyn thng gia mt vi bo mch x l tn hiu s nhm hnh thnh h thng
nhiu b x l (multi-processor).
TMS320F240 h tr cc ngt mm c th lp trnh c mm do v cc ngt
ngoi thng c ng dng trong cc ng dng iu khin truyn ng thi gian
thc. TMS320F240 c 3 loi ngt chnh: Reset, ngt cng, ngt mm.
Ngoi ra cn cung cp mt ng tn hiu thng bo v trng thi sn sng
ca bus, c s dng lm cho TMS320F240 thch ng v thi gian vi cc thit
b ngoi vi khc nhau trn bo mch. Thanh ghi iu khin bus ca TMS320F240
c lp trnh s dng tn hiu sn sng t bn ngoi.
61
a. Cc ngt ngoi ca DSP:

Tn cc ngt
Th t u tin
RESET
TI RESERVED
NMI
INT1
INT2
INT3
INT4
INT5
INT6
TI RESERVED
10
Bng 2.4. Cc ngt cng ca DSP

Cc ngt c iu khin bi module h thng v b qun l s kin
Ngoi vi
ng ngt
INT1
System Module
INT5
NMI
INT6
INT2
Event Manager
INT3
INT4
Bng 2.5. Qun l cc ngt cng

b. Bn b nh ca DSP TMS320F240:
DSP TMS320F240 c b sung thm 3 khng gian a ch ring bit cho
vng nh chng trnh, vng nh d liu v cc cng vo/ra. Mi mt khng gian
62
c tng s 64K 16Bit Word. Trong khong 64K Word ca khng gian d liu, t
256 n 32K word phn nh ca vng nh c th c xc nh m rng b
nh chung, khi c ch nh bi vng nh a phng (GREG). Vic truy cp vo
vng nh chung c iu khin bi tn hiu o BR.
B ghi bn b nh
v d tr
Cc ngt ngoi
Cc ngt
(On-Chip)
Dng cho bn
ngoi
On-Chip ROM
(Flash EEPROM)
(8 x 2K Segments)
On-Chip
DARAM B2
Dng cho bn ngoi
D tr
On-Chip DARAM B0
(CNF = 1)
hoc Bn ngoi (CNF
= 0)
On-Chip DARAM B0
(CNF = 1)
hoc Bn ngoi (CNF
= 0)
D tr
D tr
On-Chip DARAM B0
(CNF = 0)
hoc
D tr (CNF = 1)
On-Chip DARAM B1
D tr
Cm
B ghi bn b nh
ngoi vi (h thng,
WD,
ADC, SPI, SCI,
cc ngt, I/O)
Dng cho bn ngoi
B ghi bn b nh
ngoi vi
(Qun l s kin)
D tr
Ghi ch iu khin
Flash
D tr
D tr
Cm
iu khin b ghi khi
ch i c to ra
Dng cho bn ngoi
Hnh 2.4.Bn b nh ca DSP
63
D tr
B ghi mt n v ngt
B ghi ton b vng nh a phng
B ghi bn b nh v d tr
B ghi cc c ngt
B ghi cc c ngt
On-Chip DARAM B2
D tr
Cm
B ghi cu trc h thng v iu khin
On-Chip DARAM
B0 (CNF = 0)
D tr (CNF = 1)
Watchdog Timer v b ghi iu khin PLL
On-Chip
DARAM B1
ADC
SPI
SCI
Cm
D tr
B ghi cc ngt ngoi

Cm
Cm
B ghi cc u iu khin vo/ra s

Peripheral Frame 1
Cm
Peripheral Frame 2
B ghi Timer a mc ch
D tr
Cm
D tr
B ghi so snh, PWM v vng cht
M rng
(Dng cho bn ngoi)
D tr
B ghi Capture & QEP
D tr
B ghi mt n che ngt, vector v c
D tr
Hnh 2.5.Bn b nh ngoi vi ca DSP TMS320F240

c. B nh:
B x l tn hiu s TMS320F240 cung cp hai ch hot ng khc nhau:
ch vi x l v ch my vi tnh. Ch my vi tnh ti thiu ho cc yu cu
phn cng bn ngoi trong cc ng dng cui cng. Tuy nhin, trong khi pht trin
64
chng trnh, ch vi x l li ph hp hn. Trong ch ny, tt c cc tm np

(fetch) lnh u c thc hin t b nh ngoi, thng l RAM trong cc h thng
pht trin DS1104 s dng ch vi x l ca TMS320F240 c c s iu
khin b nh y bi my ch. Cc chng trnh ca ngi s dng c th c
ti xung (download), gim st, hoc thay i ti bt k thi im no ngay c khi
DSP ang chy. B nh ca DS1104 nhanh cho php hot ng vi trng thi
i bng khng tc ng h gii hn l 60 MHz.
d. Giao din ni tip:
TMS320F240 bao gm mt cng ni tip cung cp truyn thng trc tip vi
cc thit b khc nhau nh cc b bin i s-tng t ADC ni tip hoc cc DSP
khc. Hot ng ca cng ni tip c iu khin bi nhiu bit ch , cc thanh
ghi ca TMS320F240 v c th c lp trnh cho chiu di d liu t 8-32 bit
trong rt nhiu ch hot ng ng b v khng ng b. Tc truyn v nhn
d liu c quyt nh bi mt my pht xung ng h c th lp trnh c bn
trong hoc mt ngun xung ng h bn ngoi.
2.2.3.2. H con AD (Analog to Digital):
DS1104 c hai loi ADC Analog to Digital Converter B chuyn i tng
t/s):
- Hai b chuyn i tng t - s ADC 16-bit c tn s ly mu l 256 KHz.
- Hai b chuyn i tng t - s ADC 12 bit c tn s ly mu l 800 KHz.
in p u vo l 10V, tt c cc ng tr v u phi ni t. trnh
cc vng lp t (ground loops) nn s dng cc ng tr v ring bit cho tt c
cc cm bin v im t ca cc cm bin nn c cch ly vi nhau.
S chuyn i bt u bng cch t cc bit t STROBE AD1 ti STROBE
AD4 trong thanh ghi IOCTL. Trng thi u ra ca cc ADC c th gim st c
bng cch c cc bit t BUSY AD1 ti IOCTL BUSY AD4 ca thanh ghi IOCTL.
iu ny cho php DSP c th theo di c s chuyn i dng v c d liu
65
ADC sau khi qu trnh chuyn i kt thc. Hnh 2.6 biu din s khi ca h
con AD.
Hnh 2.6. S khi ca h con AD

Trong cc a ch ca cc thanh ghi d liu ADC c cho trong bng 2.2
a ch
Thanh ghi
023000H
Knh 1: Thanh ghi d liu ADC 16-bit
023001H
Knh 2: Thanh ghi d liu ADC 16 bit
023002H
023003H
Bng 2.6. Cc a ch thanh ghi ca h con AD

a. ADC 16-bit
DS1104 gm hai ADC 16-bit c tch hp mch ly mu v gi chm. Mi
ADC c mt b bin i tng t /s AD kiu xp x lin tip SAR v mt mch
ly mu/gi chm. Thi gian bin i ca mi b bin i t 4s.
u ra ca cc ADC c cn l bn tri ca t DSP 32-bit (hnh 2.7) v c
th c c bng cch s dng cc thanh ghi d liu ADC tng ng.
66

b. ADC 12-bit
DS1104 gm hai ADC 12-bit c tch hp mch ly mu/gi chm. Mi ADC
c mt b bin i tng t /s AD kiu xp x lin tip SAR vi mt mch ly
mu/gi chm v c iu khin s bi cc n v hiu chnh offset (lch khng).
Thi gian bin i ca mi b bin i t 1,25s.
u ra ca cc ADC c cn l bn tri ca t DSP 32-bit (hnh 2.8) v c
th c c bng cch s dng cc thanh ghi d liu ADC tng ng.

c. Hiu chnh lch khng (Offset Calibration)
Mch u vo ca ADC c c trng bi mt n v hiu chnh dng b
cc sai s lch khng. Mch ny c dng xo b cc sai s lch khng ca
mch tng t pha trc v cc mch ADC ch khng dng b cc lch khng
ca cm bin bn ngoi. n v hiu chnh bao gm mt thit b EEPROM
(Electrically Erasable Programmable Read-Only Memory) c ni vi mt DAC
(Digital to Analog Converter) nhm cung cp mt in p nh b vo in p vo
ca ADC. N c iu chnh khi ch to DS1104 v khng cn thay i trong iu
kin lm vic bnh thng.
d. Mch vo ca ADC
Hnh 2.9 biu din mch vo ca ADC:
2.2.3.3. H con DA
(Digital to Analog):
Hnh 2.9.
67 Mch u vo ca ADC
DS1104 gm mt DAC 12-bit, 4 knh vi phm vi in p u ra c th lp

trnh c. H con DA bao gm 4 thanh ghi d liu, 4 thanh ghi u ra, mt thanh
ghi ch v mt bit STROBE (STROBE DA)trn thanh ghi IOCTL.
Trong cc a ch ca cc thanh ghi d liu DAC c cho trong bng 2.3
Hnh 2.10. S khi ca h con DA

a ch
Thanh ghi
022000H
Knh 1: Thanh ghi d liu DAC
022001H
022002H
022003H
026000H
Thanh ghi chn ch
026001H
Thanh ghi chuyn ch
Bng 2.7. Cc a ch thanh ghi ca h con DA
68
S cn l ca thanh ghi d liu DAC trong t DSP 32-bit nh c biu din

trn hnh 2.11.
Hnh 2.11. nh dng d liu ca DAC 12-bit

Cc DAC c in p u ra mi knh l 10 V. Cc ng tr v ca cc u
ra c ni vi t h thng.
a. Hiu chnh khuch i v lch khng (Offset and gain Calibration)
Mch u vo ca ADC c trng bi mt n v hiu chnh khuch i v
lch khng. Mch ny c dng xo b cc sai s khuch i v lch khng ca
mch. n v hiu chnh bao gm mt thit b EEPROM (Electrically Erasable
Programmable Read-Only Memory) c ni vi mt DAC (Digital to Analog
Converter). N c iu chnh khi ch to DS1104 v khng cn thay i trong
iu kin lm vic bnh thng.
b. Thit lp ch DA
DS1104 bao gm mt cp thanh ghi ch iu khin di in p u ra
ca DAC. thay i ch ca DA, cn c hai hot ng ghi. Th nht l gi tr
ch ca DA phi c ghi vo hng u tin ca thanh ghi ch DA a ch
026000H, sau ghi vo a ch 026001H cp nht gi tr ch ca DA.
Hnh 2.12 biu din nh dng d liu ch DA.
Ch
Hnh 2.12. nh dng d liu ch DA

Bit
Name
24
M4
27
M1
28
G4
Chc nng
Ch DA. Ghi 1 cho hot ng hai chiu, ghi 0 cho
hot ng mt chiu
Khuch i DA. Ghi 1 cho h s khuch i = 2, ghi 0
69
31
G1
cho h s khuch i =1
Bng 2.8. M t thanh ghi ch DA

c. Mch u ra ca DA
Mch in u ra ca DAC c biu din trn hnh 2.13
2.2.3.4. H con Vo/Ra s
(Digital I/O):
H con vo/ra s ca
DS1104 hot ng da trn vi
iu khin x l tn hiu s
Hnh 2.13. Mch u ra ca DAC

25MHz TMS320P14 ca hng Texas Instruments. Bn cnh phn li DSP 16-bit c
nh, n cn bao gm mt cng vo/ra song song c th chn tng bit, 4 b nh
thi gian (timer), 6 mch iu ch rng xung PWM (Pulse Width Modulation) c
phn gii 40 ns, 4 u vo trc tip v mt mch vo/ra ni tip. P14 c sn
chng trnh phn mm c s trong PROM cho php TMS320F240 c th truy cp
vo tt c cc thit b ngoi vi trn chip. Sau khi khi ng DSP thc thi chng
trnh c s (firmware) phc v vo/ra thng tr trong PROM. Chng trnh
PROM ny s c m rng bi mt chng trnh bn ngoi c np vo
RAM cung cp tnh nng ti (download) chng trnh, cho php cc chng trnh
ng dng c th ca DSP c thc hin song song vi TMS320F240. Tnh nng
ny cho php tu chnh (customize) h con vo/ra s (Digital I/O) theo cc yu cu
ca ng dng.
Truyn thng gia hai b vi iu khin x l tn hiu s DSP v TMS320F240
c thc hin qua mt cng truyn thng rng 32-bit hoc qua cng truyn thng
m rng FIFO (First In First Out) c rng 32 bit. Cng truyn thng 32-bit cho
php c/ghi b nh chng trnh ca DSP ph (Slave-DSP), b nh d liu v cc
thit b ngoi vi trn chip bng cc lnh n gin. FIFO c th c s dng mt
cch lun phin cho cc ng dng s dng cc tp hp d liu nh pht tn s, o
70
tn s, cp nht PWM ng b v truyn thng ni tip. Tuy nhin, FIFO khng

c h tr bi chng trnh c s trn PROM.
a. Cng vo/ra c th chn tng bit (bit-selectable I/O port)
TMS320P14 kt hp vi mt cng vo/ra song song 16-bit, cng ny bao gm
16 chn vo/ra c th chn tng bit mt cch ring l. Cng vo/ra ny c iu
khin bi 4 thanh ghi 16-bit c lit k trong bng 2.5 di y. Tt c 16 chn
vo/ra c th truy cp qua u ni (P10). Mi ng c c trng bi mt in
tr treo cao 10K ni vi ngun 5V.
Tt c a ch ca cc thanh ghi, a ch ca cng l s hng (hoc dy) theo
sau l s cng v c phn tch bi mt du :. V d, a ch 3:0 biu th s cng
0 ca hng th 3. Tt c cc a ch u c cho di dng m hexa.
Thanh ghi
a ch
IOP
0:0
M t
Thanh ghi cng vo/ra. Lu gi d liu u ra cho cc chn
vo/ra v c nh cu hnh nh l u ra
Thanh ghi hng d liu. DDR = 1 nh cu hnh cho chn
DDR
0:1
vo/ra tng ng l u ra. DDR = 0 nh cu hnh cho

chn vo/ra tng ng l u vo
Thanh ghi thit lp bit. Cho php thit lp cc bit IOP ring
BSET
0:2
l m khng lm nh hng n cc bit khc. BSET = 1 t

bit IOP tng ng. BSET = 0 khng thay i bit IOP tng
ng.
Thanh ghi xo bit. Cho php xo cc bit IOP ring l m
BCLR
0:3
khng lm nh hng n cc bit khc. BCLR = 1 xa bit

IOP tng ng. BSET = 0 nguyn khng thay i bit
IOP tng ng.
Bng 2.9. Thanh ghi cng vo/ra
b. B nh thi gian (Timer)
71
TMS320P14 c trang b 4 timer c lp, trong c mt timer gim st, hai

timer a mc ch v mt my pht tc bt (baud rate). Tt c cc timer u
cha cc thanh ghi b m (counter) 16-bit v cc thanh ghi theo chu k 16-bit.
Hn na, cc timer a mc ch c mt thanh ghi iu khin ch . Tt c cc
timer u c th to ra cc ngt bn trong ca TMS320P14.
c. B qun l s kin (Event manager)
TMS320P14 cha mt b qun l s kin bao gm mt h con so snh
Compare v h con Capture (bt gi). B qun l s kin s dng timer 1 hoc
timer 2 nh l cc ngun pht xung ng h (clock) v c 8 chn vo/ra c chia
s gia h con so snh v h con Capture.
H con so snh (Compare) gm c 6 thanh ghi so snh v 6 thanh ghi hnh
ng (action) iu khin cc chn u ra (output pin). Cc thanh ghi so snh lin tc
so snh cc gi tr ca chng vi cc thanh ghi b m ca timer 1 v timer 2. Nu
cc gi tr ny trng nhau, ni dung ca cc thanh ghi hnh ng s quyt nh hnh
ng no s xy ra cc chn ra. Cc thanh ghi hnh ng cn xc nh xem liu
cc ngt so snh ti CPU ca TMS320P14 c c to ra hay khng. Mt tnh nng
b sung ca h con so snh l ch hot ng PWM chnh xc cao, trong sn
c 6 u ra PWM.
H con Capture gm c 4 FIFO v 4 chn u vo. Khi pht hin mt xung
chn u vo, cc ni dung hin ti ca thanh ghi b m ca timer 1 hoc timer 2
c chuyn vo mt FIFO, v vy cung cp mt nhn thi gian cho s kin ny.
S kin ny cng c th ngt CPU ca TMS320P14.
d. Cng ni tip (Serial Port)
TMS320P14 cha mt cng ni tip kiu UART (Universal Asynchronous
Receiver/Transmitter Mch tch hp dng chuyn chui d liu song song
thnh chui d liu ni tip dng trong truyn thng khng ng b) h tr nhiu
giao thc truyn thng chun. N c tnh nng truyn d liu hai chiu y (fullduplex) vi tc truyn ti a l 400K bit/s. Mch m ca d liu thu/pht gp
hai ln cung cp thi gian truyn d liu thm ch trong sut qu trnh truyn d
72
liu hai chiu lin tc. Bn cnh nh dng d liu khng ng b chun, cng ni
tip cn h tr thm mt giao thc truyn thng 9-bit kiu 8051 ca Intel trong
bit th 9 biu th a ch hoc truyn d liu.
e. Cng truyn thng DSP (DSP communication Port)
Truyn thng gia TMS320F240 v DSP t (slave-DSP) c thc hin qua
mt thanh ghi truyn thng rng 32-bit (DSPC). Thanh ghi ny trao i d liu gia
TMS320F240 v Slave-DSP da trn giao thc lnh/d liu (command/data). 16-bit
cao ca thanh ghi DSPC cha cc lnh c thc hin bi Slave-DSP cn 16-bit
thp cha i s ca lnh hoc cha phn kt qu thc hin lnh. 16-bit cao ch
c ghi bi TMS320F240 v c c bi Slave-DSP nhng phn thp th c
ghi/c bi c DSP ch v DSP t. i vi TMS320F240 th DSPC l mt thanh
ghi 32-bit n, cn i vi TMS320P14 th DSPC l hai thanh ghi 16-bit, l
thanh ghi CCMD (Communication Command) v CDATA (Communication Data),
trong dy (bank) vo/ra bn ngoi ca TMS320P14.
f. Truyn thng m rng
FIFO c th c s dng cho chuyn giao khi gia TMS320F240 v DSP
t. FIFO s dng 5 a ch ca Slave-DSP cho truyn thng.
chuyn mt khi d liu t TMS320F240 ti Slave-DSP, trc tin ng
dng phi c thanh ghi CCMD ly lnh, sau c thanh ghi CDATA ly s
t d liu.
chuyn mt khi d liu t Slave-DSP ti TMS320F240, trc tin
TMS320F240 ghi mt lnh tng ng vo thanh ghi CCMD. ng dng SlaveDSP s c thanh ghi CCMD ly lnh. Sau , thc hin mt lnh c gi trn
thanh ghi CDATA xo cho ln chuyn tip theo.
2.2.3.5. H con b m ho so lch (Incremental encoder subsystem):
DS1104 cha hai giao din cm bin so lch h tr cc cm bin so lch
quang hc c s dng ph bin trong iu khin v tr. Mi giao din cha cc b
thu ng truyn (line-receiver) khc nhau cho cc tn hiu u vo, mt b lc
73
xung nhiu s (digital noise pulse filter) kh xung nhn trn cc ng ca

mi pha, mt b gii m (quadrature decoder) bin i thng tin v pha ca cm
bin thnh cc xung m tin hoc m li v mt b m 24-bit lu gi v tr
hin ti ca cm bin v mch cht u ra (output latch) 24-bit (hnh 2.14).
Hnh 2.14. S cu trc ca giao din encoder so lch

Tn s m ln nht l 8,3 MHz do rng ca trng thi encoder ti thiu l
120 ns. Cc xung nhiu ngn hn 80 ns b kh bi b lc nhiu Noise Filter.
u ra ngun in p 5V ca cm bin c ni vi ngun 5V ca my ch
thng qua mt cu ch li (multifuse). Nu mt u ra ca ngun b qu ti hay
ngn mch th cu ch li b t nng bi qu dng in v tng in tr ca n
mt cch t ngt. ti lp (reset) li trng thi in tr thp ca cu ch li cn
tt ngun trong vi pht cho cu ch li ngui.
- Kt ni encoder: Vi
mch ghp ni encoder so
lch (Incremental Encoder)
ca DS1104 c thit k
ni cc encoder vi cc tn
hiu u ra khc nhau tng
thch vi chun truyn thng
RS422. Cc u vo PHI0,
Hnh 2.15. Mch u vo ca encoder
74
PHI90, Index c mch u vo ging ht nhau.

Cc Encoder c cc u ra khng tng thch vi RS422 th c th ni ch
u vo mt u mt (single-ended) hoc c th
thm mch chuyn i RS422 vo gia encoder v
giao din ghp ni Incremental encoder ca
DS1104.
ni mt encoder vi cc u vo single-
Hnh 2.18. To ngun 1,5V t

ngun 5V
vo khng o Phi0, Phi90 v index. Cn cc u vo o ca Phi0, Phi90, Index
ended th cc tn hiu phi c ni vi cc u
phi c ni vi ngun in p 1,5 V (hnh 2-15).
2.2.3.6. Thanh ghi iu khin vo ra IOCTL (IO ConTroL):
a ch: 02000H
IOCTL l mt thanh ghi ghi/c 32-bit dng iu khin v truy vn cc
trng thi ca rt nhiu thit b ngoi vi trn bo mch DS1104. Trong cc php ghi,
thanh ghi IOCTL to ra im bt u ca cc xung nhn chuyn i cho h con AD,
cc xung nhn cp nht v reset cho h con DA, cc lnh m-cht (count-latch) v
reset cho giao din cm bin so lch. N a ra kt thc ca cc tn hiu ngt cho
ngt DSP bn ngoi v c th yu cu cc ngt DSP ti my ch. ng reset ca
Slave-DSP cng c iu khin bi thanh ghi IOCTL.
Cc trng thi kt thc ADC ca cc ng chuyn i c th c gim st
cng nh yu cu ngt DSP v my ch bng cch c thanh ghi IOCTL.
a. c thanh ghi IOCTL
IOCTL bao gm 13 c u vo, chng hn c kt thc chuyn i ca h con
AD, c ngt, c DSPRDY v cc c bo FIFO trng rng ca cng truyn thng h
con vo/ra s.
Hnh 2.16. nh dng ca thanh ghi IOCTL khi c

75
b. Ghi thanh ghi IOCTL

IOCTL bao gm 16 bit u ra, chng hn cc bit kt thc ngt, cc bit reset
thit b ngoi vi, bit yu cu ngt my ch.
Hnh 2.17. nh dng ca thanh ghi IOCTL khi ghi

2.2.3.7. S chn I/O Connector ca DS1104:
Bng 2.10. Tn cc chn ca DS1104 trn P1A
76
Bng 2.11. Tn cc chn ca DS1104 trn P1B
M t tn hiu ca I/O connector:

Chc nng
Tn
ADC 1-4
Cc u vo tng t ca h con AD.
DAC 1-4
Cc u ra tng t ca h con AD.
CAP 0-3
Cc u vo ca h con capture ca DSP t.
CMP 0-3
Cc u ra ca h con compare ca DSP t
IOP 1-15
Cc chn vo/ra ca cng vo/ra c th chn tng bit ca DSP t
Analog GND Ni t tng t. Ni vi mt h thng bn trong.

Digital GND
Ni t s. Ni vi mt h thng bn trong.
77
INTEXT
u vo ngt ngi s dng TMS320C31 INT0.
XF0,XF1
Cc chn vo/ra a mc ch ca TMS320C31.

Nhn d liu. u vo d liu ni tip tng thch RS232 ca Slave-
RCD
DSP .
Truyn d liu. u ra d liu ni tip tng thch RS232 ca Slave-
TXD
DSP .
WDTINT
u ra ca timer gim st Slave-DSP .
TCLK 1,2
Cc u vo xung ng h 1,2 ca Slave-DSP timer.
Phi0,/Phi0
Phi90,/Phi90
Index,/Index
Vsupply
Cc u vo vi phn tng thch RS422 cho s nhanh pha ca cm

bin so lch (incremental sensor).
Cc u vo vi phn tng thch RS422 cho s chm pha ca cm
bin so lch (incremental sensor).
Cc u vo vi phn tng thch RS422 cho xung chun (index
reference pulse) ca incremental sensor.
in p ngun cho cm bin so lch 5V/200mA. u ra c bo v
ngn mch bng cu ch.
Bng 2.12. Bng m t cc chn ca DS1104
2.3. Phn mm dSPACE

dSPACE l mt gi phn mm rt mnh c thit k cho cc m phng thi
gian thc tc cao.
C phn cng v phn mm dSPACE u rt d ci t v sn sng thc hin
nhng tc v t n gin n phc tp v a bin.
Phn mm dSPACE bao gm:
- Control Desk: l mt giao din ngi dng ho GUI qun l bo mch
dSPACE. N cung cp cc chc nng np, khi ng, kt thc cc ng dng thi
gian thc trn bo mch.
78
- Th vin thi gian thc RTIlib1104 bao gm tt c cc hm cn thit lp

trnh cho DS1104.
- TRACE: Cung cp cc kh nng theo di cho bt k ng dng vo chy trn
bo mch x l tn hiu s DS1104.
- COCKPIT: mt bng cc dng c cung cp cc u ra v s hiu chnh
tng tc ca cc bin.
2.3.1. Ci t dSPACE
Bo mch iu khin s DS1104 cn t nht mt b x l Pentium vi mt card
tng tc ho VGA, h iu hnh Windows 9x hoc Windows NT4.0, mt khe
cm m rng ISA cn trng vi mt connector 16-bit v 32 MB RAM tr ln.
Khi lp t DS1104 vo my ch, cn phi theo ng cc ch dn c cung
cp trong hng dn s dng (Manual).
1. Tt my tnh v ngt khi ngun in.
2. Tho v my.
3. Chn mt khe cm 16-bit cn trng. Tho b gi (ming tn) che khe h
pha ng sau v my.
4. Cm card DS1104 vo rnh cm v vn vt vo gi trn bo mch.
5. ng v my tr li, ni my tnh vi ngun in ri bt my. My tnh s
khi ng nh bnh thng.
6. Nu my khng khi ng, tt ngun in ngay lp tc v kim tra vic lp
t card.
7. Nu my tnh vn khng khi ng, c th c xung t a ch vo/ra vi
mt thit b khc. Hy c gng xc nh thit b xung t hoc th DS1104 vi mt
thit lp a ch vo/ra c s khc.
Vic ci t phn mm rt n gin v d dng.
1. c th s dng giao din thi gian thc (Real-Time Interface - RTI) vi
Matlab, ci t Matlab, Simulink v Real-Time Workshop nh c m t trong
ti liu hng dn s dng tng ng trc khi ci t phn mm dSPACE.
79
2. Cn m bo phin bn Matlab v Simulink c h tr bi phin bn RTI

d nh ci t.
3. a a dSPACE vo CD-ROM.
4. a a Key-Disk vo mm.
5. Chn CD-ROM v chy file Cdsetup.exe.
6. Theo cc hng dn ca chng trnh ci t.
7. Sau khi hon thnh ci t, ly cc a Key-Disk v dSPACE ra khi sau
khi ng li h thng.
2.3.2. Cc khi dSPACE trong
Simulink
c th truy cp tt c cc
kh nng ca bo mch DSP chng
hn nh cc knh A/D, D/A, cc
knh s, cc tn hiu encoder v
PWM, dSPACE km theo mt
tp hp cc khi Simulink c
ci t trong mt th mc chuyn
bit gi l dSPACE RTI1104 Hnh 2.18. Cc khi ca DS1104 Master PPC
(xem hnh 2.18).
Cc khi dSPACE c th
c ko v th ging nh cc
khi Simulink khc trong m
hnh m phng. Chng cho php
h thng lin lc vi cc thit b
c kt ni vo cc cng vo/ra
ca hp b iu khin dSPACE.
Hnh 2.19. Cc khi trong th vin ca DS1104

80
Di y s gii thiu mt m t ngn gn mi khi cng vi thng s ca n.

2.3.2.1. Cc iu khin vo/ra tng t
- Khi DS1104ADC l mt khi chuyn i tng t - s. N cho php truy
cp ti 8 b chuyn i tng t s vi di in p ra l 10V. T l gia cc u
ra v tn hiu vo ca khi DS1104ADC l 10:1. iu ny c ngha l 10V tn hiu
u vo s c c l 1V u ra ca Simulink.
- Khi DS1104DAC l mt khi chuyn i s - tng t. N cho php truy
cp ti 8 b chuyn i s - tng t, mi b c phn gii 16-bit. T l gia tn
hiu vo v ra ca khi ny l 1:10, v d 1V t Simulink s c c l 10V u
ra ca b iu khin.
2.3.2.2. Cc iu khin vo/ra s
- Cc khi DS1104IN_Cx v DS1104OUT_Cx iu khin mt knh s c th
(xc nh), c ly vo nh mt tham s bng cch nhn p chut ln khi. Tn
khi s thay i ph hp vi cc knh c chn.
- Cc khi DS1104IN v DS1104OUT iu khin mt s bt k cc knh s,
c la chn thng qua cc hp nh du (checkbox). u ra hay cc tn hiu vo
trong cc khi ny s l cc vc t c nh kch thc mt cch linh hot theo s
knh c chn.
2.4. Mt s cc tnh nng c bn ca Card DS1104 cho iu khin chuyn
ng.
2.4.1. Cc iu khin v tr Encoder
Cc knh encoder ca Card DS1104 cng c qun l bi Master PPC, vi cc
c im sau:
Hai knh vo s encoder
H tr single-ended TTL v cc tn hiu RS422
B m v tr 24 bit
81
Tn s xung encoder max c th m c 1.65MHz

Gii hn ng dy vi cc u vo khc nhau
Ngun cp cho encoder (5V, 0.1A)
Bng 2.13.Cc iu khin v tr encoder ca DS1104

* Cc tn hiu encoder v gii hn m.
Incremental encoder to ra hai tn hiu encoder PHI0 v PHI90, v tn hiu IDEX l
IDX. Cp tn hiu encoder PHI0 <-> PHI90 c gc lch pha 900 , thm vo hu
ht cc encoder u c tn hiu o /PHI0, /PHI90 v /IDX.( mt s nh sn xut
dng k hiu A v B thay cho PHI0 v PHI90).
- Th t cc tn hiu vo s: hnh
v di y m t th t tn hiu
vo PHI0, PHI09 cng vi tn
hiu INDEX. Vng mu xm
biu th mt line encoder (3600).
Khi mt line encoder c m,
th cc nguyn tc sau c ng
dng:
Tt c cc knh vo s
Hnh 2.20. Tn hiu encoder v gii hn m
encoder ca DS1104 c th x l c tn hiu c tn s ln n 1.65 MHz:

ln n 1650000 line encoder c o trn mt giy. V DS1104 thc hin
82
chia lm 4 phn mt line encoder, bi vy DS1104 c th m vi tn s

6.6MHz.
DS1104 c trang b vi b m 24 bit. Do c 4 phn ng vi 1 line
encoder , b m c th m ln n 222 line encoder trong khong t 2 -21
n 221 1.
Hng m ph thuc vo hng quay ca encoder.
Counter c th c reset bi xung IDEX theo cc ch sau: khng reset
bao gi, hoc reset sau khi pht hin xung IDEX u tin, hoc b reset sau
mi ln pht hin xung IDEX.
1. DS1104ENC_POS cung cp cc tn hiu c truy cp ti v tr c chia
ca Encoder. Mi knh giao din encoder ca DS1104 c mt b m 24-bit
cung cp v tr tuyt i cho cc b chuyn i c ni vo, tng ng vi mt di
s nguyn t -221221. Di ny c t ng t l vi -11. nhn c mt s
m l mt gi tr nguyn, gi tr u ra phi c nhn vi gi tr 221.
2. DS1104 ENC_POS_Cx truy cp mt cch c lp mt knh ca b m v
tr Encoder.
3. DS1104 ENC_DPOS cho php truy cp ti sai lch v tr encoder chia
c o gia bc m phng hin ti v bc m phng lin k trc .
4. DS1104 ENC_DPOS_Cx cng tng t nh cc khi trc , truy cp
c cung cp ti mt trong nhng knh c chn.
5. DS1104INDEX l mt php tm kim ch mc encoder mt knh. N thm
d dng ch mc encoder ca knh c chn. Khi ch mc c tm thy, ni dung
b m tng ng b xo v cc bin ca m hnh Simulink c th c thit lp li
(reset) mt cch c chn la.
6. DS1104RESET- Khi mt khi c kch hot, ni dung b m v tr ca
knh c th s b xo (thit lp li).
2.4.2. iu khin PWM (Pulse Width Modulation)
* iu ch tn hiu PWM.
83
S iu ch tn hiu PWM quyt nh n nhiu cc ng dng iu khin chuyn

ng v iu khin ng c ca Card DS1104. Tn hiu PWM l cc chui xung vi
tn s v bin khng i, rng xung thay i c. C mt xung vi bin
khng i trong mi chu k. Tuy nhin rng xung thay i c t 0 n thi
gian mt chu k tng ng vi tn hiu iu ch. Khi tn hiu PWM c a n
cc iu khin ca Trazitor cng sut, lm Tranzitor cng sut ng ct bin i
thnh PWM ca in p t ln ti, ging tng t nh tn hiu iu ch. Tn s
ca ca tn hiu PWM thng cao hn tn s ca tn hiu bin iu, hoc tn s c
bn, v vy m nng lng cp n cho ng c hoc ti ph thuc ch yu vo tn
hiu iu bin.
* Cc c im ca tn hiu PWM ca Card DS1104.
Hnh 2.21. Tn hiu PWM ca Card DS1104

Vi mi tn hiu PWM c chu k TP = Thigh+ Tlow c xc nh trong khong 200
ns 819.2 ms. Vi tn hiu PWM3 v PWMSV cng c chu k T P vi c 3 pha.
Vi tn hiu PWM 1 pha chu k Tp u nh nhau vi c 4 knh. Nu cng mt thi
im pht xung PWM, chng ta c th xc nh chu ki vi tn hiu PWM 3 pha v
mt pha l khc nhau.
a. S iu ch xung PWM 1 pha
84
B DSP to ra 4 knh u ra cho tn hiu PWM 1pha ch i xng v khng

i xng.
Hnh 2.22. Tn hiu PWM ch i xng
Hnh 2.23. Tn hiu PWM ch khng i xng
Bng 2.14. Tn cc chn ca cc knh phht xung

b.S iu ch xung PWM 3 pha (PWM3)
DSP cung cp 3 knh (pha) cho s iu ch xung PWM 3 pha (PWM3) o v
khng o trong di tn s 1.25 Hz 5 MHz ch i xng.
85
Bng 2.15. Tn cc xung PWM 3 pha
Hnh 2.24. iu ch xung PWM ca Card DS1104
Bng 2.16.Tn ca cc knh pht xung PWM 3 pha

c. iu ch xung PWM vector khng gian (PWMSV)
DSP cung cp 3 knh (pha) cho s iu ch xung PWM vector 3 pha (PWMSV)
o v khng o trong di tn s 1.25 Hz 5 MHz ch i xng.
86
Bng 2.17. Tn cc xung PWM 3 pha vector
Hnh 2.25. iu ch vector khng gian

Xung PWM vector khng gian c s dng iu khin truyn ng in.
Vector khng gian xc nh cc cung v gi tr T1 v T2 tng ng vi vector phi
(T1) v vector tri (T2). T1/Tp biu th ch lm vic ca vector phi trong cung
tng ng, trong khi T2/Tp biu th ch lm vic ca ca vector tri trong
cung tng ng. Cc cung t 1 n 6 c xc nh bi hnh chiu ca ca vector
khng gian quay ln mt phng c xc nh bi cc vector khng gian U0(001),
U60(011), U120(010), U180(110), U240(100) v U300(101). Gi tr T1 v T2 c
87
xc nh qua hnh chiu ca vector khng gian ln 2 vector khng gian c bn k

vi n. Ch lm vic
dx=Thigh,x/Tp(x=1,3,5,)
ca 3 vector khng o
ph thuc vo hnh chiu
T1 v T2 . cung th
nht trong khng gian
vector dng xung PWM
ca ba pha khng o
SPWM1,
SPWM3
SPWM5 c to ra bi
DSP c dng nh hnh
2.29
Gi tr T0 c xc nh
Hnh 2.26. Cc vector SPWM1, SPWM3, SPWM5 ca DS1104
nh T0=Tp-T1-T2. V T0
0 nn gii hn ca T1 v T2 nh sau T1 + T2 Tp.
Bng 2.18.Tn ca cc knh pht xung PWM 3vector
2.5. To ng dng vi dSPACE v Simulink
88
Di y l nhng hng dn tng bc thc hin mt ng dng vi
Khi ng
Control Desk
Start
To mt th mc mi t
ng dng: C:\NewApp
Khi ng Matlab
- Simulink
To ng dn n th mc
mi bng lnh Set path
Xy dng mt m hnh
Simulink
Thit lp cc tham s m phng
- Stop time = inf
- Solver Type = fixed-step
- Method = ode1 (Euler)
- Fixed Step size = Thi gian
ct mu yu cu.
- Mode = Single Tasking
To m DSP bng cch s dng
Tools/RTWBuild hoc Ctrl-B
Nhn file m: *.obj - m DSP
*.tlc - cc bin ca m hnh
To mt ng dng mi
To -ng dn Working Root
n th- mc C:\NewApp
To mt lp (Layout) mi
bng lnh: File/New/ Layout.
Thm vo cc iu khin v
quan st (scope) t ca s
Tools bng cch ko v th cc
biu t-ng ho t-ng ng.
M file cha cc bin
Nhn Ctrl-T m file *.tlc
Gn bin cho cc iu khin
Ko v th cc bin cn phi
theo di vo mi iu khin t
tap ToolWindow pha bn
d-i mn hnh ca Layout.
Thm tt c cc file m
Nhn File/Add all opened files
lin kt cc file.
Np m i t-ng
Nhn Load Application v chn
file *.obj
Stop
Chy ng dng
(a)
(b)
Hnh 2.27. Lu thut ton thc hin mt ng dng vi Simulink v

Control Desk: (a)- Bc 1; (b)- Bc 2
dSPACE.
89
Cc bc thc hin mt ng dng c m t tm tt trong lu thut ton

trn hnh 2.27. C hai giai on:
- Giai on mt bao gm to mt m hnh Simulink cho thut ton s c
thc hin trn bo mch dSPACE:
To mt m hnh trong Simulink: Khi ng Matlab, ti du nhc lnh g
Simulink, xut hin mt ca s cha rt nhiu th vin c cung cp bi Simulink
v dSPACE.
to mt m hnh Simulink,
trc tin cn to mt m hnh mi t
menu File (nhn File/New Model).
Xut hin ca s m hnh mi vi tn
l Untitled. thm cc khi vo m
hnh Simulink, n gin l nhn (v
gi) nt tri chut vo khi cn thit
trong ca s th vin v ko n vo
ca s m hnh mi ri th chut.
Hnh 2.28. V d minh ho
Thay i tham s ca cc khi bng cch nhn p vo khi tng ng mun

thay i tham s. Chng hn, thay i tham s ca khi Transfer Fcn, nhn p
chut vo khi s xut hin ca s nh hnh 2.28. Thay i tham s nh trn hnh
v.
ni cc khi li vi
nhau, nhn (v gi) nt tri chut
vo mi tn u vo (hoc u ra)
ri ko n ti u vo (hoc u
ra) ca cc khi mun ni.
C th i tn khi bng
cch nhn chut vo phn text
biu din tn hin ti ca khi v
thay i chng.
Hnh 2.29. Thay i tham s khi Transfer Fcn
90
Bc tip theo l chy m phng, chy m phng trc tin ta cn t tham

s m phng. t tham s m phng nhn chut vo menu Simulation ri chn
Simulation Parameters, xut hin ca s Simulation Parameters. Thit lp cc tham
s cn thit trong ca s ny, nhn OK quay li ca s m hnh. Lc ny m
hnh sn sng chy. Trc khi chy m phng, cn ch lu m hnh li bng
lnh Save. y, ta lu m hnh vi tn example1.mdl.
quan st kt qu ca qu trnh m phng, nhn p chut vo khi quan
st, thng l khi Scope, (hnh 2.30).
- Giai on hai l to mt giao din ngi s dng v gn cc bin cho cc
iu khin c cung cp bi Control Desk thc thi thi gian thc ca thut
ton.
Xy dng mt m hnh m phng thi
gian thc: Lin lc vi cc knh vo/ra c
thc hin qua hai khi ca th vin dSPACE
l DS1104ADC v DS1104DAC. Chng s
thay th cc khi to tn hiu m phng
(Signal Generator) v cc khi quan st
(Scope).
Ko cc khi DS1104ADC v
Hnh 2.30. Kt qu m phng
DS1104DAC vo m hnh t
th vin dSPACE v thay
th chng vo v tr ca cc
khi pht tn hiu m phng
v cc khi quan st. Knh
tn hiu vo tng t c
nh t l bi phn cng vi
mt t s 1:10. iu ny c
ngha l 10V u vo s
Hnh 2.31. Cu trc iu khin trn Matlab Simulink
91
c c l 1V trong m hnh. Knh tn hiu ra tng t cng c nh t l bi

phn cng vi cng t s. V vy, 1V tn hiu c to ra trong m hnh c bin
10V thit b kt ni. Do , cn thm hai khi khuch i t th vin Math vo
m hnh c chnh xc cc gi tr t cc knh tng t u vo cng nh ghi
chnh xc cc gi tr ti cc knh u ra.
Thay i cc tham s m phng nu cn thit. C th lu m hnh di mt
tn khc bo ton m hnh m phng.
Tip
chn
lnh
theo,
RTW
Build (hnh 2.35)

trong menu Tools.
Trong ca s Matlab
Command Window
xut hin mt danh
sch cc thng bo.
Hnh 2.32. Downloading and Building
Cc thng bo ny tng ng vi cc bc khc nhau m phn mm RTI thc hin

nhm bin i m Simulink thnh m DSP. Mt ca s xut hin yu cu ngi s
dng khng nh tc v ca timer (timer task). Xc nhn thi gian ly mu chnh
xc trong danh sch tc v ri nhn Continue.
u tin l giai on bin dch, trong giai on ny file Simulink (*.mdl) c
chuyn sang file C (*.C). Sau l giai on lin kt, giai on ny tt c cc bin
v cc chng trnh con c lm cho tng quan vi mi trng DSP. Cui cng
m c bin i thnh mt file i tng c phn m rng l *.obj v c np
vo b nh ca DSP v s thc thi n bt u.
Cn lu rng, th mc cha m hnh thi gian thc cng l th mc m
ngi s dng chn t m hnh Simulink. Nu m th mc ny ra, ta s thy c
rt nhiu file, nhng file ny c to ra trong qu trnh thc thi lnh Build. Do s
92
lng file to ra rt ln, mi d n (ng dng) nn t trong mt th mc con ring

r.
2.5.1. To ng dng vi Control Desk
tng tc vi h thng, chng ta cn quan st, hiu chnh v phn tch cc
bin. V iu ny, dSPACE km theo mt giao din ngi dng ho ca n gi
l Control Desk.
Control Desk l mt phn mm i km trong h thng dSPACE, cho php
ngi dng quan st cc bin, hin th tc ng ca cc bin v hiu chnh cc tham
s m phng bng cch tng tc trc tip vi bo mch DSP. xy dng mt ng
dng bng Control Desk (mi ng dng c gi l mt th nghim-experiment),
cn thc hin qua cc bc sau:
+ Khi ng Control Desk v la chn cc toolbar c nh du nh hnh
2.33.
Ca
Tool Window
c hin th
di mn
hnh. Cc th
(Tap) hin th
cc cng c
hin ang s
dng. hnh
Hnh 2.33. Giao din Control Desk
2.33 hin ti ch s dng hai cng c l Log Viewer (Trnh xem cc gii thch) v
Reference Data Manager (trnh qun l d liu chun).
C mt cng c rt quan trng, l Variable Manager (trnh qun l bin),
n bao gm Variable Browser (trnh duyt bin) v Parameter Editor (trnh hiu
chnh tham s). N cho php truy cp n cc bin ca ng dng. Nhng bin ny
93
c lu tr trong file *.sdf. V vy, x l cc bin ca mt qu trnh m phng

ta phi np file ny trc khi bt u thit k ho.
Trc tin chng ta bt u mt th nghim mi. Nhn File/New Experiment.
Trong ca s mi xut hin nh hnh 2.34, g tn ng dng vo Experiment
Name, chng hn Example1 v to ng dn n th mc t cc file m phng
bng nhn chut vo Working
Root.
Tip theo, np file c cha
cc bin ca qa trnh m
phng.
Nhn
File/Open
Variable File v chn file

example1.sdf.
Th
Variable
Manager xut hin pha bn

di mn hnh. Ca s ny hin
th cu trc ca m hnh m
phng.
Hnh 2.34. Ca s New Experiment
Hnh 2.35. Th Variable Manager v cc bin m phng

2.5.2. Hin th cc iu khin, quan st vi Instrumentation Management
Tools.
c th quan st tc ng ca mi bin v hiu chnh cc tham s trong thi
gian thc, trong khi h thng ang chy, ta cn mt lot cc nt n, con trt, my
hin sng hoc my phn tch iu khin cc bin.V vy, ta cn to ra mt giao
94
din v thm cc dng c, thit b vo. to giao din ny, t menu File nhn
File/New/Layout. Xut hin hai ca s mi trong khng gian lm vic Control Desk
(hnh 2.37). Ca s th nht c t tn l Layout1 cha cc dng c dng
qun l th nghim. Ca s th hai thc t l mt thanh cng c (Toolbar) cho php
ta ko v th cc iu khin cn thit cho th nghim.Cc iu khin c hin th
trong thanh cng c Virtual Instruments (cc dng c o) cho php ta iu khin ch
cc bin m bin c th hiu chnh trc tuyn (on-line).
Chn nt Slider t
thanh cng c pha bn
phi. Con tr chuyn
thnh dng u rui hnh
vung. Nhn v gi chut
trong khi ko thnh mt
hnh ch nht trong ca
s Layout1 (hnh 2.38).
Hnh 2.36. Ca s New Layout
Sau khi th
chut,
ta
nhn
mt
iu
khin
dng
con
trt cho php thay

i gi tr ca bin
trong gii hn
Hnh 2.37. Chn Slider v v hnh ch nht trong Layout1
c chn.
Kch p chut vo iu khin con trt Slider thay i tham s ca Slider.
Nu ta quyt nh s dng h s khuch i nm trong khong 0 v 5, chn th
Slider ri t Range Min v Range Max nh hnh 2.39. Sau khi nhn OK th gii
hn m con tr c th iu chnh c l t 0 n 5. Nhng Slider vn c bao
95
quanh bi mt ng vin mu , iu c ngha l n vn cha c gn cho

mt bin c th no iu khin.
gn bin vo Slider, trong ca s
Veriable Manager bn di mn
hnh, chn bin Slider\ nGain.
Nhn chut vo bin P:Slider
Gain.Gain v ko n vo hnh ch
nht va c v trong ca s Layout.
iu khin Slider mi s hin th bin
c iu khin v ng vin mu
bao quanh Slider s bin mt (xem
hnh 2.41).
Hnh 2.38. Thay i tham s ca Slider

Trong v d ny ch c hai tn hiu c gi tr quan st, l tn hiu vo ca h
thng c ni vi knh ADC#1 v tn hiu ra ca h thng bc hai (sau khi

Transfer Fcn). C hai tn hiu ny nn
c hin th trn cng mt h trc. Cn
nh rng gi tr thc ca tn hiu vo
c ly sau khi In-Gain v gi tr thc
ca tn hiu ra c ly trc khi OutGain.
thm vo Layout cc thit b
Hnh 2.9. iu khin Slider sau khi gn

bin cn iu khin
quan st, nhn chut vo th

Data Acquisition (thu thp d
liu) trong thanh cng c
Instrument pha bn phi
mn hnh. Chn biu tng
Plotter v v mt hnh ch
nht ln hn trong ca s
Layout. Sau nhn chut
Hnh 2.40. V mt Plotter quan st tn hiu
96
vo ca s Variable Manager v ko hai tn hiu cn gim st l Model Root/InGain->Out1 v Model Root/Slider Gain->Out1 ri th vo hnh ch nht va v.
Khi ko tn hiu th hai cn m bo th chut vo cng mt trc vi tn hiu
th nht. Nu khng th mt trc th hai s c v v khng gian cn li quan
st hnh dng ca tn hiu s b thu hp li. Hai tn hiu c gn vo Plotter v
c hin th vi cc mu khc
nhau. Nhn ca trc c gn tn
hiu s ch hin th tn hiu cui
cng c gn.
Ti bt k thi im no,
mun sa i hoc xem c
nhng tn hiu no c gn
vo th, nhn chut phi vo
khu vc quan st v chn lnh
Edit Data Connections. C th
xo bt k mt tn hiu no bng
cch chn n v nhn phm
Delete.
Hnh 2.41.Thit lp c tnh cho th
nh dng quan st, nhn p

chut vo hnh ch nht v chn th Yaxes. Khi cc tn hiu c hin th trn
cng mt trc (Y-axis), cc thit lp
ho s c p dng cho tt c cc tn
hiu. Ngc li, ngi s dng c th
la chn mt cch c lp cc gii hn
trc khc nhau cho cc tn hiu khc
nhau.
Hnh 2.42. Thit lp thng s quan st
97
Trc khi thc hin m phng cn thit lp cc tham s quan st. thit lp
cc tham s quan st, chn lnh Capture Settings Window trong menu
View/Controlbars.
Trong ca s Capture Settings Window (hnh 2.43), t di m phng
Length l 2, gi nguyn s Downsampling. i vi cc h thng phc tp hn th
s ny cn c tng ln khi di m phng ln hn 20 ln thi gian ly mu.
Bc cui cng l chy v dng th nghim. chy v dng s thc thi ca
DSP, c th s dng cc biu tng start v stop trn thanh cng c Hardware
Management nh hnh 2.44a. khi ng DSP, nhn chut vo biu tng hnh
tam gic mu xanh, nu file example1.obj c np vo b nh ca DSP th n
s bt u chy v biu tng Stop c dng hnh ch nht mu s sng ln.
dng th nghim, nhn chut vo biu tng c dng hnh ch nht mu .
quan st s thay i ca tn hiu, khi ng Animation bng cch nhn
biu tng pha bn phi ca thanh cng c Edit Mode.
Quan st trn mn hnh s thy hai tn hiu vo v ra c v trn Plotter. C
sau hai giy, th hnh nh hin th li b xo v mt tp d liu mi li c hin th.
Thay i h s khuch i bng cch di chuyn con trt ca Slider v quan
st s thay i ca cc tn hiu.
(a)
(b)
Hnh 2.43. iu khin s thc thi ca DSP (a) v iu khin

Animation (b)
Ch :
98
GND
INPUT
FAULT
2
+ lu mt th nghim, cn phi theo cc bc sau nu khng c th dn

n mt mt s thit k trc trong lp th nghim hoc mt mt s thit lp m
phng.
1. Nhn File/Add All Opened Files. Thao tc ny nhm m bo rng th
nghim s nh tt c cc file *.sdf, cc bin iu khin, ng dn cho tt c
cc file v s m tt c cc kt ni gia lp (layout) v cc bin.
2. Lu Layout vo file c phn m rng l *.lay.
3. Lu th nghim vo file c phn m rng l *.cdx
+ np mt th nghim, n gin l nhn gi lnh File/Open Experiment, lp
v cc bin s xut hin trn mn hnh lu theo ng trnh t trn.
Cn c bit lu rng file i tng phi c np vo b nh ca DSP. Cc
file ny khng hon ton c np cng vi vic np th nghim.
Vi ni dung phn tch v trnh by trn ta c th xy dng ta c th xy
dng c cc h iu khin chuyn ng dng Card DS1104.
-
H iu khin chuyn ng Card DS1104 vi ng c xoay chiu 3

pha (h bin tn ng c).
H iu khin chuyn ng Card DS1104 vi ng c mt chiu (h

xung p ng c)
H iu khin chuyn ng Card DS1104 Driver - ng c mt

chiu hoc xoay chiu.
99
CHNG 3. XY DNG H IU KHIN CHUYN NG S DNG

CARD DS 1104
3.1. Tng hp h iu khin chuyn ng v tr DC servo(theo phng php
tng t)
Ngy nay cc h iu khin v tr DC servo ang ngy cng c ng dng
rng ri v n m bo tt cc ch tiu tnh v ng ca h thng, d dng thc hin
cc truyn ng c cng t nh n ln v tnh bn vng cao. Cu trc chung ca
h iu khin v tr gm ba mch vng t trong ra ngoi l: mch vng dng in,
mch vng tc v mch vng v tr nh trn.
Uk
ik
Uk(p)
(p)
(p)
(p)
R
(-)
Ui
Ui(p)
Ri
R
(-)
PA
(-)E(p)
(-)
FT
Ki
1 pTi
K
1 pT
K
1 pT
1
p
Hnh 3.1.S cu trc chung ca h iu chnh v tr

3.1.1. M hnh ton hc ca h.
a. M hnh ton hc ng c mt chiu, kch t c lp.
S mch thay th ng c mt chiu kch t c lp c a ra nh trn
hnh 3.2.
Trong :
100
Uk , Ik
: in p v dng in kch t.
Ru , L : in tr, in cm phn ng.

M
: momen ca ng c mt chiu.
Mc
: momen ti.
Mc
ik
Uk
LR-
Hnh 3.2. S mch thay th ng c mt chiu

in p v dng in kch t tnh theo cc cng thc sau:
Uk = Rk . ik + Lk .
di k
Uk
; ik =
dt
R k (1 pTk )
Trong :
Tk =
Lk
: hng s thi gian mch kch t, thng thng
Rk
Tk 100 ms 600ms
Trn hnh 3.3 l s thay th mch in phn ng:
U - E = R . (1 + pT). I
T =
L ud
: hng s thi gian phn ng.
R ud
i
Hnh 3.3. S mch thay th mch in phn ng
101
Khi = const: Dng khu khuch i K thay cho khi nhn phi tuyn:
Mc(p)
I(p)
U(p)
1/ R
1 pT-
(-)
(p)
1
Jp
Ko
(-)
Ko
(-)
KIo
Ko
Uk (p)
1/ R
1 pTk
Kk
chiu
t: Cu = K = const ta c m hnh tuyn tnh nh trn hnh 3.5.
T m hnh trn hnh 3.5 ta tnh c:
U - Cu. = R.I(1 + p . T)
Cu.I Mc
=
Jp
Cu
(-)
U(p)
1/ R
1 pT-
I(p)
Cu
1
Jp
(p)
(-)
1
Cu
Mc(p)
chiu
102
U - Cu (Cu.I - Mc) = R.I.(1 + p.T )

Jp
U+
Cu.Mc
= R.I.
Jp
Cu 2
1+p.T
+
pJR
I.(p.JR p 2 .JR.T- Cu 2
p.U.I Cu.Mc
=
Cu 2
Cu 2
Vy ta c:
JR
Mc
pU
2
Cu
Cu R
I=
JR
JR
1
p
T- p 2
Cu 2
Cu 2
Gi Tc = JR2 l hng s thi gian in c, ta c m hnh dng in ca ng

Cu
c mt chiu nh trn hnh 3.6.

b. M hnh ton hc b chnh lu c iu khin.
U(p)
Tc p / R
1 Tc p T- Tc p 2
I(p)
1 / Cu
1 Tc p T- Tc p 2
Mc(p)
Hnh 3.6. M hnh tuyn tnh ho m phng ng c

mt chiu kch t c lp
S khi b chnh lu c iu khin nh trn hnh 3.7:
ik
Uk
Mch
iu khin
PA
Uk
Hnh 3.7. S khi mch chnh lu c iu khin
103
Mch iu khin bin i in p mt chiu U k thnh xung in p thch

hp a vo m Tranzitor cp ngun cho ng c.
Khi u vo bin thin mt lng Uk th u ra bin thin mt lng
U . Tn hiu ra b tr so vi tn hiu vo t =
T o
.
U (t) = Kcl . Uk . I [t - Tv]

Trong :
: tc gc ca in p li.
Tv: thi gian tr ca van.
Hm truyn ca b chnh lu c iu khin khi b qua phn phi tuyn:
Wcl(p) = U d (p) = Kcl.e-p.tv =
U dk ( p)
K cl
(1 pTdk ).(1 pTv )
3.1.2. Cu trc h iu khin v tr v phng php tng hp cc mch vng.

Hnh 3.8 l s cu trc h iu chnh v tr s dng ng c in mt
chiu.
Trong h iu chnh v tr c ba mch vng: Mch vng dng in, mch
vng tc v mch vng v tr. H thng truyn ng ny bt buc phi o chiu
c.
Quan h gia v : = o +
dt
Uk(p)
Ui(p)
Ui
Ri
(-)
Cu
(-) E(p)
(-)
K cl
(1 Tdk p)(1 Tv p)
1/ R
1 pT-
Cu
Mc
1
Jp
Ki
1 pTi
Hnh 3.8. S mch vng iu chnh dng in
104
a. Tng hp mch vng dng in.

Trn hnh 3.8 l s mch vng iu chnh dng in.
Trong :
T =
L
: hng s thi gian in t ca mch phn ng.
R
R = Rb + Rk + Rd + Rs
L = Lb + Lk + Ld
Ki = Rs : in tr ca sensor.
Ti = R . C : hng s thi gian ca sensor dng in.
UI
UI(p)
RI
Soi
I(p)
(-)
Hnh 3.9.
Vit gn li ta c s nh trn hnh 3.9:
T s trn hnh 3.8 v hnh 3.9 ta c hm truyn ca i tng iu khin

ca mch vng iu chnh dng in:
K
K cl i
U i ( p)
R
Soi(p) =
=
U dk ( p) (1 p(Tdk )(1 pTv )(1 pTi )(1 pT- )
Trong :
Tk 100 s, Tv 2,5ms, Ti 2ms, T 100ms
Thay Tsi = Ti + Tv + Tk << T , b qua cc h s bc cao ta c:
Ki
R
Soi (p)
(1 pTsi )(1 pT- )
K cl
p dng tiu chun ti u modul ta c hm truyn ca h thng kn:

105
1
1 2 p 2 2 p 2
FOMi =
Mt khc trn hnh 3.9 ta c:

R i (p)S oi
1 R i (p)S oi
FOMi (p) =
Ri(p) =
Ri(p) =
FOMi
S oi FOMi .S oi
1
1 2 P 2 2 P 2
K
K cl i
R
.2 P(1 P)
1 pTsi 1 pT-
Chn = min (Tsi , T ) = Tsi
Vy ta c hm truyn ca b iu chnh dng in:

Ri(p) =
1 PT2P.K cl .K i .
Tsi
R
RT2K cl .Ki .Tsi
.1
pT-
Ri(p) l khu t l - tch phn (PI).

Kt qu khi tng hp mch vng dng in bng tiu chun ti u modul ta
c:
FOMi = U i (p) =
U id ( p)
1
1 2TSi p 2TSi2 p 2
Vy s cu trc ca h iu chnh v tr cn li nh hnh 3.10, trong ta

ly hm truyn t ca mch vng dng in l khu qun tnh bc nht, b qua cc
bc cao.
106
(p)
Ui(p)
(p)
R
(-)
(-)
1
Ki
1
1 2TSi P
R
1
CuTc p
p
K
1 pT
K
1 pT
Hnh 3.10: S cu trc ca h iu chnh v tr.

b. Tng hp mch vng tc .
Vit gn s hnh 3.10 ta c s mch vng iu chnh tc nh trn
hnh 3.11: So =
R.K
K 1 .Cu.Tc .p.(1 p.Ts )
Vi TS = 2TSi + T TS rt nh.
p dng tiu chun ti u modul: U
U(p)
So
(p)
(-)
FOM =
1
; R (p) =
1 2 p 2 2 p 2
Hnh 3.11
S o
FOM
FOM .S o
1
1+2 p+2 2 p 2
R (p) =
R.K
1
12 2
K1.Cu.Tc .p.(1+p.Ts ) 1+2 p+2 p
R (p) =
Chn
1
R.K
.2 p(1 p(1 p)
K1 .Cu.Tc .p.(1 p.Ts )
= TS
107
Ta c:
Vy:
R(p) =
K i .Cu .Tc
R .K .2.Ts
R(p) l khu t l (p).
Tiu chun ny c s dng khi h thng khi ng mang ti, lc ta

khng coi Ic l nhiu na.
p dng tiu chun ti u i xng:
FOD =
1 4 p
FOM
2 2
3 3 ; R (p) =
1 4 p 8 p 8 p
S o FOM .S o
1+4 p
1+4 p+8 2 p 2 +83 p3
R(p) =
R.K
1+4 p
1
K1.Cu.Tc .p.(1+p.Ts ) 1+4 p+8 2 p 2 +83 p3
R(p) =
1+4 p
R.K
8 2 p 2 1+ p
K1.Cu.Tc .p.(1+p.Ts )
Chn = Ts ta c: R(p) =
1 4Ts p
R.K
8Ts2 p
K1 .Cu.Tc
Vy R l khu t l - tch phn (PI).

l khu v sai cp hai i vi i lng t v v sai cp mt i vi i
lng nhiu IC.
c. Tng hp mch vng v tr.

S cu trc h thng iu chnh v tr cn li nh hnh 3.12:
Trong : Ts = T + 2Tsi = T + 2 (Tk + Tv + Ti)
108
Khi dng
chun ti
u modul
(p)
1
1
=
.
d (p) 1+2Ts p+2Ts2 p2 K
(p)
R
(-)
(p)
1
1
.
2 2
3 3
d (p) 1 4Ts p 8Ts p 8Ts p K
Khi dng
chun ti
u i
xng
Kr
p
K
1 pT
Hnh 3.12
Tng hp mch vng v tr cng tng t nh tng hp mch vng tc

, ta dng tiu chun ti u mudule v hm truyn t ca mch vng
tc ly l khu bc hai, b qua cc khu bc cao.
Vy:
(p)
1
1
.
d (p) 1 2Ts p K
Khi dng chun ti u modul
(p)
1
1
.
d (p) 1 4Ts p K
Khi dng chun ti u i xng
Nu khi tng hp mch vng

tc dng chun ti u modul, ta
U (p)
So
(p)
(-)
c hm truyn ca i tng (xem

hnh 3.13):
Hnh 3.13
R
R
S0(p) =
(1 2Ts . p) p(1 pT )
109
p dng tiu chun ti u modul:

R(p) =
K
1 p
.2 p.
K . p (1 2 p.Ts )
1 T p
Chn = T . Ta c: R(p) =
Vi: K =
K
K .2T
K
(1 + 2Tsp); R = K + KD . p
K .2T
v KD =
K Ts
K .T
R l khu t l - o hm (PD)
Khi tng hp mch vng tc dng chun ti u i xng ta c hm truyn
ca i tng:
K
K
S0(p) =
(1 4Ts . p) p(1 pT )
p dng tiu chun ti u modul, ta c:
R(p) =
Chn: = T
K
1 p
.2 p.
K . p (1 4 p.Ts )
1 T p
ta c: R(p) =
K
(1 + 4Tsp)
K .2T
R cng l khu t l - o hm (PD).

Sau khi tng hp ra cc b iu khin, ta c s cu trc ca h thng iu
khin v tr ng c mt chiu nh trn hnh 3.14.
3.1.3. Tnh ton cc thng s h iu khin v tr v cu trc h iu khin v
tr.
Bng 3.1. Cc thng s cho trc.
110
Pm
: Cng sut nh mc ca ng c
= 1,5
Kw
Um
: in p phn ng nh mc
= 140
nm
: Tc quay roto nh mc
= 2000
v/ph
Idm
: Dng in nh mc
= 13.8
: in cm phn ng
= 0,2
Ti
: Hng s thi gian my bin dng
= 0,002
Tv
: Hng s thi gian b chnh lu
= 0,0025
Tk
: Hng thi gian mch iu khin b chnh lu
= 0,001
: Hng s thi gian my pht tc
= 0,001
: Hng s thi gian b cm bin v tr
= 0,3
GD2
= 0,01
Kg,m2
Cc phng trnh phn ng phn ng trong ng c in mt chiu:

U = E + (R + Rf) I
U : in p phn ng.
E : Sut in ng phn ng.
R : in tr mch phn ng.
Rf : in tr ph trong mch phn ng.
I : Dng in mch phn ng.
R = r + rcf + rb + rct
r : in tr cun dy phn ng.
rcf: in tr cc t ph.
rb : in tr cun b.
111
rcf: in tr tip xc chi in.

Eu = Cu. = K =
PN
2a
P : S i cc t chnh.
N : S thanh dn tc dng ca cun dy phn ng.
: T thng kch t di mt cc t.
: Tc gc.
K=
PN
: H s cu to ca ng c.
2a
E = Ken
n : Tc Roto.
=
n
1500
K
2n
=
; m =
= 209,4 rad/s; Ke =
= 0,105K
9,55
9,55
60
9,55
Phng trnh c tnh c in: =

Phng trnh c tnh c:
Trong :Iu =
Uu R u +R f
Iu
Cu
Cu
Uu R u Rf
M
Cu
(Cu ) 2
M dt
; Mdt = Mc = M
Cu
Tnh m men nh mc: Pm = Mm . m

Mm =
Cu =
Pdm
dm
2000
9,55 Nm
209, 4
M dm 9,55
=
=0,7
Idm 13,8
Tnh gn ng R theo cng thc:

R = 0,5(1 - dm)
U dm
140
= 0,5(1 - 0,9)
= 0,5
I dm
13,8
112
L = Lb + Lk + Ld = 0,2 H
T =
L
: Hng s thi gian phn ng.
Ru
Tu =
0, 2
0, 4 s
0,5
T s cu trc iu khin v tr trn hnh 3.10 ta c: Ud = Kcl . Uk

Chn U k = 10V ta c: Kcl =
U dm 140
14
U dk
10
Hm truyn ca b iu chnh dng in: Ri =
RTu
1
1+
2.K cl .Ki .Tsi pTu
Tsi = Ti + Tv + Tk = 2+ 2,5+ 0,1= 4,6.10-3s

T = 0,4s; R = 0,5 ; Kcl = 22
Chn Uid = 7V
Ki =
Ri =
Uid
7
=
=0,51
Idm 13,8
0,5.0,4
1
1+
-3
2.14.0,51.4,6.10 0,4p
Ri = 3,045 1+
0,4p
Cng trn hnh 6-11 ta c:

U = .K Chn U = 4,7V
K= 4,7 0,0224
209, 4
Trong cng thc 1-14 ta c:

Ts = T + 2.Tsi
Vi
T = 1ms
Tsi = 4,6 . 10-3s
113
Tc =
JR 2.45.0,5
2,5 s
Cu 2
0, 72
Ts = 0.01s
R(p) =
K i .Cu.Tc
0,51.0,7.2,5
=
=8662
R.K .2Ts 0,5.0,0224.2.4,6.10-3
R
0,5
=
=0,286
Cu.Tc 0,7.2,5
Ta c: Trn hnh 3.10 tn hiu xc nh v tr t phi xp x tn hiu phn hi

tc l:
.K = U
K =
10
0,032 ; = .dt=.t
100
0
K
(1 + 2.Tsp)
K .2.T
B iu chnh v tr R : R =
0,0224
(1+0,02p)
0,032.2.0,3
= 1,167 . (1 + 0,02p)
3.1.4. M phng h trn Matlab.
lp trnh cho h th nghim thc, th trc ht ta phi m phng nh gi
cc kt qu tng hp h.
Hnh 3.14. Cu trc h iu khin v tr trong matlab Simulink
114
Hnh 3.15. c tnh m phng h iu khin chuyn ng

Vi cu trc h iu khin v tr v nh gi cht lng h thng qua c tnh
m phng ta c th lp trnh iu khin h thc nghim dng Card DS1104 bng
cch : thm cc khi xut nhp d liu ; loi b m hnh b bin i cng sut v
m hnh ng c ; hm truyn cc phn t o lng. ( nh bc 3, bc 4 phn
sau)
3.2.H iu khin v tr ng c DC Servo dng b iu khin Fuzzy logic ng
dng Card DS1104.
iu khin h thng iu chnh v tr ni chung c th s dng b iu
khin PID truyn thng, v c th c thit k d dng, vi chi ph thp. Tuy nhin
vi khi dng b iu khin ny ta cn bit chnh xc m hnh ca h thng hoc lm
cc th nghim iu chnh cc tham s ca b iu chnh PID. Chng ta bit rng
b iu chnh PID truyn thng ni chung khng lm vic hiu qu vi cc h phi
tuyn, c bit vi cc h c m hnh phc tp v h thng m m khng c m
hnh ton hc chnh xc. gii quyt v khc phc cc im hn ch ny, c nhiu
115
cch iu chnh b PID nh l auto-ning v b iu khin PID thch nghi c pht

trin sau ny. S dng b iu khin b iu khin m l mt trong cc phng
php gii quyt bi ton trn. So vi b iu khin truyn thng, u im chnh ca
b iu khin m l khng cn i hi m hnh ton hc chnh xc ca h. V lut
ca b iu khin m da trn kin thc v hnh vi ca h v kinh nghim trong
iu khin, b iu hkin m i hi m hnh t chnh xc hn b iu khin truyn
thng. Tuy nhin t c hiu qu cao th b iu khin m cn s tnh ton v
iu chnh c hiu qu.
Nghin cu thc nghim v b iu khin m trn Card iu khin thi gian
thc DS1104 l mt gii php nhanh nht a b iu khin m vo ng dng
trong cc h thng. Card DS1104 v phn mm ControlDesk c s dng pht
trin cc b iu khin. Trong phn ny l mt ng dng Card DS1104 trong pht
trin b iu m cho h thng iu khin v tr.
v tr t
(-)
Ri
R
(-)
vi phn
(-)
DAC
PWM
Power
AMP
C
Servo
v tr
thc
ADC
ADC
Sensor
v tr
Card DS1104
Hnh 3.16. Cu trc h iu khin v tr vi Card DS1104
Vi cc thit b phn cng khng thay i, trong phn ny ta ch i vo

nghin cu xy dng b iu khin m cho h ng dng trn Card DS1104. n
gin, y ta ch thit k b iu khin m iu khin v tr. Khi cu trc
iu khin ca h c b iu khin m c dng.
116
d
a ph
Fuzzy logic
Contrller
Analog Output
D/A
Power
AMP
DC
Servo
CardDS1104
Incremental
encoder
Encoder
24 bit
Hnh 3.17 Cu trc iu khin m v tr vi Card DS1104
B iu khin m c thit k y gm hai u vo v mt u ra. Cc

u vo l sai lch v tr (e) v thay i ca sai lch v tr trong thi gian ly mu
( e ), u ra l tn hiu iu khin (u).
thi im ly mu k, sai lch v tr v s thay i ca sai lch c tnh theo
k ) e( k ) e( k 1 )
e( k ) d ( k ) a ( k ) ; e(
trong
d ( k ) l v tr gc mong mun v a ( k ) l v tr gc ca c cu chp
hnh. Cu trc b iu khin m gm 3 khi : khi m ho, khi hp thnh, khi

gii m. xc nh cc hm lin thuc ca e, e v u, ta chia lm by bin ngn
ng l NB( m ln), NM(m trung bnh), NS(m nh), Z(khng), PS(dng nh),
PM(dng trung bnh) v PB (dng ln). Chn hm lin thuc dng hnh tam gic
v tp cc gi tr nh trong hnh v. Ta chn lut iu khin nh bng . v c th
hiu chnh cho ph hp vi thc nghim. Da vo vic chn cc tp m u vo,
u ra v cc lut lut iu khin trn, chn lut hp thnh l Max-Min v gii
m theo phng php trng tm.
117
Card DS1104
Icremental
encoder
Hnh 3.18. H iu khin m v tr vi Card DS1104
e / e NB NM NS Z
NB
NM
NS
Z
PS
PM
PB
PS
NB NB NB NB NS
NB NB NM NM Z
NB NB NS NS Z
NB NB NS Z
PS
NB NM Z
PS PS
NB NS Z
PM PM
NB NS PS PB PB
Bng 3.2. Lut iu khin
PM
PS
PS
PM
PB
PB
PB
PB
PB
PB
PB
PB
PB
PB
PB
PB
Hnh 3.19. Hm lin thuc ca bin sai lch v tr
118
Hnh 3.20. Hm lin thuc ca bin thay i sai sv tr
Hnh 3.21. Hm lin thuc ca tn hiu iu khin
Hnh 3.22. Surface lut iu khin m

119
Hnh 3.23. Vi phn sai lch v tr
Hnh 3.24. Sai lch v tr
Hnh 3.25. m phng lut iu khin m

Hnh 3.25. Cu trc h iu khin v tr vi b iu khin m
120
1500
vi tri dat
toc do
vi tri
1000
500
vi tri
-500
toc do
-1000
-1500
0.5
1.5
2.5
3.5
4.5
Hnh 3.26. M phng lut iu khin m

3.3. Xy dng h thng iu khin chuyn ng
3.3.1 Gii thiu cc thit b trong h thng thc.
V tr t
My tnh s
Card DS1104
Matlab 7.0.4
ControlDesk
I/O connector:P1A
P1B
I/O connector:P1A
P1B
Driver Servo
motor MidiMaestro
Matador DC
Servo Motor
Hnh 3.27.Cu trc h thng thc nghim

1. My tnh Pentum IV, c ci phn mm Matlab 7.0.4 v phn mm
ControlDesk Version 5.0.
- Card DS1104 c g lp trn Mainboard ca my tnh qua khe PCI v lp trnh
iu khin, gim st thng qua my tnh.
- Th vin cc khi ca DS1104 c nhng trong phn mm Matlab-Simulink.
- Thng qua phn mm ControlDesk ta c th gim st, iu khin v nh gi
cht lng h.
121
2. Card DS1104.
Cc chn tn hiu vo ra v
ngun ca Card DS 1104 c ni
n i tng bng 2 cp P1A v
P1B.
- Knh chuyn i s-tng t
DACH6(Pin46-DACH6,
Pin45-
GND) a tn hiu iu khin n

Driver.
Hnh 3.28.Card DS1104 trong h thc

nghim
- Knh chuyn i tng t-s ADCH6 (Pin16-DACH6, Pin17-GND) nhn tn hiu

dng in.
-Knh chuyn i tng t-s ADCH8 (Pin48-DACH8, Pin47-GND) nhn tn hiu
t my pht tc.
- Hoc o v tr v tc c th s dng 2 knh encoder.
3. Driver Servo motor Midi-Maestro 140x14/28.
- B bin i cng sut l b bin i xung
p c o chiu dng, mch lc dng
trazitor IGBT.
- in p ra t vo phn ng ca ng c
Um=140V.
- Dng in nh mc Im=14A .
- Nhn tn hiu iu khin tng t (-10V
n 10V), tn hiu my pht tc.
- Cho ra tn hiu t l vi dng in.
- C th thc hin thut ton iu khin
Hnh 3.29. Driver DC servo motor
PID tu theo cu trc Daughter board.

4. Matador DC Servo Motor- Encoder 24 bit
- Matador DC Servo Motor c sn xut bi hng Control, cc thng s c
ch ra trong phn tnh ton.
122
- ng c c ch to ng b km
theo my pht tc mt chiu, encoder
24 bit.
5. B iu khin ti v ti AS motor.
3.3.2. Lp trnh iu khin h.
Vi kt qu m phng Offline, trong
phn ny ta tin hnh lp trnh iu
khin h thc nghim.
Bc 1: Xc nh hm truyn ca i
Hnh 3.30.DC servo motor
tng, thit k b iu chnh bng l
thuyt.( thc hin trong phn tng hp h thng)

Bc 2: M phng Offline
bc u xc nh tham s ca
thut ton iu chnh v nh
gi kt qu tnh ton v thit
k.( thc hin trong phn
tng hp h thng)
Bc 3: B xung thm cc
khi xut/nhp d liu:
-DS1104ADC_C5
Chuyn
i tn hiu vo tng t (10V10V) thnh tn hiu s(o
tc bng my pht tc).
-DS1104ADC_C6
Chuyn
i tn hiu vo tng t (10V10V) thnh tn hiu s
(dng in).
-DS1104DAC_C6
Chuyn
i tn hiu s thnh tn hiu
tng t (-10V10V)
- Chn thi gian ly mu tn
hiu: T=0.001S.
123
- Chn ngn ng dch (ngn ng Card DS1104): chn ngn ng C

Bc 4: S dng C-compiler to m C np xung card hardware, ci xen vi h
thng phn mm iu khin theo ngt.
Sau khi khai bo cc thng s c bn ca chng trnh ta tin hnh chy m hnh
thc nghim:
- Load chng trnh iu
khin vo b nh ca
Card DS1104.
- Khi ng phn mm
ControlDesk
Version
5.0. Thit lp mn hnh

gim st v iu khin h
thc nghim.
- S dng mt trong Hnh 3.33. Mn hnh ControlDesk vi h thc nghim

cc tnh nng v th c tnh ng ca h thc nghim, cn c vo kt qu
ny ta nh gi c cht lng iu chnh h thc nghim vi cc b iu
chnh thit k.
Hnh 3.34.Chng trnh iu khin h thng thc nghim

124
Hnh 3.35. Chng trnh iu khin h thng thc nghim dng

b iu khin m.
3.3.3. Cc c tnh thc nghim h iu khin chuyn ng (Vi chng trnh
iu khin trong hnh 3.34).
V tr
Tc
V tr t
Hnh 3.36. Kp=1.167, Kd=0.02334, Idm=4A

125
Hnh 3.37. Kp=1.0, Kd=0.02334, Idm=4A
Hnh 3.38. Kp=0.2, Kd=0.02334, Idm=4A

126
Hnh 3.39. Kp=0.3, Kd=0.02334, Idm=4A
Hnh 3.40.
3.38. Kp=0.05, Kd=0.02334, Idm=4A
127
Hnh 3.41. Kp=0.1, Kd=0.02334, Idm=4A
Hnh 3.42. Kp=0.7, Kd=0.1167, Idm=4A
128
Vic s dng Card DSP trong nghin cu pht trin cc b iu chnh l

mt vn rt cp thit. Trng i hc k thut cng nghip c hai Card
DS1102 v DS1104 ti Trung tm Th nghim, nhng cha c s dng v khai
thc c hiu qu. Vi kt qu nghin cu v h thc nghim xy dng c th
c s dng nghin cu pht trin cc b iu chnh s, cc phng php iu
khin mi. V mt l thuyt cc tnh ton v phn tch trn l mt ti liu quan
trng trong vic nghin cu v s dng cc Card DSP khc nh : DS1102, DS1103,
DS1105
TI LIU THAM KHO

[1] Truyn ng in Thng Minh, tc gi:Nguyn Phng Quang, Nxb
KHKT
[2] Matlab&Simulink dnh cho k s iu khin t ng,
Nguyn Phng Quang (2004), NXB KHKT, H Ni.
[3] Experiment Guide For Release 5.0
[4] Hardware Installation and Configuration For Release 5.0
[5] New Features and Migration For Release 5.0
[6] Automation Guide For Release 4.2
[7] Implementation Guide For Release 5.0
[8] iu khin s. tc gi:Li Khc Li - Nguyn Nh Hin, Nxb KH v KT
129
H th nghim thc ti Phng th nghim in - in t-Trung tm Th nghimTrng i hc K thut Cng Nghip
130

Nghien Cuu Va Ung Dung Card Dieu Khien So DSP de Thiet Ke Bo Dieu Khien So Trong Dieu Khien Chuyen Dong 1286

Uploaded by

Document Information

Original Title

Copyright

Available Formats

Share this document

Share or Embed Document

Sharing Options

Did you find this document useful?

Is this content inappropriate?

Copyright:

Available Formats

Nghien Cuu Va Ung Dung Card Dieu Khien So DSP de Thiet Ke Bo Dieu Khien So Trong Dieu Khien Chuyen Dong 1286

Uploaded by

Copyright:

Available Formats

I HC THI NGUYN

CNG HO X HI CH NGHA VIT NAM

TRNG HKT CNG NGHIP

NGHIN CU V NG DNG CARD IU KHIN S DSP

Hc vin: inh Vn Nghip

TS. Bi Chnh Minh

S ha bi Trung tm Hc liu i hc Thi Nguyn

TRNG I HC K THUT CNG NGHIP

LUN VN THC S K THUT

NGHIN CU V NG DNG CARD IU

THI NGUYN 2009

TRNG I HC K THUT CNG NGHIP

LUN VN THC S K THUT

NGHIN CU V NG DNG CARD IU

THI NGUYN 2009

S ha bi Trung tm Hc liu i hc Thi Nguyn

Thi Nguyn, ngy 31 thng 7 nm 2009

S ha bi Trung tm Hc liu i hc Thi Nguyn

Tc gi xin by t lng bit n su sc n:

S ha bi Trung tm Hc liu i hc Thi Nguyn

CHNG 1. TNG QUAN V H IU KHIN S

1.1. L thuyt v h iu khin s

1.1.1. Cu trc in hnh ca h iu khin s

1.1.2.2 Tn hiu v ly mu tn hiu trong h iu khin s

1.2. Tng hp h iu khin s

1.2.1. L lun chung.

1.2.2. iu kin tng hp c b iu khin s trong h.

1.2.3. Chn tn s ly mu.

1.2.4. Thit k b iu khin s theo phng php lin tc.

1.2.4.1. Phng php vi phn

1.2.4.2. B iu khin s c xc nh theo hm truyn t

1.2.4.3. Phng php dng bin i z

1.2.4.4. Tng hp b iu khin c tnh phn t lu gi (ZOH)

1.2.5. Thit k b iu khin s theo phng php trc tip

1.2.5.1. Phng php qu o nghim s trn mt phng z.

1.2.5.2. B nh hng ca khu tr

S ha bi Trung tm Hc liu i hc Thi Nguyn

1.2.6. Dng matlab tng hp h iu khin s

1.3. iu khin s trong iu khin chuyn ng

1.3.1. Mt s cu trc iu chnh c s dng

1.3.2. Thit k v m phng h thng bng my tnh

CHNG 2. GII THIU CARD DSP DS1104

2.1. Gii thiu chung

2.2. Cu trc phn cng ca DS1104

2.2.1. Cu trc tng quan

2.2.2. Ghp ni vi my ch (Host Interface)

2.2.3. Cc thnh phn ch yu ca DS1104

2.2.3.1. B x l tn hiu s DSP TMS320F240.

2.2.3.2. H con AD (Analog to Digital).

2.2.3.3. H con DA (Digital to Analog).

2.2.3.4. H con Vo/Ra s (Digital I/O)

2.2.3.5. H con b m ho so lch

2.2.3.6. Thanh ghi iu khin vo ra IOCTL

2.2.3.7. S chn I/O Connector ca DS1104

2.3. Phn mm dSPACE

2.3.2. Cc khi dSPACE trong Simulink

2.3.2.1. Cc iu khin vo/ra tng t

2.3.2.2. Cc iu khin vo/ra s

2.4. Mt s cc tnh nng c bn ca Card DS1104 cho iu khin

2.4.2. iu khin PWM (Pulse Width Modulation)

S ha bi Trung tm Hc liu i hc Thi Nguyn

2.5. To ng dng vi dSPACE v Simulink

2.5.1. To ng dng vi Control Desk