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DC-DC Converter Design
DC-DC Converter Design
CHAPTER 1
INTRODUCTION
INTRODUCTION
The Converters widely used in many industrial applications. The Dc-Dc converter
according to the Linear and Switching regulators has been used in many radar
applications. The main basic converters of Dc-Dc converters are Buck, Boost and BuckBoost Converters. Radar applications of Dc-Dc converters are Military, Remote Sensing,
Air Traffic Control, Law Enforcement and Highway Security, Air Craft and Navigation,
Ship Safety, Space, Miscellaneous Applications. Space vehicles have used radar for
clocking and for landing on the moon, used for planet exploration, ground based radars
are used for detection and other space objects also used for radio astronomy. Using these
converters make system size reduced, EMI/EMC compatible, and highly efficient (up to
95%), gives efficient voltage regulation, pulse width modulation is used for controlling
the on-off time of the transistor and holds the output voltage constant under varying line
or load conditions.
CHAPTER 2
DC-DC CONVERTER
DC-DC CONVERTERS
Dc-Dc converter is an electronic circuit which converts a source of direct current
(DC) from one voltage level to another voltage. Its a class of power converter. DC to DC
converters are important in portable electronic devices such as cellular phones and laptop
computers, which are supplied with power from batteries primarily. Such electronic
devices often contain several sub-circuits, each with its own voltage level requirement
different from that supplied by the battery or an external supply (sometimes higher or
lower than the supply voltage). Additionally, the battery voltage declines as its stored
energy is drained.
Switched DC to DC converters offer a method to increase voltage from a partially
lowered battery voltage thereby saving space instead of using multiple batteries to
accomplish the same thing. Most DC to DC converters also regulate the output voltage.
Some exceptions include high-efficiency LED power sources, which are a kind of DC to
DC converter that regulates the current through the LEDs, and simple charge pumps
which double or triple the output voltage. DC to DC converters developed to maximize
the energy harvest for photovoltaic systems and for wind turbines are called power
optimizers.
CHAPTER 3
TOPOLOGIES OF DC-DC CONVERTER
Flyback converter.
Cuk converter.
Inverter converter.
Half bridge converter.
Full bridge converter.
Circuit Description:
This converter enables to step down a voltage from high level to low level. The
output voltage is lower than the input voltage, and of the same polarity. A PWM buck
dcdc converter circuit is depicted in Figure 3.1(a). It consists of four components: a
power MOSFET used as a controllable switch S, a diode D1, an inductor L, and a filter
capacitor C. Resistor RL represents a dc load. Power MOSFETs are the most
commonly used controllable switches in dcdc converters because of their high
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Figure(3.1): PWM buck converter and its ideal equivalent circuits for CCM. (a)
Circuit. (b) Equivalent circuit when the switch is ON and the diode is OFF. (c) Equivalent
circuit when the switch is OFF and the diode is ON.
Where ton is the time interval when the switch S is closed and toff is the time
interval when the switch S is open. Since the duty cycle D of the drive voltage vGS varies,
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Figure (3.2): Idealized current and voltage waveforms in the PWM buck converter for
CCM.
3.2 Assumptions
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(3.3)
Where iL (0) is the initial current in the inductor L at time t = 0. The peak inductor current
Becomes
(3.4)
and the peak-to-peak ripple current of the inductor L is
(3.5)
The diode voltage is
(3.6)
Thus, the peak value of the diode reverse voltage is
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(3.8)
The increase in the magnetic energy stored in the inductor L during the time interval 0
to DT is given by
(3.9)
The time interval 0 to DT is terminated when the switch is turned off by the driver.
3.2.2 Time Interval DT < t T
During the time interval DT < t T, the switch S is OFF and the diode D1 is ON.
Figure 3.1(c) shows an ideal equivalent circuit for this time interval. Since iL (DT) is
nonzero at that instant the switch turns off and since the inductor current iL is a
continuous function of time, the inductor acts as a current source and turns the diode on.
The switch current iS and the diode voltage vD are zero and the voltage across the
inductor L is
(3.10)
The current through the inductor L and the diode can be found as
(3.11)
Where iL (DT) is the initial condition of the inductor L at t = DT. The peak-to-peak ripple
current of the inductor L is
(3.12)
Note that the peak-to-peak value of the inductor current ripple _iL is independent of the
load current IO in CCM and depends only on the dc input voltage VI and thereby on
the duty cycle D. For a fixed output voltage VO, the maximum value of the peak-to-peak
inductor ripple current occurs at the maximum input voltage VImax, which corresponds to
the minimum duty cycle Dmin. It is given by
(3.13)
The switch voltage vS and the peak switch voltage VSM are given by
(3.14)
The peak diode and switch currents are given by
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(3.15)
This time interval ends at t = T when the switch is turned on by the driver.
The decrease in the magnetic energy stored in the inductor L during time interval DT <t
T is given by
(3.16)
For steady-state operation, the increase in the magnetic energy _WL(in) is equal to the
decrease in the magnetic energy _WL(out).
3.2.3 Device Stresses for CCM
The maximum voltage and current stresses of the switch and the diode in CCM for
steadystate operation are
(3.17)
and.
(3.18)
3.2.4 DC Voltage Transfer Function for CCM
The voltage and current across a linear inductor are related by Faradays law in its
differential form,
(3.19)
For steady-state operation, the boundary condition
(3.20)
is satisfied. Rearranging (3.19),
(3.21)
and integrating both sides yields
(3.22)
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(3.23)
The average value of the voltage across an inductor for steady state is zero. Thus,
(3.24)
This equation is also called a volt-second balance for an inductor, which means that
voltsecond stored is equal to volt-second released.
For PWM converters operating in CCM,
(3.25)
from which
(3.26)
This means that the area enclosed by the positive part of the inductor voltage waveform
A+ equals the area enclosed by the negative part of the inductor voltage waveform A,
that is,
(3.27)
where
(3.28)
and
(3.29)
Referring to Figure 3.2,
(3.30)
which simplifies to the form
(3.31)
For a lossless converter, VI II = VOIO. Hence, from (3.31), the dc voltage transfer
function(or the voltage conversion ratio) of the lossless buck converter is given by
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(3.32)
The range of MV DC is
(3.33)
Note that the output voltage VO is independent of the load resistance RL. It depends only
on the dc input voltage VI and the duty cycle D. The sensitivity of the output voltage with
respect to the duty cycle is
(3.34)
In most practical situations, VO = DVI is constant, which means that if VI is increased, D
should be decreased by a control circuit to keep VO constant, and vice versa.
The dc current transfer function is given by
(3.35)
and its value decreases from to 1 as D is increased from 0 to 1.
From (3.8), (3.14), and (3.32), the switch and the diode utilization in the buck converter
is characterized by the output-power capability
(3.36)
As D increases from 0 to 1, so does cp.
3.2.5 Boundary between CCM and DCM
Figure 3.3 depicts the inductor current waveform at the boundary between the
continuous conduction mode and the discontinuous conduction mode. This waveform can
be described by
(3.37)
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Figure 3.3 Waveforms of the inductor current at the CCM/DCM boundary at VImin and
VImax.
resulting in the peak inductor current
(3.38)
Hence, one obtains a dc load current at the boundary
(3.39)
and the load resistance at the boundary
(3.40)
Figures 3.4 and 3.5 show the normalized load current IOB/(VO/2 fsL) = 1 D and the
load resistance RLB/(2 fsL) = 1/(1 D) at the CCM/DCM boundary as functions of the
duty cycle D, respectively.
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Figure 3.5 Normalized load resistance RLB/(2 fsL) at the CCM/DCM boundary as a
function of the duty cycle D for buck converter.
For the worst case,
(3.41)
Hence, the minimum inductance required to maintain the CCM operation for the duty
cycle ranging from Dmin to Dmax is
(3.42)
As the switching frequency fs increases, the minimum inductance Lmin decreases.
Therefore, high switching frequencies are desirable to reduce the size of the inductor. In
some applications, the inductance L can be much higher than Lmin in order to reduce the
ripple current through the inductor and the filter capacitor. Therefore, it is easier to reduce
the output voltage ripple, to avoid the core saturation, and to reduce the winding and core
losses. If the dc output current IO and the dc input voltage VI are fixed, the peak-to-peak
inductor current _iL = 2IO can be made very large while maintaining the converter
operation in CCM. In this case, the ripple current of the inductor should be limited (e.g.
_iL/(2IO) 10 %).
3.2.6 Ripple Voltage in Buck Converter for CCM
The input voltage of the second-order low-pass LCR output filter is rectangular
with a maximum value VI and a duty cycle D. This voltage can be expanded into a
Fourier series
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(2.43)
The components of this series are transmitted through the output filter to the load. It is
difficult to determine the peak-to-peak output voltage ripple Vr using the Fourier series of
the output voltage. Therefore, a different approach will be taken to derive an expression
for Vr .
The output part of the buck converter is shown in Figure 3.6. The filter capacitor in this
figure is modeled by its capacitance C and its equivalent series resistance (ESR)
designated by rC . Figure 3.7 depicts current and voltage waveforms in the converter
output circuit. The dc component of the inductor current flows through the load resistor
RL, while the ac component is divided between the capacitor C and the load resistor RL.
In practice, the filter capacitor is designed so that the impedance of the capacitive branch
is much less than the load resistance RL. Consequently, the load ripple current is very
small and can be neglected. Thus, the current through the capacitor is approximately
equal to the ac component of the inductor current, iC iL IO.
For the interval 0 < t DT, when the switch is ON and the diode is OFF, the
capacitor current is given by
(3.44)
resulting in the ac component of the voltage across the ESR,
(3.45)
The voltage across the filter capacitance vC consists of the dc voltage VC and the ac
voltage vc , vC = VC + vc . Only the ac component vc may contribute to the output ripple
voltage.
The ac component of the voltage across the filter capacitance is given by
(3.46)
In steady state, vc (DT) = vc (0). The waveform of the voltage across capacitance C is a
parabolic function. The ac component of the output voltage is the sum of voltage across
the filter capacitor ESR rC and the filter capacitance C,
(3.47)
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Figure 3.7 Waveforms illustrating the ripple voltage in the PWM buck converter.
Let us consider the minimum value of the voltage vo . The derivative of the voltage vo
with respect to time is
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(3.48)
Setting this derivative to zero, the time at which the minimum value of vo occurs is given
by
(3.49)
The minimum value of vo is equal to the minimum value of vrc if tmin = 0. This occurs at
a minimum capacitance given by
(3.50)
Consider the time interval DT < t T when the switch S is OFF and the diode D1
is ON. Referring to Figure 3.7, the current through the capacitor is
(3.51)
resulting in the voltage across the ESR,
(3.52)
and the voltage across the capacitor,
(3.53)
Adding (3.52) and (3.53) yields the ac component of the output voltage,
(3.54)
The derivative of vo with respect to time is
(3.55)
Setting the derivative to zero, the time at which the maximum value of vo occurs is
expressed by
(3.56)
The maximum value of vo is equal to the maximum value of vrc if tmax = DT. This
occurs at a minimum capacitance given by
(3.57)
The peak-to-peak ripple voltage is independent of the voltage across the filter capacitance
C and is determined only by the ripple voltage across the ESR if
(3.58)
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(3.61)
resulting in
(3.62)
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Figure 3.8 Waveforms of vc , vrc, and vo at three values of the filter capacitor for CCM.
(a) C < Cmin. (b) C = Cmin. (c) C > Cmin
Waveforms of vrc, vc, and vo are depicted in Figure 3.8 for three values of the
filter capacitance C. In Figure 3.8(a), the peak-to-peak value of vo is higher than the peaktopeak value of vrc because C < Cmin. Figure 3.8(b)(c) shows the waveforms for C =
Cmin and C > Cmin, respectively. For both these cases, the peak-to-peak voltages of vo
and vrc are the same. For aluminum electrolytic capacitors, CrC 65 106 s.
If condition (3.58) is not satisfied, both the voltage drop across the filter capacitor C
and the voltage drop across the ESR contribute to the ripple output voltage. The
maximum increase of the charge stored in the filter capacitor in every cycle T is
(3.63)
Hence, using (3.38), the voltage ripple across the capacitance C is
(3.64)
where fo = 1/(2LC) is the corner frequency of the output filter. The minimum filter
capacitance required to reduce its peak-to-peak ripple voltage below a specified level
VCpp is
(3.65)
Thus, Cmin is inversely proportional to fs^2 . Therefore, high switching frequencies are
desirable to reduce the size of the filter capacitor.
Using (3.38), the peak-to-peak voltage ripple across the ESR is
(3.66)
Hence, the conservative estimation of the total voltage ripple is
(3.67)
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(3.79)
where CJ 0 is the zero-bias junction capacitance and VB is the built-in potential barrier,
which ranges from 0.55V to 0.9 V. From (3.79),
(3.80)
Manufacturers of power MOSFETs usually specify the capacitances Crss = Cgd, Ciss
=Cgs + Cgd, and Coss = Cds + Cgd at f = 1MHz. The capacitances Crss and Coss are
measured at VDS = 25V and VGS = 0V. Hence, Cds25 = Coss Crss. The output
capacitance at vDS = VI is
(3.81)
Since dQ = CdsdvDS, the charge transferred from the dc input voltage source VI to the
drain-to-source junction capacitance Cds during the turn-off transition is given by
(3.82)
Hence,
(3.83)
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(3.84)
Because dWs = QdvDS/2, the energy stored in the drain-to-source capacitance Cds at vDS
is
(3.85)
Hence, one obtains the energy stored in Cds at VI ,
(3.86)
Therefore, the energy lost in the resistance of the charging path of the MOSFET output
capacitance is
(3.87)
Hence, the switching power loss dissipated in the resistance r of the path of charging the
transistor output capacitance is
(3.88)
The transistor equivalent linear output capacitance that causes the same switching power
loss in the charging path resistance r during the turn-off transition as the linear one is
derived as
(3.89)
producing
(3.90)
During the turn-on transition, all the energy stored in the transistor output
capacitance
is lost in the MOSFET on-resistance rDS:
(3.91)
Thus, the MOSFET turn-on switching loss is
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(3.92)
The transistor equivalent linear output capacitance that causes the same switching power
loss in the MOSFET on-resistance during the turn-on transition as the linear one can be
obtained as
(3.93)
resulting in
(3.94)
The total switching energy loss in each cycle of the switching frequency is
(3.95)
and the total switching loss in the converter is
(3.96)
The transistor equivalent linear output capacitance Ceq(sw) that produces the same
amount
of the switching loss as the nonlinear one at a given VI can be derived as
(3.97)
yielding
(3.98)
The turn-off switching power loss is twice as high as the turn-on switching power loss for
the MOSFET with a nonlinear output capacitance:
(3.99)
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