8085

-
:
, ALU

.
/
( )
:
( ).
, .
.
.

.
,
(ALU),
,

(T&C) .

.

.
( opcode)
( operand),
.
Stek
.
LIFO (Last In First Out)
:
.

,
.
8085
. :
,
,
,
,
/ ,

DMA,
.
8085 :
,
,
,
/ ,
,
/ ,
,
.

6
B, C, D, E, H L 8-
(B, C), (D, E) (H, L)
16
.
(ACC)
8- registar ALU
8-

.
A

(Flag Register)
5 flip-flop-()
.
: Zero(Z), Carry(CY), Sign(S), Parity(P) Auxiliary Carry(AC)
Sign (S)flag: MSB 1,
.
Zero (Z) flag: ,
.
Auxiliary Carry (AC) flag: 3 4

.
Carry (CY) flag: (
) ( ) D7
.
Parity (P) flag:
.
(PC)
16-
.

 ( 8085
16 16 )


Stek (SP)
, 16-
() .
(PUSH, POP,
.)
SP .
T&C
.
, , ,
DMA .

.

.
TRAP, RST
7.5, RST 6.5, RST 5.5, INTR.
INTR.
I/O SID SOD. DMA HOLD HLDA.
RESETIN RESET OUT.
30 8085 ALE Address Latch
Enabled.
ALE
(AD0AD7).
12 19 8085 AD0AD7
.
8085.

:
(Implicit)
(Register)
(Immediate)
(Direct)
(Indirect)


(
)

 1-
: ADD M;(A) (A)+(M)

1-
: MOV D, B;(D) (B)

() .

.
3-
: MVI B, 65H;(B) 65H
LXI B, 1234H;(B, C) 1234H

2- 3-
2. 3.
: LDA 0123H;(A) [0123H]
IN 00H;(A) [00H]
OUT 01H;(A) [01H]

(
) (B-C, D-E ili H-L)
: MOV A, M;(A) [H-L]
LDAX B;(A) [B-C]
8085

.
/ .
:
( ) .

(
.).
8085.
TRAP, RST 7.5, RST 6.5, RST 5.5 INTR.

.
.

 8085 8 () RST 0
RST 7.
TRAP RST 7.5, RST 6.5,
RST 5.5 INTR.

8085 5 ,
3 (23 = 8, 7 ).
, 8085.
:
- ;
- ; (
.
.)
- ; ( . I
. X
.)
- (, ); (
. CALL)
- ;
o o 8085
oo e
oo .
8
.

.
T&C
. : Clock
, , , DMA
.
,


.
: ALE, RD, WR, IO/M, S0, S1 READY.
: TRAP, RST 7,5, RST6,5, RST 5,5, INTR, INTA
(acknowledgement) INTR .
/ :SID SOD.
DMA HOLD HLDA.
RESET IN RESET OUT.
8085 7 . :



/
/

(Bus idle)
, (1,2 3 )
.

(IC).
(Fetch Cycle
(FC)) (Execute Cycle (EC)). IC = FC + EC.
:
(opcode) .
,
,
. 0 ( RAR),
2 ( STA 4059 H

.
,
.
. ,
(8- ) 3-
.

o o (AD0 AD7) o
o-oo
oo 1 o o , o o o
.
ooo (8-15) o o 1 o 3
oo o o o o o
.
ALE o o oo ooo 1 o
o o o o 1 o o
o o .
ALE 1
(A0 A7)
A0 A7
.
-
, 2 3
.
,
3,
2.
IO/ M , S0 S1.

.

.
RD ,
/ .
WR
/ .
.

(Fetch).

.
4T 6T ( )
.
,
,

 ( IO/M, S0 S1) ALE .

1.
2, RD
,
(D0-D7).
3,
(IR) RD ,
.
4, , IR,
5 6 1 .
8
4. ADD B, MOV C, B; RRC, DCR C.
3
.
, R/W
( ) ROM,
.
(IO/M, S0, S1)
.
2.
3 ,
(,,) RD
, .
3 WR
.
/
.
IO/M ,

/ .
3 .
I/O ,
2 3 , I/O ,
.
1, RST . CALL
.
2 3.
2 3 2
CALL .
4 5

.


,
.
DAD
RST
TRAP .
ALE 1
, (bus Idle),
LE .
8085
.
1 5

3-6 .
STA
2 3 .

/ .
.
,

,
(WAIT)
READY .

READY ,
.
()
.
Opcode fetch ( DCX)
3 (IO-M#,
S1,S0)

INTEL 8086 8088

8088 8 , 8086 16
.
40 5V
.
:
.
20 1 .
2 : .

 40 . .
.
.
.
.
( ).
8288 .

16

.

:
fetch



EU ( )
BIU ( ) fetch
, .
:
16 ALU EU

.
,
BIU.
16 ,
BIU 20
.
:
BIU EU,
.
(
8086- 6 , 8088- 4 )
fetch 1
8088 2 8086.

.
:
8 16
4

 (H L )-
8 .
( P I )


( 64 )
4 ,
. CS (Code), SS
(Stack), DS (data),ES (extra)
(IP)
16 , .
BIU.
( )
.
(
BIU)
IP,
.
:
6 U



TF Trap
DF- Direction
IF- Interrupt enable

OF-overflow, SF- Sign, ZF-zero, AF- Auxillary Carry, PFParity, CF-Carry


Intel 8284- Clock Generator/Divider
,

wait .

.
CLK, PCLK (Peripheral Clock)
.

MN/MX- +5V
.

BUS LOCK. BIU LOCK EU 1
LOCK .
. , LOCK
HLDA HOLD
.

 WAIT TEST- EU WAIT ,

TEST (
5 clock-).
REQUEST/GRANT .
- 8086/8088 max , HOLD HLDA
2 RQ/GT0 RQ/GT1
(request/grant).
- 8086
(8088) handshake .
-request/grant 3 request, grant release.
- request/grant ,
HLDA
. BIU e .

8086.
-RQ/GT0 RQ/GT1

8086 1 048 576

.

double word.

8086 1
.
64


16-
.

.

:

 20
.
0h FFFFFh.

,
.


,
.
16 .

.
BIU
, 4
( 16)
.
CS
IP
SSSP

DS
U.

DS.
SI (source index).
ES,
DI (destination index)
String SI DI
.

SS SP
,
64

SS SP
8086 16

 SP 2
.
, SP
2.


( reset )

0h-7Fh (128 ) FFFF0h-FFFFFh(16 )
8086
8 16
.

, 8086 ,
2 .
, 16-
( ).
fetch ,
fetch
8088 .

/ (I/O)
I/O.
I/O 64 8
32 16- .
IN OUT
.
I/O
, BIU (0-64)
16 .
I/O

.
Direct memory access (DMA) HOLD HLDA
DMA 8257 8237

, .
256

.

INTR NMI
.

 INTR 8259 (PIC)

INTR IF .

.
STI (set interrupt enable flag) a
CLI (Clear interrupt enable flag)

8159
INTA .
INTA 8259
.
INTA 8259
1
.

irq .
NMI
.

( ,
)
e
INTR.

INT
. .
F e , INTO (interrupt on overflow)
4
irq0 DIV IDIV

F irq1
.
,
single step
.

256 ,
double word .

4 ( = *4)
push
CALL .

push CS IP ,

 irq
.
CS IP
, TF IF .
NMI

IRET

8212 8282 8286

.
:
- I/O.
- (strobe-).


.
:
- .
- .
- .
8212 8 I/O
I/O 8212, 8085.
8 , 8 , 2 ,1 strobe ,
, , CLR.
8282/8283
-8282/8283 - .
- .
8286/8287 bus
-8286/8287 8 .
-20 .
8155/8156 256x8 Static RAM

-2 RAM (256x8)
- 8 I/O (PA PB)

-14 /.
( ) 8255
-Mode 0 ( /)
8- 4
. ,
.
16 / .
-Mode 1 (strobed /)

( )
8- 4
/ .
8 .
.
-Mode 2 ( )
.
8 ( ) 5
( ).
.

Intel 8251
.
Full Duplex, .
.
28 .
Universal Synchronous/Asynchronous Receiver/Transmitter (USART).
- ,
/,
/,
.
- , a
.

-Data Bus Buffer; 3-state, 8 .
IN/OUT .
-Read/Write Control Logic
8251.
.
-Reset 8251 Idle .
-CLK clock (8224).
- #WR 0 CPU 8251.
-#RD 0 CPU 8251.

- C/#D 1 / , 0 .
- #CS 8251 .
-Modem Control
( ).
-#DSR , CPU
.
- #DTR .
- #RTS .
- #CTS
TxEN .
-Transmitter buffer
,
TxD.
-Transmitter Control .

TxD
TxRDY CPU
.
CPU status read .
CPU .
#TxC .
baud .
baud x (16,64).
.
-
-RxD
-RxRDY 8251
CPU.
Status Read (polled ).
-#RxC . ,
baud .
baud x (16,64).
#RxC.

- :
,
, , ,
/ .

- , TxRDY , 8251
CPU . , , RxRDY
CPU .
-, TxEN #CTS.
()
CPU, 8251
. ,
.
TxD ( TxC)
1,1/16 1/64 TxC ( Mode
Instruction).
()
RxD 1,
. counter (
). ,
. Data Bus
Buffer- RxRDY CPU
fetch. CPU ,
OVERRUN (
8251).
Command Instruction
-

Mode

Command

Intel 8259

-8086: (NMI, INTR)
- =
- :
PIC (Programmable Interrupt Controller)
-

8086 INTR ?
8086 IF INTR :
1. INTA INTA 8259A PIC (
8259A)

2. IVT (
4)
3.
4. IF TF
5.
6. IVT CS IP
7.
- 8 CPU
-
-
64
-28
-
-

8259A
-IMR (Interrupt Mask Register)
-IRR (Interrupt Request Register)
-ISR (Inservice Register)
-Priority solver
8259A
IMR (Interrupt Mask Register)
-()
-Bit
- 0 .

IRR (Interrupt Request Register)

-Bit
-

-

ISR (Inservice Register)
-Bit

-

Priority solver
-

8259A
8
- 8259A 15


- 8259A 64
- 8086: INTR
-Master INT 8086
_ CAS0, CAS1 CAS2
- Slave - , 8259A
_ INT IR master
_ CAS0, CAS1 CAS2
_ SP/EN
- INTA 8086 -> master slave-

-Slave IR
-Master INT 8086 INTR
IR :
1.
2.

-IF=1: 8086 slave-
o INTA:
-Slave- a
-Master- CAS0..2 3- id slave-.
slave-
o INTA:
-slave- 8086

- master-
- ,
8086 INTA .
8259A
1.
2.
3.
4.
5.
6.

-
-ICW (1-4)
-
-OCW (1-3)
End of Interrupt (EOI)
- AEOI (D1 ICW4)

- ISR,
INTA .
-EOI (D7, D6 D5 OCW2) 8259.
- EOI, 8259 e FNM.
-OCW2 (R = 0, SL = 0, EOI = 1)
- EOI, 8259 FNM.
-OCW2 (R e 0, SL e 1, EOI e 1) L0, L1
L2 ISR

- ( )
-

/
, .
.
( 70- ) nm (
).
?

( ), .
,
. .

.
:
, ,
..

 , , ,
, ..


.
: (
), , - ..

.
,
.

.
: ,
, , ,
, ,
..

(RAM)
(ROM).
ROM ROM :
PROM , .
.
EPROM ,
UV .
EEPROM
,
/.
FLASH.

,
/.


, .
.
: , ,
, ..
,
.


,

, ,

, , , ,
, , ..
: MSP430 (16-bit), CF (32-bit), ARM,
MPIC(32-bit), S08, AVR, PIC, V850, PowerPC ISE, PsoC . [10].

.

.
,
: (GPR-General Purpose
Registers) (SFR-Special Functional
Register ).
SFR -
.
SFR - ,
.
GPR - ,
, . GPR ,
.


.
,
HARVARD ,
[2].

,
,
, . 8
8-
, 8
,
.
.

CISC (CISC-Complex Instruktion Set
Computer )
.
HARVARD
HARVARD ,
.

 .

,

.
HARVARD ,
RISC ( RISC-Reduced Instruction Set Computer)
.
RISC CISC
.
. ,
CISC ,
RISC .


ROM .
.
, , .
,

.
C,
Java, Paskal ..
,

.
, ,
.

Microchip's MPLAB Keil uVision3.
,

.
...?
:
.
:
1. .
, ;
2. :
a) ;
b) / -
, ;

c)
.
;
d)
. .

.

;
3. ().
, ,

, .

, , ,
..
?

: , , ,
, , , , ..
(
)
.
,
, , ,
.
Flash
Flash ()
(in-circuit). Flash ,
.
(1KB) (64KB). ,
. Flash 100000
/.

(
) , .
,
.
,

..
.
:
1) -/,
,
. ,

 .HEX
(hexadecimal).
2)
( :
, ),
.
: ,
( , )
, (
).
: , ()

, (
) .
()
.
:
() .
.
.

.
/
, ,
.
/
.
(, C
..) . ,
(Notepad,
WordPad). ,
.
,

.


: ,
,
, ,
(, ), ,
, , , ..
:
. .

.



.
,
(RS-232), (LPT) USB .


.
:
, ,
..

,
.