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MOSIS Designrules
MOSIS Designrules
GDS
CIF
CIF
Synonym
Rule
Section
Notes
N_WELL
42
CWN
ACTIVE
43
CAA
THICK_ACTIVE
60
CTA
POLY
46
CPG
SILICIDE_BLOCK
29
CSB
N_PLUS_SELECT
45
CSN
P_PLUS_SELECT
44
CSP
CONTACT
25
CCC
POLY_CONTACT
47
CCP
ACTIVE_CONTACT 48
CCA
METAL1
49
CM1
CMF
VIA
50
CV1
CVA
METAL2
51
CM2
CMS
VIA2
61
CV2
CVS
14
METAL3
62
CM3
CMT
15
VIA3
30
CV3
CVT
21
METAL4
31
CM4
CMQ
22
VIA4
32
CV4
CVQ
25
METAL5
33
CM5
CMP
26
CAP_TOP_METAL
35
CTM
28 Optional
VIA5
36
CV5
29
METAL6
37
CM6
30
DEEP_N_WELL
38
CDNW
31
GLASS
52
COG
10
PADS
26
XP
Comments
--
CX
Comments
24 Optional
3
20 Optional
CCG
5, 6
Lambda
Description
Minimum width
10
12
12
1.2
18
18
1.3
1.4
Lambda
Description
Minimum width
3*
3*
2.2
Minimum spacing
2.3
2.4
2.5
* Note: For analog and critical digital designs, MOSIS recommends the following
minimum MOS channel widths (active under poly) for AMIS designs. Narrower
devices, down to design rule minimum, will be functional, but their electrical
characteristics will not scale, and their performance is not predictable from MOSIS
SPICE parameters.
Process
Design Lambda
(micrometers)
Minimum Width
(lambda)
SCNA, SCNE
0.80
AMI_C5F/N
SCN3M, SCN3ME
0.35
AMI_C5F/N
SCN3M_SUBM,
SCN3ME_SUBM
0.30
10
AMI_ABN
Design Technology
Rule
Lambda
Description
SCMOS
SUBM
DEEP
24.6
Lambda
Description
SCMOS
SUBM
DEEP
3.1
Minimum width
3.2
3.2.a
3.3
2.5
3.4
3.5
Lambda
Description
SCMOS
SUBM
DEEP
20.1
Minimum SB width
20.2
Minimum SB spacing
20.3
20.4
20.5
20.6
Resistor is poly inside SB; poly ends stick out for contacts
the entire resistor must be outside well and over field
20.7
20.8
20.9
20.10
20.11
NOTE: Some processes do not support both silicide block over active and
silicide block over poly. Refer to the individual process description
pages.
Lambda
Description
4.2
4.3
1.5
4.4
Simple
Contact to Poly
Rule
Alternative
Contact to Poly
Lambda
Description
Rule
5.2
5.3
5.4
Exact contact
size
Minimum poly
overlap
Minimum
contact
spacing
Minimum
spacing to
gate of
transistor
SCMOS
2x2
2x2
2x2
5.2.b
1.5
1.5
1.5
Description
Minimum poly
overlap
Lambda
SUBM DEEP
1
Minimum
5.5.b spacing to
other poly
Minimum
spacing to
5.6.b
active (one
contact)
Minimum
spacing to
5.7.b
active (many
contacts)
Simple
Contact to Active
Rule
Alternative
Contact to Active
Lambda
Description
Rule
6.2
6.3
6.4
Exact
contact size
Minimum
active
overlap
Minimum
contact
spacing
Minimum
spacing to
gate of
transistor
2x2
1.5
2x2
1.5
Lambda
Description
2x2
Minimum
6.2.b active
overlap
1.5
Minimum
spacing to
6.5.b
diffusion
active
Minimum
spacing to
6.6.b field poly
(one
contact)
Minimum
spacing to
6.7.b field poly
(many
contacts)
Minimum
6.8.b spacing to
poly contact
Lambda
Description
Minimum width
7.2
Minimum spacing
7.3
7.4
Lambda
Rule
Description
2 Metal Process
3+ Metal Process
Exact size
2x2
n/a
n/a
2x2
2x2
3x3
8.2
n/a
n/a
8.3
n/a
n/a
8.4
n/a
n/a
n/a
n/a
n/a
n/a
8.5
Description
2 Metal Process
3+ Metal Process
Minimum width
n/a
n/a
9.2
Minimum spacing
n/a
n/a
9.3
n/a
n/a
9.4
n/a
n/a
Vias must be drawn orthogonal to the grid of the layout. Non-Manhattan vias are not allowed.
Lambda
Rule
Description
3 Metal Process
4+ Metal Process
2x2
2x2
n/a
2x2
2x2
3x3
n/a
n/a
n/a
n/a
Description
3 Metal Process
4+ Metal Process
Minimum width
n/a
15.2
n/a
15.3
n/a
15.4
n/a
Lambda
Rule
Description
4 metal Process
5+ Metal Process
2x2
2x2
n/a
n/a
2x2
3x3
3*
n/a
n/a
n/a
n/a
* Exception: Use lambda=4 for rule 21.2 only when using SCN4M_SUBM
for Agilent/HP GMOS10QA 0.35 micron process
Description
4 Metal Process
5+ Metal Process
n/a
n/a
n/a
n/a
n/a
n/a
12
12
n/a
n/a
Lambda
Rule
Description
5 Metal Process
6+ Metal Process
SCMOS
SUBM
DEEP
SCMOS
SUBM
DEEP
25.1
Exact size
n/a
2x2
3x3
n/a
2x2
3x3
25.2
Minimum spacing
n/a
n/a
25.3
n/a
n/a
Lambda
Rule
Description
5 Metal Process
6+ Metal Process
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
Process
Bottom Plate
Top Plate
TSMC_025
METAL4
CAP_TOP_METAL
TSMC_018
METAL5
CAP_TOP_METAL
Rule
Lambda
Description
SCMOS
SUBM
DEEP
28.1
n/a
40
45
28.2
n/a
12
14
28.3
n/a
28.4
n/a
28.5
n/a
28.6
n/a
28.7
n/a
25
25
28.8
n/a
28.9
n/a
28.10
n/a
20
23
28.11
n/a
40
45
28.12
n/a
30 um
28.13
n/a
35 um
Lambda
Rule
Description
6 Metal Process
SCMOS SUBM DEEP
n/a
3x3
4x4
n/a
n/a
Lambda
Rule
Description
6 Metal Process
SCMOS SUBM DEEP
n/a
n/a
n/a
n/a
10
10
30.4
Rule
Lambda
Description
n/a
30
34
n/a
50
56
31.3
n/a
15
17
31.4
n/a
20
23
31.5
n/a
35
39
31.6
n/a
31.7
n/a
30
34
31.8
n/a
10
13
Rule
Description
Microns
10.1
60
10.2
20
10.3
10.4
30
10.5
15