CONSUMER INTEGRATED CIRCUIT HANDBOOK @ PLESSEY iit é, mh ; iy i* vr vn ill i i lin ‘i AvCONSUMER INTEGRATED CIRCUIT HANDBOOK @PLESSEY PLESSEYDesigned and produced by Peter Wigens Consultants ©The Plessey Company Limited March 1981 Publication No. P.S.1911 This publication is issued to provide outline information only and (unless specifically agreed to the contrary by the Company in writing) is not to form part of any order or contract or be regarded as a representation relating to the products or services concerned. We reserve the right to alter without notice the specification, design, price or conditions of supply of any product or service.Product index Selection guide Datasheet construction Ordering information Quality data Soldering information Technical data Package outlines Plessey World Wide Contents Page 5 8 17 18 19 20 a1 211 221Product index TYPE NO. cT1010 cTi011 cT1117 cT1133 cT1134 cT1650 cT2010 cT2012 cT2014 T2015 12017 T2030 T2031 T2032 T2033 ct2200 ML231B ML232B ML237B ML238B ML239B ML920 ML922 ML923 M924 ML925 ML926 ML927 M928 ML929 ML1900 ML1910 ML1911 DESCRIPTION +64 high speed prescaler Frequency synthesiser Synthesiser peripheral circuit Programmable divider/ROM ‘Synthesiser control circuit Microprocessor synthesiser control 1GHz, +380/400 prescaler PLL synthesiser for TV Multistandard synthesiser control Multistandard synthesiser control Synthesiser timing interface European PAL standard key French standard key N. American standard key British standard key Double 7 segment display driver 6-channel touch switch 6-channel touch switch 6-channel touch switch &-channel touch switch &channel touch switch 20 programme TV remote control receiver 10 programme TV remote control receiver 16 programme TV remote control receiver 32 command remote control receiver Remote control receiver for toys 15 command remote control receiver 15 command remote control receiver 16 command remote control receiver 16 command remote control receiver 56 code remote control transmitter 32 programme TV remote control receiver 32 programme TV remote control receiver PAGEML2001 ‘ML2040 SL439 SL470 ‘SL480 SL490 SL491 SL901 SL917 ‘SL952 SLOSS SL1430 ‘SL1431 ‘SL1432 ‘SL1440 P4020 ‘sp4021 sP4040 sP4041 ‘SP4531 ‘sP4s41 ‘SP4545 ‘SP4550 ‘P4551 swis3 swi72 swi73 swi74 swis80 swies sw203 Teletext/Viewdata control interface On-screen display circuit IF filter preamplifier BCD decoder —varicap diode driver Infra-red detector preamplifier 32 code remote control transmitter 32 code remote control transmitter Colour decoder matrix circuit Colour decoder combination VHF/UHF prescaler preamplifier VHF/UHF general purpose preamplifier IF filter preamplifier IF filter preamplifier with tuner AGC IF filter preamplifier with tuner AGC Parallel sound IF system +64 high speed divider 64 high speed divider 256 high speed divider +256 high speed divider 64 high speed divider 256 high speed divider 256/64 high speed divider 256 high speed divider +256 high speed divider SAW IF filter for UK PAL standard SAWIF filter for European PAL standard SAW IF filter for European PAL standard SAWIF filter for European PAL standard Parallel sound IF filter for European PAL standard Parallel sound IF filter for European PAL standard SAWIF filter for American NTSC standard PAGE 13 10 13 13, 75 12,7 12, 81 12, 85 13 13 10, 87 8, 89 8,91 8, 95 8, 95 9, 99 10, 102 10, 102 11, 103 11, 103 11, 107 W111 11,113 14,115 14,115 8, 119 9,119 8,119 8, 119 9, 129 9,119PAGE Sw250 ‘SAW IF filter for French SECAM standard 9,119 ‘Sw260 SAW IF filter for East European SECAM standard 9, 119 sw4s53 ‘SAW IF filter for South African PAL standard 9,119 TAA661 Limiting IF amplifier and FM demodulator 13 TBA1205" Limiting IF amplifier and FM demodulator 9, 133 TBA120T Limiting IF amplifier and FM demodulator 9, 137 TBA120U Limiting IF amplifier and FM demodulator 9, 137 TBA440N Video IF amplifier and demodulator 9, 141 TBA440P Video IF amplifier and demodulator ® 9, 141 TBAS30 RGB matrix preamplifier 10, 145 TBAS40 Reference combination 10, 149 TBA550 TV signal processing circuit 13 TBAS60C Luminance and chrominance control combination 10, 153 ‘TBA750B Limiting IF amplifier/FM detector 9, 157 TBA920 Line oscillator combination 10, 159, TBA920S Line oscillator combination 10, 159 TBA950:2X —_Line oscillator combination 10, 163 TCA800 Colour demodulator with feedback clamps 10, 167 TDA440 Video IF amplifier and demodulator 9,171 ‘TDA1365 Single chip PAL colour decoder combination 10, 175 TDA2522 Colour demodulator and reference combination 10, 179 TDA2523 Colour demodulator and reference combination 10, 179 TDA2530 RGB matrix preamplifier 10, 183 TDA2532 RGB matrix preamplifier 10, 183 TDA2540 Video IF amplifier and demodulator 9, 187 TDA2541 Video IF amplifier and demodulator 9, 187 TDA2560 Luminance and chrominance reference combination 10, 191 TDA2590 Line oscillator combination 10, 195 TDA2591 Line oscillator combination 10, 201 TDA2593 Line oscillator combination 10, 201 TDA9503 Line oscillator combination 10, 207Selection guide This is a selection guide by application to device type. It contains references to some devices (indicated in light type thus: SW180) not otherwise referred to in this databook. Full details of such devices can be obtained from Plessey Semiconductors Ltd., Customers Services, Crowdy's Hill Estate, Kembrey Street, Swindon, SN2 6BA, Wiltshire. Devices marked thus: Os form a family of integrated circuits for use in Multistandard PLL Frequency synthesis systems for TV. Devices marked thus: * are in the development stage. INTEGRATED CIRCUITS FOR TELEVISION PREAMPLIFIER SLOSS General purpose 22dB amplifier for use at frequencies up to 1GHz TUNING SELECTORS ML231B —6-channel touch switch, with facility to select one input at switch-on ML232B Similar to ML231B but with stepping facility ML238B = Similar to ML232B, but with 8 channels and mute ML239B Similar to ML238B, but with negative input select ML237B — Similar to ML239B, but with only 6 channels IF FILTER PREAMPLFIERS. ‘$L1430 Ultra linear fixed gain preamplifier with differential output optimised for driving surface acoustic wave filters “$L1431 Similar to SL1430 but with an intern- ally derived NPN tuner AGC signal output $L1432 AS SL1431 but for PNP tuners SURFACE ACOUSTIC WAVE, SW153_ Complete TV IF filter with the fre- IF FILTERS, quency pass-band and phase res- ponse tailored for UK PAL colour tele- vision system I with a vision carrier frequency of 39.5 MHz $w173 As SW153 but for the European PAL standard, systems B and G with a vision carrier of 38.9MHz swi74 As. SW173_ but _with higher _per- formance and optimised for stereo soundVISION IF CIRCUITS SOUND IF CIRCUITS ‘swi72 swi80 swiss ‘sw203 sw2s0 sw260 swas3 ‘TBAS40N TBA440P ‘TDASO TDA2541 ‘TDA2540 *SL1440 TBA120S ‘TBA1200 ‘TBA120T ‘TBA750B Similar to SW174 but with a lower sound carrier for semi-parallel sound systems Similar to SW172 but with separate outputs for sound and vision signal processing As SW180 but with a vision carrier content in the sound output channel IF filter for the North American NTSC standard, systems M and N with a vision carrier frequency of 45.75MHz IF filter for the French SECAM stan- dard systems L and L’ with a vision carrier frequency of 32.7MHz IF filter for the Eastern European SECAM standard system D with a vision carrier frequency of 38MHz IF filter for the South African PAL standard system I with vision carrier frequency of 38.9 MHz IF amplifier, synchronous detector and AGC system for NPN tuners ‘As TBAAAON for PNP tuners High performance version of the TBA440P Similar to TDA440 but with AFC system ‘As TDA2541 but for NPN tuners Parallel sound system with separate detectors for vision and sound carriers Limiting IF amplifier with product detector for intercarrier FM sound and DC volume contro! Similar to TBA120S but with. addi- tional audio output before the volume control stage ‘As TBA120U but designed for use with ceramic resonators for input and demodulator jar to TBA120S but with separate audio preamplifierCOLOUR DECODERS TIMEBASE CIRCUITS DISPLAY DRIVERS ‘TBASGOC ‘TDA2560 ‘TBAS40 TCA800 TDA2522 TDA2523 ‘TBAS30 ‘TDA2530 ‘TDA2532 TDA1365 ‘TBA920 ‘TBA920S ‘TBA950:2X ‘TDA2590 ‘TDA2591 ‘TDA2593 ‘TDA9503 T2200 M2040 Luminance and chrominance contro! amplifiers with burst gating and colour killer facilities ‘Similar to the TBAS6OC but with mini- mised external adjustments Colour reference combination in- cluding colour subcarrier oscillator, ident, and ACC functions Chroma demodulator, PAL switch, and matrix circuit providing clamped RGB outputs for single transistor drive Similar to TBA540 and TCA800 com- bination but providing colour dif- ference outputs As TDA2522 but phase inverted to provide drive for transistor output stages Used with TDA2522 to provide RGB outputs Similar to TBAS30 but with clamped outputs ‘As TDA2530 but with an extra data blanking input for use with on-screen displays, ‘teletext’ etc. Complete decoder, combines func- tions of TDA2522, TDA2560, and TDA2532 Sync separator and PLL horizontal oscillator ‘As TBA920 but with lower phase error Similar to TBA920S but with vertical sync output Similar to TBA950:2x but providing ‘sandcastle’ blanking pulse output for use with TDA2530 ‘As TDA2590 but with modified ti and higher output current ‘As TDA2591 but with modified sand- castle for use with TDA2532 Similar to TDA2593 but for transi drive only Dual 7 segment display driver. 5-bit binary input, 1 to 32 display output On-screen display for programme number, channel number, channel name, time and day. Control via “keybus” ing jor INTEGRATED CIRCUITS FOR TV FREQUENCY SYNTHESIS: PRESCALER PREAMPLIFIER 10 si9s2 VHF/UHF preamplifier to drive low sensitivity prescalers directly from the tuner's oscillatorPRESCALERS SYNTHESISER CIRCUITS CONTROL CIRCUITS KEYS ROMs sP4020 ‘sp4o2t sP4040 sPao41 T1010 SP4551 ‘P4550 ‘SP4531 SPa541 ‘SP4545 Os cr2010 cr1011 071133 Os cra012 eT1134 O-= craot4 UHF inputs, suitable for frequencies up to 950MHz ‘As SP4020 but with a single input Similar to SP4020 but +256 Similar to SP4021 but +256 +64 high speed divider optimised for use with CT1011 igh sensitivity 1GHz 5volt +256 divider with ECL type complementary ‘outputs ‘As SP4551 but with a single output Similar to SP4551 but +64 Similar to SP4551 but with a single TTL type output Similar to SP4551 but switchable ratios +64 and +256 High sensitivity 1GHz 2 modulus 380/400 divider with low level output for “key system” + 15/16, Xtal oscillator, +4 and phase frequency comparator Programmable divider, fine tune logic, and ROM for 100 TV channels Basic PLL synthesiser including pro- grammable divider, fine tune logic, Xtal oscillator, +1600 and phase fre- quency comparator Control logic for 100 TV channels for use with T1133 Multistandard contro! circuit for use with CT2012 providing 32 pro- grammes, 400 channels, 4 standards, and fine tuning. Output via “keybus” Similar to CT2014 but with channel sweep facility and remotely pro- grammable Microprocessor control circuit for use with CT2012 providing 32 pro- grammes, 100 channels, single stan- dard, fine tuning and channel sweep facility ROM for up to 100 channels with frequency and name information for the European PAL standard. Acces- sed via “keybus” and with interface logic for a nonvolatile programme memory As CT2030 but for the French stan- dard As CT2030 but for the North ‘American standard "O-= 72033 Le INTERFACE CIRCUITS omi7 Os T2017 ‘As CT2030 but for the British Isles standard Active varicap line filter, band switch, and AV logic combination for use with CT1133 Tuner interface, active varicap line filter, station detector, AFC control, and power on detect INTEGRATED CIRCUITS FOR REMOTE CONTROL ‘TRANSMITTERS sL490 sLa91 > ML1900 RECEIVERS sL4g0 ML920 ML922 ML923 ML1911 ‘On ML1910 © ML928 ML929 ML926 ML927 ML924 12 32 code PPM remote control trans- miter with carrier oscillator. Possible transmission media include infra-red, ultrasonic, radio, and line ‘As SL490 but optimised for non- carrier and multiple operation with burst mode 86 code PPM remote control trans- miter with power saving burst mode Infra-red detector preamplifier with direct drive for ML series of receiver! decoders TV remote control receiveridecoder for use with SL490 or SL491. Pro- viding 3 analogue outputs, 20 latched programmes, mute, etc. ‘As ML920 but with 10 latched pro- grammes Similar to ML920 but with a single analogue output and 16 latched pro- grammes, Multifunction remote control receiver decoder for use with ML1900. Providing 288 commands via “key- bus” including 6 analogues, and 32 programmes ‘As ML1911 but with 55 code local control input Receiverldecoder for use with SL490 or SL491. Decodes the first 16 codes as 4 latched outputs ‘As ML928 but operates from second set of 16 codes Similar to ML928 but decodes the first 15 codes as 4 momentary outputs ‘As ML926 but operates from second set of 15 codes Receiveridecoder for use with SL490 or SL491. Decodes 32 codes to 5 bit parallel output and interrupt suitable for use with a microprocessorML925 Multifunction receiveridecoder for use with SL490 or SL491. Provides control of traction motor, auxiliary motor, steering and other functions for toys and models INTERFACE CIRCUITS ‘O-s ML2001 _—Teletext/Viewdata control interface to “keybus” ‘SL470 BCD to 1 out of 10 decoderivaricap driver MAINTENANCE These devices are for maintenance purposes only and are not recommended for new designs: swis0 S439 sL901 L917 ‘sw400 ML236 swi70 TAAG61 ‘TBAS5O 1316Data sheet construction The information in each data sheet in this data book is generally presented in the following order: 1. Device description, including one or more of the following : Features, Applications and Quick Reference Data. 2. A pin connection diagram, including a code reference to the preferred package ‘outline shown at the end of the technical data. This code corresponds to the normal Pro- Electron package code with the addition of a number indicating the lead count, normally viewed from the top unless otherwise stated. 3. A block diagram of the integrated circuit. 4. Absolute maximum ratings, these are limiting values in accordance with the Absolute Maximum System 1EC134, above which operating life may be curtailed or satisfactory performance impaired. 5. Electrical characteristics 6. Operating notes 7. Typical application information 718 Ordering information U.K. ORDERS Orders for quantities up to 99 received by Plessey Semiconductors Ltd. at Swindon will be referred automatically to our U.K. distributors ; quantities of 1000 and over must be ordered from Plessey Semiconductors Ltd. direct, at the following address : Plessey Semiconductors Lid., Crowdy’s Hill Estate, Kembrey Street, ‘Swindon, Wiltshire SN2 6BA Tek: (0783) 694994 Telex: 449637 OVERSEAS ORDERS Products contained in this databook can be ordered from your listed Plessey Office, Agent or Distributor. PLESSEY SEMICONDUCTORS IC TYPE NUMBERING Plessey Semiconductors Ltd. integrated circuits are allocated type numbers which must be used when ordering. The Pro-Electron code is used to identify package outlines. CM ~ Multlead TO DG - Ceramic Dual In-Line DP — Plastic Dual In-Line QP — Plastic Quad In-Line This package code is for reference purposes only and need only be used when ordering where a device is offered in more than one package style. The package code does not appear on the device itself.Quality data DELIVERED PRODUCT QUALITY It is our policy to deliver a reliable quality product and to achieve this end all devices undergo 100% electrical testing of every relevant AC and DC parameter prior to shipment. The devices are tested under conditions of level and frequency closely simulating those of the typical application. Fully automatic Teradyne integrated circuit test machines, acknowledged to be among the best computer controlled test machines available, are employed. Each and every stage of processing, assembly and testing is carefully audited by Plessey Semiconductors’ independent Quality Assurance department. Therefore we are able to guarantee the following Acceptable Quality Level (A.Q.L.) on all deliveries, MECHANICAL Defects of a mechanical nature including coding not being legible, deformed leads, dimen- sional tolerances being exceeded, wrong identification of pin 1 and pins not being solderable. 0.65 %AQL, ILI ELECTRICAL Defects of an electrical nature including device parameters being outside the acceptance Specification limits,or those only stated as typical being grossly in error. 0.4%AQL ILI The average delivered product quality is considerably better than this, the population of imperfect devices being much smaller than that indicated by the AQL values which reflect the sampling plans used by QA in the Test and Code departments. 19RANDOM SAMPLE TESTING Sample sizes and accept/reject criteria are drawn from the following table. Random sampling test plan for normal inspection. Similar to BS6001 (MIL-Std. 105D), inspection level II ‘AGL VALUE Sampie | 9-065] 0.10] 0.15]0.25]o.s0[oe5] 10] 15] 25] 40] 6s Lot Size ymple Size | ac RelAc Re|Ac Re|Ac Re|Ac Re|Ac Re|Ac Re|Ac Re|Ac Re|Ac Rel Ac Re| 2t0 8 2 | vy jor Sto) 5 | orl 4 to 25] 5 o1 ' | 20 so] e of’ 12 Sito ©9013 gto 150] 20 23 wito 280] 32 e[efiztas 56 28110 500} 50, W112] 23] 34 78 50110 1200] 80 01 12|23| 34] 56| 78 fron 1201t0 3200] 125 offs 23|34|s56|7e 3200to 10000} 200 01] 4] ¥ 34 | 56 | 78 Jion 30001 to 35000} 315 | 4 | ¥ | 12 56 | 78 [1011/14 15 35001 - 150000] 500 | 9 [12] 23 78 |10 11]14 15]21 22] 150001 — so0000] 00 | 12 | 23 | 34 ro wifi slat 21 ¢ 4 500000 and more | 1250 | 23 | 34 | 56 14 15|21 22] 6 4 4 Use first sampling plan shown above arrow ¥ Use first sampling plan shown below arrow ‘Ac = Acceptance number = the number of defective devices in the sample at or below which the lot is ‘acceptable. Re = Rejection number = the number of defective devices in the sample at or above which the lot is rejected. Soldering information All devices must be protected against overheating during the soldering process. If the follow- ing maximum conditions cannot be satisfied some form of thermal shunt or, in the case of flow soldering, after bath cooling stage must be employed. At no time should the device's case temperature be allowed to exceed the maximum storage temperature. MAXIMUM CONDITIONS a) Soldering iron method Devices may be soldered directly into a circuit board as long as the iron tip is applied at least 1.5mm from the device case. A maximum tip temperature of 245°C may be applied for up to 10 seconds or 350°C for up to 5 seconds. b) Flow soldering method For devices mounted with their seating planes flush with punched-through hole printed circuit board, or spaced 1mm from plated-through circuit board a maximum solder tempera- ture of 245°C can be employed for up to 4 seconds or 260°C for up to 3 seconds.Technical Data22cr2010 @ PLESSEY ADVANCE INFORMATION scerpa stems snmengtaee uno of ew stor ote rn eon cnr reaninve fful proaocto uaius poder i iat ser Peas asta er el es Sales Otic Redes ct tart sae CT2010 1GHz + 380/400 PRESCALER ‘The CT2010_is a 380/400 two modulus divider which will operate at frequencies between BOMHz and 1GHz. The device is the prescaler used in the Plessey Key Frequency ‘Synthesis Tuning System, ‘The input is terminated by a nominal SOohms and sesonthy 7 ab wnt ae ‘should be AC coupled to the signal source, The reference verascxme. de ya919 fet emeco pin should be AC decoupled. The decoupling should be uma fs Toe ce effective over the full operating frequency range. on ‘The divider contains a fixed divide by 20 followed by a divide by 19/20. The divide by 19/20 divides by 20 when no Control pulses are applied to the control Input. The divide by 19/20 will divide by 19 once for every positive going ove ‘edge applied to the control pin. The control input edge i latched and synchronised sothat the following output cycle, rag lem osanacnans ‘commencing with a negative edge, is produced by 380 in: ut cycles to the whole divider stage, rather than 400. This ‘Means that the device is highly tolerant of delay in the con- ‘trol oop and distortion of the control waveform, ‘To ensure that there is an output cycle produced by 380 input cycles for every control pulse, the rate of control Pulses should not exceed half the output frequency. (See timing diagrams.) FEATURES. The output source impedance is nominally 100chms. The output swing is nominally 300mV and swings down {rom the positive supply. (On-chip Wideband Amplifier High input Sensitivity High Input impedance Low Output Radiation Single ECL Output 5V Logic Level Controt input Contro! Independent of Distortion and Delay ‘ABSOLUTE MAXIMUM RATINGS ‘Supply voltage, Veg +7v UHF input voltage 25Vpp Storage temperature ~55°C 10+ 125°C Operating ambient temperature - 10°C 10 +65°C ¥ 3 commot nowt Fig.2 €72010bI0ck diagram 23cr2010 ELECTRICAL CHARACTERISTICS Test conditions (unless otherwise stated): Test cicuit: Fig3 Vee ™ 5V, Tana = 25°C Characteristic Pin Value. Units Conditions win [Typ | Max. Operating voltage range 1 45 55 v Supply current 1 % 110 mA Input voltage, B0MHz ae | 175 200 my | mms, sine wave 50 Vie 300MH2 ge | 175 200 mv | rms, sine wave 502. 500MHz a6 | 175 200 my | ims, sine wave 502. 700MHz 6 | 175 200 my | rms, sine wave 502. 1000MHz ge | 175 200 my | rms, sine wave 500. Output voltage swing 3 240 300 mv | pp,noload Output impedance 3 100 a Control input, high 2 | 2V.. 2 50 uA low 2 WBVec 2 -10 vA pulse width 2 02 3 1s & LS pH — wn aa ah t o= Fig.d Test configuration Fig 5 Timing diagram 24 Fig-4 Typical application with combined inputcr2012 PLESSEY ADVANCE INFORMATION Semiconductors Agrancinteeratinsnsdo nnee Coonan oto sata ha Pane Selcondecan vege seh neers rt fa'pegrcmci stat Step ay Taro che chicane hese eee eet ws te Putapmsorttv of rodveton stato prods in mot eases Passe content roof wea) Pasay Berioanese SaaS CT2012 PLL SYNTHESISER FOR TV ‘The CT2012 forms the heart of the Plessey Key Fre- {quency Synthesis Tuning Systom by taking data from the system contol and data highway (the Keybus) when TUNE ‘oF FINE TUNE code fs recognised and then using this data afm =pa to control the frequency of the focal oscilaor In a tele: woth chan vision tuner wth a phase locked loop (PLL). oe) “7 on lence me ad om pom ME High Sensitivity Divider Input sew fe Ponca Improved Control of Two-Modulus Divider ror comecres Cr wD corsa nan Fully Keybus Controlled oo sr Oe Psa I On-chip Frequency Standard and Comparator we) serena, [Four Band Selection Outputs. wore nee ABSOLUTE MAXIMUM RATINGS Gi Speer ‘Supply voltage, Vo +7V PinVoitage,pins9—19 Say Voltage, all other pins Vv Pat Operating temperature range — 10°C to-+65°C Storage temperaturerange —- 56°C 10+ 125°C Fig.1 Pin connections ELECTRICAL CHARACTERISTICS eat conditions (unless otherwise stated): Tung = +25°C, Vgo = +8 Test circuit: Fig: Value Characteristic Pin Tee ac] Unite] Condtions ‘Operating voltage range 3 | 45 55| v ‘Supply curent 8 22] 45 | ma |outpute unloaded eybus inputs, high 1=5Voo-1 | Leakage 10, max (Pin only) tow 123 os| v Internal pulup resistor tal 2 [a] e | xa ++Ninput, peak pak swing 21 | 200 mV | Sine wave via extemal capacitor Intemal capacitance 2 10| oF Extomal frequency standard input, connected 18 |Voo-1 ¥. | 100uA max. sinking 8 0.8 | v | 100;A max. sourcing (Quartz crystal standard 18,20 ‘ Miz] 20pF parallel resonance ‘AV Band and enable inputs 14,18] Voo V | Leakage 10, max 14.45 os} v Band and AV outputs, unselected 9-13} 13.2| Vv [Free rain leakage 10. max. selected 9-19] 5 |v [tmasinang +Noutput, high 19 7 |v | Free rai, teakage 10uA max. tow 19 04] v [a3masinking 25cr2012 SS ey a eb Fig.2 672012 block alagram ‘Apart from the CT2012 and the tuner, the PLL needs {wo other integrated circuits: a +380/400 PRESCALER (the (CT2010) and the synthesiser tuning interface (the CT2017), which includes a charge pump, an active filter and an ‘output stage to drive the varicap line which controls the focal oscillator in the tuner, ‘na typical system fetuning of the television receiver will come from a control circuit (such as the CT2014) following some input from the viewer. This input will be new channel, fine tuning information or an instruc: tion to access a word of non-volatile memory. In every case, the control circuit wil send the required channel and fine {tuning information to the CT2012. The FINE TUNE code is used to directly transfer the FINE TUNE number from the control circuit to the syn- thesiser and is separate from TUNE to reduce the high- Way use and the time delay during manual and auto- ‘matic adjustment tuning ‘The CT2012 contains six main parts: (2) ‘A section to recognise the TUNE code (hexadecimal 1D) oF FINE TUNE code (hex. 1E) on the Keybus and then fo latch all ofthe relevant tuning information. (©) 10 bit programmable divider with an amplifier on its ‘clock input to allow use of a small swing on the output Of the PRESCALER and hence to reduce radiation (6) A fine tuning aysiem which generates the correct ‘Dulees to contro! the modulus of the prescaler and so ‘give a small shift in synthesised frequency. (d)_ A crystal oscillator circuit (tor AMHz crystal) and fixed ‘+1600 divider to give 25kHz companion frequency ‘and fine tuning timing. (e) A phase and frequency comparator driven by the pro- ‘grammable divider and the fixed divider. () Logic for band decoding and for video time-constant ‘Switching for audio visual (AV) mode log. The Keybus highway is used to carry both instructions and data around the Key System. To separate these two functions the codes are transmitted when the Multiplex Clock is low and the data when itis high; all zeroes or all Cones are inserted to fil the gaps between adjacent code or {data words to avoid spurious instructions. In order to im- prove the system's immunity to noise on the highway the ‘Multiplex Clock may be stopped between operations 80 26 that noise is not clocked into any circuit, and so should have no effect, and ideally the highway and Multiplex Clock lines will be stopped in their lower impedance state to re- duce noise amplitudes. It is expected that all devices driving the highway will have Open Drain outputs, for which. pullup resistors (nominal 4k0) ae included in the CT2012, To safely detect control codes edge sensitive latches. ‘are clocked on the rising (0° to ‘1’) edges of the Multiplex Glock and have their inputs driven by gates looking for a ‘TUNE code (0001 followed by 1101) or a FINE TUNE (0001 followed by 1110) Time THs Tne [ Hi] Ho Semone cr} of o] of 1 SL SL 21 81 t I controt code Dt D2 Not used by Synthosisor 03 o4 | 81] 80] a9] as 05 | Q7) Q6 | G5] 24 | sande), Frequency (@) 8 | 03] a2| a1] ao | Seapine Frecue o7 | 0] 0 | 0 [4 | fomney, rene 8 | pa} 2] Pi} Po Table 1 Tuning sequence on Keybus Tie rs [we | Hi] HO eon cr} olo]o}i LTT | Sg foontrotcode 01 [aca] aci{aco] P 2 | Pes] Poa] pet | Peo | Corection tuning Table 2 Correction tuning sequence on KeybusHigh (source current) | Low (sink current) mem Pim | "Yoo -0.5¥ min 0.4V max 25kH2 Clock 6 0.5mA 2.0mA oP 2 DOWN 23 .1ma o.gma SOkH2 Clock 7 Modulus Controt | 16 Oma 03ma Table 8 Logic output currents cr2012 Pin No Name Funetion 3 Voo av & Yoo 33} Power supoiy 1 0 Fourline highway, Ho's LSB, 2 HY Inputs, OV and SV logic levels nominal. 3 te 450% pulp relator (10 Vag) in xevus 4 a deve, 5 MULTIPLEX CLOCK | Highway timing input, OV and SY nominal ogi levels 6 25kHeCLOCK —_| 25kHz output rom crystal via reference divider. May bo used to give Multiplex Cock ” soxtiz Lock S0kH2 output rom crystal via reference divider. use J Outputs when setting crystal vine wat Bvtosv 2 UF Increase frequency whaniow {Comparator cutpute0 (Romina B own Decrease frequency when mighha"ge Pum owing 16 | MopuLuscontroL | controls PRESCALER division rato by pulsing high Upto 8 times each comparson cycle » auartzcaystat | one eyetal pinand the txed capacitor 18 | quantzcaysraLtaIMMER | Second crystal pin and trimmer capacitor. a =NINPUT Low level input clock te Programmable Divider. Should be AC coupled 2 BAND Band output selected by code 00 open drain ° BANDS Band output selected by code 07 pen ara * Baba Band output aelectec by code 10 utput or 10 BAND2 Band output selected by code 11 Cie 8 avoureur Time constant switeh puis low only AV band pulrup, Selected and AVenabie high “ AV BAND Input from band switch to allow AV mode to be selected 6 AVENABLE Selects sorter time constants for locking television fecelvertovidoo tape recorder or equivalent Will be driven by diode aecoder trom Programe Number lines. High for AV mode, ony operative when AV. band is seacted 9 -=Nouteur Output of programmable dvder provided for test Purposes only. 27cr2012 TUNING RANGE Combining the Fine Offset range, 0 to 19 steps of integer multiples of S0kHz and so may be received SOkHz with the Programmable Divider range, 80 to. 1023 EXACTLY (apart from any sight crystal or IF error). steps of 1MHz, allows tuning of the local oscillator forall ‘The correction tuning system gives a range of -3.95 to television broadcast channels in bands I IV, V, towithin + 4.00MHz in 50kHz steps around the nominal frequency. 25kHz. In practice almost all television channels are TP hee | vevmes (gets = thks Fig.3 G72012 test and application circuit room [nomenon x o- LJ Jk Le Instruction or data time (orto) 143 misimum ising or falling edge time 2008 maximum ion to clock s (togertig) 4008 minimum Instruction hold time tga or ya): 1008 minimum Operating frequency range of Multiplex Clock’ BC S00KH: Now frequency 28MH2 maximum ‘ookH2 miaimum *Fig5 Dynamic characteristics 28Fig.6 Simplified timing diagrams cr2012 2972012,T2017 @ PLESSEY ADVANCE INFORMATION Semiconductors ———_ADVANCE INFORMATION et saree a CT2017 SYNTHESISER TUNING INTERFACE ‘The CT2017 is designed for use in Frequency Synthesis ‘Tuning Systems, in particular the Plessey Key System vonenuthe hoe The device contains a. charge. pump witha. hi coma, impedance voltage follower, a signal detect crcul’a sou arcooani nef oP areom Sigtal AFC cicult and a power on low detec circuit meee nna fwcaconae FEATURES mcnmamcth crzor7 ofr Low Varicap Driver ‘evaane| rowan on Active Fiter Onarge Pump var “pn BE Logic Level Contr wc azo =Prexan Signe! Qualty Detector wena PF 3) wera HE AFCinput option como eee fe Se BE AUt0 Up, Auto Down Logic Level Tuning Correction pris WW Power Low Detector Fig.1| Pin connections = oy @[f=h |ommeace Fig? C1201? block diagram 31T2017 “The charge pump is operated by two 5V logic inputs UP. {active low) and DOWN (active high). These inputs tum ona ‘charge curent and discharge curent respectively. The ‘charge pump circult and its voltage follower operate from the +33V supply rll. The combined charge pump, extemal fiter and vottage follower may be used as the filter and vari ‘cap driver for synthesis tuning systems. “The signal detect circuit is used in tuning systems cap- ‘able of automatically sweeping the recelved broadcast bands. The circuit examines the line synchronisation pulse and line flyback pulse for coincidence. When a regular sup- ply of adequate coincident line synchronisation pulses ‘occurs, the filter voltage falls. This indicates a received sig- al ofa sufficient strength to produce a viewable picture. ‘When the signal detect filter voltage is higher than the signal detectors threshold the AUTO UP and AUTO DOWN, ‘outputs are clamped at Logic ‘0, When the fter detect volt- ‘age Is below the level detectors threshold the AUTO UP and AUTO DOWN outputs are enabled. The enabling of ‘AUTO UP and AUTO DOWN may be used to indicate that a signal of adequate strength has been received and the ‘Sweep may be stopped. Using appropriate exterial components, pin § may be Used as a sync pulse separator, when fed with negative Video or a positive line syne pulse input. “The signal strength recognised as good depends on the signal to noise ratio at the input to pin 5. This will depend (on the type of sync separation used, whether noise gating is used and the noise figure of the signal processing cir- cults, ‘A digital AFC circuit, which comprises AFC level detector and correction tuning control, examines the AFC. signal ('' curve) produced by conventional television AFC. circuits. The circu produces an AUTO UP Logic ‘1’ output ‘when the AFC voltage is greater than the upper AFC thres- hold, and an AUTO DOWN Logic 1” output when the AFC voltage falls below the lower AFC threshold. Both outputs ‘are Logic ‘0’ when the AFC voltage is between the upper ‘and lower thresholds, CORRECTION TUNING ‘The AUTO UP and AUTO DOWN outputs may be used to adjust the correction tuning number of a synthesis tun- ing system and hence produce a digitally quantised AFC. ‘The power low detector circuit compares: the +5V supply and the +12V supply against intemal referenc levels. When either supply falls below its relevant reference level the delay capacitor Is discharged and the power low detector reset output is set to logic ''. When the supplies ‘exceed their relevant reference levels, the delay capacitor {s charged to the threshold level, which turns on a transistor and the output is set to logic 0'atter a delay. ‘The resulting output pulse may be used for setting the logic of the tuning synthesiser and for protecting, _memory from corruption during power on and power of. ah ie a Fig.2 Test and application crcult 32ELECTRICAL CHARACTERISTICS Test conditions (unless otherwise stated): cr2017 Tams +25°C, Voos =+12V, Voce = +5V, Vocus = +33V Test circu: Fig’3 Characteristic Pin Units| Conditions Operating voltage: Voor (#12V). 1 108} J 132] v Vecn (+5V) 6 | 45 55| Vv Vers (*33V) 2} 31 36] v ‘Supply current Veen (+ 12V) 1 a Veca (+5¥) 8 2 Vecra(#33V) v2 | 33} 45 Varicap control ‘Output range available 7 [09] }2a5) v |y=2ma nz zie) vect2= 33.0 ‘Output leakage current 7 40 | A [Vy=+5V, Vi UP-control input active " itv UP.control input inactive nfs v ‘UP-control input current " 80] uA |vy=+5v DOWN control input active 10 | 3 v DOWN control input inactive 10 s}v DOWN control input current 10 50] wa ‘AFC control Detector high threshold 16 | 70] 75} 80] v Detector low threshold 16 [41] 45/49] v Detector window 16 | 28] 30] 32] v Input current 16 25] ya Correction tuning outputs (AUTO UP, AUTO DOWN) ‘Voltage high 17, 18] 45, v OWN, Vi high = UP 804 Voltage tow 17, 18 05] Vv |Bothiow= inactive, current sink =2ma Line flyback threshold High ata v tow 4 or} v ‘Negative video input ‘Threshold 5 a7 v Sync pulse switching current 5 12 | ua Leakage current 5 03] 4A |v.=-8v Coincidence detector Enable 2 4s v Inhibit 2 atv Threshold 3 24 v Power on detector Output voltage 15 | 45 V |Current source = 50uA Normal 05| V |Current sink = 2ma Detector threshold Vee (+ 12V) 1 |92]99]106) v |seeFigs.¢ands Veca (+5V) 6 137] 4] 43) v |SeeFigs4ands Delay capacitor charging current 4 10 uA Delay threshold 14 9 v 33cr2017 1 Tg prio timed by delay capactor 2 Outputs connected 3 supply via pullup resistor 4. Tplnsat by value of capacitor charging curent and chipa tivesholvoliage, Charging coven e normally 1OuA- Threshold voltage normaly 9. Fig-4 Power lowdetector timing alagram (Poweron) mJ SM. JK Fig. 5 Power ow detector timing diagram (Power of) ‘ABSOLUTE MAXIMUM RATINGS, +12V supply (Voc) +20v +5V supply (Voca) +20V +33V supply Vecra) +40V Operating temperature range - 10°C 10 +85°C. Storage temperaturerange 85°C 10+ 125°CADVANCE INFORMATION Advance infomation sued ain Customers of orwaaaons to tne Pane Semconducrs ange wich, evens, st oo ran ay tlre chang ten roto shvogh we woud expt tna prcrmesoin Sriseeent oft poeveton'aaun sass'm nal cases’ Peas cota Jour oc Poesy oreaee OMce CT2200 5-BIT BINARY TO 13-SEGMENT DECODERIDRIVER ‘The C7200 is an N-channel MOS integrated circuit, designed to directly drive two 7.segment LEDs to display the numbers 1 to 32, with leading zeros suppressed. The Circuit is ideal for applications such as the programme ‘umber display of a television receiver. The display is con- ‘tolled by a Sit binary input port, weighted 80 that the ‘umber shown (1-32) is one more than the binary input (0- 31) to avoid programme 0. The 5 lines can come from a re- ‘mote control recelver or from any other source of con- tinuous Sit data. ‘Common anode LEDs can be driven directly with a ‘current limiting resistor in series with each output (see Fig.5) or by using some other form of brightness control (20 Fig.6). By driving each segment individually the Inter- ference problems associated with multiplexed displays are ‘A blanking input is provided 80 that the display oan be {umed of oF can be made to fash wih an extemal pulsed signal, ‘Only 13 lines are needed for two 7-segment displays ‘because segment TI's never it for the numbers 1 to 32 and ‘30 does not need to be decoded and dtiven. Segment Identification is shown in Fig.2 ‘The 13 outputs of the output encoder drive the gates of large output transistors to give two states: OFF and SINK CURRENT; as there can be up to 12 outputs on at once, each sinking 20mA, four OV pins are provided to reliably cary this curnt. ALL FOUR PINS (3, 7, 18, 22) MUST BE ‘CONNECTED TO OV. ‘The number of segments required for each characteris, *Fig.1 Pin connections Direct Segment Drive—Nor- Multiplexed SV Supply Blanking Input Leading Zero Suppressed Minimum Segment Patter per Character 20mA Drive per Segment S-Bit Binary Input Kika (23456 1890 Fig? Segment leentiication Fig.3 Character representationcr2200 ELECTRICAL CHARACTERISTICS (see Fig.5) Test cénditions (unless otherwise stated): Tame" +25°C, Voo = +5V Characteristic Pin |} ag Units | Conditions in] Tye. Operating voltage range 9 4s 6 ss |v Supply current 9 5 | ma Inputvottage high wow] 4 v low 10414 os | v Leakage current 10414 10 Capacitance 10-416 10 | pF Output voltage 1,2, 44,8, 16, 17, 1 V_ | Sinking 20ma 19.21 23,24 Recommended series resistor jf used) 120 a ig)5 Test circuit and application using load reslatore (see also Fig 6) Fig.6 Minimum component applicationT2200 ‘ABSOLUTE MAXIMUM RATINGS ‘Supply voltage, Vao + Input or output voltage + Output currant 30mA “Ambient operating temperature ~10°C to + 65°C ‘Storage temperature 55°C 10+ 125°C 37T2200 38@ PLESSEY ML231B ML231B MOS TOUCH TUNER ‘The ML231B is a sixchannel sense circuit designed specifically for touch tuning in colour and monochrome twlevision rectivers. Using low threshold P-MOS technology, the circuit can be driven directly from two-terminal touch ‘lates — replacing conventional mechanical push-buttons for channel selection. Neons may be used to indicate the selected chennel, while the latched output of the ML231B. tives the varicap tuner via a bias selection network. ABSOLUTE MAXIMUM RATINGS ‘Ambient operating temperature 10°C 10. +66°C ‘Storage temperature =10°C to +85"C ‘Supply, Vss—Voo 36v Vericap voltage Vevw.rt. Ves 40.3 FEATURES @ Six-channel Capability Direct Neon or LED Drive Low Impedance Drive to Varicap An additional output is provided which goes high with Ro channel selected and may be used externally to select ‘channel 3 s0 as to prevent the existence of a null state. Fig. 1 Pin connections Uses 33V Varicap Supply @® Low Current Drain Reset O/P Prevents Null State 39ML231B ELECTRICAL CHARACTERISTICS ‘Test conditions (unleis otherwise stated): Tan = +25°C, Vo = 0, Ves = Vsv = 30V to 36V Value Characteristic Units Condition Min. Typ. Input current 1 HA Supply current 2 4 55 mA Fw of vaicap switch 50 100 2 Row indicator switch 125 250 a Sense input threshold 0.4Vs5 08Vs5 0.8Vs5 v Reset 0/P voltage high | Vss—10 v lout = 0.5mA fo leamerdt { it c= II Ho. 4 HO- 1° re m4 ‘Fig. 3 Typleal application creue Reset output = CHi-CH2-CH4-CHS CHE 424354454643 40@PLESSEY Semiconductors ML232B ML232B MOS TOUCH TUNER ‘The ML232B is a sixchannel sense circuit designed specifically for touch tuning in eolour and monochrome twlevision receivers. Using low threshold P-MOS technology, ‘the circuit can be driven directly from two-terminal touch plates — replacing conventional mechanical push-buttons {for channel selection. Neons may be used to indicate the Selected channel, while the latched output of the ML232B tives the varicap tuner via a bias selection network. ABSOLUTE MAXIMUM RATINGS Ambient operating temperature 10°C 10 465°C. Storage temperature 10°C to 485°C ‘Supply, Vss—Voo 36v Voricap voltage Vsv wart. Ves 40.3 FEATURES Ml Six-channel Capability Direct Neon or LED Drive Low Impedance Drive to Varicap ‘A stepping facility is included whereby the application of a suitable negative-going pulse to the step input pin, will ‘couse the selected channel output to advance by one. ve “pve Ed wl pts pG16 Fi. 1 Pin connections Uses 33V Varicap Supply Low Current Drain Remote Control Stepping Facility Fig.2 Functional diagram aML232B ELECTRICAL CHARACTERISTICS ‘Test conditions (unless otherwise stated): Tant: = +25°C, Voo = 0, Vss = Vev = 30V to 36V (Characteristic. Nees Unit, Condition Min, Te. Max. Input current 1 uA Vin = OV Supply current 2 4 85 mA Ron of varicap switch 50 100 a lout = 10mA Ron of indicator switch 128 250 a lout = 4mA Senia input threshold 0.4Vs5 0.8Vss 08Vss v Step pulse level ° Vss-29 v Step pulse width on 1 ms | Tamb = 0°C to 485°C@PLESSEY Semiconductors. ML237B ML237B 6-CHANNEL TOUCH CONTROL INTERFACE ‘The ML237B is a six-channel sense circuit. designed ‘specifically for touch tuning in colour and monochrome ‘tlevision receivers. Using low threshold P-MOS technology, the circuit can be driven directly from two-terminal touch plates — replacing conventional mechanical push-buttons for channel selection. Neons can be used to Indicate the selected channel, while the latched output of ‘the ML237B drives the varicap tuner vie @ bist selection network. ‘A stepping facility is included whereby the application of a suitable negativegoing pulse to the step input causes the selected channel output to advance by one. FEATURES @ 6 Channel Capability Direct Neon Drive Low Impedance Drive to Varicap: Fig. 1 Pin connections Uses 33V Varicap Supply @ Remote Control ‘Stepping Facility Sound Muting During Selection eR aU ATINGS, Selected Channel 1 on Powerup ‘Ambient operating temperature —10°C 10 465°C 1M Channels Are Selected With a Negative (or ‘Storage temperature -10°C to +85°C Earth) Input ‘Supply, Vss-Voo ‘36v Variap voltage Vev vss +03 t Lis wee oe i Pore ac ‘Fi. 2 Functional block diagram 43ML237B ELECTRICAL CHARACTERISTICS ‘Test Conditions (unless otherwise stated): Tamp = +25°C, Voo = 0, Vss = Vev = 30V to 36V Value i Units Conditions Carnctriie Min. Typ. Max. Tnpat current 1 A [Vin = Vos Output leakage 1 uA |Vour= 0 Mute switch O/P leakage 10 uA | Vour=0 ‘Supply current 5 8 mA Ron of varia switch 50 100 2 | tour = 10mA Step pulse width 02 ms | >.05Tm "Neon switch output current 2 mA Mute switch Ron, 100 200 2 | lor = 5mA Input threshold 4 05 06 Vss Step input current 10 1000 ua |Vm=0 Mute period 400 ms | Cy = 0.68 uF Step pulse level o Vss-29 Vv Notes ‘The mute timing canbe inereasd by using higher value of capacitor (Cag) 05Tm Clear pulse level ° Vss—29 | Vv Clear pulse width 02 ms Ron of mute switch, 100 200 a lout = 5mA To mute timing 400 ms Cm = 0.68uF Step /P current 10 1000 WA Via = 0 ‘Mute 0/P leakage 10 WA Vour = 0 Notes ‘The mute timing can be increased by using @ higher value of capscitor (Cm) (See Fig. 4). “Fig. 2 ML92O remote control receiver Block degra aTM920 ELECTRICAL CHARACTERISTICS (see Fig. 3) Test conditions (unless otherwise stated): Vss= OV Voo = ~16V Teno = 25°C Value Characteristics Pin Units Conditions Min. | Typ. | Max. ‘Supply voltage 3 “4 18 v ‘Supply current 3 a | 14 | ma Input logic level high 5,6,7, 1 0 v low Voo Voo+3.5| V Output logic level high | 2, 11-13, 16-20, 22] —1 0 | Vv | 50k t0 Voo ow Voo Voo+0.5} V | 50k 10 Voo Analogue output eal ‘current range 1,21,23 ° St | incr | 3.9% t0 Voo (bins 1, 21, 23) 8 ‘Analogue step size 1,21, 23 o a] os tree | Vow < Voo +5V D/A reference, Iner 24 260 | —345] 455 | uA | 33k to Voo Oscillator timing 9 15k Hz | C= 22n, R—100k See note Power clear time 14 400 ms | C= 474 R=100k ‘constant Step time constant 15 1 3 | C= 4700 R= 33M Monitor output ‘high’ 3 4 ° V | Internal load ‘low’ Voo Voo+05| — V | provided PPM input logic level high| =1 0 v PPM input logic level low 10 Voo 6 v PPM input pulse width 1 Bowe | us Note 1. Rage (Pin is 47% 20048, 2'mon (Pin 9)= woe J = Jew ted hen i — Fig. 9 PPM receiver application PIN FUNCTIONS Negative Logic: 0 is OV (Vss), 1 is —17V (Voo) 2. Colour kit 1.21, 23, Colour, Volume, Brightness This output gives a logic 0 when the COLOUR D/A ‘These three outputs are from three 6 bit current output is aro miror O/A converters, They are weferanced tothe 5. YBa curent drawn trom pin 24."le, and give 2 steps, 1 /V power supp but/® per stop, from 0'to 31/8 iy. The outputs wil be 4. Vag ons LPP ‘set to 12/8 I by the NORMALISE input, the normalise OV power supply code from the transmitter. or when the ON output goes 6. On/Standby Input teat Aon this pin wil toggle pin 11 (ON O/P), gonerate 52RECALL and AFC, normalise VOLUME, BRIGHTNESS and COLOUR, reset MUTE and set’ channel code A.1 will normalise the VOLUME, BRIGHTNESS and COLOUR outputs. A RECALL signal is generated and MUTE is reset 7. Channel stop The channel code will step up by 1 as long as this in is. held at logic 1. The time period between steps is defined by an RC constant attached to pin 15. On reaching 20 the next step returns to 1. On output is set to ON, and AFC is gonerated. If the TV goes from ‘Standby to ON, RECALL is generated and VOLUME, BRIGHTNESS and“ COLOUR are normalised. lf VOLUME is not 0, MUTE is reset. 8. Oscillator time constant An RC time constant is formed for the clock timing by connecting external components, one resistor and ‘one capacitor, to this pin. Adjusted so that period of utput on pin 9 is 1/20 of 0 interval of incoming PPM. 9. Oscillator monitor This output is a division of two of the oscillator, and 4nd is available for testing and setting purpose. 10. PPM /P Tho output of the front end amplifier is connected hore such that the signal isin the form of positive pulses. Separated by time periods whose length define the data. With no signal, PPM input is at a logic 1. 11, Ono/P ‘Open drain output. Logic 1 denotes TV set ON Logic 0 TV set standby. Set to 1 when channel number changes. Set to 0 by’ power clear or by transmitter selected Standby. Toggle to opposite state by manual ‘ON/STANDBY control. 12, Recall 0/P Open drain output. A 1 may be used to trigger an Transmitter code eDcBA Funetion Programme 3 Programme 2 Programme 3 Programme 4 0 Programme 5 1 Programme 6 ° Programme 7 1 Programme & 0 Programme 9 1 Programme 10 ° Programme 11 1 Programme 12 0 Programme 13 ° $ ° Program $ Programme 18 ° Programme 19 : Programme 20 0 Colour + 1 Programme Step + ° Volume 5 Brightness + 0 Standby i Mute 3 Recal : Normalize ° Colour ~ 1 Programme Step — 9 Volume Brightness — Table 1 Basic 32 command set, ‘L920 on-screen display. A static output is generated by the manual controls ON/STANDBY and NORMALISE. ‘A pulse is generated by any channel change if the circuit switches to ON at the time, and by RECALL and NORMALISE commands from the transmitter. 13, AFC O/P. Open drain output. Logic 1 can inhibit the tuner AFC. Astatic output is genorated by manual ON/STANDBY control. A pulse is generated by any channel number change, 14. Power clear ‘A capacitor and resistor connected here define the time delay for the power clear circuit, which normalises, all D~A outputs otc. 16, Channel step time constant An R-C time constant defines the time period between increments of the channel number when stepping. 16-20. Channel outputs 5 Outputs encode 20 channel numbers in binary code EDCBA Channel 1 is 00000 Channel 20 is 10011 E is first and A is last in the PPM pulse train. Channel 1 is set when ON goes toa 1 21, Volume. See Pin 1 22. Mute 0/P This will change state (toggle) on reception of a mute command and if VOLUME O/P is zero MUTE O/P is held ato. 23, Brightness ‘See Pin 1 24, D/A Reference A current drain Int, set by a single external resistor will set the nominal step of the D/A outputs t0 he/B. ABSOLUTE MAXIMUM RATINGS (Vss= OV). Supply Voltage Voo +03V to -26V Voltage at any input +03V to —25V Operating voltage range, Von —14V to —18V. Maximum power dissipation 600mW. INC to +65°C 55°C to +125°C Operating temperature range Storage temperature range 53M920 54@PLESSEY Semiconductors, ML922 ML922 REMOTE CONTROL RECEIVER Plessey Semiconductors have developed and pro- duced a range of monolithic integrated circuits, which give @ wide variety of remote control facilities. As well 2 ultrasonic or infra red transmission, cable. radio or telephone links may also be utilised. Pulse position ‘modulation (PPM) is used with or without car ‘automatic error detection is also incorporated. Al ly designed with TV remote control in mind the devices may equally easily be applied for use in radios, tuners, tape and record decks, lamps and lighting, toys ‘and models, industrial control and monitoring. The ML922 demodulates the PPM signal received from the SL490 transmitter. After error checking the received code may condition @ 10 programme memory ‘or one of three D/A converters. The receiver timing may be set by adjusting the oscillator time constant to give 40 periods at pin 6 equal to a 0 interval on the received PPM input. FEATURES ‘Fig. 1 Pin connections QUICK REFERENCE DATA Accepts 5 Bit PPM Power supply: 16V 14mA All Timing From On-Chip Oscillator _ Demodulation : Pulse position with time @ Incorporates Error Protection window checking by on-chip oscillator Easily Used With Ultrasonic or Infra- Decoder: § bit with successive codeword red System comparison Up to 10 Programmes With Latched Programme: Latched 4 bit binary. Binary Output 10 programmes @ 3 D/A Outputs With Normalise Level At Other outputs: On, AFC, Mute # of Max. Local inputs: Programme step @ Automatic Power-On Reset and Normalise @ Many Other Facilities, AFC, Mute, Etc. Transmitter code Function oo00x oo Programme 1 als o001x Programme 2 = _ Sorox a oonsx ofoox orate or tox orttx fooox toorx os - toro0 Analogue t+ a m toro4 Programe Stop + yorte Balague 2 = joins Anaiogue 3 re tooo Standby iteos Mute (Analogue 2) Hort Normaize a ttoo r Hier Hhid M4 in "Fig, 2 MLS22 remote contol receiver block diagramM922 ELECTRICAL CHARACTERISTICS (see Fig. 3) ‘Test conditions (unless otherwise stated): Ves = OV, Voo = ~16V Tama = 25°C Value Character Pin Min. | Typ. [ Max. | Unit Conditions ‘Supply voltage 3 “4 w fv Supply cure 3 8 14 | ma Input logic level high 5 “1 0 low Voo Voo+ 3.5] V Output logic level high | 8,9, 12-15,17 | 1 0 | v_ [50k to Voo low Voo Voo+0.5| V | 50ktoVoo Analogue output 31 current range 2,16, 18 ° “BE | tat | 39k to Voo Analogue step size 2,16, 18 ° i 4 | tat | Vou < Voo +5V D/A reference, Incr 1 250] 345] 485 | ‘WA | 33k t0 Voo Oscillator timing 6 3 kHz |C=22n, R= 100k See note Power clear time 10 400 ms 74 R= 100k constant ‘Step time constant u 2 s 470n R= 33M PPM input logic level high 7 -1 oly ‘PPM input logic level low 7 Voo <6 |v PPM input pulse width 7 1 22Tose| us Note 1. Rose (pin 6) 8 26K ~ 200K. fre. Soo ' i i ‘ t 1 1 ' t t ' i strtes f a Fig. 3PPM inra-radreceiver application with local up/down controls using» directly connected SL490 ABSOLUTE MAXIMUM RATINGS. (Vss= OV). ‘Supply Voltage Voo. +0.3V to -25V Voltage at any input 40:3V to —25V Maximum power dissipation 600mW Operating temperature range —10°C to +65°C Storage temperature range 55°C to +125°C. 56MLe23. @PLESSEY PRELIMINARY INFORMATION Ae Semiconductors, ntorpain ssa iain Customer patent raw product which ar uagnted Expr bu aren tocurentor future mal it cha ovate mein amen ict ae cae weurrent or future aval lstomere smear pe G aougnedo eat tet our Foase contac yourlocal Plassey Semiconductor Sala ice or cule ofeuront trues ML923 REMOTE CONTROL RECEIVER ‘The ML9Z3 Is an MOS/LS! monolithic integrated clroult {or use as a receiver of remote control algnals for television ‘control. It accepts 24 of the 32 codes transmitted by the 'SL490 transmitter circut in the Pulse Position Modulation (PPM) method of coding, FEATURES 16 Channel Selection Codes Single Analogue Output Mute Output (Toggle) ‘Onset Controls —Channel Step, ON, Reset "Normalse to of Max Output on Anelogue Output (Outputs Provide Control ot ONSTANDBY, ‘Analogue Mute, and AFC Defeat i oan coms Choice of Power-Up Function: a) Power Up to Standby Slate, Switch io ON ‘State by Local or Remote Gornmand and ‘STANDBY by Remote Command. ) Power Up to.ON State, Switch OFF with Solenoid Oprateg Maine Swichby Local emote Command. Py tecalor Fig.2 ML923 lock diagramML923. ELECTRICAL CHARACTERISTICS ‘eat conditions (unless otherwiee stated): Tana ™ +25°C, Vos OV, Voo™-16V. charctea Peace emt] concioe ‘Supply valage 1 [« we |v Supply curent 3 6 ma Input logic lve high 97,10 | -1 oly Input gic teveliow Veo} |Voo+38| V Output logic tvel igh 3.4.31, 94) 18 OV | looks ven utputtogic vel iow 8 | Veo) — \veor0s} v Analogue output curent ange wo |o ¥ | 1Ret|20K t0Ve0 Analogue step size 1 | o] a | ¢ |1Retlen 3. Control Mode 3: 2222 is a4 bit address that programmes vi IPP bite =", the rest of the PPM word will be read as dat read as an address. ‘ABSOLUTE MAXIMUM RATINGS. DO supply and allinputs wrt VSS +0,3V to-25V ‘Storage temperatures =55°C 10+ 125°C ‘Operating temperature ambient 10°C to + 65°C transmitter code will select the receiver. If PPM bite = 0'the rest of the PPM word will beML925 ORLESSEY ML925 REMOTE CONTROL RECEIVER FOR TOYS ‘The ML92S is an MOS/LS! integrated circult for use as a ‘decoder of PPM remote conto} commands transrited by em ‘the SL490 or SL491 circuit. It is designed to control either a wo “| {oy vehicle with two-speed diva motor anda three postion march ope ee ee meth Pas tion steering and a third motor, typically a winch. This Second vehele type also has {out solectable spende. Both no ferme types have hom, headlights, hazard flasher and tum ind- oer th M25 Lb pmo aor facies The circult can operate on the fist set of 16 SL490 more spies commands of the second sat of 16, thus ghing simut ova rm {aneovs conto of two independent vehicles wth he same Integrated circuit typo in both, sof" FEATURES: 1 Mattitunction Toy Controt ris. IE High Power, Free Drain Butlers on all Outputs Fig Pn connections I_Uses Well Proven High Security PPM Coding Double Word Checking ‘ABSOLUTE MAXIMUM RATINGS HE Minimum Component interfaces Required to Vpo supply inputs with respectto Ves. +03 0-25 Motors and Lamps Sage retire 75SC tov 128°C Direct Connection to $L480 Infra-red Preamplifier ing ambient temperature =10°C 10 +65°C = —~ 'Fig2 ML825 block diagram 65ML925 ELECTRICAL CHARACTERISTICS ‘Test Conditions (unless otherwise stated}: Tan = +25°C, Ves = OV, Von: Valu Characteristic Plo amas rape] wax] Um Conditions ‘Supply voltage, Voo 1 [-12[-15] 18] v ‘Supply current 1 8 | 12 | ma PPM input high a fat o}v low 3 | Veo 6] v Code or type select high 12,18] <1 ol v low 12,15] Voo -0| v Steering feedback, speedtime | 6,14|-25] -3|-35] v Constant threshold Ouputvotage motoraives | 8:11 -02|-05| Vv Joutputcurent= 10mA 16, other drives 45 -02|-05| v Joutputcurent=5ma 13,18 Output leakage all outputs 1 | uA Output voltage =-15V PPM oscillator frequency 2/15 180k] Hz 4 kHz |C=33nF,R=50Ka ‘Speed control oscillator 6 50 Hz | Ros 120K, Roag™ 270K9, C= 1000F Flasher rate 5 os Hz | Forpin 6as above PPM input pulse width 3 fa 22t | us [t= watpin2 ‘TRANSMITTER CODES. VEHICLE TYPE ET ovTcy;seya TYPE A, CAR” TYPE, TRUCK es e020) |e | tte aro ‘STOP x | 0 | o | o | + | FoRWarostRAIcHT | FORWARD x | o | o | 1 | 0 | RevERSESTRAIGHT REVERSE x | 0 | o | + | 1 | HORN(@MOMENTARY) | HORN (MOMENTARY) x | o | 1 | 0 | 0 |} Notused NOTUSED x | o | 1 | 0 | + | FoRWaROLEFT STEER LEFT (MOMENTARY) x | o} 1 | 4 | 0 | Reverseverr "WINCH IN’ (MOMENTARY) x} oof 4 1 1 | FLASHERONIOFF FLASHER ONIOFF x | 1] 0 | 0 | 0 | NotuseD NOTUSED x} 1] 0 | 0 | 4 | FoRWARDRIGHT ‘STEER RIGHT (MOMENTARY) x} 4 | 0 | + | 0 | REVERSERIGHT "WINGH OUT (MOMENTARY) x} os}oof4 1 | UGHTONDOFF LIGHTS ONIOFF x|o4 1 | 0 | o | speeD1 SPEED1 x]or fos] oo} 4 | spect SPEED2 x}orfa 1 | 0 | speeD2 SPEEDS x|4 1 1 1_| _sPeED2 SPEED 4 Tablet Decoder response fo PPM codes, CIRCUIT DESCRIPTION OPERATING NOTES. ‘The docoder operates on a timescale fixed by an inter- ‘al oscillator and its extemal timing components. The oscillator may be adjusted to a wide range of frequencies: to allow diferent decoders to respond to different PPM rates. PPM words consist of six narrow pulses separated by 5 gaps, a short gap for a and a long gap for a0, in the ratio 2 to 3. Words are separated by a gap of ratio 6. Two complete correct adjacent words are required before the decoder will respond, ‘A second on-chip oscillator provides a frequency which sets the markdspace ratio of the motor speed control and hazard and indicator flasher rate. A power-on reset is also Provided during intial power-up. ‘Simultaneous control of two independent vehicles is Possible. For one vehicle the first bit of the Sbit trans: ‘mitted code is a‘0’ and for the second vehicle the first bit is "as shown in Table 1 66 1. In Table 1, X determines one of two vehicles to be con- trolled by independent controllers within the same area. ‘The same decoder design can drive either vehicle. X= 0 for vehicle 1, X= 1 for vehicle 2. 2. Momentary controls only give an output for the duration ‘of a PPM command stream, Le. for as long as.a transmitter button is depressed. 3. Hazard and lights control codes provide a toggle action; ush once for on, push again for off. There is an internal ‘time-out within the decoder to cater for interruptions in the PPM stream by noise. 4. Vehicle type A will drive at half of full speed and has a latching drive. The steering has three positions: hard lett, ‘centre and hard right and is driven momentarily during ‘code transmission. The centre position may be indicated by a contact running on a conductive track attached to the steering bar (see fig). The track should have a non-‘conducting section atthe centre and the two halves should be taken 0 Ves and Voo respectively. The contact, which should be fixed to the Body of the vehicle, is attached to a pin on the decoder and a two resistor bias network, The ‘contact must not conduct with either area when In the ‘centre position, 5. Vehicle type B also has a latched drive direction , which Femains latched until STOP is pressed; but its stesring Is ‘momentary, 80 that it will progress left (say) until the com- ‘mand is removed, and stay in that position until a further ‘steering command is received. This provides a time- ‘roportional steering system, 6. Vehicle type & has four possible drive speeds; quarter, half, three-quarters and full speed. From STOP or poweron the speed selected ts quarter, or speed 1. Further speeds ML925 afe selected by the four latched speed select commands. ‘The steering speed or rate of progression is proportional to the drive speed, 7. Vehicle type B has provision for single speed driving of a third motor (forward or reverse). Control of this motor is ‘momentary, stopping when commands cease to be trans- mitted. 8. One output of the decoder provides a continuous flash. ing signal. This can be gated with various other outputs of the decoder (using simple transistor gates) to give auto- ‘matic flashing lights or buzzers when functions are oper: ating. Examples are: left and right tum indicators, buzzer ‘when reversing, waming lamp when winch in operation or siren switched on and off by lights’ command, Fig.4 Intr-red control for vehicle with position steering Fig.3 Infrared control for carr ruck PIN FUNCTIONS 1. Vop ~72V to- 18 power supply. 2. Oscillator time constant ‘An RC time constant of a capacitor to Ves and a resistor 0 Voo defines the intemal clock frequency for demodul aling PPM. ‘8. PPM input ‘The output of the ‘ront end’ amplifier is connected here; the signal must be a normally low level of -6V, and have PPM pulses going positive to-1V. 4. Hazard ‘An open drain output to drive a flashing lamp or buzzer at arate determined by pin 6 time constant. Toggled on oF off by asingle PPM code. 5. Indleator signals ‘A permanently pulsing output at a rate determined by pin time constant. Open drain drive, 8. Speed time constant and power-on reset ‘A capacitor and resistor 0 Voo and @ resistor t0 Ves de- fine the frequency of the motor speed control pulses and the waming and indicator pulses. 67ML925 7. Vag OV power supply. 8. Forward (Open drain high power latched drive to the drive motor circuit. When on, the drive motor should move the vehicle forward. Reverse ‘Open drain high power latched drive to the drive mator circult. When on, the drive motor should move the vehicle Inreverse. 10. Steor loft ‘Open drain high power drive to the steering motor ci cult. When on, the steering should move onthe left. 11. Steer right ‘Open drain high power drive to the steering motor ci ‘cuit. When on, the steering should move to the right. 12, Vebiole type ‘An input t0 determine the type of vehicle and the inter- pretation of control codes. Vag selects Type A (car) Veo Selects type B (truck), 18. Lights ‘Open drain output to drive headlights etc. Toggled on or off by asingle PPM cose. 14. Steering ‘An input from the centre contact of the steering food: back system for vehicle type A. A resistor 10 Veg. and a resistor to Vop are required asa bias chain. 18. Code sot 'An input to determine which set of 16 PPM codes the decoder responds f0. Vig wil select the fret 16 (E = 0) and Veg will elect the ast 18(E= 1. 16. Third motor + ‘Open drain high power drive to third motor cicult for vehicle type B. 17. Thied motor- ‘Open drain high power drive to a third motor circuit for vehicle type B. Drives motor in opposite direction fo pin 16, 18. Horn ‘Open drain output to driv a hom or buzzer. A momen- tary output selected by one PPM code. Operation of the various functions is described more fully in‘operation’ and in Table 1. 68ML926/7 ‘Advance information is issued 10 advise Customers of new additions lo the Plessey Semiconductors range which, neverielese ill ‘have ‘pre-production’ status, Detals given may, therefore, change without notice although we would expect inie ening reeset ‘be representative of ull production status product in most cases, Please contact yout loesl Plassey Semlconectony See ee Ps since er ML926/7 REMOTE CONTROL RECEIVERS (With Momentary Outputs) ‘The ML926 and ML927 are MOS LSI monolithic circuits {or use as receivers of remote control signals for television Control and many other applications. They are general pur. ~veo fi. pose devices each receiving siteen ofthe thiystwo cates | caaunonmaconone A. am, be transmitted by the SLA90 eircult as pulse postion mad munon eter he | carte lation (PPM). +¥e6 a ore FEATURES Fig. 1 Pn connections @ Minimum Package Size — 8-Lead Minidip @ Four Outputs indicate in Binary the Code Currently Being Received, and Are Switched Off contin St (Low) When No Valid Code is Detected. _On-Chip Oscillator © High Power, Free Drain, Output Butters OPERATING NOTES io The receiver operates on a timescale fixed by an internal oscillator and its extemal timing components, The oscillator may be adjusted to any value between 1SHz and 150kHz (allowing different receivers to respond to differ ~ ‘ent transmission rates within the same area), ‘A counter is reset whenever a pulse is received, and allowed to count at half the oscillator frequency, For ‘example, take an oscillator frequency of 1.5kHz:— ete oe Resetting is blocked forthe first 14 ms and windows from 14ms to 22ms and trom 22ms to 40ms determine whether a Fig 2 Block diagram 1" of a0’ is present. Periods between pulses of 40ms to ‘Somsare recognised as word intervals. Checksare made to. ensure 6 pulses, or 5 bits, are received for a word to be valid, and only after two consecutive and identical words is the receiver allowed to respond to the incoming code. ‘The ML926 responds only to codes 00001 to 01111 {rom the SL490 transmitter whereas the ML927 responds tocodes 10001 to 11111. ABSOLUTE MAXIMUM RATINGS. Voo supply and inputs w.tt. Vss __+0.3V to-25y ‘Storage temperature 55°C to +125°C ‘Operating temperature ambient 10°C 10 +65°C. ado ak Fig. 8 Test circuitML926/7 ELECTRICAL CHARACTERISTICS ‘Test Conditions (unless otherwise stated): Voo = —16V. Tam = 26°C. Characteristic Pin Value Units Conditions, Min. | Typ. [ Max. ‘Operating supply voltage range wv] uw} fv ‘Current consumption rf 2 a] 4 [ma PPM input Input logic love! high 3 | ° vy, Input logic level iow 3 | Voo -s |v 1 Input puise with 3 | 22Tosc | usec | T= 7 ‘Oxciltator time constant See Note 1 Oscillator frequency 2 | 6 150k | He 3k He | Typical Tc: 2anF toVss 400k to Voo Variation wrt Voo 1 “Nn Output voltage high se | -15 ° v 30K to VOD Output device leakage (Output OFF)] 5-8 1 HA 1 Note 1. Rag(Pin 2} 47k 200K ose me tee PIN FUNCTIONS 1. Voo | Momentary binary outputs —14V to ~18V power supply Transmitt 2. Oscillator time constant ‘Code Ls26 musz7 ‘An RG time constant of a capacitor and resistor at this pin ‘defines the intornal clock frequency. The clock EDcBA | DCBA DCBA frequency may be varied from 18Hz to 150kHz. jveney may be varied 0000 | 0000 0000 3._ PPM input o000t 0001 “The output ofthe tront end’ amplifier is connected to this, ooo1o | oo10 Pin; the signal must consist of anormal logic low level wth ooott oo1t pulses to logic high’ corresponding to the PPM pulses from 80100 | 0100 the transmitter, oo10s O10 av ooito | o110 ov (ground) oo1n4 o1tt 01000 | 1000 5-8. A.B.C.D 01001 1001 Four open drain high power transistors give a binary 01010 | 1010 coded output of the valid code being received o1011 1044 01100 1100 o1101 1101 o1110 1110 o1i4i 14414 10000 [ 0000 DOO 10001 0001 10010 0040 40011 0011 10100 0100 101014 0101 10410 o110 10111 o1nt 11000 1000 41001 1001 11010 1010 110114 1014 11100 1100 41401 1101 a1410 1110 aaadi 144d 70 Table 1 Response to SL490 codes@PLESSEY Semiconductors ML928/9 ML928/9 REMOTE CONTROL RECEIVERS. (WITH LATCHED OUTPUTS) Plessey Semiconductors have developed and pro- duced a range of monolithic integrated circuits which give a wide variety of remote control facilities. As well a ultrasonic or infra-red transmission, cable, radio ot telephone links may also be utilised. Pulse position modulation (PPM) is used with or without carrier and ‘automatic error detection is also incorporated. Although initially designed with TV remote control in mind the devices may equally easily be applied for use in radios, tuners, tape and record decks, lamps and lighting, toys {and models, industrial control and monitoring. ‘The ML928 and ML929 ate general purpose remote control receivers, each receiving and latching 16 of the ‘32 codes transmitted by the SL490 circuit in the PPM (Pulse Position Modulation) mode. The ML928 esponds to codes 00000 to 01111 only, and the ML929 to codes 10000 to 11111. Both devices are packaged in 8-lead minidip to minimise board area. The on-chip oscillator may be adjusted from 18Hz to 150kHz, allowing different transmission rates. They have @ high degree of immunity to incorrect codes; there must be two consecutive correct codes received before the outputs can change. FEATURES Accepts 5 Bit PPM _ On-Chip Oscillator, 15Hz to 150kHz Range WM Easily Used With Ultrasonic, Infra-Red or Other Transmission Media Four High Drive Outputs M16 Latched States IM Minimum Sized Package QUICK REFERENCE DATA I Power Supply: 12V to 18V. Typical mA at 16V. Demodulation : Pulse position with time window checking by on-chip oscillator Decoder : § Bit with successive codeword comparison Outputs: Maximum 15mA sourced from open drain drive Logic convention : Logic 0 ~ output transistor ON, pulls output to Vs Logic 1 — output transistor OFF pps Fig. 1 Pin connections $ T Tr geoutaron |$ . Tt i canta ver une EY YYYY ‘Fig. 2 ML92B, L929 remote control receivers block dagram repre {ee tt 2H Fig. 3 Test cheuitML928/9, ELECTRICAL CHARACTERISTICS Test conditions (unless otherwise stated): ov —16V 425°C - Value : s Characteristic Pin tary [Mac] Unite onditions Current Consumption Voo] 1 3 4 5 | ma Supply voltage se ee a3 |v PPM input 3 Logic 0" level 1 o jy Logie level Voo 3 iy Input pulse width 1 22a | v8 Oscillator Timing 2 Frequency 18 160k | He 4k Hz | Typical TC: 22nF toVss, 100K0 to Voo Variation wrt. Voo 1 “Nv Ltched binary output | 5.6.7.8] -15 ov | v_ | AL=30Ktevoo Logie" output voltage Output leakage in logic state 1 | wa 7 Note 1, Rose. (Bin 2) is 25k = 20040. fore Shag Fig, 4 Forward end reverse drive of two small DC motors PIN FUNCTIONS Negative logi to 218V (Veo) 1. Veo -12V to —18V power supply 2. Oscillator time constant ‘An R-C time constant at this pin defines the internal clock frequency. The clock frequency may be varied from 15H2 at 180Hz and should be set so that there are ‘40 periods in one +, transmitter pulse interval 72 is OV (Ves), “1 is - 12V 3._ PPM input ‘The output of the ‘front end’ amplifier is connected to this pin; the signal must consist of a normal logic ‘1’ level with pulses to logic ‘0’ corresponding to the PPM pulses from the transmitter. 4 Ves OV (ground) 5-8. A.B,C.D Four open-drain high power transistors give a bi coded latched output of the last valML928/9 +0.3V to ~25V —B5°C to +125°C Fig. § Direct drive of LEDs oo supply and inputs w.rt. Vas ABSOLUTE MAXIMUM RATINGS Storage temperature Operating temperature ambient =10°C to +65°C Latched binary outputs M929 DCBA No change Orr oor oor noone C00re rH OO0Or eee 000000 reer eee Eeesseczeesseecs M928 DCBA Or ororororororo-| Por oor cere o0re| 2000e nH 0000 eH 20000000e rere eee No change ‘Code Transmitter EDCBA e-o-o~ororororo-t leo 00r- 00+ oon lo-o-0- or o-ororoe loo 00-00-00 0000 rr O00 Ore ero OOO Or ene joooccocoo000000: aanetetoeen ieanmamaeeiaia Table 1 Response to SLA90 codes 73ML928/9 74sL470 @pP. PLESSEY ADVANCE INFORMATION teen crtt incmmcaeuecnecerras ‘Semiconductors range which, nevertheless, still ‘pre-production’ status. Detals given may, therefore, change without notice although we would expect this performance dala to be representative of “ull production status proguct In most cages. Pleage contac yout local Plassey Semiconductors Sales Office SL470 BCD TO1 OF 10 DECODER/VARICAP DRIVER FEATURES Up To 10 Programmes Direct Varicap Voltage Selection TTL Level Compatible Inputs May be Directly Driven by ML920 Series Receivers Low Component Count Low Cost ig, 1 Pin connections Can Be Used To Drive Indicators QUICK REFERENCE DATA Power supply 33V 3mA I 1 out of 10 outputs selected high Output drive 2mA Input 4 Bit BCD, TTL compatible oc) | c(24) | 8(2*) [ace | 7? (high) o 0 0 0 7 ° 0 ° 1 2 0 ° 1 ° 3 0 0 1 1 4 0 1 ° ° 5 0 1 0 1 6 ° 1 1 ° 7 ° 1 1 1 8 1 0 0 ° 9 1 0 0 1 10 Table 1 Decode table ELECTRICAL CHARACTERISTICS Test conditions (unless otherwise stated): 5c Ta Wen sav ; Value Characteristic Pin Units Conditions Min.[ Typ. _| Max. Operating supply voltage | 11 30 36 v ‘Supply current n 2 3 mA 0/Ps unloaded Selected output level 2-6, 12-16 Veo-15 | Vec-35 | Vv four = 2mA Unselected output levels 2-6,12-16| 05 v 100k load to OV Input high sta 710 17 5 v Input low state 710 03 +04 v Input current 740 15 mA = 1.7 75st470 —vwneiPbonn Fig.3 Typical application cicult for 6 programmes sno} 1] —= = fpfocano] [en =| Fig, 4 Complete remote contol system ABSOLUTE MAXIMUM RATINGS Storage temperature Operating temperature Supply voltage 76 85°C to +125°C 10°C to +65°C 36V,sL4g0 @PLESSEY SL480 INFRA-RED PULSE PRE-AMPLIFIER The SL480 is a bipolar integrated circuit contai three amplifier stages. Its output is directly compatible with the ML920 range of remote control receiver circuits. It is packaged in an 8-lead plastic package. The gain of the amplifier stages may be adjusted to suit ‘pplication. The input impedance Is approximately 20M0, FEATURES Minimum Component Solution to Infra- Red Detection Adjustable Gain Directly Compatible With Plessey ML920 Range of Receivers May Be Used As A General Purpose 100kH2 Limiting Amplifier ‘Fig. 1 Pin connections ABSOLUTE MAXIMUM RATINGS Supply, Vee 20v ‘Maximum power dissipation 480mw Operating temperature range 10°C to +65°C. ‘Storage temperature range 85°C to +125°C Fig. 2 $1480 block dagram 7‘L480 ELECTRICAL CHARACTERISTICS: ‘Test conditions (unless otherwise stated) Tanp = 26°C. Vee = +15 Characteristic Min, Operating voltage range Supp cunt pen loop gain Input impedence Output current ink Internal pullup resistor {Gulescont OP votage low) Pulae output high) 2 RRNNAROO x ‘Sum of 3 stage gains ‘Atreduced gain Noload OPERATING NOTES ‘An external resistor of, typically, 330kQ between pins 4 and 3 provides current for the photo detector diode connected across pins 4 and 6. Any voltage generated across the diode by incident light is amplified. jain of each stage may be readily adjusted by external resistors in series with decoupling cay acitors between pins 7, 8 or 1 and ground. For maxi- mum gain the resistors ‘ar dispensed with except at pin 8. Typical decoupling capacitors are 22nF.The output ‘goes high towards Vec when light is detected. This is ‘compatible with the PPM input of the ML920 series of remote control receivers. The SL480 is compatible with the full power supply range of the ML920 series and can also be used ala lower supply voltage as long as Vec is common to Vss of the MOS device, ie. ‘common positive. Fig-3 Gain adjustment, common positive ‘The circult diagram of the SL480 infra‘ed pulse ampli- fier is shown in Fig. Pulses generated by an infraved receiver diode are amplified to a sullable level for direct connection to the input of any of the Plessey Semi- conductors ML900 series of remote control receiver ci cuits. For basic operation, the receiving diode and SL480 in- put is biased with a single resistor to the positive supply ‘Any infra-red light reaching the diode generates a leakage Current which causes a voltage drop across the bias resistor. ‘The SL480 input stage consists of a compound emitter follower (TR1 and TR2) which provides a high input impe- dance and allows a relatively high diode load resistor as well as a voltage drop of around 1.3V between the input and the bases of the first amplifier stage (TR6, TR7).. Transistors TRS and TR7 form a differential amplifier Which is designed to prevent iow fraquency or DC input sig- als from reaching subsequent stages of the amplifier. Since the bases of transistors TR6 and TR7 are internally Connected by the 6.3K resistor RG, low frequency signals are applied to both sides simultaneously causing no change in collector current and therefore no output to the second stage. Higher frequency signals are amplified because TR? base is decoupled extemally on pin 7. ‘Stage 2 gain is provided by a similar differential ampli- fier to stage 1 except that the relaivaly stable DC input volt age provided by stage 1 output allows the use ofa tall resis- tor R11 rather than a current source. Decoupling of AC sig- nals is provided at pin 8. PF Tig.« Compact infrared receiver 78sL4go Figs5 SL#80 circu diagram ‘Stage 3 is similar to stage 1, but with an extra current ‘mirror (TR24 to TR26) to provide signal inversion at the out- put, ‘The standing current through the output load resistor and thus the output voltage, is set by the current in FS, ‘This current will amount to about 100yA, and give an out ut voltage about 5V below the positive rail with a 15V supply. Nt should be noted that there is a parasitic zener diode of about BV in parallel with the output load resistor R19; this diode will be destroyed if the output is shorted to the nega- tive supply rail. Stage 3 decoupling is provided at pin 1 ‘With a 15V supply, the input stage will operate with in pt voltages ranging from 15V down to SV. This will allow the device to function satisfactory in high ambient light conditions which produce high leakage ‘currents. in the receiving diode. A single transistor circu is shown in Fig, Which prevents the input voltage to the SL480 changing for diode leakage currents up to several millamps, By careful choice of Rand C values, this circuit can be made to give ‘extra rejection of low frequency modulation such as that produced by incandescent lamps. Under conditions of very high ambient light the circult ‘may show signs of instability. This can be prevented by connecting a 22k resistor in series with the transistor ‘emitter. f required, the gain of each stage of the SL480 can be ‘et individually by connecting a resistor in series with the. decoupling capacitor. A 6k resistor will reduce the stage {gain to halt its full value of about 4048. Normally Its ony ecessary to reduce the gain of the second stage with about 33-56%. {t preferred the decoupling components on pins 1, 7 and. ‘8can be earthed to the negative supply on pin 6. ‘As with any high gain device, care is needed in the lay- ‘ut of printed circuit boards to prevent instability. All de- ‘coupling and input components should be mounted close to the SL480. A suitable printed circuit layout for the SL480 is shown below. ‘Decoupling of the power supplies local to the SL480 is, ‘advisable. A resistor of about 5600hms in series with the Negative rail and a parallel capacitor of G8microfarads being adequate (see Fig.6). ‘The decoupling resistor should always be in the nega- tive supply as the ML920 series remote control circuits hhave a threshold close to the positive rail, and any voltage ‘drop here would reduce the noise immunity ig.6 Typical infra-red ampliir application with improved detector biasing ossi4g0 80@PLESSEY Semiconductors ‘$1490 SL490 REMOTE CONTROL TRANSMITTER Plessey Semiconductors have developed and pro- duced a range of monolithic integrated circuits which give a wide variety of remote control facilities. As well 2s ultrasonic or infra red transmission, cable, radio or telephone links may also be utilised. Pulse position modulation (PPM) is used with or without carrier and ‘automatic error detection is also incorporated. Although initially designed with TV remote control in mind the devices may equally easily be applied for use in radios, tuners, tape and record decks, lamps and lighting, toys and models, industrial control and monitoring. The SL490 is an easily extendable, 32 command, pulse position modulation transmitter drawing negligible standby current. it may be used with the ML920 series, of remote control receivers. FEATURES ‘Fig. 1 Pin connections QUICK REFERENCE DATA Ultrasonic or Infra-red Transmission Power Supply: 8V, Standby 6»A, I Direct Drive for Ultransonic Transducer Operating mA Direct Drive of Visible LED When Using Modulation : Pulse Position With or laieagteed Without Carrier 7 rey tow PRR I Coding: 5 Bit Word Giving a Primary m Dicollent Inmunty Prom Nose and Corona eal ec comsnsnas) Multipath Reflections WL Key Entry: 8 x 4 Single Pole Key Matrix Single Pole Key Matrix Data Rate: Selectable 1 Bit/Sec to I Switch Resistance Up To 1ka Tolerated 10k Bit/Sec. Im Few External Components W Carrier Frequency: Selectable OHz (no WH Anti-Bounce Circuitry On Chip cartier) to 200kH2. a /—T sete Fy me Set =| "ig. 2 51.490 wanemiter lock diagramELECTRICAL CHARACTERISTICS (see Fig.3) ‘Test conditions (unless otherwise stated): sL490 Tomo = 25°C “aokHe Vee = +7Vto+96V t= 18m8 ch = units} Condit aracteristic Pin ni ‘onditions Min. | Typ. | Max, Operating supply current 4 a [ie | ma] vec 9sv Standby supply current 4 30 | uA Stablised voltage 17 | 43 | 46 [49 Output current aveilable 7 i mA Output voltage swing 23] 4 Vee Unloaded Output current 23 o | ma | Peak value External switch resistance 3 ko External switch closure time 6 ms. External carier oscillator resistor rz 1a | 20 | 40 |e C2 = 680pF M resistor Rr required | 16 | 18 | 30 | 60 Ci = 068uF Ratio to/ty 23[14 | is [16 Pulse width, te 23| 2 3 [4 | ms Inter word gap, te 23] 50 | 54 |se | ms Variation of with Voc towithVee=9.5V {with Vec=7.5V | 29 | 0.96 108 Pulse width, 23 | 2 a [4 | ms Inter word 908 t, 23 | 50 | s& |se | ms Fig.d PPM word notation ts = to ta.ch Rt 1 dxo7c2.n2 Fig. 4 Test and ultasenie application veut‘sL490 Fig.5 Intra-ed application ereuit OPERATING NOTES. Fig5 shows the circuit fora simple infrared transmitter where the PPM output from pin 2 of the SL490 is fed to the base of the PNP transmitter TRI, producing an amplified ‘current pulse about 15sec wide. This pulse is further amp- lifled by TR2and applied to the infraed diodes D1 and 02. ‘The current in the diodes and the infraved output is con trolled by the quantity, type, and connection method of the diodes and also by the gain at high currents of the tran- sistors. ‘The most common solution where cost is important is to use 2 single-chip diodes, such as the COY99 connected inseries. Improved output can be obtained by using four CaY99 diodes in a series parallel arrangement, but it's usually sim- pler to use 2 multichip diodes such’as the COX4? con: ected in parallel or a single CQX19 which gives similar results. ‘A significant increase in range can be obtained by using diodes such as the CAY99 in conjunction with a plated Plastic parabolic reflector. When building the transmitter, care should be taken with the choice of the capacitor C2 and with the eiuitiay ut, particularly when multi-chip diodes are being used, as the current pulses can be as high as 6 to 8Amps. ‘Transistor choice is also important and any substitutes should have high current gain characteristics and switch- ing speeds similar to those specified in Fig.3. [An increase in output can be obtained by connecting ‘TR in common emitter configuration, but care should be taken not to exceed the rating ofthe diodes. Choice of PPM Frequencies ‘Although the ML920 series of remote control receivers, {is designed to work over a wide range of PPM frequencies, the actual usable range may be restricted by the appl Cation. The analogue outputs on the ML920, ML922 and ‘ML923 serve as a good example, since the outputs will step up or down, one step for each pair of PPM words received. This in tum fixes the rate of increment or decre- ‘ment of the volume or colour controls of a TV set. When the transmitter is being used with an infrazed tink, with high current pulses fed to the diodes as in Fig 5, ower consumption will Increase with frequency. i is thus advisable that with a battery power supply, the slowest PPM rate consistent with adequate response time should bbe chosen, Setting Up Procedure When designing a system using the SL490/491 trans rmitters and the ML920 series receivers, itis not necessary to adjust the PPM cate on both transmitter and receiver. The usual arrangement is to have a fixed resistor of 33k from pin 16 of the SL490/491 and to choose the capacitor connected for pin 16 to pin 17 to give the required PPM fate. The value is calculated from the formula ty ~ 1.4CR. Provided fairly close tolerance components are used for C1 ‘and Ri, then assembled transmitter units should be inter. Changeable without adjustment. The timing components on the recelver can be selected using the formula 1 ‘n= —gygcR where t= t, being the PPM logic Otime from the transmitter. ‘The value of R for the receiver should be between 47k ‘and 200k, a typical arrangement being to use a 47k fixed resistor and a 100k pot as shown in Figs. The capacitor ‘should be selected from the above formula to give the ‘nominal frequency somewhere near the mid-ange setting of the potentiometer. Final adjustment is made by setting the period on the receiver oscillator time constant pin to 1/40th of the trans. mitter PPM logic 0 time using the potentiometer, Connection to the receiver time constant pin should be ‘made using a x10 oscilloscope probe to reduce circuit loading. ‘When adjusting the ML920, the monitor output can be used for setting up, butin this case, a figure of 1/20th of the transmitter PPM logic O time should be used as the monitor ‘output is at half the oscillator frequency. 83 40sL490 tH 3 ig.6 Recommended receiver ime constant components ABSOLUTE MAXIMUM RATINGS Supply voltage 7V 10 95V Total power dissipation 600mW Operating temperature range —10°C to +65°C. Storage temperature range 55°C to +125°C.PLESSEY @ Semiconductors ‘Advance information issued to advise Customers of new adai ve pre-production’ status. Detalls given ray, thorofor, change without l production status product in most cases. Please contact your local Plessey Semiconductors Sales Office De representative of 7 {or details of current stas1 ADVANCE INFORMATION although we would expect this performance dala to SL491 REMOTE CONTROL TRANSMITTER Plessey Semiconductors have developed and pro- duced a range of monolithic integrated circuits which ive a wide variety of remote control facilities. As well 28 ultrasonic or infra red transmission, cable, radio ot telephone links may also be utilised. Pulse position ‘modulation (PPM) is used with or without carrier and ‘automatic error detection is also incorporated. Although initially designed with TV remote control in mind the devices may equally easily be applied for use in radios, tuners, tape and record decks, lamps and lighting, toys and models, industrial contral and monitoring, The SLAG} is an easily extendable, 32 command, pulse Position modulation transmitter drawing negligible siandby ‘current. It may be used with any ML920 series remote con. ‘rol receivers. The carrier osollator may gate the PPM ata slow rate, producing bursts of transmission. FEATURES Ultrasonic or Infra-red Transmission Mult-Transmitter Burst Mode Facility Burst Duty Cycle Variable Very Low Power Requirements Pulse Position Modulation Gives Excellent Immunity From Noise and Multipath Reflections Single Pole Key Matrix Switch Resistance Up To 1k@ Tolerated Few External Components Anti-Bounce Circuitry On Chip wot sunt | = 7 =} ome Tia Finca QUICK REFERENCE DATA Power Supply: 9V. Standby 6 HA. Operating &mA PPM with or without Cartier or Burst Mode Coding: § Bit Word Giving a Primary Command Set of 32 Commands Key Entry: 8 x 4 Single Pole Key Matrix Data Rate: Selectable 1 Bit/Sec to 10k Bit/Sec. Carrier Frequency : Selectable 0Hz (no carrier) to 200kHz. c - stecioe yy xe PS a o = 7 . geen jg JO, tou : HJ neste = 7 fer i T 2 scttton F—3 me cower Cs umn Fig.2 SL491 transmitter block dlagram 85suas1 ELECTRICAL CHARACTERISTICS (see Fig.4) ‘Test conditions (unless otherwise stated): Tam=25°C t= 9ms Veo=8V t= 6ms Characteristic ‘Operating supply curent Standby supply current Stabilised voltage ‘Output current available ‘Output voltage, Vo, low Output current External switch resistance External switch closure time Gating oscillator frequency Resistor R2 for cartier frequency = 40kH2. External PPM resistor R1 required Ratio tot Pulse width, ty Inter word gab, ty Value ae] Ute | Condtions a | 16 | ma | voc=95v 30 | uA 43} 48 | 49 | V | Noextematioas 1 | oma 16 | Vv | somAsink 100 | ma | Peakvalue 1 | Ke 20 ms 8 Hz | C2= IWF, R= 20k9 10 so | ka | c2=inF 15} 90 | 60 | Ko | Ct=2200F 15 1 ms 18 ms Fig.3 PPM Word Notation Fig.S High power output stage 86 Fig-4 Test circuit and low power application ABSOLUTE MAXIMUM RATINGS ‘Supply voltage Total power dissipation Operating temperature range —10°C to +65°C 85°C to +125°C ‘Storage temperature range TV 10 95V@PLESSEY Semiconductors, SL952 UHF PRESCALER AMPLIFIER ‘The SL952 amplifier has been designed to rescaler (SP4020, CT1110 otc) in a frequency synthesis system directly from the tuners local oscillator It features @ differential output to reduce. local oscillator radiation, and a differential input. which may be used to couple the outputs from a VHF and a UHE tuner (see Fig. 3). The device operates from a single BV supply with a ‘minimal number of extemal components and is encap- sulated in a 14 lead DIL package FEATURES Low Cost High Gain Minimal External Component Count Good Limiting Characteristics 1GHz Response 5V Supply ABSOLUTE MAXIMUM RATINGS Ambient temperature 0°C to +65°C. ‘Storage temperature ~55°C to +125°C ELECTRICAL CHARACTERISTICS ‘Test conditions (unless otherwise stated) : SL952 swarm suas an {lawn Note: Ground all other unused pins ppt "ig. 1 Pin connections Fig. 2 Test crouie ov 425°C Nalve Units Conditions Min. | Typ. | Max. Supply voltage 475 | 500 | 550 |v Supply current 70 | 90 | ma DC output tevel 32 v Output offset 100 | 600 | mv Maximum differential output swing | 600 mVp-p 950MHz Differential voltage gain 30 | 35 dB 100MHz Differential voltage gain 30 | 35 dB S00MHz Differential voltage gain 15 | 26 ae S50MHz 87‘SL952 a ye 88 ig. 3 Typical pplication for TV frequency synthesis.SL95S @ PLESSEY ADVANCE INFORMATION ' juctors ——————__ ADVANCE INFORMATION {Advance information i issued to advise Customers of new additions to the Plessey Semiconductors range which, neverineless sti have pre-production’ status. Details given may, therefore, change without notice although we would expect this performance det 10, be representative of ull production “status product In most cases. Please contat {or datas of eurent status, "Your local Bessey Semiconductors Sales Office SL9O55 UHF PREAMPLIFIER ‘The SLOSS amplifier is a general purpose device for use at frequencies up to 1GHz.It features a differential input ‘and output, and good linearity. The device operates from a ‘single 5V supply with a minimal number of extemal com- ponents and is encapsulated in an lead DIL. package a 0 FETAL TUT (0P8). es FEAT UTP FEATURES ops Mi Lowcost Fig.1 Pin connections M2208 Gain (S,,) Minimal External Component Count 1 Good Linearity ABSOLUTE MAXIMUM RATINGS tial I it Differential input and Outpul Voc + 10V (short term) I 1GHz Response Operating temperature range - 10°C to +65°C @ 5VSupply Storage temperature -55°C to+125°C. Fig. Typles! requency response All connections must be kept as short as possible Fig? Test cirouit ELECTRICAL CHARACTERISTICS ‘Tost conditions (unless otherwise stated): Veo 5.0V, Tax = 25°C Vatue. Characteristic Pine ec] ute Conditions ‘Supply voltage 6 | 47] so | 55 v Supply current 6 so | so | 7 mA Differential gain S,, 16 | 22 68 | 1010900MHz Differential gain S,, 20 a8 | GHz Ditferential gain S,, 10 dB | 13GHe Input signal handling 24 25 ™mVims | -40dB intermodulation Noise figure 2 oB 89L956 W] Be H! *ig.4 Typical application 90@PLESSEY Semiconductors. SL 1430 TV IF PREAMPLIFIER The SL1430 is a fixed gain IF preamplifier for television with an output optimised for driving Ples: Second generation low capacitance surface acoustic wave (SAW) filters. The addition of one external Capacitor allows the amplifier to drive normal capaci- tance SAW filters from Plessey or from other manu- facturers n chip decoupling and ditfer- utput, requiring a minimal number of external components to be used. FEATURES Mi Low cost Mi Low noise I Low external component count Low distortion Direct 12V operation I Can be used with different types of SAW filters QUICK REFERENCE DATA 2248 gain at 4(OMHz ME 12V supply at 25mA I 120mV rms. input handling ELECTRICAL CHARACTERISTICS ‘Test conditions (untess otherwise stated). Tanb = +25°C Supply voltage = +12V Frequency = 40MHz Output load = 7.5 pF (Pins 2 and 3) Measurements made using test circuit Fig. 2. 81430 ssa ‘ns | suse | ops Fig. 1 Pine annections (tp view) Fi. 2 Fest creut Value Characteristic Pin_| Min Typ. Conditions ‘Supply voltage ‘Quiescent current Cutotf frequency (38) 5 Voltage gain 8 Imput signal for 4648 intermodulation Input signal for 1% crossmodulation 2 8 Input signal for 148 syne tip compression 130 Input impedance 12 110 2 120 78 135 MHz dB mv mv mv Pins 2, 30/C Red colour bar (wanted level 20mVv unwanted modulation 65%) mms. 91SL1430 no swmyswisd ye fs Fig. 3 Typical ppleations $L1430 TYPICAL CHARACTERISTICS AT ,12V, +25°C, WITH SW173 AS LOAD (7.5pF) (FIGS. 5T0 10) Unwanted signal with 65% amplitude modulation at 10KHz ? ie - + tee Per r r ca mnteemns | ie ene ib i | 3 | — 3 - ' E | i | | | fe | 5 reo meouency cane) °o 3 ~ 3 we > Fig. 6 Cross modulation performance V frequency of unwanted [UNWANTED SIGNAL ivr) signe! (see note 1) Fig. 4 Cross modulation pertormance (see note 1) i-- — ge + z E i i 5 si | ge | — 5 T 3 | § ot “| 5 | 3 =| — 1 4 * surrr voice W) ADDIMONAL (10.5473) CAPACITANCE (oF) ig. 5 Cross moduation pertormance V supply vokege ‘see note 1) Fig. 7 Intermedulation performance v load eapechence$L1430 4 T VISION CARRIER FOR -44ae WxTERMOD, i “FH T T q za i] = = = ~ of i | VISION CARRIER (nV rma) Fig. 9 Intermeduletion performance (see note 2) ‘super voeraoe (v) Fig. 8 intermodulation performance v. supply vohoge NOTE 1, Signa level refers to peak rms. ie, The effective sync: tip level of @ composite video signa NOTE 2. The test signal employed comes thesyne. plove the vision cat sponds to the red bar of» transmitted colour bar and consis ofthe following elements related to er at 38 9MH2-6dB, the colour carne at 34 SMHe-18d8, andthe sound carer st 32 4M: as ABSOLUTE MAXIMUM RATINGS ‘Supply voltage Operating temperature range ‘Storage temperature range ~0.5V to +25V IOC to 465°C BEPC to +1256 93811430 94@PLESSEY suast/siras2 SL1431/2 TV IF PREAMPLIFIERS WITH AGC GENERATOR ‘The SL1431 and SL1432 are fixed gain IF pre- amplifiers for television ‘with a differential output op- timised for driving Plessey surface acoustic wave (SAW) filters. Besides providing the necessary gain block between the tuner and SAW filter they also supply 2 properly derived, broadband AGC signal to the tuner, the SL1431 providing the correct sense signal for NPN tuner, and the SL1432 for an PNP tuner, The tuner AGC threshold is internally preset to. a value to allow adequate signal handling in the SL1431_ and SL1432 and does not normally require any external adjustment. However, to account for the large varia tions in signal handling capability which is encountered fon some tuners, the tuner AGC threshold. may be externally adjusted by altering the bias on pin 1. Both devices feature on-chip decoupling for @ ‘minimum external component count. AGC Signal For high input signal levels the voltage on pin 7 goes low with $L1431 and high with the SL1432. QUICK REFERENCE DATA 2348 Gain at 40MHz 12V Supply at 25mA 120mV R.M.S. Input Handling 18mA Tuner AGC Capability ‘ig. 1 Pin connections FEATURES M_ Properly Derived Tuner AGC Low Cost Low Noise Low External Component Count Low Distortion Direct 12V Operation Can be used with Different Types of SAW Filters Fig. 2 Block diagram Fig. 3 Test circuit 95‘SL1431]si1432 ELECTRICAL CHARACTERISTICS Test conditions (unless otherwise stated) : Tomo —+25°C Supply voltage = +12V Frequency = 40MHz Output load = 7.5pF (Pins 3 and 4) Measurements made using test circuit Fig, 3. a Value. is ie Characteristic Pin Fain] Typ. | Max] Units Conditions ‘Supply Voltage 2[ 7] zfs] v ‘Quiescent Current 2) 22] 33 | 40 | ma | Pinso/c Cut-off frequency (—348) 6 | 60 | 110 MHz Voltage 9 20 | 23} 26 | 4B Input signal for 4648, intermodulation 6 120 mv | Red colour bar Input signal for 1% cross ‘modulation 5 76 mV | (wanted level 20mV, unwanted ‘modulation 65%) Input signal for 14B syne tip ‘compression 5 | 130 mvs. Input impedance 5 3000. 14.2pF| Tuner AGC Output current 7| 15 | 20 ma | @100V Input impedance i 6 ko f i; — alee be lis m Fig. 4 Typical epplications $11431 TYPICAL CHARACTERISTICS AT ,12V, +-25°C, WITH SW173 AS LOAD (7.5pF) (FIGS. 5 TO 10) Unwanted signal with 65% amplitude modulation at 10kHz Ac : Be | : i 2] | : | é ec {|_| i ze _| / | | i I } i 1 i | : com i | i : i] +— + AG t : : |_| BNAL (mV ces) ‘SUPPLY VOLTAGE (Vv) a " Fa. 6 Crs modoatnpremanc po al Fig. 5 Cross modulation performance (see note 1) (see note 7) eel vohece 96si1431/sus4s2 ~ ? 1 i z*| — aoe ipl] | ‘ i : VE i ie i : + 3 ‘ | ‘UNWANTED FREQUENCY Cus) 2 i Fig. 7 Cross modulation performance V trequency of unwented 2°T apres comer » 7 ee i-l4 E | | i” | i PY 2 “ T i i z* — * y i i Rane ae peat ae es Fig. 10 intermodulation performance (see note 2) NOTE 1. Signal level refers to peak rms. i. The effective syne. tp level of a composite vide signal, NOTE 2. The testsignal employed coresponds to the red bar ofa vansmittad colour bar and consists ofthe following elements related to ‘the yne. Uplevl, the vision carer at 38 @MHz-6d8, the colour carer at 34 SMHs~18d8, andthe sound carer at 33 4MHz~708, ABSOLUTE MAXIMUM RATINGS ‘Supply voltage =0.5V to +25V Operating temperature range —10"C to +65°C ‘Storage temperaturerange 85°C to +125°C. 7si1431/si1492 98sL1440 @PLES' ductors ADVANCE INFORMATION {ovance information's ssueg to avise Customers of new adsitions fo he Plesaey Gomiconduclors range whic, nevertheless, tl fave pre production’ status. Detals given may, therefore, change without notice although we would expect this performance data to Bo representative of “ull production status product in most cases, Pease contac! your local Plessey Semiconductors Sales Office for datails of current statu, SL1440 PARALLEL SOUND AND VISION IF AMPLIFIERS AND DETECTORS This IC is designed to operate with a two output port surface acoustic wave IF fiter, one output for waza Tp seman Vision and chrominance carriers with no sound carrer, {and one output for the sound carrier only, ‘The IC amplifies and detects the sound and vision com carrier in two separate channels, the detectors being ‘of the wide band switching type, not requiring any ‘tuning. An AGC system is appliod tothe vieion channel ‘the sound channel being made to hard limit. wa coef I there is no facility for tuner AGC, an SL1491 tq should be used to provide this signal, operating ppt before the SWAF to provide superior overload performance and needing no preset adjustment. scone (fl ea se came Fig. 1 Pin connections (top view) woo we Bs r a st Fig. 316 Block diagram. 99sL1440 100@PLESSEY Semiconductors. ‘$P4020/1 SP4020/1 VHFIUHF 1 GHz = 64 The SP4020 and SP4021 are ECL divide by 64s which will operate at frequencies in excess of 950MHz, and are intended for use as prescalers in television receiver synthesiser tuners. ‘The P4020 has separate inputs for VHF and UHF and the devices have a typical power dissipation of 470mW at the nominal supply voltage of +6.8V, FEATURES Dual Input Ports for VHF and UHF (SP4020) Self-Biasing Clock Inputs Variable Input Hysteresis Capability for Wide Band Operation TIL/MOS Compatible Band Change Input (sP4020) Push-Pull TTL O/P OPERATING NOTES Put ports are available on the SP4020. 1g between these inputs is accomplished by operation of the band change input. A logic “1” ‘activates the UHF input, logic ‘0’ the VHF input. Wt {an input is not in use the input signal must be removed to prevent cross-modulation occuring at high fre- quencies. Both inputs are terminated by 4000..and should be AC coupled to their respective signal sources. Input power to the device is terminated to ground by the two decoupling capacitors on the reference pins. Input coupling and reference decoupling capacitors should be of a type suitable for use at @ frequency of 1GHz. ‘When the device is switched to the VHF input, an input hysteresis of 5OmV is set by the internal band change circuit. This improves the low frequency sine- wave operation of the device. The hysteresis level may be ‘measured as Vaer1 —Vaer2 It the SP4021 is required to operate with a sinewave input below 100MHz, then the required hysteresis may be applied externally as shown in Fig. ©. Large values of hysteresis should be avoided as this will degrade the input sensitivity of the device at the maxi- mum frequency. The divide by 64 output is designed to interface with TTL which has a common Vee (ground). At low frequency the output will change when one of the clock change inputs changes from a low to a high level. Self oscillation may result if the input signal falls below the minimum specified. he devs ray bo opaated down to wen, low frequencies if a square wave input with an edge ‘eater than 200V/us is used. eth pres Pp seecnois fas) wife shevasensin gpg Fig. Pin connections Onty one generator should be connected to either the. \VHF of UHF inputs. The input natin use may be le open, Ccreult. All capacitors are TAF unless otherwise stated, Fig? ACtest circuit Connections to these pins should be made to have the ‘minimum series inductance. Capacitors should be of 2 Figs Application arcult 701sP4o20/1 ELECTRICAL CHARACTERISTICS Tost conditions (unless otherwise stated): ‘Supply voltage Vee = oV, Vec = +6.45V to +7.15V Clock input voltage sinusoidal Ta: 425°C Pin 14 0/P Value Fi Characteristic Pin Units | Conditions Min. Typ. Max. Supply voltage 12 6.45 6.80 745 v Supply current 12 | 40 68 30 mA | Vec= 68V Output level high 4 25 35 50 vo | —tma Output level low 4 03 05 vo | Sma Band change input (SP4020.oniy)| See Note 1 High level 4 25 v__ | For UHF input Low level 14 O4 Vv | For VHF input Low level 1/P current 14 08 ma | @ 04 14 “3 ma | @-0.7V VHF I/P 100MHz 100 300 mVp-p | Pin 14 to OV VHE I/P 300MHz 50 300 mVp-p | Pin 14 to OV UHF I/P 500-800MHz 10 100 300 mVp-p UHF I/P 950MHz 50 300 mVp-p | See Note 2 sP4021 :- \/P 100MHz 10 120 400 mVp-p IP 300-800MHz 100 300 mVp-P \/P 950MHz 50 300 mVp-p | See Note 2 Overload level ‘$P4020:- VHF I/P 100-300MHz 8 og 20 Ve-p UHF I/P 100-950MHz 10 09 20 vp-p | Pin 14 to ov ‘SP4021 :- VIP 100-300MHz 10 10 20 Vp-p I7P §00-950MHz 10 09 20 Vp-p Note 1 TTL type including negative input voltage clamp Capacitors are 1nF unless otherwise stated. Val should be Inerossed if operation below 1OMH2 Is Fequited For Som hysteresis fi For 100mV hysteresis Rt Fig. 4 Widebend operation 102 Note 2 This is measured with the device in alow profile socket: soldered results show. typically, a 25% improvement. ABSOLUTE MAXIMUM RATINGS ovio +10V 25V pp 47.210 —0.5V or —10mA “+30mA to —30mA, O°C to +65°C 85°C to +125°C. Power supply voltage Vec ~ Vee Input voltage, clock inputs Band change input (SP4020) ‘Output current Operating temper ‘Storage temperatur@PLESSEY Semiconductors. sP4040/1 SP4040/1 VHF/UHF 1 GHz + 256 The SP4040 and SP4041 are ECL divide by 256 which will operate at frequencies in excess of 950MH2, ‘and are intended for use as prescalers in television receiver synthesiser tuner ‘The SP4040 has separate inputs for VHF and UHF and the devices have a typical power dissipation of 500mW at the nominal supply voltage of +6.8V. FEATURES I Oval Input Ports for VHF and UHF (SP4040) Self-Biasing Clock Inputs Variable Input Hysteresis Capability for Wide Band Operation TIL/MOS Compatible Band Change input (SP4040) Push-Pull TTL O/P OPERATING NOTES Two input ports are available on the SP4040, ‘Switching between these inputs is accomplished by Operation of the band change input. A logic “1” activates the UHF input, logic ‘0’ the VHF input. When {an input is not in use the input signal must be removed to prevent cross-modulation occuring at high fre- quencies. Both inputs are terminated by a nominal 400 and should be AC coupled to their respecti signal sources. Input power to the device is terminated to ground by the two decoupling capacitors on the reference pins. Input coupling and reference decoupling capacitors should be of a type suitable for use at 8 frequency of 1GHz. When the device is switched to the VHF input, an input hysteresis of 5OmV is set by the internal band ‘change circuit. This improves the low frequency sine- wave operation of the device. The hysteresis level may be measured as Ver —Vasr 2 If the SP4041 is required to operate with a sinewave input below 100MHz, then the required hysteresis may be applied extemally as shown in Fig. 5. Large values of hysteresis should be avoided as this will degrade the input sensitivity of the device at the maxi- mum frequency. The divide output is designed to interface with TTL which has a common Ves (ground). ‘At low frequency the output will change when one Of the clock change inputs changes from a low to a high level. Self oscillation may result if the input signal falls below the minimum specified, The devices may be operated down to very low frequencies if a square wave input with an edge speed ‘greater than 200¥/us is used. orig Fig. Pin connections Fig. 2. Equivalent smal signal input impedance (BOMHz-1GH2) omsmgeore Ser bre PSHide | y js our poche “Bg a zl circut. All eapctors “inF unless etherwige stated. Fig. 8 AC test circuit 703‘sP4040/1 ELECTRICAL CHARACTERISTICS Test conditions (untess otherwise stated): ‘Supply voltage Vee = oV, Voc Clock input voltage sinusoidal +6.45V to +7.15V Tar 425°C Pin 14 O/P Characteristic Pi Valve Units Conditions Min. | Typ. | Max. Supply voltage ea ee Supply current 12 6 | 9 | mA | vec=60v Output level: 4 2a | as | 50 |v 2ma a 03 | o« |v Sma put High level 1 | 2s v For UHF input tow level 4 os |v For VHF input | SP4040 Low level I/P current 4 ~08 | ma | eoav only Max. clamp current a | 3 ma | @~0.7V Sensitivity ‘SPaOdO VHF IP 100MH2 8 2 | 10 | my | Pintgtoov 300MHz 3 | to | mv | Pintatoov UHF 1/P 500-800MHz 10 3s | too | mv S50MHz 40 go | 155 | mv | Notet sPaoat = TOOMH2 10 40 | 200 | mv 200MH2 40 10 | wo | mv 300mHe 40 so | 125 | mv 400700Me 10 3s | 100 | mv 00MM 40 7m | 140 | mv 950MHe 40 vo | 20 | mv | Note1 Overload level ‘SP4040 ‘VHF 1/8 100-200MHz 8 as0 | 700 mv UHF 1/P 500-600MHe to | 350 | 700 mm — | Pin14toov sPto4 100MH2 10 |. 425 | 100 mv 300MH2 10 | 350 | 700 mv 500-600MHz 10 | 350 | 700 mv S50MH2 jo | 45 | a0 mv [Note 1. Ths is measured withthe device in low profile socket soldered in results show typically a 25% improvement oss = ‘Connections to these pine should be made to have minimum series inductancs. Capecitors should be of @ {ype suitable for use at 1GHz es Lt a i Capacitors are 1nF unless otherwise stated. Values ‘should ‘be Increased if operation below 10MHz is require. For SOV hysteresie RI For 100m hysteresis Ri Fig. 4 Application creut 104 Fig. 5 Wideband operationsp4040/1 an wer VOLTAGE (n¥) ~LE aa : Ee ESE Frequency (ais) Fig. SP4040 typical ensiivty with limits of operation when used in application crcurt (Fi. 4) ABSOLUTE MAXIMUM RATINGS Power supply voltage Vcc - Vee Ovto +10V Input voltage, clock inputs ‘egomy Band change input +7.2V (SP4040) 10m Output current +30mA to —30mA, Operating temperature O°C to +65°C Storage temperature 85°C to +125°C FREQUENCY (uns) Fig. 7 SP4061 Typies! senstvty with limits of operstion when used in application creut (Fig. 4) with pin 14 open eieut. 105sL1440/sP4041 106SP4531 @ PLESSEY ADVANCE INFORMATION — ‘Advance information issued to advise Customers of new adations lo the Plessey Semiconductors range which, nevertheless, stil fave pre production’ status, Deals given may therefore, change without notice although wo would expect ins pertormance deta to Be fggrazeniative of ul production satus product m most cases, Please conac\ You local essey Semcondcors Sales Olics or details of current status SP4531 1GHz + 64 ‘The SP4531 is one of the new range of Plessey Con. ‘sumer high speed dividers. which offer improved input ‘sensitivity and input impedance characteristics. 'e ‘The device is intended for use in television frequency wa synthesis systems. It has a division ratio of 64 with dual ECL outputs and incorporates an on-chip preamplifier with a {differential input. The input pins may be used as UHF and ori VHF inputs, with only a slight loss of sensitivity, if suitable dive circuitry is employed. Fig.1 Pin connections Bbw HE Onchip wideband ampiiir HE High input sensitivity I High input impedance a s Low output radiation Complementary ECL output ‘ABSOLUTE MAXIMUM RATINGS ‘Supply voltage, Vac, +7v Input voltage 25Vpp “Ambient operating temperature -10°C to+ 65°C ‘Storage temperature 55°C to+ 125°C mer Fig? SASS block diagramSP4531 ELECTRICAL CHARACTERISTICS (see Fig.3) ‘Teat Conditions (uniees otherwise stated): Tamb = +25°C, Voc = +5V Value. Characteristic Pin ae me] Conditions ‘Operating voltage range 8 45 5 55 v ‘Supply current 8 60 0 mA Input voltage, Viv, 8OMHz | 2 | 175 200 | mvs | Sine wave into 500 ‘300MH2 2 | 175 200 | mvs. so0MHz | 2 | 175 200 | mvmms oomHz | 2 | 175 200 | mVims 1GHz 2 | 175 200 | mime Output voltage 6 08 vep | Noload 7 08 vee Output imbalance 67 on v Output impedance 6 500 a 7 500 2 Fig.3 Test configuration vm merece som) 108 (a) Duatinput woe ST ST () input *Fig.4 Combined input operation Fig Typical input sensitivityKON (ESRD) SUT I Neaaessp4ssti 10spasat @PLESSEY CS SP4541 1GHz + 256 ‘The SP4541 is one of the new range of Plessey Con- ‘sumer high speed dividers which offer improved input ‘Sensitivity and input impedance characteristics. 7 ‘The device is intended for use in television frequency Q synthesis systems. It has a division ratio of 256 with a Fk poe single TTL output and incorporates an on-chip preamplifier | with a differential input. The input pins may be used as spasat UHF and VHF, with only a slight loss of sensitivity, if coma " ‘suitable drive circuitry is employed. le shown FEATURES b 4 (On-chip wideband amplifier ppt I High input sensitivity 7Fig.1 Pin connections High input impedance @ Lowoutput radiation @ Thoutput Fig? SP454T Block diagram ELECTRICAL CHARACTERISTICS (s00 Fig.3) ‘Test Conditions (unless otherwise stated): Tam +25°C, Voc +5V Valve. Characteristic Pin | ae] te Conditions ‘Operating voltage range 12] 45 5 55 v Supply current 42 7 90 mA Inputvottage, Vin, 80MHz | 10 | 17.5 200 | mvims | Sine wave into Son goomHz | 10 | 175 200 | mms. soomHz | 10 | 175 200 | mvems omHz | 10 | 175 200 | mvmns rooomHz | 10 | 17.5 200 | mens. Output voltage High 33 v Sourcing 0.2mA ‘tow os v Sinking 2A 1m@PLESSI PLESSEY Semiconductors ADVANCE INFORMATION {Avance information's issued to avis Customer of new ations othe Pleasoy Semiconductor range which, novatel talus, Details given may, therefore, change without notice although we would expect this performance deta 0 be vogresenaive of “ul proguction satus product in ost eases, Poase contact You oe! Pieavey Serie Soe ons SP4545 COMBINED VHF ~ 64, UHF + 256 ‘The SP4545 is one of the new range of Plessey Con- ‘sumer high speed dividers. which offer improved input ‘Sensitivity and input impedance cheracteristics. Fee ee a. acercy | ora etn ran ta end AT te ve ean = Ba ec laos | selected when the band select Is low and when itis high om the UHF input s selected. FEATURES Far rca I Oncchip wideband amplifier Brrr [High input impedance Lowourput radiation ‘Complementary ECL output I Separate VHF and UHF inputs cone Booed ae WE +256 for UHF ‘Ambient BP, Semgwroman eebarc Bi ortoresieeen imataremn “Sees, Fig.2 SPASAS block diagram 13‘sP4s45 ELECTRICAL CHARACTERISTICS (s00 Fig.3) ‘Test Conditions (unless otherwise stated): Tamb = +25°C, Voo= +5V Value Characteristic Pia | aay a Units. Conditions Operating voltage range 42] 45 5 55 v Supply current 14,2 60 20 mA Inputvoltage, Vin, 80MHz | 13 | 175 200 | mvs |) Pin3iow (rmssinewave”” —200miz | 3 | ars 200 | vie. |t 64) into 509) 240MHz | 10 50 200 | mVvrms 60oMHz | 10 40 200 | mvims |} Pinshigh 1000MHz | 10 40 200 | mvs |) (#256) Output voltage 4 os pp 5 08 op \ Noload ‘Output imbalance 45 4 pp Output impedance 200 a 200 2 Band select input voltage high | 3 2 208 v UHE tow | 3 08 v VHF currenthigh | 3 500 uA | Sinking tow | 3 100 WA | Sourcing *Fig5 Typical input impedance 114‘SP 4550/51 PLESSEY ADVANCE INFORMATION Semiconductors francs informations issued to aie Customers naw aditiong othe lesay Semiconductor range which, never hhave‘pre production’ status. Details given may, therefore, change without notice alhough we would expect ths pertorman bevepresontative of Yul production*atstus product in most eases Pease Gonac\ you local Plessey Semiconductors Sales Slice SP4550/1 1GHz = 256 ‘The SP4550V1 ar part of the new range of Plessey Con ‘sumer high speed dividers which offer improved input ‘sonsitivityand higher input impedance. wf 7 ‘Te devices ae intended for use in television frequency : synthesis systems. They have a division ratio of 256 with a b 4 ingle, (SP4S50) or complementary, (SP4551) ECL output : and incorporate an on-chip preampilier witha diferentia input. The input pins may be used as UH and VHF inputs, veal seasso op | with only a sight Tose of sensitivity, if sultable crve ci: Cult is employed. im ; FEATURES: a pn I Onchip wideband ampltier High input sensitivity nf. IE High input impedance P 4 BH Lowoutput radiation + 4 Single ($4550) or complementary (SP4551) ECL. 4 output , srassr JL, of wed 4 ‘ABSOLUTE MAXIMUM RATINGS . 4 ‘Supply voltage, Voc tv Input voltage 25Vpp ote “Ambient operating temperature “10°C to +85°C Storage temperature “SC 10+ 125°C ig.1 Pin connections -, “hy Fig.2 SP4550/ block dag 15‘SPaSSOIS1 ELECTRICAL CHARACTERISTICS (s00 Fig.3) ‘Test Conditions (unless otherwise stated): Tame = +25°C, Voc = +5V 116 Value Charactereic ne eae] 8 Conatons Operating voltage ange 7 >a] os | 5 v Supply curent 7 wo | «© | m Inputvoliage, Vn, somes | 4,5 | 175 200 | mvime | Sine waveinto Soo s00MHe 75 200 | me S00MHz ws 200 | mvme 700MHz 75 200 | mma 000M 175 200 | mvs Output voltage a | os Vee | Notoad 9 | os vpp | SP4s6t only Output imbalance a9 a1 Vv | sPasst only Outputimpedance @ 1 a ° 1 t2_|__sPasstonty “Or . o i (0) Dust input oe eG Fi3 Text configuration ou a a ) "input momen nr0 100) Fig-4 Combined input operation — | RERSer Fig.5 Typical input sensitvityOR (RS 7 2 a‘$P4550/51 118@PLESSEY Semiconductors SW/15311721178/1741208/250/280/SW453 SW153 SW172 SW173 SW174 SW203 SW250 SW260 SW453 SURFACE ACOUSTIC WAVE COLOUR TV IF FILTERS ‘This comprehensive range of TV IF filters utilises Plessey Surface Acoustic Wave technology and. is suitable for use in colour or monochrome television receivers world wide. The frequency pass-band and Phase response of each of these highly stable devices are tailored to the relative transmission standard. The devices require no adjustment and are packaged in a totally hermetic Metal/Glass TO8 package. FEATURES No Adjustment Necessary Low Cost ‘Compact Dimensions High Stability High Reliability Comprehensive Range of Standards Available APPLICATION NOTES ‘The input drive provide alow imped: {to minimise spurious signals due to secondary device characteristics. Fig. 2 shows a typical application, the SL1430 providing a very low drive impedance. The 3300 load resistor is included to ensure stability of the TDA2540 and may be omitted in some designs that do not use this device. Care must be taken with the printed circuit board layout, and the use of balanced input and output is advised to ensure low levels of direct breakthrough ‘The device must also be mounted with minimum lead length. Application introduced direct breakthrough will exhibit itself as a deterioration in amplitude and group delay ripple, and a screen image approximately 1.5us before the main response. TEST CIRCUIT ‘The recommended test circu is shown in Fig.3. When used in a 502 system, with the input unterminated, the ‘extra loss introduced by the test circuit is 258. ‘An earthed metal screen of at least 2 x 3cm should be Incorporated between the leads as shown. A sultabletrane- {former is available from MINIGIRCUITS, New York, USA, type number 75-17. SES cau ro tes cts ts coms Fig. 1 Pin connections (viewed fiom beneath) SH] Fig. 2 Typleal eppltestion Fig. 9 Test circuit. 9‘SWI159/17211731174/203/250/260/SW453, ‘Fig. 4 Amplitude characteristics ELECTRICAL CHARACTERISTICS ‘Test conditions (unless otherwise stated) “Ambient temper 435°C Input drive impedance 500 Load impedance 2500 balanced ‘The amplitude level at the vision carrier frequency is taken to be —6dB and is then used as a reference for all other relevant measurements (see Fig. 4). The insertion loss is defined as the voltage ratio 2V/Vour in the test circuit (Fig.3) at the vision carter fre- ‘quency and is expressed in dB. This relates to the 0dB level shown in Fig, swi53 ‘The SW153 is a TV IF filter for the United Kingdom 39.5MH2. The amplitude characteristics given in the Electrical Characteristic tables are defined in Fig. 4. The response in the Nyquist region is guaranteed by the measuro- ment of the 2T sin? pulse and bar K rating after synchronous demodulation. Iivband amplitude ripple is defined as the worst devi lation from the mean over any 500kHz bandwidth between the two defined in-band frequency limits. The measurement of spurious outputs includes those due to internal reflections and direct breakthrough, a 2T Sin® pulse being used and measurements being made between 2 and tus before, and 1 and 4us after, the ‘centre of the main response. PAL standard, system 1, with a vision carrier frequency of Frequency | Value is Characteristic Units Conditions MHz [Min] Typ. [Max Vision cartier 395 Ret. level 6 | dB Colour carrier 35.1 6) 30 a8 ‘Sound carrier 335 -25| 22 |-19] a8 ‘Sound shelf deviation 33.2338 at | 23] aB In-band level 36-38 |-2 | 0 2) 4B In band spot 38 =15] 0 15] dB In-band ripple 36-38 os |4 48 | Peak Adjacent vision 315 45 | —55 8 ‘Adjacent sound trap 415 40] -50 38 Lower side lobe 265-315 | —40] —50 3B Upper side lobe 415-465 | -36| —42 a8 48.5-100 30 4B Insertion loss w2i fos | ap 2T sin? pulse and bar K rating 395 15 | 2 % Group delay deviation 345-405 10 | 40 | ns ‘Spurious outputs, 39.5 —48 | -42| a8 ‘Temperature costficient of frequency =n ppm/*c ‘Small signal impedances Input pins 2 & 4 16k a7 pF Output pins 1 & 5 1.8 O77) 10pF 120swi72 ‘SW/183/1721173/174/203/2601260/SW453 ‘The SW172 is aTV IF filter for the European PAL standard systems B & G with a vision canter frequency of 38.9MHz. Frequency Characteratic a Conditions Vision Carrier 389 ‘Colour Gaier Ms ‘Sound Cantor ma ‘Sound Shelf 32:1t0935 In-band level 355t097.4 In-band ripple 35510374 Peak ‘Adjacent vision trap UHE 309 VHF 31.8t032 ‘Adjacent sound rap VHF 40310405 os HE a4 8 Lower sidelobe 27510319 8 Upper sie tobe 404 1045 8 450100 e Insertion loss B- ZTsinpulse and bar K rating 309 % ‘Group delay deviation 34a ns | Reference 0@ 38.0MHz 345 ns | Reference 0 @ 38.0MH2 wai8 ns | Reference 0 @ 38.0MHz ‘369 ns | Reference 0 @ 38.0MHz a70 ns | Reference 0@ 38.0MHz bag ns | Reterence0@ 33.0MHz Spurious outputs 389 8 ‘Ternperature Costtcient ‘of frequency Pomrc ‘Small signal impedances Inputpine 28.4 Output pins 185 sWi73 ‘The SW173 is 2 TV IF filter for the European PAL standard, systems B and G, with a vision frequency of 38.9M r Characteristic Frequency| units | Conditions Mie Vision carrier 389 8 Colour carrier 345 4B Sound cartier 334 a8 Sound shelf deviation 331-335 38 in-band level 355-374 dB {n-band spot 374 <8 in-band nipple 355-374 dB | Peak ‘Adjacent vision trap) UHE ° 309 4B VHF 319 aa] ae 3B Adjacent sound trap VHF 404 2 | —48 48 UHF aa 40] 43 38 Lower side lobe 275-319 | -37| —«2 a8 Upper side lobe 4044s | 37] —42 a8 45-100 =30 8 Insertion loss we] 20 [23 | ap 27 sin* pulse and bar K rating wo |}? [3 % 121‘SWI159/1721173/174/203/250/260/SW453 'SW173 (Continued) ‘Characteristic Frequency} Valve Units: Conditions MHz Min.| Typ. | Max. = = we [Retence0 a 28 9mn oun dey et wy 400 ne [Reterence 0 @ 8g BS, F ne [patrnce So Se eM Ea os ms Tperrnce Sg Some see “9 ns lRetrncs Og ag ouee gs 3 ns HRerrence Sg asus Spurious outputs 389 eee |r Fea ecttcen of frequency 8 pone Perper cote Input pins 2 & 4 1.6k0/ | oe Output pine 1 85 rm VO ‘SW174 ADVANCE INFORMATION + ‘The SW174 isa TV IF fiterfor the European PAL standard systems B & G with a vision carter frequency of 38.9MHz "T] Freauency Value. Charactoristic ae a] tp ma) Unie Conditions Vision Carrier | 38.9 of. evel-6 08 Colour Cartier 345 -4] -2 | 0 | a ‘Sound Cartier 34 | -23| -20 | -17 | a8 ‘Sound Shelf deviation 32810335 +24 | 441-6] dB Inband level asstoa7a | -15/ 0 | 15] 9B Invband ripple 38.51037.4 o5 | 1 | ap | Poak ‘Adjacent vision rap UHF 309 a2 | -48 oB VHF 318t032 | -46 | -50 8 ‘Adjacent sound trap VHF 40.110403 | -40 | -48 0B 40310405 | -46 | 50 3B HF a4 | -40 | -48 0B Lower side lobe 27sto319 | -40 | 46 8 Upper side lobe 4.41045 | -38 | -42 oB 4510100 -30 oB Insertion loss | 2 | 2] a ZT sin? pulse and bar K rating 98.9 2 3 | % Group delay deviation 34a 80 ns | Reference 0@ 38.0MHz 345 40 | 60 | 90] ns | Roterencoo@ 38.9MHz 35.15 0 ns | Reference 0@ 38.9MHz 36.9 -90 ns | Reference 0@ 38.9MHz 379 -55, ns | Reference 0@ 38.9MHz 309 -20 ns | Reference 0@ 38.9MHz ‘Spurious outputs 98.9 48 | -a2| a8 ‘Temperature Coetticient of frequency 90 pemrc ‘Small signal impedances Input pins 2.8.4 eka! 10pt Output pins 185 au 12pt * Advance information is igsued 1 advise Customers of now additions to the have ‘preproduction’ status. Detalls given may, therefore, change without notice although we would expect tt ‘Semiconductors range which, nevertholess, stl formance dala to be representative of Yul production ‘status product in moet cases, Please contact yout local Plassey Semiconductors Salee OHice {or details of current satus, 122‘SWI159/172/173/174/203/2501280/SW453 Me S206 VIF terre Nor Arca NTSC sandr syste M8 when carer eqn 48.7 Frequency Value Characteristic. pre ie Units Conditions Vision Carier 45.75 Ref. level -6 0B Colour Carer 42.97 6] -3 | 0 4B Sound Caner 41.25 -23 | -19 | -15 | aB In-band level 43104425} -2 | 0 2 B In-band ripple 4310.44.25 os | 15 | dB | Peak ‘Adjacent viston trap 30.75 -40 | -50 a8 ‘Adjacent sound trap 478 -38 | -46 eB Lower side tobe 36 t099.75 | -35 | -40 3B Upper side lobe 47510525] -35 | -40 3B 52.510 125 -30 4B Insertion loss 2] 15 | 20] as isin? pulse and bar K rating 45.75, 2 3 % Group delay deviation 4310 44.25 20 ns ‘Spurious outputs 4 | -40 |B ‘Temperature Coefficient of frequency -72 pemec ‘Smali signal impedances. Input pins 2.& 4 Kau 13pf Output pins 18.5 1.5kou) tip 'SW250 ADVANCE INFORMATION ‘The SW250 is a TV IF filter for the French SECAM standard systems L & L’ with a vision camer frequency of 32.7 MHz. Frequenc) Value Characteristic ee a Tp | mac] nis Conditions Vision Cartier 327 Ref. evel 6 3B Colour Carrier 37 -2 | -o5 | 1 3B 38 3] - 3B In-band fevel 3451036 | -2 o 2 a8 In-band ripple 3481036 1 18 | dB | Peak ‘Adjacent vision trap 40.7 38 | -43 dB ‘Adjacent sound trap_ 312 46 | -50 oB ‘Own Sound UHF 302 43 | -46 B VHF 43.85, 43 | -46 oB Lower side lobe 2eto31.2 | -38 | -42 3B Upper side lobe gazteas | -98 | 42 3B 450.90 30 8 Insertion loss 19 | 2 | 2 | a 2Tsin* pulse and bar K rating 2 3 % Group delay deviation 34.8 1096 16 | 50 | ns ‘Spurious outputs 327 ee ‘Temperature Coefficient of frequency -90 ppmrc ‘Small signal impedances Input pins 2 & 4 1.8K 10pf Output pins 1&5, 1.2kou pt 123‘SWI159/17211731174)203/250!260/SW453 '$W260 ADVANCE INFORMATION ‘The SW260 isa TV IF filter fr the Eastem European SECAM standard system D and compatible with systems Band G with a vision camer frequency of 38MHz. Characteristic ae Units Conditions Mia Viston Carior 38 8 ‘Colour Cartier 33.1 8 337 3B ‘Sound Canter 315 a ‘Sound Shelf 31.310325 15 | aB Inband level 34510365 o | +2 | a8 Intbond ripple 34510965 2 | 48 | Peak ‘Adjacent vision trap 20 oB ‘Adjacent sound trap 305 8 Lower side tobe 2551090 a8 Upper aide lobe 30510445 aB 44510 100 oB Insertion loss a | a8 ZTein* pulse and bar K rating 38 3a | % Group delay deviation 3251039 so | ns Spurious outputs 38 -40 |B Temperature Coefficient ‘of frequency “12 Ppmrc ‘Small signal impedances Input pins 28 4 18K Spt Output pins 1&5 18ksu ‘0pf ‘SW453 ADVANCE INFORMATION ‘The SW453is a TVIF filter for the South African PAL standard, system I, with a vision carrer frequency of 38.9MHz. Characteristic Ered Nelue Units Conditions Min] Typ. | Max| Vision caries 389 Ret. level “6 a8 Colour carer 3447 [8.7 -3 | 0 | @B ‘Sound cari 329 38 | =z | 10] as In-band level 365-374 |-25] 0 | 25 | a8 In-band ripple $ os |15 | a8 | Peck ‘Adjacent vision trap —40 | 46 4B ‘Adjacent sound trap =38| “43 a8 Lower side lobe 38 | 45 a8 Upper side lobe 409-46 |—35] —40 a8 Insertion loss 18| 20 | 24 | ap 21 sin pulse and bor K rating 15 |2 | % ‘Group delay deviation 2% 60 | ns Spurious outputs 389 =46 | “a0 | 46 ‘Tomperature costficiont of frequency =n ppm/°C ‘Small signal impedances Tnput pins 2 & 4 19K! 80F Output pins 1&5 18K “opr ABSOLUTE MAXIMUM RATINGS ‘Storage Operating temperature Pin to pin voltage Pin to case voltage 124 smperature 25°C to +85°C 10°C to +70°C ‘30V (short term) 10V (continuous) 100V‘SW/1591172117311741203/2501280/SW453 TYPICAL AMPLITUDE RESPONSES -10 Loss (dB) ~40 ol calla’ 28 2830. © Piessey 10 20 30 Rtn. (ABD HY © Piessey 32 oa else ate: Frequency (MHz) 40 wt 343638 Frequency (MHz) 4042 125‘SWI153117211731174/209/2501260/SWa53. Aten. (4B) 8 3@32 2 © Pressey 10 ees § 20 z 40 so so 288 © Plessey a4 38 88a Frequency (MHz) a4 (3688 Frequency (MHz) 126‘SW/163172117311741203/250/260/S W453. Attn. (dB) Attn. (dB eb zoh 30 40h sof 62 3638 © Pleesey 40 32 sw2a3 4200 4448 Frequency (MHz) 3436 a8 Frequency (MHz) 48 SaS2 4000 424d 127‘SWI153/172/173/174/203/250/260/S W453 10 20 3B) 38 Attn. 4 : | { 60 i ( 4004248 228 2490=«G2 aa Frequency © Piessey 10 20 38 Attn. (aB> 40 50 26 28 «63@ 0 «82 3436 88 © Possey Frequency (MHz) 128@ PLESSEY ADVANCE INFORMATION ‘Advance information is issued to advise Customers of new additions to the Piessay Semiconductors range which, nevertheless tl have ‘preproduction’ status Details given may, tnerslore, change without nolice although we would expect this perormanes date to be representative of ull production status product In most cases Please contact You local Plessey Semiconductors Sues TNCs SW185 ‘SURFACE ACOUSTIC WAVE COLOUR TV IF FILTER FOR PARALLEL SOUND “The SW/185 is one of a range of surface acoustic wave IF filters for use with TV parallel sound. I has been op- {imised for systems B & G with a vision carrier of 38. 9MHz. ‘There are two balanced outputs for vision and sound signal wer ooo wer ‘Brocessing. The vision output has a vary low level of sound camisauni( 70 swoz \scerav01 ‘cartier, and the sound output has two broad peaks at the veo arnt{\ 222 ) sent ‘sound and vision carriers with rejection between them. so oe ‘The device is optimised for use with a new range ot par- allel'sound circuits from Plessey Semiconductors, initially ous ‘coded XL, for example XL1441, Fig.1 Pin connections (viewed trom beneath) FEATURES No Adjustment Necessary (Compact Dimensions High Stability and Reliability, Elimination of Sound Chroma Interference: Improved Sound Quality Stereo Sound Compatible ELECTRICAL CHARACTERISTICS Test conditions (unless otherwise stated): ‘Ambient temperature +35°C. Input drive impedance 502. CSadimpedance "Sdn alancea (Porto SW59/53 datasheet or definition of tm) 'SW185 SOUND CHANNEL cnancrcnte | Fequner [vate Ta cendione Vision Garier Py fateweid | a weft | -2 1/8 sound care wa fo] a | a | ae Sound hal weston | “5 +] 0 | wtewat same Inand tap wstoora | -10 | 16 oo Adjacent iston trap ma | oa] 38 pn adacanteoundiap | anstowoa | -20 | 38 Ps 23083 | 8] “2 # Lower sdelobe arstoats | 26 | “22 oe Upper ade obo ‘toatows | -20| 36 o ‘Stein 2 Insorton oes 20 2 | | a Zain ples andbar Kraig Group delay donation | s28to3@31 so | 100 | ne Temperature Goatiint erowstey -2 omre 129swiss SW1BE VISION CHANNEL Froquoney rm Charette se? Papa] om [coat Vision Garr 288 Fetiwes | a Car corer us | ops | -2 | a Sound Carter oon zens | -0| 0 oe inoue ssswors| 2 | 0 | 2 | oo Inoue oe estate os | + | ae | roa Adjacent vision trap one wo | -o| @ var saw | “a | “2 @ Aeon sound ap wie wis | 0] -« @ 33 | 2] 78 & une aia | cw | ae Ps Lover sabe arsine | or] -0 Ps Upper side lobe 40.410 45, 37 | -42 dB Bi $ $ Iserion oss 22 | | ae | mowuosatseomiase ‘Stages ancosd ei cremutcoes Eat aap and bark rang ato] Gow dl ion Pe * i x3 | o| Blo | = aie ° . 3 bo . es 3 _ 3 8 = Spurous outputs 8 “e|-a| & Tenor Conn Stier -» vonre 130 ig? Typical application18 _ 2 “ SW185S se ce EE One Frequenty chy Fg. Typclamplivde response of ion output ° 10 £30 | SWI8SV se se bait. ti, tj 4 i) 288 a2 e369) ae aa Chen Feequenty (He) Fig. Typical response of sound output 131swies Fig.5 Application with TOA4#O and TOA2S#T 132@PLESSEY Semiconductors TBA120S TBA120S UMITING IF AMPLIFIER/FM DETECTOR ‘The TBA120S is a symmetrical 8stage limiting amplifier with a symmetrical coincidence demodulator and remote DC volume control. The circuit is especially suited for the sound IF section of TV ractivers and for FM/IF ‘amplification/demodulation in FM radio receivers. ‘An auxiliary circuit, consisting of a transistor with free base and collector and a 12V Zener diode, is also incorporated on the chip. The transistor can be used as an AF preamplifier (ie<5mA) or as a bass/treble switch using voltage-controlled on/off switching of an R-C circuit. The Zener diode can be used to stabilize the chip supply voltage or that of other circuits in the system (I7<15mA). The TBA120S is supplied in two group variants, with volume as the parameter. A decrease in volume of 30 d8 requires 2 resistor between pin § and earth with a value ‘depending on the group number as shown in the following ‘table, The group number is printed on the package. Group | Il Nv Re(kM | 21-25 | 2.4-2.9 tat te ‘Fig. TBAT205 block diagram vrausq: ——»fyreeosacx sus ree couccron]: aq «fl zener ovr ree ose]. 1208 »)+¥e surrey + «Bawa ovr p14 op14 Fig. 1 Pin connections FEATURES Outstanding Limiting Qualities I High AM Suppression IM Wide Supply Voltage Range Low External Component Count APPLICATIONS. TV Sound Systems FM Radio Receivers OFM Tuners QUICK REFERENCE DATA Supply Voltage: +12V (Typ.) Operating Frequency: Up to 12MHz Current Consumption: 14mA (Typ.) IF Voltage Gain: 6848 (Typ.) AF Output Voltage: 1.1V rms, (Typ.) Volume Control Range: 70dB (Typ.) ‘Second Source Availability 133TBA1208 ELECTRICAL CHARACTERISTICS. ‘Test Conditions (uniess otherwise stated): Vec=#12V Valve Cheracteristics ‘Symbol - Units: Conditions Min. | Tye | Max ‘Amplifier/demodulator Frequency range ' ° 12 | mie IF voltage gain Vy/M 5 6y 6 a8 IF output voltage Yoo 250 mv | Limiting each output ‘AF output voltage Var 1 Vrms. 086 Vrms, Input voltage at start of limiting Yim so | wv Input impedance zi KOPF Output resistance (pin 8) Ro Ka Volume control range VAE mex 3B VaF min 10C component of o/p signal Ve 73 v | vo ‘AM suppression au | 45 | 55 a8 | Vi-B00uV, mao Potentionmeter resistance Rs =108 down 37 | 47 | xo =7088 down xo | 44 ka Control voltage Vs 108 down 24 | 26] v =70d8 down 13 v Total current requirement te | 10] m4] 18] ma | Rpm 12] 16] 20] ma | ae-0 ‘Auxiliary circuit Zener voltage vin | 126] 138] 45] vo | h2-5ma Zener resistance Rr 30 a Transistor breakdown voltage Bveeo | 13 v Curent gain nee | 20 = | toetma ABSOLUTE MAXIMUM RATINGS Zener current, 1.2. ontinuout: 15mA Max. 1 min 20mA Supply voltage Voc: 18 Volume contol volte, Vs: aV Operating temperature 10°C to #70°C. Collector current, I3: 5mA ‘Storage temperature 28°C 10 +125°C Current Iq: 2mA Total power disipation, Prox Shunt resistance Ryg/tat Siko Continous 400mW Max. in: 500mW 134TBA1208 ‘Aube OUTPUT LEVEL Yap (48 ‘uae ourrur LEVEL var (48) COMTMOL VOLTAGE W411 stem) Fig. 3 Volume contol voltage charectrstic Fig, 4 Volume control reistance charactritic TL 5] { ‘eae 5 7 Rein 5 4 Sen wae ‘0 our Lev, we RAE 9. Audio output supply voltage i aa Fig. Ditortion factor ik} 62 function of sutio output voltage Var 135TBA120S A i 1 | | Fig. 7 AM suporesion chrectvstics Frequency Finer (ini) | (Murste Type No) | RD Fig. 8 Recommended application crc, 65MM a stsome a 58 SFES.5MB 680 Fe. 9 Application circuit using ceramic fer. (For good as SFE4.5MB k ‘etecivity, the ceremi fier should be combined with an LC D> ereue) | ae Lil. i Fig, 1OGirevt cog 136@PLESSEY Semiconductors TBA 120T ‘TBA120T/TBA1200 TBA 120U FM IF AMPLIFIER AND DEMODULATOR ‘The TBAI20T and TBAI20U are symmetrical 8-stage limiting amplifiers with symmetrical coincidence ‘demodulator and remote DC volume control. The circuits ‘are especially suitable for the sound IF section of TV receivers and for FM/IF amplification/demodulation in FM radio receivers. An additional audio output is provided at ‘constant level (before the volume control) for the FEATURES Outstanding Limiting Qualitites High AM Suppression Wide Supply Voltage Range Low External Component Count Low Intermodulation due to IF Voltage No Selection for Volume Control Characteristic Necessary Designed for use with Ceramic Filters {TBA1207 only) ‘connection of video recorders and headphones, together with an audio input for video recorder playback. “The audio output voltage is at constant level with supply voltages between 10 and 18V and is of the same level as the ‘TBA120S operating from a 18V supply. ‘The devices are insensitive to supply voltage hum, and there is therefore little need for smoothing capacitors. ven aa sp oeotnncor Seen omer APPLICATIONS @ TV Sound Systems FM Radio Receivers FM Tuners Fig. 2 Block diagram 137‘TBA120T/TBA120U ELECTRICAL CHARACTERISTICS. ‘Test conditions (unless otherwise stated): Vec= 12 Tamb = #25°C Value Cheractritie ‘Symbol Unies Conditions Min. | ve. | Max. Tota current consumption lec | 95 | 138 | 178] ma IF voltage gain Vo/V, Sy 6 68 fie = 5.5 MHz ‘Output voltage with limiting at each output 260 mVpp ‘Output impedance Pin 8 14 Ka Pin 12 1 Ka Input impedance 2 Ka Internal impedance 12 a 1G level of output sional (Vin = 0) 4 v |vin=0 56 v Stabilized voltage a2 | 4a [ss] v Residual \F voltage without deemphasis 20 mv 30 mv AF gain (AF not regulated) 75 Regulation at certain ratio of divider 20 | 28 | 36 | dB |Re5 = 8K, Res = 19k Range of volume control (referred to in 8) tits id Resistance (see note 1) 1 1 | 0 Input voltage for imitation 30} 60 | AW fue = 5.5 Mis, af =# SoKHs, moa = IkHz Hum suppresion 35 as 30 8 ‘TBA 120T only: Input impedance Zin 80015 pF |e = 5.5 Mhz ‘AM suppression tau | 50 | 60 8 |e = 5.5 MHz, Af = 250KH2, Vin = BOOK, fmoa * TKHZ, m= 30% AF output voltage v, | 0 | 900 mv | fie = 5.5 MHz, Of = $50KHz, viz | 400 | 650 mv |finoa = tkHe ‘TBA 120U only: Input impedance Zin | 18% | a0vas Kopf | fie = 5.5 MHZ ‘AM suppression sau | 50 | 60 4B. |fie = 5.5 MHz, Af = 280KH2, Vin = 500KV, fmoa = 1kH2, m™ 30% ‘AF output voltage Veer | 850 | 1200 mv [fie = 5.5 Miz, Af = 250KH2, Vin ® SOOKV, fog = 1kH2, Vizert | 600 | 1000 mv [0,2 45, k= a8 Harmonie distortion « 1 % [fie = 5.5 MHz, Of = 250KH2, Vin = 1OmV, fog = TkHE, ay" 20 Note 111 C volume contol ot used, pn 4 must be connected direct 0 in 8 ABSOLUTE MAXIMUM RATINGS ‘Supply voltage Vee 1V Reference voltage O/P current, Ig Sma Operating ambient temperature, Tam —10 10 168°C 1 input resistance, Rys.14 (TBA120U) 2V, 10dB after AGC (TBA44OP) 1GdB before AGC (TBA4ON) IF control voltage for 4 lo os | v for min 4 [25 Sea liev) Gating pulse voltage 7 |2 sv Residual IF voltage 12 60 mv Output current to earth wie 5 | ma Output current to Vi3 Wie —1 | ma Input impedance at max gain 1 1.8/2 ke ‘at min gain 1 1.900 KU Input voltage for Vs 4 = 3V pp 1 100 HV | Input 609 via 3:6 transformer Video bandwidth 7 MHz AGC range s2 | sa 8 Intermodutation 55 4B | Input 0.3 t0 1.5V pp Fla. 3 Noise figure. attenuation (maser fat vies trequency) 142 srTeation 1) Fig. 4 Control voltage v.attnuationTBAA40N / TBA4AZOP ‘PEER AG CPLA AN ia, Tuner control currant «attenuation with Mg as parameter Fig. 6 Tuner contrat currant ¥. attenuation with Reg ss parameter (ranacor) (renaeon) ad ia. 7” 1F application with TBASAOP or TBA4KON for CCIR standard (values in brackets for U.S. standard) 143TBAA4ON / TBA440P 144@PLESSEY Semiconductors, ‘TBAS30 TBA5S30 RGB MATRIX PRE-AMPLIFIER ‘The TBAS3O is an integrated R—G-B_ matrix pre-amplifier for colour television receivers incorporating a matrix preamplifier for R—G~B cathode or grid drive of the picture tube without clamping cicuits. The chip layout hhas been designed to ensure tight thermal coupling between all transistors in each channel to minimise thermal drifts between channels. Also, each channel follows an identi layout to ensure equal frequency behaviour of the three channels, ‘This integrated circuit has been designed to be driven from the TBAS20 synchronous demodulator integrated circuit, ABSOLUTE MAXIMUM RATINGS ‘Supply voltage, Vee 13.2V ‘Supply currents: — Hy = lh = tye max 10mA hho ha = the max 50mA* Total power dissipation at Tab = 60°C, Pror 400mW* Storage temperature 85 to +128°C Operating ambient temperature —10 to +60°C At increased voltages due to external failures (e.g. collector-base breakdown in the output transistors) 3 maximum currant of SOmA it permitted between pins 16 and 8, 13 and 8, 10 and 8, The maximum Permissible power dissipation is then 500mW. pris Fig. 1 Pin connections QUICK REFERENCE DATA Supply Voltage (Nominal) 12V Total Supply Current . (Nominal) 30mA @ Operating Ambient Temperature Range =10 to +60°C . Gain of Luminance and Colour-difference Channels (Typ) 100 Fig? TBASO0 circuit diagram 145TBAS30 ELECTRICAL CHARACTERISTICS ‘Test conditisns (unless otherwise stated: Vee = +12V, Tamp = +25°C Black level: Va_y = Vo_y = Ve—y = 7! value characte Symbol Uni conan win | Tye. | an cf celur dame BY, Ses &: 100 : c ‘0 =| peste weno ce ‘0 = Rat of in of uminanee rit lor one 08 uf - BC outa vanes vn 40 ‘ ve tao W | seenow2 “e te ‘ Ingtreeare of xou ae one a fe oo a a & ta | sete a % to Input expects of color Heart te cr 3 * @ 3 oe | seams @ 3 Ha Input ean of ainaee ou ts » wa | sve Mmputeapectance of rinwoe oe oe ” oe | p= 1m Sie bantwith ot atlhomes | ° wine Tol cuenta her » mma res 1a eto oe bee on sp aes? 3 4d ob sg hcl oe 2. Mio nowt wos, Th vet ton enor cms te Fig.3 TBAG30bIock diagram‘Fig, 4 Typical epoticaton diagram 147‘TBAS30 FUNCTIONAL DESCRIPTION Pin 1, Output load resistor, blue signal (Also pins 11 and 14 for red and green signals respectively.) Resistors (47kO2, 1W) connected to ¥200V provide the high value loads for the internal amplifying stages. The nominal operating potential on these pins is defined by the IC and the DC feedback and is approximately +8V. The maximum current Which can be allowed at each of these pins is 10m. 2. ~(B-Y) input signal ‘This signal is fed via a low-pass filter from the TBA520 demodulator IC (pin 7) having @ OC level of about +75, The input resistance for this pin is typically 60k82 with an input capacitance of less than SpF (similarly for pins 3 and 4). 3. (GY) input signal The DC black level of this signal is about 47.8V. (See pin 2.) 4, (RY) input signal ‘The DC black level of this signal is about +7.5V. (See pin 2.) 5, Luminance signal input The DC level on this pin for picture black is +1.6V, ‘The required signal amplitude is TV black-to-white with negative,going syncs (or blanking) for cathode drive as shown. The input resistance at this pin is 20kS2 approximately with a capacitance of less than 15pF. 6. Negative supply (earth) 7, Current feed point A current of approximately 2.5mA is required at this pin, fed via @ 3.9kS resistor from +12V, to bias the internal differential amplifiers. A decoupling capacitor of 4.7nF is necessary. 8, Positive 12V supply Maximum supply voltage permitted, 13.2V. ,Current ‘consumption approximately 30mA, 9. Red channel feedback (green channel, pin 12; blue channel, pin 16) ‘The DC working points and gains of both the output stages and the IC amplifier stages ae stabilised by the feedback circuits. The black level potentials at the collectors of the output stages (tube cutoff) are ‘adjusted by setting correctly the OC levels of the colour difference signals produced by the TBAS20 demodulator IC, The gains of the R—G-B output stages are adjusted to give the correct white points setting on the picturs tube by adjusting the Potentiometers in the feedback paths (RV1, RV2). 148 10. Red signal output (green and blue signal outputs on 13 and 16) ‘These pins are internally connected with pins 11, 14 and 1 respectively via zener type junctions to give a OC level shift appropriate for driving the output transistor bases directly. To by-pass the Zener junctions at HF three 1OnF capacitors are required. 11, Output load resistor, ed channel (see pin 1). 12, Green channel feedback (see pin 9) 13. Green signal output (see pin 10). 14, Output load resistors, green channel (se pin 1). 16, Blue channel feedback (see pin 9). 16. Blue signal output (s2e pin 10). OPERATING NOTES Careful attention to earth paths should be given, ‘voiding common impedances between the input (decoder) side and the output stages. Also, to enable matched performance to be achieved, @ symmetrical board and component layout should be adopted for the three output stages. To compensate for the effect upon HF response of inevitable differences the compensating capacitors Cy and Co and Cy may be appropriately selected for any given board layout. The signal black level at the collectors of the R-G-B ‘output stages depends upon the +12V supply, the DC level of the colour difference signals from the TBAS20 demodulator IC and the black level potential of the Juminance signal applied to the TBAS30 matrix IC. The DC levels of the signals produced and handled by the IC's are designed to have approximately proportional tracking with the 12V supply potential AY (OC evel sana) Vom (OC tee, signal) ‘aviv 12 To ensure thet changes in picture black level due to variations on the 12V supply to the IC’s occur in a predictable way, all the IC’s should be operated from a common supply line. This’ is specially important for the TBA520 and TBAS30, Furthermore, to limit the changes in picture black level during receiver operation, the 12V supply should have a stability of not worse than £3% due to ‘operational variations. To reduce the possibilty of patterning on the picture ‘due to radiation of the harmonics of the products of the ‘demodulation process, the leads carrying the drive signals to ‘the picture tube should be as short as the receiver layout will allow. Resistors (typically 1.5k9 connected in series with the leads and mounted close to the collectors of the output transistors provide useful additional filtering of harmonics.PLESSEY Semiconductors © TBAS40 TBA 540 REFERENCE COMBINATION ‘The TBASAO is an integrated reference oscillator circuit {for colour television receivers incorporating an automatic Phase and amplitude controlled oscillator employing a Quartz crystal, together with a halfine frequency synchronous demodulator circuit. The latter compares the Phases and amplitude of the swinging burst ripple and the PAL flipslop waveform, and generates appropriate ACC, colour killer and identification signals. The use of synchronous demodulation for these functions permits a high standard of noise immunity. QUICK REFERENCE DATA Drie Fig. ¥ Pin connections Supply Voltage, Va.16 : 12V (Nom.) ABSOLUTE MAXIMUM RATINGS Total Current Drain, 1g : 38mA (Typ.) Voltages are referred to pin 16 HRY Ret. Output, Vag: 1.4Vpp (Typ) ae Colour Killer Output, V7.16 val Colour ON : 12V (Typ) eae ve) 132v Colour OFF: 260mV(Max.) wane 160° 700 mW HACC Output Voltage, Vo.16-— Supreme aan 34 Correct Phase of PAL Switch: +402 to aay ode ten 50mA sa at Incorrect Phase of PAL Switch -+4 t0 Temperature +11 ‘Storage temperature, T,, 55°C to +125°C Operating temperature’ “ere to se0rc I 7 | [emer } fees] [sexe b+ | | 1 iz 4» +x | +. | ' | t | J Fi? TOASIO book dgrm 149‘TBAS40 ELECTRICAL CHARACTERISTICS Test Conditions (unless otherwise stated): Vee (Va) = +12V, Tam = #25°C, Vs = 1.5Vprp burst, Vp = 25Vrp PAL square wave Voltages referred to pin 16 Value Characters Pin Units Conditions IMin] Tye. [Max. ‘Output Signals 8° reference signal output afi] sa | 2 [vee Colour killer output, 7 ‘colour ‘on 2 v colour ‘ott 100 | 250 | mv ACC output signal range 9 at correct phase of PAL switch H4r04102 v at incorrect phate of PAL switeh satoott v Oncitator Section (Amplifier) Input resistance 6 35 ka Input capacitance 15 5 oF Voltage goin, 615-1 154 a7 Reactanes Control Section Voltage asin, 5.2 152 13 Pins 13 and 14 interconnected Rate of change of ain with phase difference between burst and reference signal, AG15.2 = a _ isd FUNCTIONAL DESCRIPTION 5. Burst Waveform Input Functions lined by pin number A burst waveform amplitude of 1.5V peak-to-peak is required to be AC coupled to tis pin, The amplitude of the 1. Oscillator Feedback Output ‘The crystal receives its energy from this pin. The output Impedance is approximately 2kS? in parallel 2 Resctance Control Stage Feedback ‘This pin is fed intornally with a sinewave derived from ‘the reference output (pin 4) and controlled in amplitude by the internal reactance control circuit. The phase of the feedback from pin 2 to the erystal via C1 is such that the value of C1 is effectively increased. Pin 2 is held internally ‘at a very low impedance therefore the tuning of the crystal {is controlled automatically by the amplitude of the feedback waveform and its influence on the effective value ofc. 3. Positive 12V Supply ‘The maximum voltage must not exceed 13.2V. 4, Reference Waveform Output This pin is driven internally by the regenerated subcarrier waveform in B-Y phase. (The output is in BY rather than R-Y phase as the burst phase network produces 1 lag of 90° of the burst applied to pin 5.) An output amplitude of nominally 1.4V peak-to-peak is produced at low impedance. No OC load to earth is required. A DG Connection between pins 4 and 6 is, however, necessary via the bifilar coupling inductor. The function of this inductor is to produce, on: pin 6, a signal of equal amplitude and ‘opposite phase (-J8-Y)) to that on pin 4. A centre tap on ‘the inductor, connected to earth vis DC blocking ‘capacitor, is therefore necessary. 150 ‘burst will normally be controlled by the adjustment and ‘operation of the ACC circuit. The input impedance at this pin is approximately 1k and a threshold level of 0.7V. ‘must be exceeded before the burst signal becomes effective. ADC bias of 400mV is internally derived for pin 5. ‘The absolute level of the tip of the burst at pin 5 rpormally reach 1.5V. 6, Reference Waveform Input This pin requires a reference waveform in the -(B-Y) hase, derived from pin 4 via a bifilar transformer (see pin4), to drive the internal balanced reactance control stage. A DC connection between pins 4 and 6 must be made via the transformer. 7. Colour Killer Output This pin is driven from the collector of an internal ‘witching transistor and requires an external load resistor {typically 10k82) connected to +12V. The unkilled and killed voltages on this pin are then +12V and <260mV respectively. (The voltage range on pin over which switching of the colour killed output on pin 7 occurs is nominally 42.6V.) 8 PAL Flip-Flop Square Weve Input ‘A.2.5V peak-to-peak square wave derived from the PAL flip-flop (in the TBAS20 or TBA90 demodulator IC) is required at this pin, AC — coupled via a capacitor. The input impedance is about 3.3k9..8. ACC Output An emitter follower provides a low impedance output Potential which is negative-going with a rising burst input ‘amplitude, With zero burst input signal the DC potential Produced at pin 9 is set to be +4V (RV1). The appearance (of burst signal on pin 6 will cause the potential on pin 9 to 90 in a negative direction in the event that the PAL {lip-flop is identified to be in the correct phate. The range ‘of potential over which full ACC control is exercised at pin 9 is determined by the control characteristic of the ‘ACC amplifier, ie., for the TBASGO from 0.8 to 1V. The potential on pin 9 will fall to a value within this range es the burst input signal is stabilised to an amplitude of 1.6 eak-to-peak. The latter condition is achieved by correct adjustment of RV2, If, however, the PAL flip-flop phase is wrong the potential on pin 9 will move positively. The potential divider R5, RE will then operate a PAL switch ‘cut-off function in the TBAS20 demodulator IC. 10. ACC Level Setting The network connected between pins 10 and 12 balances the ACC circuit and RV1 is adjusted to give +4V ‘on pin 9 with no burst input signal to pin 5. C5 provides filtering. 11, ACC Gain Controt V2 is adjusted to give the correct amplitude of burst signal on pin & (1.8V peak-to-peak) under ACC control 12.S0e Pin 10. 13.Se0 Pin 14, 114. DC Control Points in Reference Control Loop Pins 13 and 14 are connected to oppotite sidet of a ifferential amplifier circuit and are brought out for the purpose of OC balancing of the reactance stage and the ‘connection of the bandwidth-determining filter network. ‘TBAS40 ‘Two 2% tolerance 10k resistors with the addition of a 2700 resistor at pin 13 are used in place of the previous ‘balancing network. The 27082 resistor may be modified ‘according to the nature of the noise that appears at pin 5. The filter network consists of R2, C2, C3 and C4. The DC potentials on these pins are nominally +8V. 15, Oscillator Feedback The input impedance at this pin is nominally 3.5K? in parallel with 5F.No DC connection is required on this pin. The voltage gain in the IC between pins 15 and 1 is nominally 4.7 times. 116. Negative Supply (earth). OPERATING NOTES. Performance and Comments Initial adjustment (a) Remove burt signa. (6) Shortecireuit pins 13-1 frequency by C1. fe) Set the ACC level adjustment RV1, to sive +4V on pin 9. Remove short circuit. (4) Apply burst signal. {e) ‘Adjust ACC gain, RV2, to give @ burst amplitude of 1.5V peak-topeak on pin 5. Phase lock loop performance (with crystal type 4322 152.0110) (a) Phase difference between reference and burst signals for £400Hz deviation of erystal frequency, £10, (6) Typical holding range, #600Hz. (c) (6) Typical pullin range *300H2, (d) Temperature coefficient of oscillator frequency, only 2H2/"C maximum, Adjust oscillator to correct Li wd 151152@PLESSEY Semiconductors, TBAGEOC TBA 560 C LUMINANCE AND CHROMINANCE CONTROL COMBINATION The TBASGOC is an integrated circuit for colour television receivers incorporating circuits for the processing and control of the luminance and chrominance signals. It ‘can be used in conjunction with the TBAS20 or TBA990, 590, 640, 550 and TCA80O integrated circuits ‘The luminance part provides luminance delay ine matching, DC contrast control, black level clamp circuit, brightness control and flyback blanking. ‘The chrominance part provides chroma amplification with ACC, DC chroma gain control which tracks with the contrast control, separate saturation control, burst gate, chroma signal flyback blanking. colour killer and PAL delay line driver ‘The TBASBOC is not an equivalent of the TBASOO and 510 although it performs similar functions to those circuits ABSOLUTE MAXIMUM RATINGS. Voltage are referred to pin 16 tectiet Vix max. Supply voltage (note 1) 13.2 vy owesv Vio min. -5V Vz Oto +12Vinow2) Vig 810 48 Ye Otosev Vis 310 +88V note 2) Ye Ot eav Viamin. 8 Ve -Swosv Vis Oto s8v Curent (postive whan flowing int the integrated circuit) 4 Oto +1ma » =1010.0mA, 5 =Nt0+3mA —Mhomax,3mA. s “St0OmA, hamox. Sma e 6Owc. 2. Vi and V3 mut always be lower than Vi Fig. ¥ Pin connections ‘QUICK REFERENCE DATA Supply Voltage (Nom.) (V1 1.16) 12V Supply Current (Nom.) (111) 30mA Luminance Signal Input Current (Typ.) {i3¢p.p)) 0.4m Luminance Output Signal at _ Nominal Contrast Setting (Typ.) and Input Current as Above (V5.16(p-p1) 1V (See Note 1) @ Chrominance input Signal (Min.) (V1-18{p-p)) amv W_Chrominance input Signal (Max.) V1-18(p-p)) 80mv > Chrominance Output Signal at_Nominal Contrast and Saturation Setting (Typ.) (Vo.16(p:p!) 1V (See Note 1) Contrast Control Range >20d8 Saturation Control Range > 2048 Burst Output, (Closed ACC Loop) (Typ.) (V7-16(p-0)) 1V 153TBASGOC oa SH | arse Ete ts Fig, 2 TRASBOC block dgram ELECTRICAL CHARACTERISTICS ‘Test Conditions (unless otherwise stated): Voc * +12V, Tarnb * +25°C test circuit = Fig. 6, voltages referred to pin 16 Value Characteristic Pin Unite Conditions Min. | Typ. | Max. Supply voltage, Voc. n | tos} 2 | 32] v Required input Signals CChrominance input signal, p-p value of colour bars with 76% saturation, Ving [1.15 | 4 20 | mvp] Luminance input current, blacktowhite | 3 o4 | 15 |mape Contrast control voltage range for 20d8 control 2 | 2 | 37 | 86 | v_ |seenote 1 and Fig. 3 tness control voltage for black level of 1.5V at O/P 6 13 V__|See note 2 and Fig. 4 Saturation control voltage range 2048 control 13 | 27 | 44 | 62 | v_ |seenote t and Fig. 5 Flyback blanking pulse amplitude 8 {for OV blanking evel at pin 5 ° 1 | Vek for 1.5V blanking level at pin 5 2 -3 | Vek Burst keying (back porch) pulse (ve going) 10 | 0.05 3 | mapk| Colour killer 13 | os rv Automatic chrominance control stating level (~ve going) 4 12 V_ |see note 3 Obtainable Ourput Signals Luminance output voltage (black-towhitel] 5 1 | 3 | vpplis=0.4ma po, v2 =3.2V Black level shift 100 | mv |Seenotes 1 and 4 Burst signal amplitude 7 1 Vee CChrominance signal at nominal contrast ‘and saturation ° 1 V pep [See note + ‘348 bandwidth of chrominance and luminance ampli 5 Miz ‘Change of ratio of luminance to chrominance 2 | 48 [contrast contro! 1048 1on= maximum valve ~648, Thus, the contra i 46 2. When Vg's increased to above 17V. black evel ofthe output signa remains at 27V 3. Alnepative going potential prowdes 9 2638 ACC range with negipble signal Gistortion. Maximum gun reduction i ebtaine at sn input ‘otope of S00mV min 4. Black lve shits specified as that due to changes of contrast and veo content a constant Brightness setting 154FUNCTIONAL DESCRIPTION 1. Balanced Chroma Signal input (in conjunction with in 18) ‘This is derived from the chroma tignal bandpass filter, esigned to provide a push-pull input. An input signal amplitude of at least 4mV peak-to-peak is required between pins 1 and 15. Both pins require OC potential of approximately +3.0V. This is derived as a common mode signal from a network connected to pin 7 (burst output). In this way DC feedback is provided over the burst channel to stabilise its operation. All figures for the chrominance signal fre based on 2 colour bar signal with 78% saturation; ie, burst-te-chroma ratio of input signal is 1:2. 2. DC Contrast Control With +3.7V on this pin, the gain in the luminance ‘channel is such that 2 0.4mA black-to.white input signal to in 3 gives @ luminance output signal amplitude on pin § of 1V black-to-white. A variation of voltage on pin 2 between +5.6V and +2V sives a corresponding gain variation of +6 to >—14d8. A similar variation in gain in the chrome channel occurs in order to provide the correct tracking between the two signals. Beam current limiting can be applied via the contrast control network as shown in the Peripheral circuit, when a separate overwind is available on ‘the line output transformer. '& Luminance Signal Input ‘This terminal has a very low input impedance and acts as 2 current sink. The luminance signal from the delay line is fed via a series terminating resistor and a DC blocking capacitor and requires to be about O.4mA peak-to-peak amplitude. A DC bias current is required via a 12kS. resistor to the #12V fine 4, Charge Storage Capacitor for Black Level Clamp 5. Luminance Signal Output ‘An emitter follower provides # low impedance output signal of 1V biack-to-white amplitude at nominal contrast setting having a nominal black level in the range 0 to 42.7V. ‘An external emitter load resistor is required, nat less than 1KQ. If a greater luminance output is required than 1V, with normal control settings, the input current swing at pin 3 should be increased in proportion, 6. Brightness Control ‘Over the range of potential +0.9 to +1.7V the black level (of the luminance output signal (pin 5) is increased from 0 to 42.7V. The output signal black level remains at +2.7V. ‘when the potential on pin 6 i increased above +1.7V. 7. Burst Output AV peak-to-peak burst (controlled by the ACC system) is produced here. Also, to achieve good OC stability by negetive feedback in the burst channel the DC Potential at this pin is fed back to pins 1 and 15 via the ‘chroma input transtormer TBASGOC 8. Flyback Blanking Input Waveform Negative going horizontal and vertical blanking pulses may be applied here. If rectangular blanking pulses of not greater than ~1V negative excursion, or DC coupled pulses (of similar amplitude whose negative excursion is at zero volts OC are applied, the signal level at the luminance ‘output (pin §) during blanking will be OV. However, ifthe blanking pulses applied to pin 8 have an amplitude of -2 to 3V the signal level at the luminance output during blanking will be +1.5V. The negative pulse amplitude should not exceed BV. 9. Chroma Signal Output With a 1V peak-to-peak burst output signal (pin 7} and at nominal contrast and saturation setting {pine 2 and 13) the chroma signal output amplitude is 1V peak-to-peak. An external network is required which provides OC negative feedback in the chroma channel via pin 12. 10. Burst Gating and Clamping Pulse Input A positive pulse of not lest than SOWA is required on this pin to provide gating in the burst channel and luminance ‘channel biack-level clamp circuit. The timing and width of this current pulse should be such that no appreciable encroachment occurs into the syne. pulse or picture line periods during normal operations of the receiver, 11, +12V Supply (Vee) Correct operation occurs within the range 10.8 to 12.2V. All signal and. control levels have a linear dependency on supply voltage but, in any given receiver design this range may be restricted due to considerations of tracking between the power supply variations and picture contrast and chroma levels. The power dissipation must not exceed 580mW at 60 ambient temperature, 12, DC Feedback for Chroma Channel (see pin 9) 13, Chroma Saturation Control ‘A control range of #648 to>-14d8 is provided over @ range of DC potential on pin 13 from 6.2 to 2.7V. Colour kiling is also achieved at this terminal by reducing the OC Potential to lest than +1V, eg., from the TBAS4O colour killer output terminal. The minimum “kill factor” i 4048, 14, ACC Input A negative going potential gives an ACC range of about 26dB starting at +1.2V. From 1V to 8OOmV the steepest part of the characteristic occurs, but a small amount of gain reduction also occurs from 800mV to 500mV. The input resistance is at least BOK. 18. Chroma Signal Input (x pin 1) 16, Negative Supply, OV (Earth) 155TBASEOC aw vent) Fie. Contre contro! charsctariete Fa ¢ Covert of the hve xo ‘uminence ameter! ‘of luminance amplifier ae 156@PLESSEY Semiconductors (TBA750B TBA750B LIMITING IF AMPLIFIERIFM DETECTOR ‘The TBA750B is a five-stage limiting amplifier with a balanced product detactor, DC volume control, and audio river. The circuit is suitable forall FM applications up to an intermediate frequency of 60 MHz. ABSOLUTE MAXIMUM RATINGS Supply Voltage at pin 2:+18V Power dissipation 550mW Operating Temperature: 10°C to +65°C. ‘Storage Temperature: ~ 55°C to + 125°C FEATURES. gt eee cco cecosonnn| ofl ence ee Fig.1 Pin connections ‘AM Rejection: 45 dB at 200K, increasing to S0dBat_ 2mV a I Trreshold Limiting: I Volume Control Range: [Total Harmonic Distortion: a a Capable of Driving a Single Transistor op Stage at 3W Audio ofp Upper 348 point: Second Source Availabilty 100. at 6MHz >8008 (0.5% at 15kHz Deviation 1.4V1Ems. at 15kHz Deviation 30MHz (Limiting Ampitier) Fig.2 Test circuit (60MH=) 157TBAT50B ELECTRICAL CHARACTERISTICS eat conditions (unless otherwise sated}: “Tame = +25", Vop= +12 Characteraticn min | tye [max | une ‘Supply voltage range ° 125 v Total curent drain at Vaya = 12V, R= 0) 2 mA Sensitivity 100 w Volume Control attenuation 80 8 AF. Preamp gain >808 a8 Input resistance 2 6 ta ‘A.M. rojoction (measured In test circuit) Vq= O20 6 8 Veo tm 55 8 Vp=10mV 60 8 Vig= 100mv 60 ry Ly=asut LIS TWH agtunloaded a) = 00 -~ - = orn (| a) “The transter ratio of the input bandpass filter: Vavi= 088 ‘The bandpass filter Is designed to give high attenuation Inthe region ofthe colour sub-carier frequency. ‘Tho peak-to-peak bandwidth of the detector S cuNe Is soaKt2 158 #ig.3 6MHz applicationTBA920/TBA920S @PLESSEY Semiconductors, TBA920 TBA920S UNE OSCILLATOR COMBINATION ‘The TBA920 is a silicon integrated circuit designed for ‘TV receiver applications. It accepts the composite video ” ec signal, separates sync. pulses with the added safeguard of omc so as comet ‘noise gating and provides a syne. output for the vertical ate wren wer seu canon integrator. Also incorporated is the line oscillator together eee moa with two phase compsrators: one to compare fiyback ulses to the oscillator and the other for sync. phase comparison, The TBAG2OS is a special selection of the ‘TBAG20 (eee Electrical Characteristics). =e" pews FEATURES CR Tord Sync separator ABSOLUTE MAXIMUM RATINGS Noise Gat Reference point is pin 16 unless otherwise stated Line Oscillator ae pa bua Phase Comparator Voltage at pin 3, Va oro 13.2v Suitable for Thyristor or Transistor Systems Voltage at pin 8, ~Vg tv Voltage at in 10, Vio 0.510 +5V ‘Average current pin 2, Laay 20mA ‘QUICK REFERENCE DATA Peak current, pin 2, tap 200mA Peak current, pin 5, too 10mA Supply Voltage (nom.) 12 Pesk current. pin vom Supply Current (nom,) 36m coe arty be Video VP (+ve Sync.) 3V Fem current. Bin 9, look son v1 Total power dissipation, Poy 600m W Flywheel Pull-in Range ‘etkHz ‘Storage temperature, Trig ~85 10 +128°C @ output Current 20mA Operating ambient temperature, Tamp ~10 10 #60°C 159TBA920/TBA920S ELECTRICAL CHARACTERISTICS ‘Test Conditions (unless otherwise stated: Veo = +12V Tomb = 25°C Reference point pin 16 Measured in test circuit Fig. 3 (CCIR standard) Value Characteristic Symbol Units Conditions Typ. [Max Current consumption in 36 ma | 190 REQUIRED INPUT SIGNALS. Video Signal (Pin 8) Input voltage, peak-to-peak vinoo | 1 | 3 | 7 | v | Positivegoing syne Peak input current during syne pulse eo 100 HA Notte Gating (Pin 9) Input voltage, peak Vepk | 07 v Input current, peak lyon | 0.03 10 | ma Input resistance Re 200 2 Flyback Pulse (Pin 5) Input voltage, peak Vyor 4 v Input current, peak Wipe | 005] 1 mA Input resistance Ry 400 a Pulse duration ts | 0 us | fo = 15625 H2 DELIVERED OUTPUT SIGNALS Composite Syne. Pulses, +ve, Pin 7 Output voltage, pp View 10 v Output resistance at leading edge of pulse (emitter follower) a 50 2 at trailing edge Ay 22 kn Additional external load ress: tance Rrexe | 20 cred Driver Pulse (Pin 2) ‘Output voltage, p-P View 10 v ‘Average output current laev 20 | ma Peak output current hoe 200} ma Output resistance (low ohmic) | Re 18 a Output pulse duration 25 2 | Vz=+10.5V, external resistor pins when 2°16 syachronised te 1210 32] us | See operating notes (1) Permissible delay _ between leading edge of output pulse and flyback pulse tarot 01015 us | t= 12m Supply voltage at which output pulses are obtained vec | 4 v Oveitator Free-unning frequency i 18625 Ha | ys =33k2, See operating notes (2) Spread of frequency at nominal | Af values of peripheral components | jg TBA920 15 | % | Seenotet ” TBA9208, 115] % | Seenotet « " Frequency change when decreas. jing supply down to minimum iva wo] % Frequency control sensitivity fee baer ‘Adjustment range of network in circuit of Fig. 3 10 « 160TBA920/TBA920S Value Characteristic Symbot |——""" __ Conditions Min] Typ. [Max Influence of supply voltage on | Bfo/fo sl « frequence at Vp = 12V VgVonom Control Loop! (Between Syne. Pulse and Oscillator) Control voltage range Via 0.510. v Contra! current, peak hee 2 mA | Vi0>4.5V, Ve>1.5V +6 mA | VioS2V, Ve>1.5V af 1 kHz/us| Time coincidence between syne. pulse CT ices at and flyback pulse or V9>4.5V 3 Ikttz/us | No time coincidence or Vi9<2V Capture and holding range of 4 kHz | See note 2 Pullin time t 20 ms | Afffg = #3% (Af=470H2), see Fig, 3 Switch-over from high control sonsitivity to low control sonsitivity after eapture ' 20 ms | See Fig. 3 Control Loop It (Between Flyback Pulse and Oscillator) Permissible delay between leading edge of output pulse (pin 2) and leading edge of tyback pulse tarot 01015 ws Static contol error ‘at oe ae eee Ta Peak output current during flyback pulse er 107 ma Overall Phase Relation Phase elation between leading edge of syne. and middle of flyback pulse ' 49 us | See operating notes (4) Tolerance of phase relation at 78920 20.7] us | See operating notes (5) Teagz0s }+0.4] us | See operating notes (5) Voltage for tz = 12 to 32us Vs 6108 v Adjustment sensitivity Be a wv Input eurrent s 2] ua External Switchover ot Parameters (Loop Filter and Loop Gein) of Control Loop! (eg for Video Recorder Application). See Note 3 Required switch-over voltage Vio [45 Vo | Ry = 1500 20] vi | Ry, = 2K Required switch-over current he 80 uA | Ry, = 1509, Vig 45V 120 WA | Ry = 2k, Vig =20V ores 1 Exclusive of external component tolrances 2. Adjustable with Pass 3 With syne pulses at pine 7 and 8, without RC network ot pin 10, 161TBA920/TBA920S. OPERATING NOTES 1. The output pulse duration is adjusted by shitting the leading edge (Vs from 6V to BV). The pulse duration is a result of delay in the line output device and the action of the second control loop in the TBA20. For a ine output stage with 2 BUT08 high voltage transistor the resulting duration is about 22us, and in such a way that the Tine output transistor is switched on again about Bus after the middle of the line flyback pulse. This pulse duration must be taken into account when designing the driver stage and driver transformer as this way of driving the line output device differs from the usual, ie, driver duty evcle of about 50%. 2. The oscillator frequency can be changed for other TV standards by an appropriate value of C4 3. The control error is the remaining error in reference to the nominal phase position between leading edge of the syne. pulse and the middle of the flyback pulte caused by a Variation in delay of the line output stage. 4. This phase relation assumes a luminance delay line with 2 delay of 500ns between the input of the syne. separator and the drive to the picture tube. If the syne. separator is inserted after the luminance delay line or if there is no delay Tine at all (monochrome sets), then the phase relation Is achieved at Cia = S600F. 5, The adjustment of the overall phase relation and consequently the leading edge of the output pulse at pin 2 ‘occurs automatically by the control loop I! or by applying DC voltage to pin 3. 162 ETE TARE esse Ae PT Sas a nt WET rye Ed Fig. 3 Application diagramTBAQ50:2X @PLESSEY Semiconductors TBAQS5O : 2X LINE OSCILLATOR COMBINATION The TBA950:2X is a monolithic integrated circuit for pulse separation and line synchronisation in TV receivers with transistor output stages. o ‘The TBA95O:2X comprises the sync. separator with omar on noise suppression, thé ‘comparator, a switch immunity, the line oscillator frequency ~ range Ii 1ase control circuit and the output asa cour one cera ro It delivers prepared frame sync. pulses for triggering rae 0 rayon the frame oscillator. The phase comparator may be switched for video recording operation. Due to the orig large scale of integration few external components are Fig. 1 Pin Connections "Fig. 2 Block diagram ond test coun 163TBA950:2X ELECTRICAL CHARACTERISTICS ‘Test conditions (unless otherwise stated): Tame = +25°C 18625Hz in the test circuit Fig.2 (see note 1) Characteristic symbol vole units | Condit 2 Min. | Typ. [Max, “Amplitude of frame pulse we >8 v Frame pulse duration ® 3150 is Output resistance at pin 7 (high state) | Renz | 78 | 40 |13 | ka “Amplitude of syne. pulse ls 38 v Output resistance at pin & Rens | 28 45 | ka Output pulse duration 28 285 | us Typical range Residual output voltage Vave <058| v 12 20ma Osellator frequency te 14943 | 15626| 16406] He Cian = TOnF oo a Ret = 10ak0 Frequency pull-in range Af te Typical rang Frequency holding range atu | 400 1000 | He TYpical range Slope of phase comparator control loop | —do/dta 2 kHa/as Gain of phase control du/ate 2 Phase shift between leading edge of composite video signal and ine flyback pulse (see note 2) adjustable by Vit wv a a5 | vs Typical range Notes 1. By modification of the frequency-determining network at pins 13 and 14, thes ICs can also be used for other ine frequencies, 2. The limited flyback pulse should overlap the video signal syne pulse on both edges. OPERATING NOTES ‘The sync. separator separates the synchronizing pulses from’ the composite video signal. The noise Inverter circuit, which needs no external components, in connection’ with an integrating and differentiating etwork frees the synchronizing signal from distortion and noise. The frame sync. pulse is obtained by multiple integration and limitation of the synchronizing signal, and is available at pin 7. The AC network hitherto ied between sync. separator and frame oscillator ‘no longer needed. Since the frame sync. pulse duration at pin 7 is subject to production spreads it is recommended to use the leading edge of this pulse for triggering. “The frequency of the line oscillator is determined by a 10 nF polystyrene capacitor at pin 13 which is charged ‘and discharged periodically by two intemal current sources: The external resistor at pin 14 defines the charging current and consequently in conjunction with the oscillator capacitor the line frequency. The phase comparator compares the sawtooth voltage of the oscillator with the line sync. pulses. Simultaneously an AFC voltage is generated ‘which influences the oscillator frequency. A frequency range limiter restricts the frequency holding range. The oscillator sawtooth voltage, which is in a fixed ratio to the fine sync. pulses, is ‘compared with the flyback pulse in the phase contro! circuit, in this way ‘compensating all drift of delay times in driver and line ‘output stage. The correct phase position and hence the horizontal position of the picture can be adjusted by the 10 kA potentiometer connected to pin 11- Within the adjustable range the output pulse duration (pin 2) is constant. Any larger displacements of the picture, eg. due to non-symmetrical picture tube, should not be corrected by the phase potentiometer, since in all cases the flyback pulse must overlap the sync. pulse on both ‘edges (see Fig. 3). ‘The switching stage has an auxiliary function. When the two signals supplied by the sync. separator and the ‘phase control circuit respectively are in synchronism Saturated transistor isin parallel with the integrated 2 k 9. Thus the time constant of the filter il Fig. 8 Phase relationships network at pin 4 increases and consequently reduces the pull-in range of the phase comparator circuit for the synchronized ‘state 10 approximately 50Hz. This ‘arrangement ensures disturbance-free operation. For video recording operation this automaic switch- ‘over can be blocked by a positive current fed into pin 8, e.g. via a resistor connected to pin 3. It may also be ‘useful to connect a rsistor of about 630 11 or 1 kO between pin 9 and earth. The capacitor at pin 4 may be lowered, e.g. to O.1uF. These alterations do not significantly influence the normal operation of the IC and thus do not need to be switched, ‘The output stage delivers at pin 2 output pulses of duration and polarity suitable for driving the line driver stage. If the supply. voltage goes down (eg. by switching off the mains) a built-in protection circuit ures define ine frequen ules down Va 4V and shuts off when Va falls below 4V, thus prever pulses of undefined duration and frequency. Conversely, if the supply voltage rises, pulses defined in duration {and frequency will appear at the output pin as soon as Va reaches 4.5V, In the range between V3 ~ 4.5V and full supply the shape and frequency of the output pulses are practically constant,TBA950:2X RECOMMENDED OPERATING CONDITIONS For operating circuits Figs. 4 and 5 Input current during syne. pulse I >5pa Composite video input signal Vie 3(1 to 6)V {nput current du flyback pulse Iro 0.2t02mA ‘Switchover curre >2mA Time difference between the output pulse at pin 2 ‘and the line flyback pulse at 10, te <20ps Current consumption (see Fig. 6) 13, <31ma Ambient operating temperature range, Tams 0t0 +60° bE Sa — . 4 " Fig. 4 Operating circuit (trystor output stage) “Input crcuiry must be optimised sor ) Fig. Another possiblity for line requency adjustment (wansisor output stage) “Input etculry must be optimised 165‘TBA950:2X 3 3am ig. 6 Graph for determining the supply series resistor Rs 166 f we ABSOLUTE MAXIMUM RATINGS. All voltages are referred to pin 1 Supply current (see Fig. 6) Js 45mA Input current Is: 2mA, Input voltage Ve ey ‘Output current I> 22mA Output voltage V2 12V ‘Switch-over current for video recording le 5mA Phase correction voltage Vit Oto Vs Operating temperature range —10°C to 460°C. Storage temperature range 55°C to +125°C@PLESSEY Semiconductors TCABO0 TCA800 COLOUR DEMODULATOR WITH FEEDBACK CLAMPS ‘A monolithic integrated circuit for colour television recsivers incorporating two active synchronous demodulators for the Fp.y and 2Fp.y signals, a GY matrix, PAL switch bistable and RGB matrix, suitable for driving simple single transistor video output stages. The circuit incorporates three feedback clamps to stabilise black level, to eliminate the problem of thermal drift in the demodulators. OPERATING NOTES For alternative applications in a simple decoder circuit, it must be possible to trigger the flip-flop so that it runs in the correct ident. phase by means of an AC coupled, 2 volt Pp square wave, derived from the APC loop in the reference generator circuit. (The normal input line timebase pulse would still be applied in order to provide clamp pulses.) Input impedance of output amplifier (BF337) (Expressed as parallel resistance and capacitance.) Rityp.) 5k. C (typ.) 8OpF ‘The above values are given for suitable design of output stages ie. emitter follower with SmA current capability. Fig. 1 Pin connections QUICK REFERENCE DATA Veupply -(Nominal) 12V supply -(Nominal) (Ig = 0.5mA) 47mA Voltage Gain of Chrominance (R-Y) Signal Channel (typ.) Vinipp) = SOmV; f= 4.43MH2; Video Gain = X20 17.5V/V Voltage Gain of Luminance (Y) Channel Vin (Black-to-White) = 1V (p-p) 5V/V Operating Temperature Range —10 to +55°C Fis. 2 Biock diagram and typical eoplication circuit 167TCA800 ELECTRICAL CHARACTERISTICS. est Conditions (unless otherwise stated) Tamp * +28°C, Voc = +12V Value Characteristic Unita Conditions in] Tve.] Max. Supply voltage range 9 frog} 12 |ra2} v Voltage gun of ehrominance(R-Y} signal channel 178] | V/V |Vin po = S0mV, f= 4.43MHz, video gain = X20 Voltage gsin of luminance (¥} channels 5 IV |Win thinckto-mnite) = 1V BD Bandwidth (348) of luminance channel fom ¥ input to R-G-8 outputs 10 Mite ‘Bandwidth (~3dB) of chroma channel from Fin-v). F(e-v) inputs to RGB outputs 1 Mite Ratio of demodulated signals VeewiVinv) 1.60] 1.78] 1.96 Detined with equal chroms input signals VieviMinvs 0.76} 0.85] 0.94 and measured at output pins (see note 1) Input Characteristics ‘Chrominanee input impedance (expressed a resistance and parallel capscitance 10,11 R 100 2 g ro | ge [f7443MM2, Vig = 20m sinewave Luminance (Y} input blanking level | edby TeAseD) 1 frsf astra] v Luminance (Y) input, black level potential (nominal brightness set by | Briohenes contro of TBABEO) 1 Ww v Luminance (Y) input blackto-white amplitude (adjusted by contrast contol of TBASEO) 1 10 veo Reterence input impedance (expressed as resatance and parallel capacitance) |13, 15 R 50 ko f= 4aame c 50] 10 | oF Reference input voltage {from TBAS4O} 13,15] 05] 1.0] 20 | veo Phase shift between reference inputs and chroma input signal to give Coincidence at the synchronous Semodulators 13,45] | 10 [degree Ident. voltage for ident ‘of? 4 | +6 v Ide. voltage for ident ‘on’ “ +10] v Iden. current for ident “ft” “ on | ma “Tracking of ident. threshold witha supply variation of 210% AVinremnoia Voc Vinresnois BVec “ bd Requice line pulse input current to clamps and H/2 M-tlop 8 | 03| 0.45] 06 | ma Window level (see note 2) a] fr v Line input impedance 8 | 06] 10] 14] Ka ‘Output Charseteristion F.G-B outputs blanking level 3,5 7} | 2.0) | voc] etanking eve a pin 1 = 1.6 Common made variation of black level Vatlation over a temperature range oraore Seenote 3 Blanking-to-white level output voltage capability ofeach output “amplifier channel 3.5.7] 6 8 | vee 168TCAs00 Value Charactaristic Pin Unie, Conditions Min.) Typ.]Max| Difference in clamped blanking level of outputs i.e, R t0.G to 8 387 50] mv Differential drift of clamped output blanking levels over tomperature range of 40°C 3,8,7| 25] mv Residual 4.43MHz signal at R-G-8. outputs Red 150] mv p| Blue 300] mV pp H/2 square wave output amplitude 12 | 25] 35 V pp [Measured with 3k0. load ie. TBAB4O NOTES 1. These values ae choian to minimise errors in tesh tones and ofthe luminance of the green component, The matrix equation for the derwation of the G-¥ component is given by G-¥ = -0.51(F-¥) ~0.10(6.¥) This erin from the bese colour equation ¥ ~O.S0R'* (01896 20.118.) Measured atthe tube cattodes with 100V p- video drive In order to provide clamp pulse which oecurs inside the blanking wavelorm and fre fom the age spikes, its necessary to window the line pula at about two this offs aide. 3. In order to partly companaata for drift in output stages &neptive temper ‘Utbut transistor hasbeen incorporated ir coefficient to compensate forth variation inthe vdeo ABSOLUTE MAXIMUM RATING Max. dissipation @ +58°C = 900mW Storage temperature range —55°C to +125°C 169TCA800 170TDA 440, @PLESSEY Semiconductors TDA 440 VIDEO IF AMPUFIER/ DEMODULATOR “The TOAAAO incorporates the following functions: 1. Three-stage symmetrical IF (broad band) amplifier mureonrenennan tf D ievmovrenewrines with ist and second stages AGC-controlled ree Pescnnoe 2 Controiled video carrer demodulator. od bsrenusenv 3. Video drive amplifier with lowpass response and commer rasaced ‘output independent of supply fluctuations. ae 4. Gated AGC section for IF ampli ren 92 cod 5 Delayed regulated output voltage for the tuner aed preamplifier. ‘oovooucatos runs Fin 1 Pin conection FEATURES High Gain — High Stability Very Low Intermodulation Products Constant Input Impedance Independent of Ml Minimum Differential Error m AGC Positive and Negative Video 0/Ps Low Noise Independent of AGC Low Impedance Video O/Ps High Supply Rejection Temperature Compensated Low RF Breakthrough to Video O/Ps @ Peak White Adjustable Fast AGC Action mTDAA4O ELECTRICAL CHARACTERISTICS Test Conditions (unless otherwise stated): Tomb = 425°C. Veo = +12 Reference point is pin 3 Value Characteristic Pin Unies Conditions fin] Typ. [Max ‘Supply voltage, Voc 13} 2 |i] v Supply current, Ip 13] 15] 19 | 25 | ma Supply voltage, stabiliser input 14/55] 5a [64] v | te=40ma Positive video OC output voltage | 11 55 v White tvel adjustment range for positive video DC output voltage | 11 48| v_ | By (pin 10) == 6s Vv | Ry bin 10)=0 Peak black clamping lvel for Positive video DC output voltae | 11 [1.75] 1.9 Jats] v DC output current 1" 32 mA | Reference point pin 13 Negative video DC output voltage | 12 56 v ‘Available tuner control current 5 | 7] 75 mA | 1008 after onset of tuner contol action Negative gating pulse 7 |15| 3 | 5 | vp Composite video output level " 33 Veo | Vir =S.voc 42 vpp | Vis =6.4vDC AGC range, AAGC so] 56 38 Video 348 bandwidth 8| 10 Mie Video frequency response change 19 | 20] a8 | sacc~ sous, MHz Symmetrical input voltage for 3.3Vpp output (pin 11) 1416 ]100] 150 | 220 faves Maximum IF voltage level present at video outputs over the full AGC range 11.13] 30| mv 50 | mv Sound IF voltage level prosont at video outputs with selective circuit | 12 | 20 mv Differential gain of negative comp. video output signal for full black to white swing ww] % Suppression of sound carier/colour subearrior(1.07MH2) w.r.t colour subcarrier level 40 48 | Picture carier = 048, 1F colour subcarrier level = ~648, 1F sound carrer level = 2408 Input impedance 1 Reference point pin 16 ‘AGC max, 14i2| [ctor AGC min 1.4019] |ROMpF| 172ABSOLUTE MAXIMUM RATINGS Reference point is pin 3 Rating ‘Supply voltage range Low voltage stabiliser supply current ‘Open loop voltage Video DC output current ‘Average positive Peak positive ‘Average negative Peak negative White level controt Power dissipation at Tym <55°C Ambient temperature range ‘Storage temperature range Pin Symbot Value Units 3 Veo 10015 v “ I 50 mA 5 Vs 18 v 2 ha 5 mA 12 ha 30 mA " in 5 mA " in 30 mA 10 Vio 32 v Prot 700 ow Tomo |-10t0465] °c Tag — |-85t0+125] °C ‘Supply voltage must be aaconnected before inserting the ineyrted circuit nto the tet socket. ‘Fig. 3 Test and application circuit. C= Parasitic capcitane at pins 8 and 9 shouldbe kept to ‘eminimom. = 6 0 109F marles capacitance, = ‘Serie resonant frequency = 38.9 — (1.8 to 2.75) Mis, A= Serle resonance domoing (determines tuning Shuracwrsis) = 1.8 10 S3kGL E.G, with Fy = 2.4KER tuning range, t, = Sti, Fig 4 Modifications to Fig. 3 for imeroving sudo interterence and eross-colour charectrttics, 173TDAa4O 174TDA1365, o PLESSEY PRELIMINARY INFORMATION Semiconductors Fy Information is Is¢ued to advise Customers of potential new products which are designated Experimenta” but are, never {Retreat litre rae. Customer incebpoaunyereeioah ar otal tes elesarerar sarangi gor pleas Please contact your local Plessey Semiconductors Sale Office for datas of current statues ° TDA1365 COMPLETE LUMA/CHROMA PROCESSOR ‘The TDAI365 Is a bipolar intagrated circuit for use as a complete TV colour signal processor. Designed to decode ram src fre = Penne PAL signals directly, it can bo extended to decade SECAM anmerucore th “harene signals with automatic standards switching. All the eit culty required for both Luminance and Chrominance sig- amrcnera ds Dao nal processing is included with the facility of OC control of eer above Brightness, Contrast and Colour. Toatses ‘The device requires minimal extomal components and sams (> Peri adjustments and is encapsulated in a 264ead, dual inine, amcrnratls fl acrce Plastic package (O28). ‘om shane FEATURES cxancom fs | | an Complete Luminance and Chrominance Signal ards shemeresnenecen Processing n a Single Package Low External Component Count crores (0 Been) eee I Minimat External Adjustments ‘courecnoncoma nsf Spi | ecm cwme, Baca cxanunnne fs bene Teroeoeior com t] Plana Low Cost, Single Chip Solution p26 Fast Data Blanking Faciity "Fig? Pin connections top view) rsd GRE 4H, gy epee 'Fig2 TDA1S65 block dlagram 175TDA1365 ELECTRICAL CHARACTERISTICS ‘Test Conditions (unless otherwise stated): Voc = 12V, Tana = +25°C Linance iit pn: 1V,_ negative video Chrominance input pin 11:°150mV,,, burst level Value Characteristic Pin baa wen] Uae Conditions Supply voltage 1 | 105] 12 | 135 ‘Supply current 1 —| 43 | 54 | ma ‘Burst gating pulse input wo | 2}ate6 Yoo Line pulse input a |i] 2] 6 Veo Blanking pulse input 2 2] 3]e6 Vos Control voltage input 47,813] 35| — | 8 Vv | Typical range Demodulator input 24,25 | — | 200] — | my, ‘Subcarier oscillator pullin frequency range 20 | +300] +00 He Differential gain of luminance channel | 26, 17,28] — | — | 5 % | Input 1V,9 staircase: ‘Output block level=2V GB output voltage normal 26,27,28] —| 35| — | Vso GB output voltage maximum 26,27,28] 7 | —| — | Voy RGB quiescent output voltage 26,27,28] 25 | 33 | 41 Vv" | Notuminance Input v4~= 9V view “Temperature coefficient 2] 0 | +2 | mveo Fig. Typlesl output stage with data inputs 76ABSOLUTE MAXIMUM RATINGS Supply voltage Input voltage pine Sand 11 {Input voltage pins 2, 19 and 23 Maximum power disipation Operating temperature range ‘Storage temperature range -08Vt0+15V 5y, 2680 750mW =I0Cto+65C 55°C 10+125°C ‘TDA1365 Ww‘TDA1365 178‘TDA2522/TDA2523 @PLESSEY Semiconductors. TDA 2522/3 COLOUR DEMODULATOR COMBINATION ‘The TDA2522 and TDA2523 are integrated syn- chronous demodulators for colour television receivers, The devices incorporate an 8.8MHz oscillator followed by 2 divider giving two 4.4MHz reference signals, @ keyed burst phase detector for optimum noise be- haviour, an ACC detector and amplifier, a colour killer, ‘two synchronous demodulators for the (B-Y) and (R-Y) signals, a PAL switch and a PAL flip-flop with internal identification, The symmetrical demodulators include integrated capacitors 10 reduce unwanted correr signals at the pets ‘outputs which are taken from temperature-compensated emitter followers. The outputs of the TDA2522. are Fig. Pin connections suitable for use with the TDA2530. The TOA2523 Gutputs ae inverted Tor use with a direct transistor QUICK REFERENCE DATA. ™ Supply Voltage (pin 11) 12V typ, M@_ Chrominance Input Signal (Including Supply Current: 40mA typ. Burst) : I Colour Difference Signals R-Y (pin 6) 500mV p-p (R—Y) (pin 3 >2A4V p-p BY (pin §) 350mV p-p (G=¥) (pin 2 }1.3V p-p 1 Colour Difference Signal Output (BY) (pint): S3Vp-p Impedance 260 +. typ. a bf} a " oe 1 : ce H— th th nae fe f 1 ede a = LI th th Fig.2 Block diagram —TDA2522/TDA2523 ELECTRICAL CHARACTERISTICS Test conditions unless (otherwise stated): oe G-Y/R-Y 2/3 0.85 - ‘See note 1 G-Y/R-Y 2/3 O17 = See note 2 ewes ae males a ie A wee <9 fala ee (nctuding burst)* a Ey A ES TYEE |} sono 9 a eae eles a (G-Y) 7 250 a (B-Y) 1 250 Q Burst keying active for |15 | 7.5 Vp-p Barmera mane, [38 as | YS amueroaiaciet 38 | ee Blanking inactive for 15 1 Vp-p eects opal pope se] | ue | Gast ene cesar eee | ios ass 4 ema a = Bee cere 20d ln 8 ACC reference voltage 12 7 v BE erage ih so eens chert = i eeenaee notes 1. The demodulators are driven by a chrominance signal of equal amplitude forthe (R—Y) and (@—Y) components. The phase of the (RN) chiominance signal equals the phase ofthe (R--Y) reference signal. The same holds forthe (B—Y) signals, 2. Asiote 1. but wth the phase ofthe (RY) reference signal reversed 3. Colour 4 The bucst amplitude is kept constant by ACC a 5. Tobe estblshed, 6. The delay depends on the value of Cd (see Fig. 2) ion, but depends linearly on the keying pulse width. 180FUNCTIONAL DESCRIPTION Functions listed by pin number. ‘TDA2522 1. -(B-¥) signal output 2. -(G-Y) signal output —_(G-Y) signal output 3. -(R-Y) signal output —_(R-Y) signal output These outputs are of low impedance from tempera- ture compensated emitter follower stages that require external loads of 10kQ. Internal filtering of the colour difference output signals to give a —3dB bandwidth of ‘MHz allows the three signals to be fed directly to the luminance matrix. The TDA2522 may be AC coupled to the TDA2530, and the TDA2523 may be used with ditect transistor drive, Negative supply (Ground) 5. Chrominance BY input signal An input signal of approximately 350mV p-p (colour bars) is required at this pin, The BY component of colour burst must be included with the input chromi- ‘nance signal 6. Chrominance R—Y input signal An input signal of approximately 500mV p-p (colour bars) is required, including the R—Y colour burst component. 7. Reference oscillator APC loop filter Reference oscillator APC loop filter Between pins 7 and 8 are connected the APC loop. low pass filter components. The difference voltage between these pins is connected internally to the oscillator reactance stage. 9. Oscillator feedback 10. Oscillator feedback A series network consisting of the 8.8MHz crystal ‘and an adjustable tuning capacitor is connected between pins 9 and 10. Division from the 8 8MHz ‘oscillator within the IC produces the 4.4MHz quadrature reference carriers which are then applied to the colour demodulators, 11. Positive 12V supply ‘The maximum voltage must not exceed 14V. 12, ACC hold capacitor ‘The capacitor connected from this pin to ground is ‘normally charged to a potential of about 7V. 13, ACC output potential ‘An output potential varying inversely with the input colour burst amplitude is available at pin 13, Maximum ACC gain of the TDA2560 is provided when the ACC Potential from pin 13 of the device is greater than about 1.4V. 14. ACC hold capacitor The capacitor connected from this pin to ground is normally charged to a potential of 8.5V. On mono- chrome reception the potential will be 7.0V and while identing it may instantaneously increase to about BV. A 1000 resistor may be connected in series with the capacitor from pin 14, see pin 15. 18, Burst gating and blanking pulse input. The two-level positive pulse required at this pin is used for burst gating and flip-flop triggering, at 2 sampled level of 7V. A negative going pulse of about 100mV p-p, derived from the colour burst, may be inspected across @ 1000 resistor in series with the ‘capacitor from pin 14 to ground, should the sandcastle pulse shape require some adjustment. At a level of about 1.V the pulse width should be suitable for chroma blanking. 16. Killer delay capacitor ‘The value of a capacitor connected from pin 16 to ground determines the delay of un-killing. By this Means the state of continuous switching of the killer with marginal signals, may be avoided. Connecting 16 to ground unkills the system, ‘TDA2523 (B-Y) signal output ‘TDA2522/TDA2523 ABSOLUTE MAXIMUM RATINGS ‘Supply voltag Total power dissipation (pin 1) 14v 600mW 55°C 10 +125°C 10°C to +60°C 181TDA2522/ TDA2523 182‘TDA2530/ TDA2632 @PLESSEY Semiconductors TDA2530/2 RGB Matrix Preamplifier (with clamps) The TDA2530 and TDA2532 are integrated RGB matrix preamplifiers for colour television receivers, amos nf =p owe incorporating @ matrix preamplifier (for RGB nnaeo A es drive of the picture tube) with clamping cir a This integrated circuit has been designed to be one? oy pee driven from the TDA2522 synchronous demodulator ener TOA, =pomersou ou, and oscillator IC. xoxo asses oD een sou aoe The TDA2532 has been designed for use with on- anwenth

| Lf ws nfl ss Fig. 2 TDA2680%2 block diagram 183