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Instruction Set of 8085
Instruction Set of 8085
8085
An instruction is a binary pattern designed inside a
value.
These 8-bits of binary value is called Op-Code or
Instruction Byte.
Classification of
Instruction Set
Data Transfer Instruction
Arithmetic Instructions
Logical Instructions
Branching Instructions
Control Instructions
Data Transfer
Instructions
These instructions move data between
destination.
While copying, the contents of source are not
modified.
Data Transfer
Instructions
Opcode
MOV
Operand
Rd, Rs
M, Rs
Rd, M
Description
Copy from source to destination.
altered.
Data Transfer
Instructions
Opcode
MVI
Operand
Rd, Data
M, Data
Description
Move immediate 8-bit
register or memory.
If the operand is a memory location, its
Data Transfer
Instructions
Opcode
LDA
Operand
16-bit address
Description
Load Accumulator
Data Transfer
Instructions
Opcode
LDAX
Operand
Description
B/D Register
Pair
memory location.
Example: LDAX B
Data Transfer
Instructions
Opcode
LXI
Operand
Reg. pair, 16bit data
Description
Load register pair immediate
register pair.
Example: LXI H, 2034 H
Data Transfer
Instructions
Opcode
LHLD
Operand
16-bit address
Description
Load H-L registers direct
Data Transfer
Instructions
Opcode
STA
Operand
16-bit address
Description
Store accumulator direct
Data Transfer
Instructions
Opcode
STAX
Operand
Reg. pair
Description
Store accumulator indirect
Data Transfer
Instructions
Opcode
SHLD
Operand
16-bit address
Description
Store H-L registers direct
Data Transfer
Instructions
Opcode
XCHG
Operand
None
Description
Exchange H-L with D-E
Data Transfer
Instructions
Opcode
SPHL
Operand
None
Description
Copy H-L pair to the Stack Pointer (SP)
into SP.
Example: SPHL
Data Transfer
Instructions
Opcode
XTHL
Operand
None
Description
Exchange HL with top of stack
Data Transfer
Instructions
Opcode
PCHL
Operand
None
Description
Load program counter with H-L
contents
Data Transfer
Instructions
Opcode
PUSH
Operand
Reg. pair
Description
Push register pair onto stack
stack.
Example: PUSH B
Data Transfer
Instructions
Opcode
POP
Operand
Reg. pair
Description
Pop stack to register pair
register pair.
Example: POP H
Data Transfer
Instructions
Opcode
OUT
Operand
8-bit port
address
Description
Copy data from accumulator to a port
with 8-bit address
Data Transfer
Instructions
Opcode
IN
Operand
8-bit port
address
Description
Copy data to accumulator from a port
with 8-bit address
accumulator.
Example: IN 8C H
Arithmetic
Instructions
These instructions perform the operations
like:
Addition
Subtract
Increment
Decrement
Addition
Any 8-bit number, or the contents of register,
directly.
Example: The contents of register B cannot
Subtraction
Any 8-bit number, or the contents of register, or
complement form.
directly.
Increment /
Decrement
The 8-bit contents of a register or a memory
incremented or decremented by 1.
Increment or decrement can be performed on
Arithmetic
Instructions
Opcode
ADD
Operand
R
M
Description
Add register or memory to accumulator
contents of accumulator.
H-L pair.
Arithmetic
Instructions
Opcode
ADC
Operand
R
M
Description
Add register or memory to accumulator
with carry
H-L pair.
Arithmetic
Instructions
Opcode
ADI
Operand
8-bit data
Description
Add immediate to accumulator
accumulator.
The result is stored in accumulator.
All flags are modified to reflect the result of
the addition.
Example: ADI 45 H
Arithmetic
Instructions
Opcode
ACI
Operand
8-bit data
Description
Add immediate to accumulator with
carry
The 8-bit data and the Carry Flag (CY) are added
addition.
Example: ACI 45 H
Arithmetic
Instructions
Opcode
DAD
Operand
Reg. pair
Description
Add register pair to H-L pair
Arithmetic
Instructions
Opcode
SUB
Operand
R
M
Description
Subtract register or memory from
accumulator
H-L pair.
Arithmetic
Instructions
Opcode
SBB
Operand
R
M
Description
Subtract register or memory from
accumulator with borrow
H-L pair.
Arithmetic
Instructions
Opcode
SUI
Operand
8-bit data
Description
Subtract immediate from accumulator
the accumulator.
The result is stored in accumulator.
All flags are modified to reflect the result of
subtraction.
Example: SUI 45 H
Arithmetic
Instructions
Opcode
SBI
Operand
8-bit data
Description
Subtract immediate from accumulator
with borrow
subtraction.
Example: SBI 45 H
Arithmetic
Instructions
Opcode
INR
Operand
R
M
Description
Increment register or memory by 1
incremented by 1.
Arithmetic
Instructions
Opcode
INX
Operand
R
Description
Increment register pair by 1
by 1.
The result is stored in the same place.
Example: INX H
Arithmetic
Instructions
Opcode
DCR
Operand
R
M
Description
Decrement register or memory by 1
decremented by 1.
Arithmetic
Instructions
Opcode
DCX
Operand
R
Description
Decrement register pair by 1
by 1.
The result is stored in the same place.
Example: DCX H
Logical Instructions
These instructions perform logical operations on
Rotate
Each bit in the accumulator can be shifted
Compare
Any 8-bit data, or the contents of register, or
Complement
The contents of accumulator can be
complemented.
Each 0 is replaced by 1 and each 1 is replaced
by 0.
Logical Instructions
Opcode
CMP
Operand
R
M
Description
Compare register or memory with
accumulator
Logical Instructions
Opcode
CMP
Operand
R
M
Description
Compare register or memory with
accumulator
reset.
Example: CMP B or CMP M
Logical Instructions
Opcode
CPI
Operand
8-bit data
Description
Compare immediate with accumulator
of accumulator.
The values being compared remain
unchanged.
The result of the comparison is shown by
Logical Instructions
Opcode
CPI
Operand
8-bit data
Description
Compare immediate with accumulator
Logical Instructions
Opcode
ANA
Operand
R
M
Description
Logical AND register or memory with
accumulator
Logical Instructions
Opcode
ANI
Operand
8-bit data
Description
Logical AND immediate with
accumulator
Logical Instructions
Opcode
XRA
Operand
R
M
Description
Exclusive OR register or memory with
accumulator
The contents of the accumulator are XORed with the contents of the register
or memory.
The result is placed in the accumulator.
If the operand is a memory location, its address is specified by the contents
of H-L pair.
S, Z, P are modified to reflect the result of the operation.
CY and AC are reset.
Example: XRA B or XRA M.
Logical Instructions
Opcode
ORA
Operand
R
M
Description
Logical OR register or memory with
accumulator
The contents of the accumulator are logically ORed with the contents of the
register or memory.
The result is placed in the accumulator.
If the operand is a memory location, its address is specified by the contents
of H-L pair.
S, Z, P are modified to reflect the result.
CY and AC are reset.
Example: ORA B or ORA M.
Logical Instructions
Opcode
ORI
Operand
8-bit data
Description
Logical OR immediate with accumulator
Logical Instructions
Opcode
XRA
Operand
R
M
Description
Logical XOR register or memory with
accumulator
operation.
CY and AC are reset.
Logical Instructions
Opcode
XRI
Operand
8-bit data
Description
XOR immediate with accumulator
Logical Instructions
Opcode
RLC
Operand
None
Description
Rotate accumulator left
by one position.
Bit D7 is placed in the position of D0 as well as in
the Carry flag.
CY is modified according to bit D7.
S, Z, P, AC are not affected.
Example: RLC.
Logical Instructions
Opcode
RRC
Operand
None
Description
Rotate accumulator right
by one position.
Bit D0 is placed in the position of D7 as well as in
the Carry flag.
CY is modified according to bit D0.
S, Z, P, AC are not affected.
Example: RRC.
Logical Instructions
Opcode
RAL
Operand
None
Description
Rotate accumulator left through carry
Logical Instructions
Opcode
RAR
Operand
None
Description
Rotate accumulator right through carry
Logical Instructions
Opcode
CMA
Operand
None
Description
Complement accumulator
complemented.
No flags are affected.
Example: CMA.
Logical Instructions
Opcode
CMC
Operand
None
Description
Complement carry
Logical Instructions
Opcode
STC
Operand
None
Description
Set carry
Branching Instructions
The branching instruction alter the normal
sequential flow.
These instructions alter either unconditionally
or conditionally.
Branching Instructions
Opcode
JMP
Operand
16-bit address
Description
Jump unconditionally
Branching Instructions
Opcode
Jx
Operand
16-bit address
Description
Jump conditionally
Jump Conditionally
Opcode
JC
Description
Status Flags
Jump if Carry
CY = 1
JNC
Jump if No Carry
CY = 0
JP
Jump if Positive
S=0
JM
Jump if Minus
S=1
JZ
Jump if Zero
Z=1
JNZ
Jump if No Zero
Z=0
JPE
P=1
JPO
P=0
Branching Instructions
Opcode
CALL
Operand
16-bit address
Description
Call unconditionally
Branching Instructions
Opcode
Cx
Operand
16-bit address
Description
Call conditionally
Example: CZ 2034 H.
Call Conditionally
Opcode
CC
Description
Status Flags
Call if Carry
CY = 1
CNC
Call if No Carry
CY = 0
CP
Call if Positive
S=0
CM
Call if Minus
S=1
CZ
Call if Zero
Z=1
CNZ
Call if No Zero
Z=0
CPE
P=1
CPO
P=0
Branching Instructions
Opcode
RET
Operand
None
Description
Return unconditionally
Branching Instructions
Opcode
Rx
Operand
None
Description
Call conditionally
Example: RZ.
Return Conditionally
Opcode
RC
Description
Status Flags
Return if Carry
CY = 1
RNC
Return if No Carry
CY = 0
RP
Return if Positive
S=0
RM
Return if Minus
S=1
RZ
Return if Zero
Z=1
RNZ
Return if No Zero
Z=0
RPE
P=1
RPO
P=0
Branching Instructions
Opcode
RST
Operand
07
Description
Restart (Software Interrupts)
Restart Address
RST 0
0000 H
RST 1
0008 H
RST 2
0010 H
RST 3
0018 H
RST 4
0020 H
RST 5
0028 H
RST 6
0030 H
RST 7
0038 H
Control Instructions
The control instructions control the operation
of microprocessor.
Control Instructions
Opcode
NOP
Operand
None
Description
No operation
No operation is performed.
The instruction is fetched and decoded but no
operation is executed.
Example: NOP
Control Instructions
Opcode
HLT
Operand
None
Description
Halt
Control Instructions
Opcode
DI
Operand
None
Description
Disable interrupt
Control Instructions
Opcode
EI
Operand
None
Description
Enable interrupt
Example: EI
Control Instructions
Opcode
RIM
Operand
None
Description
Read Interrupt Mask
RIM Instruction
Control Instructions
Opcode
SIM
Operand
None
Description
Set Interrupt Mask
contents as follows.
Example: SIM
SIM Instruction