Save trees use e-Question Paper Go green DOWNLOAD THIS FREE AT www.vturesource.com USN 10EC Sixth Semester B.E. Degree Examination, June/July 2013 Microelectronic Circuits Time: 3 hrs. May ss JO nswer FIVE full questions, selecting at least THREE from Part A and TWO from Part B. ° g PART-A 1 © Dene tte oqtion for ne ouput estan of « MOSFET. sna q b. For the CS-amplifier shown in Fig.Q.1(b), find Ris, Avo, th ro taken into i rout If Voge 04V ¢F-) what up gal ese? fee Ry HOKE. R= TSK, i m= 1 MAM and Fy = 150KQ. (08 Marks) i s i wae i x [Jf Matamenou onc anim tsi TE 2 © Drow he developmen ofthe 1 ot ode forthe MOSFET. sara) as b. Derive the vokage gain and o tage equations of a source follower using MOSFET. i toe Mark) FE. osian te chon ton Oot the amor pees at Ip = 04 HA an z Jhas V. = 0.7V, py Cor = 100 w AV? L = tam and i fath modulation effect, (07 Marks) $5 Ngo =m FE x Ro a Ys q ee u wee fe Nag 2-28 Hl Fig.Q.2(c) EE > @ Wha s MOSHET sang? Mention he Dents of calng sata Draygghe MOSFET constant current source cireuit and explain it. (06 Marks} Explain the operation of a MOS current steering circuit and mention it advantage. (08 Marks) tis cascade amplifier? Explain the operation of a MOS cascade amplifier. (07 Marks) Draw the high frequency-equivalemt circuit model of the MOSFET common source amplifier and explain the significance of each element, (07 Marks) Draw the three different transistor pairings and explain each configuration. (06 Marks) 1of2 BRANCHES | ALL SEMESTERS | NOTES | QUESTON PAPERS | LAB MANUALS A Vturesource Go Green initiativeSave trees use e-Question Paper Go green DOWNLOAD THIS FREE AT www.vturesource.com Sa. Explain the operation of MOS differential pair with a differential input voltage. 'b, Draw the circuit diagram of a active-loaded MOS differential pair and explain cc. What are the features of two-stage CMOS op-amp configuration? PART-B 6 a. Explain the effect of feedback on the amplifier poles. (06 Marks) b. What are the propenies of negative feedbacks? Explain in detail. 08 Marks) ¢. Draw the ideal structure for the series-series feedback amplifi (06 Marks) 7a. Explain how to minimize the temperature effect in a logarit (03 Marks) b. Draw the sample and hold circuit using op-amp and exp! (07 Marks) ¢. Design a non-inverting op-amp with 2 gain of 2. At (put voltage of 10V and the current in the voltage divider is to be 10HA. (05 Marks) 8 a, What are the reasons for choosing CMOS over bipolar tee@inglogy in digital applications? (04 Marks) b. Explain the dynamic operation of a CMOS ipyesier. (10 Marks) © Implement F=AB+CD using the AOI g (06 Marks) @ Ww 20f2 BRANCHES | ALL SEMESTERS | NOTES | QUESTON PAPERS | LAB MANUALS A Vturesource Go Green initiative