Multiple stage amplifiers

Aims:
Examine a few common 2-transistor amplifiers:
-- Differential amplifiers
-- Cascode amplifiers
-- Darlington pairs
-- current mirrors
Introduce formal methods for exactly analysing multiple stage amplifiers

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Two stage BJT amplifiers

We study them separately because they very often appear as building blocks.
There are 9 possible cascades of 2 single stage transistor amplifiers.
We will study the shaded ones.
Comments

BJT

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Name

1st Stg 2nd Stg

(voltage amp)

CE

CE

High Voltage gain

cascode

CE

CB

High bandwidth

(op-amp)

CE

CC

High Zin low Zout

(current buffer) CB

CE

Higher Zout than CB/CG

(current buffer) CB

CB

Second stage to improve on CB/CG

(Not common)

CB

CC

Not common

(Not common)

CC

CE

Instead of CE, offers higher Zin

differential amp CC

CB

High voltage gain and bandwidth

darlington

CC

High current gain

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CC

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Differential amplifier

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Half circuit (i.e. driven from one side) is CC followed by CB

Very wide frequency response
Extremely high voltage gain

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Cascode amplifier

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Wideband voltage amplifier

CE stage operates at gain=-1, minimising miller loading of input.
CB gives all the voltage gain, acting as transimpedance of value ZL
The cascode has a much higher output impedance (other than ZL) than the CE
amplifier (the common emitter Early resistance acts as series-series feedback
to the common base with loop gain =gmRCE)

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Darlington pair

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The darlington pair is a high gain power amplifier it has:

Unity voltage gain
High current gain equal to the product of the two transistor current gains
Often used as a single transistor for higher beta. But :
has high input DC voltage drop
Good frequency response due to the absence of shunt Miller feedback.
However, series Miller feedback introduces tendency for instability when
driving capacitive loads.

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Current mirrors

L6

Use one transistor with unity feedback as a transimpedance amplifier to measure

the VBE required for a given current.
Use a second transistor as transconductor to create a copy of the input current
Can make a current amplifier by using larger output transistor.
Current gain is in error due to base currents (i.e finite current gain)
No DC gain error in FET mirrors (remember the AC current gain of a FET scales as
the inverse of frequency!)
Main source of error transistor mismatch
VBE mismatch at a constant current (BJT)
VT mismatch in FET
AC analysis as in CE amplifier with extra source
admittance due to input transistor
Current mirrors are used for DC biasing multi-stage
amplifiers
Current mirrors often used load to a differential
amplifier to turn the differential amplifier into a
Simple current Mirror
differential transconductor.

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Improved current mirrors

The buffered mirror
The CC amplifier feeding the bases
reduces current gain error

The Wilson Mirror has high output Z, since output

stage is a cascode amplifier

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Scaling Mirrors: The Widlar mirror

(a)

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(b)

(c)

The Widlar scaling mirror is often used as fixed scaling current source (a)
Can be made as a buffered or a Wilson source (c)
A feedback resistor can be added on the input side turning it into a
transconductor (b)
A base resistor as shown can provide beta compensation (i.e. introduce a
zero in the frequency response (c)

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Some more mirrors

(a)

(b)

(a) Buffered Widlar mirror

(b) The gm-compensated mirror

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Current mirror as a differential amp load

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The current mirror maps the left side current

differential into the right side.
The large signal response of this circuit is
Vout=tanh(V+-V-)
This circuit (a 3 stage amplifier! Why?)
This circuit It has extremely high voltage gain: AV is
of the order of VA/Vth
This circuit is also used for mixers if a
transconductor is used in the place of the tail
current source.
There is no Miller effect on the left half circuit
If this circuit drives a current sink at the output
there is no Miller effect on the right half circuit
either!
The diff-amp has an extremely wide frequency
response. This is partly a consequence of the
resistive impedance match between the output of
the first stage (emitter of Q1)and input of the
second stage (emitter of Q2).

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Q1

Q2

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Two stage FET amplifiers

The analogy we observed between single stage BJT and FET amplifiers applies,
to two stage amplifiers. The correspondence is, as before, ES, BG, CD.
The behaviour of BJT and FET configurations is very similar, except for the
difference on the input side of the small signal equivalent circuit.
A very useful possibility opens up: Use a FET for one stage and a BJT for the
other. Mixed bipolar-FET two-stage combinations try to exploit the smaller input
admittance of FETs and the better frequency response and power handling
capability of bipolars at the same time.
This approach gives rise to the BiCMOS manufacturing technologies which
use FETs for input stages and BJTs for output stages, especially line drivers.
FET

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C o m m e n ts

N am e

1 s t S tg

2 n d S tg

(vo lta g e a m p )

CS

CS

H ig h V o lta g e g a in

cascod e

CS

CG

H ig h b a n d w id th

(o p -a m p )

CS

CD

H ig h Z in lo w Z o u t

(c u rre n t b u ffe r)

CG

CS

H ig h e r Z o u t th a n C B /C G

(c u rre n t b u ffe r)

CG

CG

S e c o n d s ta g e to im p ro ve o n C B /C G

(N o t c o m m o n )

CG

CD

N ot com m on

(N o t c o m m o n )

CD

CS

In s te a d o f C E , o ffe rs h ig h e r Z in

d iffe re n tia l a m p

CD

CG

H ig h vo l ta g e g a in a n d b a n d w id th

d a rlin g to n

CD

CD

H ig h c u rre n t g a in

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Multistage amplifiers
Multistage amplifiers are difficult to compute if the components are not unilateral.
For unilateral amplifiers things are simple. We multiply gains with appropriate
voltage dividers.
V1
V2
VL
Rs

ROUT1

RO2

A1 V1

Amp1

A2 V2

RL

Source

RIN1

Vs

RIN2

Amp2

Load

VL
1
1
1
1
, Yx =
, x {in1, in 2, L}
=
A1
A2
Vs 1 + RsYin1 1 + Rout1Yin 2 1 + Ro 2YL
Rx
For non-unilateral amplifiers:
The input impedance of each stage depends on the input impedance of the
next stage
The output impedance of each stage depends on the output impedance of
the preceding stage.
This problem has a solution but involves the solution of sets of simultaneous
quadratic equations.
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Input - output impedance of a loaded amplifier

We calculate the input impedance of a voltage amplifier driving a load ZL :

i1 = g11v1 + g12i2
i1 = g11v1 g12YL v2
v2 = g 21v1 + g 22i2

v
g
v
g
Y
v
=

2
21 1
22 L 2

i2 = v2YL

g12 v2YL = g11v1 i1

v1 1 + g 22YL
Z in = =
g
Y
v
g
v
1
+
=
i1 g11 + g YL
( 22 L ) 2 21 1

A similar calculation for the output impedance of a voltage amplifier driven by a

finite impedance Thevenin source ZS gives:

i1 = g11v1 + g12i2
i1 = g11 ( vs i1Z S ) + g12i2
v2 = g 21v1 + g 22i2

v2 = g 21 ( vs i1Z S ) + g 22i2
v1 = vs i1Z S

g 22 + g Z S
Z out = dv2 / di2 =
1 + g11Z S
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Gain of a fully loaded voltage amplifier

ZS
VS

i2

i1

v1

G11

G22
G21V1

v2

YL

G12i2

We start with the amplifier definition, plus the source-load boundary conditions:

i1 = g11v1 + g12i2
v2 = g 21v1 + g 22i2
v1 = vs i1Z s
i2 = v2YL
After some algebra we conclude that:

v2
g 21
g 21
=
=
, g = g11 g 22 g 21 g12
vs (1 + g11Z s )(1 + g 22YL ) g12 g 21Z sYL 1 + g11Z S + g 22YL + g YL Z s

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14

Cascade connection: Transmission Parameters

In a cascade connection,
V1 of network X2= V2 of network X1
I1 of network X2 = -I2 of network X1
We can define a new set of parameters so that we have a simple way to
calculate the response of cascades of amplifiers.
A suitable definition is:

v1 A B v2
i = C D i
2
1

With this definition, the ABCD parameters of a cascade of two networks are
found from the matrix product of the individual ABCD matrices ports labelled for
clarity):
3
3
1
2
1
X1

X2

v1 A1 B1 v2
i = C D i
v1 A1
1 2
1 1

=
v2 A2 B2 v3 i1 C1
i = C D i
2 3
2 2
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X3=X1X2

B1 A2
D1 C2

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B2 v3 v1 A3
=

D2 i3 i1 C3

B3 v3
D3 i3

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Transmission (or ABCD) parameters (2)

The transmission matrix elements are related to the 4 gains:

A=

v1 A B v2
i = C D i
2
1

v1
v2

i1
C=
v2

A cascade of 2 amplifiers has gains:

i2 = 0

1
G21

i2 = 0

1
=
Z 21

B=

v1
i2

i1
D=
i2

=
v2 = 0

v2 = 0

1
Y21

1
=
H 21

A B A1 B1 A2 B2 A1 A2 + B1C2 A1 B2 + B1 D2
C D = C D C D = C A + D C C B + D D

1
1 2
2
1 2
1 2
1 2
1 2
g f 1g f 2 y f 1z f 2
g f 1 y f 2 y f 1h f 2
1
1
gf =
yf =
=
=
1
1
1
1
y
z
g
g
y f 1h f 2 g f 1 y f 2

f1 f 2
f1 f 2

g f 1g f 2 y f 1z f 2
g f 1 y f 2 y f 1h f 2
zf =

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1
1
1

z f 1g f 2 hf 1z f 2

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z f 1g f 2hf 1z f 2
hf 1z f 2 z f 1g f 2

hf =

1
1
1

h f 1h f 2 z f 1 y f 2

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h f 1h f 2 z f 1 y f 2
z f 1 y f 2 h f 1h f 2

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Transmission (or ABCD) parameters (3)

v1 A B v2
i = C D i
2
1
Note the sign of i2 and also the reverse sense of signal flow. The sign is chosen so
the ABCD matrix of a cascade of two networks is just the matrix product of the
individual ABCD matrices (compare this to the messy loading calculation before!)
The reverse sense of signal flow is to keep the matrix finite if an amplifier is
unilateral.
The conversion from, say, Y to ABCD follows the same logic as the Y(H) calculation:

v1 A B v2 1 0 v1 A B 0
i = C D i Y Y v = C D Y
2 11 12 2
21
1
A B 1 Y22 1
C D = Y Y , y = Y11Y22 Y21Y12

11
21 Y

1 v1

Y22 v2

Remember that all ABCD parameters are inversely proportional to the gains. This
is the reason for formally choosing port 2 as the input port.
The intuitive choice of input at port 1 would make all parameters inversely
proportional to the reverse gains, which are small, and usually not very accurately
determined.
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Composition rules summary

For the exact calculation of circuit interconnections we can use 2-port matrix algebra:

G1

Y1

G1+G2

Y1+Y2
G2

Y2

shunt-series: add G matrices

shunt-shunt: add Y matrices

H1

Z1

H1+H2

Z1+Z2
H2

Z2

series-shunt: add H matrices

series-series: add Z matrices

X1

X2

X1X2

cascade connection: multiply ABCD matrices

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Multistage amplifiers: summary

Calculation of the response of unilateral multi-stage amplifiers is simple:
Product of gains and voltage dividers.
Calculation of the response of non-unilateral multistage amplifiers involves
determining for each stage:
the effect of source impedance on gain and output impedance
the effect of load impedance of input impedance and gain
This typically leads to a set of simultaneous quadratic equations.
A conceptually simpler analysis method involves the transmission or ABCD
parameters which allow to describe all the loading effects of a non-unilateral
cascade through a matrix product.
With the introduction of ABCD parameters we have introduced simple ways to
describe any connection between 2-port circuits.

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