Solutionmanual8051microcontrollerbymazidi 131215070701 Phpapp02

Microcontroller Solutions
Chapter 2
Section 2.1:1. 8 bit
2. 8 bit
3. 8 bit
4. PSW (Program Status Word) is of 16 bit.
5. Necessary (for literal value).
6. 28H and it is kept in accumulator.
7. (a),(d),(g) are illegal and for f only 0 is required before F5H
8. (c),(d) are illegal.
9. 44H and kept in Accumulator (A).
10.1EH and kept in Accumulator (A).
Section 2.4
21.0000H
22.Program counter will look for the location 0000H and if the program is not
starting for that address, it will consider that there is no program written so
program has to start from the location 0000H.
26.Lowest Memory is 0000H and the Highest memory is FFFFH.
From Ali Akbar Siddiqui.
Sir Syed University of Eng& Tech
Section 2.5:29.Solved below,

(Data)
E
A
R
T
H
(Locations)
200
201
202
203
204
9
8
7
6
5
205
206
207
208
209
20A
Section 2.6:31.8 bit

32.And 33.
D7
D6
CY
AC
D5
F0
D4
RS1
D3
RS0
D2
OV
D1
--
D0
P
34.We know that in 8051 registers are of 8 bits CY Flag is raised when the carry
is generated beyond past the max value that a register can store like FFH +
1.
35.AC is raised when a carry is generated from D3 to D4. Like
Mov a,#0FH
Add a,#1
36.CLR C ;CY=0
CPL C; CY
37.G
a. CY=1
b. CY=0
c. CY=0
38.ORG 0000H
MOV A,#55H
ADD A,#55H
ADD A,#55H
ADD A,#55H
ADD A,#55H
END
39.RS0 and RS1.
40.On Startup Stack Location is 07H.
42.24 Bytes.
43.Register Bank 0
44.Register Bank 0 from 00H to 07H.
Register Bank 1 from 08H to 0FH.
Register Bank 2 from 10H to 17H.
Register Bank 3 from 18H to 1FH.
45.(a) 04H (b) 00H (c) 07H (d) 05H
48.
INSTRUCTIONS
PUSH 0
PUSH3
PUSH 7
POP 3
POP 7
POP 0
STACK Pointer
before
execution.
07H
08H
09H
0AH
09H
08H
Stack pointer
after
execution.
08H
09H
0AH
09H
08H
07H
STACK
66H
7FH
5DH
49.NO.
POP 7
POP 3
POP 0
REST OF THE PROGRAM WILL REMAIN THE SAME.
50.After execution of ( Mov SP,#70H ), Stack Pointer location has now become
70H instead of 07H.
INSTRUCTIONS
Push 5
Push 2
Push 7
Pop 7
Pop 2
Pop 5
STACK Pointer
before
execution.
70H
71H
72H
73H
72H
71H
Stack pointer
after execution.
STACK
71H
72H
73H
72H
71H
70H
66H
7FH
5DH
Chapter 3:Section 3.1:12.MOV R1,#100
HERE1:MOV R2,#10
HERE:DJNZ R2,HERE
DJNZ R1,HERE1
13.MOV R1,#100
HERE2MOV R2,#100
HERE1:MOV R3,#10
HERE:DJNZ R3,HERE
DJNZ R2,HERE1
DJNZ R1,HERE2
14.Multiplication is taking place so,
200*100=20,000 (times).
15.
16.
-128 Bytes
127 Bytes
Section 3.2:17.
18.
19.
20.
21.
22.
3 byte
2 byte
2 bytes
64Kb
2 bytes
1 byte
23.Thats because Stack works on the concept of LIFO so if the push is implied
2 times for instance, then pop must be used 2 times exactly.
Section 3.3:27.
T = 1.2usec
F = 1/T = 833.333KHz
System frequency = 833.333KHz*12 = 10MHz
28.
F = 18MHz
F =18MHZ/12 =1.5MHz
T = 1/F =1/1.5MHz
T = 0.666usec
29.
F = 12MHz
F =12MHZ/12 =1MHz
T = 1/F =1/1.5MHz
T = 1usec
30.
F = 25MHz
F =25MHZ/12 = 2.08MHz
T = 1/F =1/2.08MHz
T = 0.48usec
32.
F = 11.0592MHz
F =11.0592MHZ/12 = 921.6KHz
T = 1/F = 1/921.6KHZ
T = 1.085usec
DELAY:MOV R3,#150
1 machine cycle
HERE:NOP
1 mc
NOP
1
NOP
1
DJNZ R3,HERE
2 mc
RET
2
The time delay of the HERE loop is [150(2+1+1+1)]*1.085usec=0.813msec
Now for the instruction outside the loop (mov and ret),
(2+1)*1.085Usec = 3.25usec
Now 0.813ms + 3.25usec = 0.8162msec
33.
F = 16MHz
F =16MHZ/12 = 1.33333MHz
T = 1/F = 1/1.33333MHZ
T = 0.75usec
DELAY:MOV R3,#200
1
HERE:NOP
1
NOP
1
NOP
1
DJNZ R3,HERE
2
RET
2
The time delay of the HERE loop is [200(2+1+1+1)]*0.75usec=0.75msec
Now for the instruction outside the loop (mov and ret),
(2+1)*0.75usec = 2.25usec
Now 0.75ms + 2.25usec = 0.75225msec
34.
F = 11.0592MHz
F =11.0592MHZ/12 = 921.6KHz
T = 1/F = 1/921.6KHZ
T = 1.085usec
DELAY:MOV R5,#100
1
BACK: MOV R2,#200
1
AGAIN:MOV R3,#250 1
HERE:NOP
1
NOP
1
DJNZ R3,HERE
2
DJNZ R3,AGAIN
2
DJNZ R3,BACK 2
RET
2
The time delay of the HERE loop is [250(2+1)]*1.085usec=1.085msec
The time delay of the AGAIN loop it repeats 200 times so ,
1.085msec*200 = 0.217 + (3*200*1.085usec) = 0.2176s
The time delay of the BACK loop, it is repeated 100 times so
0.2176*100=21.76sec
Time Delay = 21.76sec
35.Try it yourself its just like 34 with only 2 loops instead of 3 loope.
36. To 39.
For the problems from 36 to 39 everything remains the same except the
time delay that is changed due to the change of Microcontroller now you
must take Clock of DS89C420/30 Microcontroller i.e equal to 1 rather
than 12 that was for 8051.
40.Yes it is 12 times faster because it only have 1 clock and on the other hand
8051 have 12 clocks so if we decrease the clocks our microcontroller
becomes faster.
Chapter 4:Section 4.1:1. 40
TH
TH
2. VCC 40 PIN And GND9

3. 32 Pins
4. 8 Pins and from 32 to 39.
8. Input
9. P0 (Port 0)
10.P1 (Port 1)
PIN
11.ORG 000H
MOV P1,#0FFH; MAKE IT AN INPUT PORT
MOV A,P1
MOV P2,A
MOV P0,A
MOV
P3,A END
12.ORG 000H
MOV P2,#0FFH; MAKE IT AN INPUT PORT
MOV A,P2
MOV P1,A
MOV
P0,A END
13.P3.0 AND P3.1
14.0000H is the address upon reset.
15.
(A) ORG 0000H
BACK:MOV
A,#0AAH MOV P1,A
MOV P2,A
CALL DELAY
MOV A,#55H
MOV P1,A
MOV P2,A
SJMP BACK
(B) ORG 0000H
MOV A,#0AAH
BACK:MOV
P1,A MOV P2,A
CALL DELAY
CPL A MOV
P1,A MOV
P2,A SJMP
BACK
Section 4.2:16.All ports are bit addressable.

17.The advantages for Bit addressable mode is that u con manipulate aa single
bit without disturbing and other bits of the port by using Setb and Clr.
18.Setb P1.X OrClr P1.X where X can vary from 0 to 7.
19.No , a whole port cannot be complemented at a time.
20.ORG 0000H
SETB P1.2
SETB P1.5
BACK:CALL DELAY
CPL P1.2
CPL P1.5
SJMP BACK
END
21.ORG 0000H
SETB P2.5
SETB P1.7
SETB P1.3
BACK:CALL DELAY
CPL P1.3
CPL P1.7
CPL P2.5
SJMP BACK
END
22.ORG 0000H
SETB P1.3
BACK:JB P1.3,HERE
SJMP BACK
HERE:MOV A,#55H
MOV P2,A
END
23.ORG 0000H
SETB P2.7
BACK:JNB P2.7,HERE
SJMP BACK
HERE:MOVA,#55H
MOV P0,A
CALL DELAY
MOC A,#0AAH
MOV P0,A
SJMP HERE
END
24.ORG 0000H
SETB P2.0
JNB P2.0,HERE
MOV A,#99H
MOV PI,A
SJMP BACK
HERE:MOV A,#66H
MOV P1,A
BACK:
END
25.ORG 0000H
SETB P1.5
AGAIN:JB P1.5,HERE
SJMP AGAIN
HERE:CLR PI.3
CALL DELAY
SETB P1.3
CALL DELAY
CLR P1.3
END
26.ORG 0000H
BACK:MOV C,P1.3 ;C IS FOR CARRY FLAG.
MOV P1,4,C
SJMP BACK
END
27.
TH
Bit
28.ORG 0000H
BACK:MOV C,P1.7
MOV P1.0,C MOV
C,P1.6 MOV
P1.7,C SJMP BACK
Chapter 5:Section 5.1 and 5,2:3. See on page 123 Figure 5-1, and on page 124 figure 5-2.
4. Register bank 1 , 2 , 3 share the space with stack because by default stack
starts from 07H and after increment data is stored in 08H on the other hand
Register bank 1 address starts from 08H as well see page 123 fig 5-1.
6. It copies the contents of the location 0F0H into the accumulator rather than
the value 0F0H.
7. Same as question nos 6.
8. ORG 0000H
MOV R0,#50H
MOV R1,#40H
MOV R3,#30H
PUSH 00H
PUSH 01H
PUSH 03H
POP 1DH POP
1EH
POP 1FH
END
9. Registers R0 and R1.
10.ORG 0000H
MOV A,#0FFH
MOV R7,#32
MOV R0,#50H
NAME:MOV @R0,A
INC R0
CALL DELAY
DJNZ R7,NAME
11.ORG 0000H
MOV DPTR,#400H
MOV R7,#10
MOV R0,#30H
HERE:CLR A
MOVC A,@A+DPTR
CALL DELAY
INC DPTR
MOV @R0,A
INC R0
DJNZ R7,HERE
BACK:SJMP BACK
END
12.ORG 0000
MOV P1,#0FFH
MOV A,P1
MOV R0,A ; R0=x
MOV B,R0 ; B=x
MUL AB ; MULTIPLY A WITH B ANSWER STORE IN A=x*x
DA A
MOV R1,A ;R1=x*x Or x^2
MOV A,R0 ;A=x
MOV B,#2 ; B=2
MUL AB ; A=2*x
DA A
MOV R7,#5
ADD A,R1 ; A=x^2 + 2*x
DA A
ADD A,R7 ;A=x^2 + 2*x + 5
END
13.ORG 0000H
LJMP MAIN
ORG 20H
MYDATA: DB 06,09,02,05,07
ORG 300H
Main:MOV R0,#30H
MOV DPTR,#MYDATA
MOV R7,#5
HERE:CLR A
MOVC A,@A+DPTR
CALL DELAY
INC DPTR
PUSH 0E0H; Push the Accumulator into stack
DJNZ R7,HERE
POP 01
POP 02
POP 03
POP 04
POP 0E0H
ADD A,R1
ADD A R2
ADD A,R3
ADD A,R4; A Holds the added data.
MOV @R0,A
END
Section 5.3:14.INVALID
15.VALID
16.VALID
17.All ports are bit addressable.
18.See for answer on page124 figure 5-2.
19. (b),(c),(d),((f),(g),(h) are valid.
20.ORG 0000H
AGAIN:SETB
P1.5 CALL DELAY
CALL DELAY
CALL DELAY
CLR P1.5
CALL DELAY
SJMP AGAIN
DELAY:MOV R1,#240
HERE:DHNZ R1,HERE
RET
END
21.ORG 0000H
AGAIN:SETB P2.7
CALL DELAY
CALL DELAY
CALL DELAY
CALL DELAY
CLR P2.7
CALL DELAY
SJMP AGAIN
DELAY:MOV R1,#240
HERE:DJNZ R1,HERE
RET
END
22.ORG 0000H
SETB P1.4
HERE:JNB P1.4,HERE
CMD:SETB P2,7
CALL DELAY
CLR P2.7
CALL DELAY
SJMP CMD
DELAY:MOV R1,#240
HERE:DJNZ R1,HERE
RET
END
23.ORG 0000H
SETB P2.1
HERE:JB P1.4,HERE
MOV P0,#55H
SJMP $
END
24.80H TO 87H
25.90H TO 97H
26.A0H TO A7H
27.B0H TO B7H
28.Not bit addressable register.
29.88H TO 8FH
30.E0H TO E7H
31.F0H TO F7H
32.D0H TO D7H
33.(a) P0 (b)87H (c)TCON (d)TCON (e)P1H (f)P2 (g)P2 (h)P3 (i)PSW (j)PSW (K)B
34.ORG 0000H
SETB RS1; FOR SELECTING REGISTER BANK 2
SETB RS0;FOR SELECTING REGISTER BANK 2
MOV R3,A
MOV
R5,B END
35.CLR 0D7H
37.See example 5-14.
38.To check the carry flag there are instructions namely JC and JNC.
39. And 40 see example 5-14.
41.CY0D7H
P0D0H
AC0D6H
OV0D2H
42.For this question see page 124 fig 5-2.
46.For this question see page 123 fir 5-1.
47.(a)20H (b)28H (c)18H (d)2DH (e)53H (f)15H (g)2CH (h)2AH (i)14H
(j)37H (k)7FH
50.MOV 04,C
51.MOV 16H,0D6H ; Auxiliary carry
52.MOV 12H,0D0H
53.ORG 0000H
JB ACC.0,HERE
SJMP AGAIN
HERE :JB ACC.1,HERE1
SJMP AGAIN
HERE1:MOV B,#4
DIV AB
AGAIN:
END
54.ORG 0000H
JB ACC.7,LCD_DISPLAY
SJMP NACK
LCD_DISPLAY:
NACK:
END
55.ORG 0000H
JB 0F7H,HERE
SJMP NACK
LCD_DISPLAY:
NACK:
END
56.
(A)ORG 0000H
MOV R0,#24H; PROGRAM IS DONE WITH THE HELP OF FIG 51. MOV A,#0FFH
MOV @R0,A
MOV R0,#25H
MOV A,#0FFH
MOV
@R0,A END
(B)ORG
0000H SETB
20H SETB 21H
SETB 22H
SETB 23H
SETB 24H
SETB 25H
SETB 26H
SETB 27H
SETB 28H
SETB 29H
SETB 2AH
SETB 2BH
SETB 2CH
SETB 2DH
SETB 2EH
SETB 2FH END
57.ORG 0000H
MOV B,#8
DIV AB
CJNE B,#00,HERE
SJMP FIN
HERE:MOV R0,A
FIN:
END
58.ORG 0000H
MOV R1,#8
BACK:MOV A,R2
RRC A; Rotate Right through carry means instead of 8 bit rotation it
JC HERE ;include carry flag as an MSB(most significant bit).
INC R0
HERE:DJNZ R1,BACK
END
Section 5.4:67.ORG 0000G

MOV A,#55H
MOV R0,#0C0H
MOV R7,#16
HERE:MOV @RO,A
INC R0
CALL DELAY
DJNZ R7,HERE
END
68.ORG 0000H
MOV R7,#16
MOV R1,#60H
MOV R0,#0D0H
HERE:MOV A,@R1
INC R1
MOV @R0,A
INC R0
CALL DELAY
DJNZ R7,HERE
END
Chapter 6:Section 6.1:1. (a) AC=1 (b)AC=1
(c)AC=1
(e)AC=1
Cy= 0
CY=0
CY=1
CY=1
2. Already been done in the lab, see your lab files.
3. ORG 0000H
MOV DPTR,#MYDATA
MOV R7,#9
MOV R2,#00H
MOV R3,#00H
BACK:CLR A MOVC
A,@A+DPTR MOV
R3,A
PUSH 03
INC DPTR
DJNZ R7,BACK
MOV R7,#9
CLR A
AGAIN:POP
00 ADD A,R0
JNC HERE1
INC R2
HERE1:DJNZ
R7,AGAIN MOV R3,A
SJMP $
ORG 250H
MYDATA: DB 53,94,56,92,74,65,43,23,83
END
4. Just use DA( Decimal Adjust instruction in question 3)
5. (a) AND (b)
ORG 0000H
MOV R0,#40H
MOV R7,#16
MOV A,#55H
HERE:MOV @R0,A
INC R0
DJNZ R7,HERE
MOV R7,#16
MOV R1,#60H
MOV R0,#40H
CLR A
BACK:ADD A,@R0
JNC HERE1
INC @R1
HERE1:INC R0
DJNZ R7,BACK
MOV R0,#61H
MOV @R0,A
SJMP $
END
9. ORG 0000H
MOV R4,#00H
MOV A,#48H
MOV R0,#9AH
ADD A,R0
MOV R7,A
MOV A,#0BCH
MOV R0,#7FH
ADDC A,R0 ;ADC is add with carry, if by adding A and R0
MOV R6,A ;Carry generates .What will it do , it will add both A and R0 With
MOV A,#34H;the Upside to it, it will also add the carry flag if it generates.
MOV R0,#89H
ADDC A,R0
MOV R5,A
JNC HERE
INC R4
HERE:MOV R0,#40H
MOV A,R4
MOV @R0,A
INC R0
MOV A,R5
MOV @R0,A
INC R0
MOV A,R6
MOV @R0,A
INC R0
MOV A,R7
MOV @R0,A
END
Here R5=BE,R6=3BH,R7=E2.The and is BE3BE2H.
12.ORG 0000H
mov a,#77
mov b,#34
mulab
end
13.ORG 0000H
mov a,#77
mov b,#3
divab
end
14.No, Only on A and B.
15.ORG 0000H
MOV DPTR,#MYDATA
MOV R0,#30H
CALL TRANSFER
CALL ADDITION
CALL AVERAGE
LJMP FIN
TRANSFER:
MOV R7,#9
HERE:
CLR A
MOVC A,@A+DPTR
MOV @R0,A
INC DPTR
INC R0
DJNZ R7,HERE
RET
ADDITION:
MOV R7,#9
MOV R0,#30H
CLR A
HERE1:
ADD A,@R0
INC R0
DJNZ R7,HERE1
RET
AVERAGE:
MOV B,#9
DIV AB
MOV R7,A
RET
ORG 250H
MYDATA: DB 3,9,6,9,7,6,4,2,8
FIN:
END
Section 6.3:23.(a) A=40h (b)A=F6H (c)A=86H

Rest do it yourself just use Keil write instruction and see the result
in project window.
24.Just as in Question no 23 write those instruction in Kiel and view the result
of accumulator in Project window.
27.There is no such instruction like CJE.
28.In this question you must monitor the status of the carry flag after the
execution of CJNE. Write a program below and check the status of the carry
flag in the PSW resister.
(a) ORG 0000H

BACK:MOV A,#25H ;Here the carry flag will go high.Always remember
CJNE A,#44H,over ; that carry will only go high when the value of source
SJMP BACK
; of CJNE instruction is greater than its destination.
OVER:
END ;
(b)
ORG 0000H
back:mov a,#0ffh ;Here carry flag will not go high as the value of the
cjne a,#6fh,over ;destination is greater than that of the source. sjmp
back
over:
end
Rest of the parts of question 28 now you can do them on your own.
30.(a)MOV A,#56H
SWAP A; What swap do is swap the upper and lower nibble now A
becomes ; A=65H
RR A
RR A
(C)CLR C
MOV A,#4DH ; A=0100 1101B
SWAP A; A=D4 OR A= 1101 0100B
RRC A ;9 BIT ROTATION, A= 0 0110 1010B. You can see the zero before
;8-bit that is the carry bit that you included through RRC instructin. RRC
A ; A= 0 0011 0101b
RRC A ; A= 1 0001 1010b
32.ORG 0000H
MOV P1,#0FFH
MOV R7,#8
MOV A,P1
AGAIN:RRC A
JC HERE
INC R0
HERE:DJNZ
R7,AGAIN END
33.ORG 0000H
MOV R7,#8
MOV A,#68H
AGAIN:RRC A
JC HERE
INC R0
HERE:DJNZ
R7,AGAIN END
34.ORG 0000H
MOV R7,#8
MOV A,#68H
AGAIN:RLC A
JC HERE
INC R0
HERE:DJNZ R7,AGAIN
END
40.ORG 0000H
MOV R7,#9
MOV P1,#0FFH
AGAIN1:MOV A,P1
ANL A,#0FH
ORL A,#30H
MOV R1,A
MOV R4,#34H
HERE:CJNE A,#30H,HERE1
SJMP BACK
HERE1:CJNE A,#31H,HERE2
SJMP BACK
SJMP BACK
SJMP BACK
SJMP BACK
SJMP BACK
SJMP BACK
SJMP BACK
SJMP BACK
SJMP BACK
HERE10:ANL A,#0FH
ADD A,#37H
CJNE A,#41H,HERE11
SJMP BACK
SJMP BACK
SJMP BACK
SJMP BACK
SJMP BACK
HERE15:CJNE A,#46H,AGAIN1
BACK:
MOV P2,A
SJMP $
END
43.This program is same as the check-sum program, right next to 6-36
example. The only difference is here you have to find the checksum byte of
a whole sentence and in the program you had to find the check sum of HEX
values. I point out the difference that has to make for this program the rest
of the program will remain the same,
-----------------------------------------------------DATA_ADDR EQU 400H
COUNT
EQU 31 ; Nos of characters in the whole sentence.
RAM_ADDR EQU 20H
ORG 0000H
CALL COPY_DATA
CALL CAL_CHKSUM
CALL TEST_CHKSUM
COPY_DATA: --- ;THERE SUBROUTINES ARE PRESENTIS THE BOOK Pg 172.
--------------------------------------RET
CAL_CHKSUM:------------------------------------------RET
TEST_CHKSUM:--------------------------------------------RET
ORG 400H
MYBYTE: DB Hello, my fellow World citizens
END
46.ORG 0000H
MOV R7,#9
MOV P1,#0FFH
AGAIN1:MOV A,P1
ANL A,#0FH
ORL A,#30H
MOV R1,A
MOV R4,#34H
HERE:CJNE A,#30H,HERE1
SJMP BACK
SJMP BACK
SJMP BACK
SJMP BACK
SJMP BACK
SJMP BACK
SJMP BACK
SJMP BACK
SJMP BACK
HERE9:CJNE A,#39H,AGAIN1
BACK:
MOV P2,A
SJMP $
END
Chapter 9:1.
2.
3.
4.
5.
6.
7.
2 timers
16 bit, Timer 0 and Timer 1.
TH0 AND TL0.
TH1 AND TL1.
NO,These register are not bit addressable.
8 bit
TMOD is used to initialize the Timer0 or Timer1 and also Mode of timer to
which we have to use.it also let us to select that weather we have to use
Timer or Counter.
8. No
9. Use the Figure 9-3 of TMOD register.
Gate
C/T
M1
M0
Gate
C/T
M1
M0
0
1
1
0
0
1
1
0
10.Just Divide the XTAL values with 12 for frequencies and for the time period
take the inverse of frequence.
11.(a)13 bit (b)16 bit
(c)8 bit
12.(a)Mode 08192 in decimal you can find out by 2^(13)=8192, that is
because our Mode is of 13 bit and 2000H
(b)Mode 165536 in decimal 2^(16)=65536, it is 16 bit and HEX Value is
FFFFH.
(c)Mode 2256 in decimal 2^(8)-256, it is 8 bit and HEX value i

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Microcontroller Solutions

Sir Syed University of Eng& Tech

Section 2.5:29.Solved below,

Section 2.6:31.8 bit

2. VCC 40 PIN And GND9

Section 4.2:16.All ports are bit addressable.

Section 5.4:67.ORG 0000G

Section 6.3:23.(a) A=40h (b)A=F6H (c)A=86H

(a) ORG 0000H

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