MSP430 Teaching Materials

UBI

1

Texas Instruments Incorporated
University of Beira Interior (PT)
Pedro Dinis Gaspar, Antnio Esprito Santo, Bruno Ribeiro, Humberto Santos
University of Beira Interior, Electromechanical Engineering Department
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UBI

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 (1/5)
UBI

,
;
: ,

:
;
;
.

.
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 (2/5)
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: :

2
1.8
1.6
1.4

x (t)

1.2
1

0.8
0.6
0.4
0.2
0

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0.1

0.2

0.3

0.4
t

0.5

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0.6

0.7

0.8

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: :

() , , T:
2
1.8
1.6
1.4

x (n )

1.2
1

0.8
0.6
0.4
0.2
0

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10

20

30

40
n

50

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70

80

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:

.

:
.

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: :
, 12-bit
(Analogue-to-Digital Converter -ADC)
(full-scale) 2.5 V.
3500
3000
2500

x [n ]

2000
1500
1000
500
0

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10

20

30

40

50

n
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Instruments
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70

80

 (1/6)
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.


(pins),
.

, :

;
;
;
,

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 (2/6)
UBI

:

.
:

.. 0 70 C
,
.


(, , )

.

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 (3/6)
UBI

MSP430:

/
;

, 2 = P6.3/A3;
6 / bit 3;
3 .

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 (4/6)
UBI

MSP430 :

.
:
MSP430F44x :

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 (5/6)
UBI

MSP430:
:
MSP430F44x: SELMx;

: (4 1 ):
SELMx = 00:
1
SELMx = 01:
2 ..
SELMx 2-bit: SELM1 (MSB), SELM0
(LSB).
,
:
SELMx FLL_CTL1 .
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12

 Datasheets (6/6)
UBI

(Users Guide) MSP430 :

SELMx 3 4 bit FLL_CTL1
.

Bit
6

4-3

Description
SMCLKOFF

XT2OFF

SELMx

Disable the submain clock signal (SMCLK):

SMCLKOFF = 0

SMCLKOFF = 1

SMCLK active
SMCLK inactive

Disable the second crystal oscillator (XT2):

XT2OFF = 0

XT2OFF = 1

XT2 active
XT2 inactive

Select the master clock (MCLK) source:

SELM1 SELM0 = 0 0

SELM1 SELM0 = 0 1

SELM1 SELM0 = 1 0

SELM1 SELM0 = 1 1

DCO
DCO
XT2
LFXT1

SELS

Select the submain clock (SMCLK) source:

SELS = 0

DCO
SELS = 1

XT2

1-0

FLL_DIVx

Select the auxiliary clock (ACLK) signal divider:

FLL_DIV_0 = 0 0

Divider
FLL_DIV_1 = 0 1

Divider
FLL_DIV_2 = 1 0

Divider
FLL_DIV_3 = 1 1

Divider

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factor:
factor:
factor:
factor:

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/1
/2
/4
/8

13

 (1/14)
UBI

C:
C
C

,
,
CPU

.
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14

 (2/14)
UBI

:

,

,
, ,

. , ,

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 (3/14)
UBI

: :

: :
.. Line AverageVelocity.

:
:
line, averageVelocity.

(
, )

(
)

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16

 (4/14)
UBI

: :

:
i, j, k.

: :
RED, GREEN, BLUE, WHITE.

:
:
calculateVelocity( ) or activateOutput( ).

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17

 (5/14)
UBI

:

:
:
P3OUT |= 0x04;
while(1){
if(!CMBufIsEmpty()){//polling the command receiver buffer
cmd = CMGetCommand();
//get the new command
ACStop();
//stops the action being executed
switch (cmd){
case DEMO1:
//demo1 procedure
...

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 (6/14)
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, , .

Example:
a = (4 + c) * 2;

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// : a=(4+c)*2

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 (7/14)
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: ( // )

: ( /* ) ( */ )

:
/* The source code should be written in such a way
that enough information is provided for the reader
to fully understand the function of the code */

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 (8/14)
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(integer)
(real)

null (void)

Integer
(int), (signed) (unsigned)

( twos
complement) ( unsigned-
)

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 (9/14)
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(float),
.

:
short:

long:

signed:
;
unsigned:
.

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 (10/14)
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C (
C : CCE IAR
MSP430):

[bits]

signed char

char, unsigned char

ASCII

-128

127

ASCII

255

short, signed short

16

2s complement

-32768

32767

unsigned short

16

Binary

65535

int, signed int

16

2s complement

-32768

32767

unsigned int

16

Binary

65535

long, signed long

32

2s complement

-2147483648

2147483647

unsigned long

32

Binary

4294967295

float

32

IEEE 32-bit

1.175495e-38

3.40282346e+38

double

32

IEEE 32-bit

1.175495e-38

3.40282346e+38

long double

32

IEEE 32-bit

1.175495e-38

3.40282346e+38

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 (11/14)
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(Global) :

(Local) :

,

.

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 (12/14)
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:
31
, , '_'

'_'
-case sensitive


.

:
unsigned int weight;
int temperature;
float speed,

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// unsigned integer variable

// signed integer variable
// real variable

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 (13/14)
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const:
(
)
.

extern:
,
.

register:

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 (14/14)
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static:

;
,
;

.

volatile:

,
ADC;

.

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 (1/9)
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 (2/9)
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 (3/9)
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 (4/9)
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x += y

x=x+y

x -= y

x=x-y

x *= y

x=x*y

x /= y

x=x/y

x %= y

x=x%y

x &= y

x=x&y

x |= y

x=x|y

x ^= y

x=x^y

x << y

x = x << y

x >> y

x = x >> y

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 (5/9)
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() [] ->

Grouping, scope, array/member access

Size of type cast (most) unary operations,

! ~ + - &

Multiplication, division, modulo

* / %

Addition, subtraction

+ -

Bitwise shift left and right

<< >>

Comparisons: less-than, ...

< <= > >=

Comparisons: equal and not equal

== !=
&

Bitwise AND

Bitwise exclusive OR

Bitwise inclusive (normal) OR

&&

Logical AND

||

Logical OR

?
= += -= *= /= %= &= |= ^= <<=
>>=

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Conditional expression (ternary operator)

Assignment operators
Concatenation ("comma)

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 (6/9)
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 (7/9)
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:

( assembler
);

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( -carry):
,
;

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 (8/9)
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: ( << )

: x = y << 2

: x = y << 1

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 (9/9)
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: ( carry)

,
;

: ( >> )

: x = y >> 1;
y x.

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36


(1/2)

UBI

C:

(
CPU
RAM)

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unsigned

static const

, ,

for
.
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(2/2)

UBI

interrupts ;

.

.

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 (1/7)
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1. :
(a) ;
(b) - ;
(c) ;
(d) .

2. :
(a)
;
(b)
(c) ;
(d) .
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39

 (2/7)
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3.
(unsigned)
8- :
(a) 256;
(b) 255;
(c) 16;
(d) 128.
4.
:
(a) Unsigned binary;
(b) Twos complement;
(c) ;
(d) .
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40

 (3/7)
UBI

5. :
0111 0101 1011 :
(a) 0x75B , -188310;
(b) 0x8A4 , -188310;
(c) 0x8A4 , 188310;
(d) 0x75B , 188310.
6. Ones
Twos complement :
(a) Ones complement +0 -0;
(b) MSB ;
(c) LSB ;
(d) Twos complement
.
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41

 (4/7)
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7. Twos complement , 1 MSB

:
(a) ;
(b) ;
(c) ;
(d) Carry.

8. 11012 Twos complement :

(a) -5;
(b) -13;
(c) 3;
(d) -3.

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42

 (5/7)
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9. 1100.0112 unsigned binary

:
(a) -4.375;
(b) 12.375;
(c) 4.375;
(d) -12.375.
10.
-
:
(a) 0111 11112 + 0000 00102;
(b) 1000 00002 + 1000 00002;
(c) 0111 11112 + 1000 00002;
(d) .
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43

 (6/7)
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11.
36 :
(a) 0xDC;
(b) 0x24;
(c) 0xDB;
(d) 0x23.
12. -signed
:
(a) LSB;
(b) MSB;
(c)

(d)
.
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44

 (7/7)
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:
1. (c) .
2. (a)

3. (b) 255.
4. (b) Twos complement.
5. (d) 0x75Bh , 188310.
6. (d) Ones complement +0
-0.
7. (b) .
8. (d) -3.
9. (b) 12.375.
10. (b) 1000 0000 + 1000 0000.
11. (a) 0xDC.
12. (c)
.
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