Tham Khao Baigiang - Pic

Trng i hc Cng nghip Tp.
H Ch Minh
Khoa Cng ngh in t
B mn in t Cng nghip
Bi ging Vi x l
Lu hnh ni b
2
Mc lc
Chng 1: Gii thiu chung v h vi x l. Gii thiu chung v vi iu khin PIC
Chng 2: Gii thiu phn cng ca PIC 16F84 v PIC 16F877A
Chng 3: Tp lnh ca PIC 16F877A
Chng 4: Vo ra. Hot ng ca b nh thi . Lp trnh vi iu khin PIC 16F84 v
PIC 16F877A.
Chng 5: Truyn thng ni tip USART
Chng 6: Ngt
Chng 7: B chuyn i tng t sang s (ADC).
Chng 8: B nh d liu EEPROM, PWM, SPI/I2C.
Chng 9: Thit k h vi x l v h pht trin vi iu khin.
Bi ging s 1: Gii thiu chung v h vi x l . Gii thiu chung v vi iu khin

PIC ( S tit: 5)
I.
n nh lp:
.
II.
Kim tra bi c:
..
..
..
III.
Tn bi ging: Gii thiu chung v h vi x l. Gii thiu chung v vi
iu khin PIC
III.1. Mc tiu:
-Gii thiu h m. Lch s pht trin ca cc b vi x l. Cu trc v chc nng
hot ng ca h vi x l. Chc nng v cc thnh phn bn trong ca h vi x l.
Gii thiu vi iu khin. Cc h vi x l thong dng.
-Gii thiu vi iu khin PIC: b nh chng trnh, xung ng h vi iu khin, h
thng vi iu khin. c tnh ca vi iu khin. Cc loi vi iu khin. S dng vi
iu khin: phn cng vi iu khin v lp trnh vi iu khin.
III.2. dung v phng tin dy hc:
-Phn trng, khn, bng, bt long, micro c dy(hay khng dy), my tnh, v n
chiu (hay my chiu).
III.3. Gio trnh v ti liu tham kho:
Gio trnh Vi x l ca trng i hc cng nghip Tp. HCM.
D.W. Smith, PIC in practice: a project-based approach, Elsevier, 2nd edition, 2006.
Trng Trc, Chip n 16C84 v ng dng ca chng.
H Trung M, Vi x l, NXB HQG Tp. HCM, 2003.
Ti liu v vi iu khin PIC ca b mn in t cng nghip.
Website: http://www.microchip.com/
http://www.alldatasheet.com/
Myke Predko, Programming and customizing the PIC microcontroller, 3rd edition,
Tab Electronics, McGrawHill, 2008(Ebook).
Douglass V.Hall, Microprocessors and interfacing: Programming and Hardware, 2nd
ed., Macmillan/McGraw-Hill, 1992.
III.4.Ni dung bi ging:
Ni dung chi tit : xem bi ging chi tit.
Phng php ging dy: thuyt trnh, nu vn v m thoi trao i vi sinh
vin.
Chng 1: Gii thiu chung v h vi x l. Gii thiu chung v vi iu khin PIC.
1.1. H nh phn, h thp phn v h thp lc phn.
H nh phn dung c s 2, dung hai s 0 v 1 biu din.
Th d: 01001010=0x27+1x26+0x25+0x24+1x23+0x22+1x21+0x20=64+8+2=74
H thp phn, c s l 10 dng cc s 0, 1, 2, 3, 4, 5, 6, 7, 8, 9 biu din.
Th d: 125=1x102+2x101+5x100=100+20+5.
H thp lc phn, c s l 16 dng cc s 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, A, B, C, D, E, F.
Th d: 32H=3x161+2x160=48+2=50.
Bng chuyn i gia s nh phn, thp phn v thp lc phn:

H nh phn (8 ch s)
H thp phn (3 ch s)
H thp lc phn (2 ch s)
00000000
000
00h
00000001
001
01h
00000010
002
02h
00000011
003
03h
00000100
004
04h
00000101
005
05h
00000110
006
06h
00000111
007
07h
00001000
008
08h
00001001
009
09h
00001010
010
0Ah
00001011
011
0Bh
00001100
012
0Ch
00001101
013
0Dh
00001110
014
0Eh
00001111
015
0Fh
1.2. Lch s pht trin ca k thut vi x l.
1.2.1.Ho vi mach so va cong nghe :
IC da theo so transistor hoac cac cong thng c chia lam :
-SSI : tch hp c nho
-MSI: tch hp c trung bnh
-LSI: tch hp c ln
-VLSI: tch hp c rat ln
-ULSI: tch hp c cc ln
V du : MSI nh counter, multiplexer,
LSI nh cac vi x ly 8 bit : 8085, Z80
VLSI nh cac vi x ly 16 bit , 32 bit: 80386
Gii thieu cong nghe san xuat chip :
Ve cong nghe co cac cong nghe che tao vi mach sau :
MOS :
- NMOS HMOS
- PMOS
- CMOS HCMOS
Vi H : high-performance
TTL, IIL (integrated injection logic) thuoc Bipolar
Trong o cong nghe MOS thng c a chuong do tch hp c nhieu, tiet
kiem nang lng
5
1.2.2. T MAY TNH LN EN MAY VI TNH:
a.May tnh ln :
La loai may tnh c thiet ke e giai cac bai toan ln vi toc o rat nhanh
-No lam viec vi so lieu co o dai t 64 bit hoac hn va c trang b bo nh rat
ln, v vay kch thc ln.
-Chung thng c dung e ieu khien cac he thong thiet b dung trong quan s
hoac cac he thong may moc cua chng trnh nghien cu vu tru, e x ly thong tin
trong nganh ngan hang, vv V du : IBM 4381, Honeywell DSP8
Loai manh nhat trong cac may tnh ln goi la sieu may tnh (supercomputer). V
du : Y-MP/832 cua Gray.
b.May tnh con :
La dang thu nho ve kch thc cung nh tnh nang cua may tnh ln.
- Lam viec vi d lieu co o dai d lieu 32 bit vi toc o cham hn va bo nh han
che - May tnh con thng dung cho cac tnh toan khoa hoc ky thuat, gia cong d lieu
qui mo nho hay e ieu khien qua trnh cong nghe.
V du : Vax 6360 cua DEC, MV/8000II cua Data general
c.May vi tnh :
May vi tnh la may thong dung hien nay. Mot may vi tnh co the la 1 bo vi ieu
khien (micro controller) hoac la mot vo vi mach (one-chip microcomputer). V du : vi
ieu khien 68HC11 cua Motorola, MCS-8051
-Co kha nang lam viec vi o dai d lieu la 4, 8, 16, 32, 64 bit
-CPU cua may eu c che tao bang cong nghe mach vi ien t vi mc o to hp
ln VLSI.
-Tren th trng hien nay co cac ho vi x ly noi bat nh :
Intel dung vi x ly 80x86 : 8086 (16 bit)
8088( 8bit)
80286 (16bit)
80386(32 bit) 80486(32 bit)
80586(32 bit)
Motorola dung vi x ly 680x0
Zilog : Z80 (8bit), Z8000 (16 bit)
1.2.3. Lch s phat trien cua cac bo vi x ly :
a.The he 1 : (1971-1973)
-Vi x ly Intel 4004 (4 bit) dung trong may tnh xach tay. Sau o xuat hien 4040 (4
bit) 8008 (8bit)
ac iem :
-o dai t thng la 4 bit.
-Cong nghe che tao PMOS vi ac iem mat o phan t nho, toc o thap, gia re va
ch co kha nang a ra dong tai nho.
-Toc o thc hien lenh la 10-60 micro-sec/lenh vi tan so ong ho (xung clock)fclk=
0,1-0,8 Mhz
-Tap lenh n gian va phai can 1 so mach phu tr e tao nen 1 he vi x ly hoan
chnh
b.The he 2 : (1974-1977)
Z80 cua hang Zilog (8 bit)
6
6800 cua hang Motorola (8bit)
6502 cua hang Mos technology (8bit)
8080 va 8085 cua hang Intel
-Cong nghe che tao la NMOS (mat o tch hp ln hoac CMOS (tiet kiem ien nang
tieu thu)
-Tan so xung clock t 1-5 Mhz va toc o thc hien lenh la t 1-8 microsec/lenh
c.The he 3 : (1978-1982)
Vi x ly Intel 8086, 8088, 80186, 80286, (16 bit), MP 68000/68010 cua Motorola
(16 bit)
ay la bo vi x ly dung trong may tnh IBM PC, PC/XT, PC/AT va cac may
Macintosh cua hang Apple.
-Tan so xung clock t 5-10 Mhz, toc o thc hien lenh la 0,1-1 microsec/lenh
-Cong nghe che tao la HMOS
d.The he 4 : (1983-?)
-Cac bo vi x ly ai dien trong the he nay la cac vi x ky 32 bit cua Intel 80386,
80486, va 32 bit Pentium 80586, MP 32 bit 68020/68030/68040.68060 cua Motorola.
ac iem :
-Bus a ch eu la 32 bit (phan biet 4GB bo nh) va co kha nang lam viec bo nh ao
-Ap dung c che x ly xen ke lien tuc dong ma lenh (pipe line), bo nh cache(bo
nh an), bo nh ao. Cac bo vi x ly nay eu co bo quan ly bo nh (MMU) va ca bo
ong x ly toan hoc.
Ben canh cac bo vi x ly c dung e xay dng may tnh vi tap lenh au
u (CISC-complete instruction set computer), ngi ta con che tao ra cac bo vi x ly
cai tien dung cho may tnh vi tap lenh rut gon (RISC- reduced instruction set
computer). Xem bang : cac bo vi x ly 16/32 bit cua Intel, Motorola.
e. May tnh dung bo vi x ly Pentium II, PIII, PIV:
-o dai d lieu 32-64 bit
- Toc o 1.8 Ghz-4.0 Ghz
Cac bo vi x ly 16 bit cua Intel
Cac bo vi x ly 32 bit cua Intel
Cac bo vi x ly 16/32 bit cua Motorola
T thap nien 1990 tr lai ay
1990 Microsoft WIndows 3.0 ra i
Motorola 68040 c trien khai.
1991 Apple va IBM hp tac e khao sat RISC
1992 Microsoft WIndows 3.1 a tr thanh chuan cho cac PC.
1993 Intel Pentium (80586) ra i, cong nghe MMX c cung cap sau.
1995 Microsoft Indows 95
1995 Intel Pentium pro (P6)
1997 Intel Pentium II
1998 Intel Pentium II Xeon
1999 Intel Pentium III
2001Intel Pentium IV
7
1.3. Cu trc v hot ng ca h vi x l.
1.3.1. S o khoi
S O KHOI MOT HE VI X LY C BAN
Address bus
Data bus
CPU
Bo nh
T
Vao ra I/O
Thietb vao
Thiet b ra
Control bus
Hnh 1.1 :S o khoi cua he vi x ly
1.3.2. Nguyen ly hoat ong:
-CPU (central processing unit) n v x ly trung tam. MP (mocroprocessor) :
ay la bo nao cua may tnh, ieu khien toan bo hoat ong cua he. MP se lay lenh,
phan tch va thi hanh lenh.
-Bo nh : (memory) la ni lu tr d lieu va chng trnh can cho qua trnh
thc hien lenh. Bo nh trong : rom, ram. Bo nh ngoai : bang t, a t
-Vao ra (input/output) : la mach giao tiep gia CPU vi thiet b vao (ban
phm, chuot), thiet b ra(man hnh, may in)
-Ba bo phan nay c lien lac vi nhau thong qua bus he thong (system bus).
Bus he thong gom co :
+Bus a ch : (address bus) cho phep xac nh a ch cua o nh hoac ngoai vi can
truy xuat (oc /ghi). Bus a ch co the la 16, 20, 24 bit
+Bus d lieu (data bus) : cho phep trao oi thong tin gia Cpu va bo nh hay ngoai
vi. Bus d lieu co the la 8, 16, 32 bit
+Bus ieu khien (control bus) :la cac ng tn hieu do CPU a ra e ieu khien
bo nh hay ngoai vi hoac la tn hieu a vao CPU.
V du : RD (read-oc ), WR (write-ghi) , INTR (interrupt-ngat)
Bus a ch ch co 1 chieu t CPU a ra, bus d lieu co tnh chat 2
chieu (vao/ra), bus ieu khien ch co 1 chieu vao, 1 chieu ra.
1.4. Chc nng ca cc thnh phn trong h vi x l.
1.4.1. B x l CPU.
1.4.1.1.Nhiem vu cua CPU :
-ieu hanh hoat ong cua he thong theo y nh cua ngi s dung.
Thi hanh chng trnh theo vong kn goi la chu k lay lenh.
Thi hanh
lenh
Lay lenh
Chu ky lenh
Hnh 1.2: Nhiem vu cua CPU
1.4.1.2.Cau truc CPU :
Cac thanh phan chnh cua CPU gom co :
. Cac thanh phan lu tr: cac thanh ghi, cac c.
. Cac thanh phan thc thi (x ly) : ALU thc hien cac tnh toan so hoc , logic,
dch/xoay (cac) bit.
.Cac thanh phan chuyen [tn hieu]: bus
. Cac thanh phan ieu khien : n v ieu khien.
CPU
IR
PC
Bo ieu khien CU
n v so hoc logic
ALU
Cac thanh ghi

Hnh 1.3 Cau truc ben trong cua CPU
CPU (central processing unit) : n v x ly trung tam
ALU (arithmetic logic unit) : n v so hoc logic
Register : thanh ghi
CU : control unit, n v ieu khien
+ALU : thc hien cac phep tnh so hoc va logic bao gom +, -, *, /, tang , giam, and,
or, not, xor, dch , quay, vv ALU co hai ngo vao va 1 ngo ra. Hai ngo vao lay d
lieu t bus noi can thiet e thc hien phep toan va 1 ngo ra tra ket qua thc hien
phep toan ve bus noi. e tranh d lieu chong nhau bus noi, hai ngo vao cua ALU
co hai thanh ghi tam, co chc nang cai d lieu trc khi ALU thc hien phep toan.
9
IN 1
IN 2
ALU
OUT
Hnh 1.4 : ALU
+Thanh ghi : la cac o nh co ten toc o rat cao nam ben trong CPU. So thanh ghi
ben trong CPU la rat t. Mot so thanh ghi a c nh san chc nang, mot so thanh
ghi khac la thanh ghi a dung.
-Thanh ghi PC
-Thanh ghi tch luy A
-Thanh ghi c F
-Thanh ghi lenh IR
-Thanh ghi a ch bo nh MAR
-Thanh ghi a dung
-Thanh ghi con tro stack SP
+Bo ieu khien :
- ieu khien s hoat ong cua cac khoi khac trong CPU ong bo vi nhau.
- Xuat cac tn hieu ieu khien oc ghi bo nh va ben ngoai theo 1 trnh t nhat
nh e am bao cho viec oc ghi bo nh c thc hien ung
1.4.1.3. Thc hien lenh :
a.Lay lenh t bo nh vao thanh ghi lenh IR (instruction register)
b.Thay oi thanh ghi PC (program counter: bo em chng trnh) e chuyen en lenh
ke tiep (thanh ghi PC luon gi a ch cua lenh ke tiep)
c.Xac nh kieu lenh va lay ra
d.Xac nh kieu d lieu ma lenh yeu cau va xac nh v tr d lieu trong bo nh.
e.Neu lenh can d lieu trong bo nh, nap no vao thanh ghi cua CPU
f.Thc hien lenh
g.Lu ket qua ni thch hp
h.Tr ve bc 1 e thc hien lenh ke
1.4.1.4.Dang lenh :
Cac vung trong lenh :
-Vung ma lenh : cho biet tac vu nao se c thc hien.
- Vung a ch : ch a ch bo nh hoac thanh ghi cua CPU
- Vung cach nh a ch : ch cach xac nh toan hang hoac a ch that.
1.4.1.5. Cac cach nh a ch :
-Cach nh a ch hieu ngam.
- Cach nh a ch tc thi.
10
-
Cach nh a ch thanh ghi.

Cach nh a ch gian tiep qua thanh ghi.
Cach nh a ch trc tiep.
Cach nh a ch gian tiep.
Cach nh a ch tng oi.
1.4.2. B nh
a ch
3A
0F
o nh
n-1
Hnh 1.5: Bo nh
a.Bit : 0/1 bieu dien hai trang thai , la n v c ban cua bo nh.
b.nh v bo nh : (memory addressing)
Bo nh se c anh so bat au t 0 cho ti n-1, vi n la so o nh trong bo nh.
Tat ca cac o nh eu co so lng bit nh nhau, neu 1 o nh co k bit th no co the co
t 1 2k to hp bit khac nhau
V du : vi bo nh 96 bit ta co 3 kieu to chc bo nh nh sau : 12x8 bit, 8x12 bit, 6x16
bit
Thng 1 o nh co 8 bit=1byte. Neu bo nh co m ng a ch th se co 2m
byte (o nh)
V du : bo nh co 10 bit a ch dung lng bo nh la 210 byte=1KB
bo nh co 11 bit a ch dung lng bo nh la 211 byte=2KB
bo nh co 12 bit a ch dung lng bo nh la 212 byte=4KB
V du : EPROM 2716 2732 2764
2KB 4KB 8KB
SRAM 6116
6264
2KB
8KB
c. Bo nh chnh : ROM (read only memory): bo nh ch oc
RAM(random access memory) : bo nh oc ghi c
Bo nh ngoai : bang t, a t (a mem, a cng)
*Chc nang bo nh :
-Co nhiem vu lu tr thong tin gom co :
+Chng trnh :- khi ong
-giao tiep c ban BIOS
-he ieu hanh (he thong)
11
-ng dung
+em d lieu : dung e cha d lieu vao va lay d lieu ra
*ROM :
-Cha d lieu luc che tao
-Cha d lieu chet : -cac chng trnh khi ong
-thong so he thong
-giao tiep bios
*Ram : thong tin trong Ram co the thay oi c
-oc th thong tin cu van con
-Ghi th thong tin mi se e len
-Khi mat ien th se mat thong tin
*ROM gom co cac loai nh sau :
-EPROM : (erasable programmable ROM) : rom lap trnh va xoa c . Lap trnh
bang cach a xung ien ap cao vao chan Vpp, xoa bang tia cc tm
-PROM (programmable ROM) rom lap trnh c
-EEPROM (electrical erasableprogrammable rom) rom lap trnh va xoa bang ien.
V du : eeprom 2832
-MROM (maskable ROM)rom mat na
*RAM co cac loai sau : SRAM (static ram ) ram tnh
DRAM (dynamic ram ) ram ong
1.4.3. Cc thit b ngoi vi.

1.4.3.1 Phan loai ngoai vi :
Cac thiet b I/O co ten goi khac nhau la cac thiet b ngoai vi (peripheral devices).
Bang sau cho thay mot so thiet b ngoai vi tieu bieu theo nhom nhap (I) va xuat (O).
-Thiet b lu tr ngoai: a t (FDD, HDD), USB, CD-ROM, DVD.
-Thiet b giao tiep vi cong ngi: Man hnh, may in.
-Thiet b ieu khien: cam bien va truyen ong.
1.4.3.2 Giao tiep I/O:
V du : giao tiep I/O lap trnh c 8255, 8250
CPU
I/O
Cong (port)
Hnh 1.6
V du : cong may in (LPT1) co a ch 378h
Thiet b
ngoai vi
Vao
+ Ban phm
+ Chuot
Ra
+Man hnh
+ May in
12
Cong COM1(RS232) co a ch 3F8h
- Thiet b ngoai vi gom co : man hnh, ban phm, chuot, may in, may quet, may ve,
CD Rom,vv
- Moi thiet b ngoai vi co 1 IO rieng nam trong phan xuat nhap IO
- Moi IO co a ch cong rieng
- IO khong phai la cho cha d lieu, ma ch la cong e d lieu qua lai
- Xuat nhap tuy theo thiet b ngoai vi
1.4.4. H thng bus.

Bus
Cac he thong con cua MCU va CPU lien lac vi nhau thong qua bus (tuyen), bus
la tap hp cac ng tn hieu ma qua o co the truyen i thong tin ve a ch, d lieu
va ieu khien. Thong thng bus co o rong la 8 hay 16 bit( hoac ln hn na tuy
theo CPU hoac thiet b I/O). He thong bus gom bus a ch, bus d lieu va bus ieu
khien.
Cai at bus chung :
-Bus don kenh
- Cac bo em bus 3 trang thai
- Chu k oc bus.
- Chu k ghi bus
1.5. Cc h vi x l thong dng:
Intel 80x86.
Motorola 680x0.
MCS-51.
68HC11, 68HC12.
Zilog Z80.
Microchip PIC 16F84, PIC 16F877A.
1.6. Vi iu khin.
1.6.1. Cac gii han cua vi x ly
-Can bo nh ngoai e thc thi chng trnh.
-Khong the giao tiep trc tiep vi cac thiet b I/O.
1.6.2.Vi x ly va vi ieu khien:
So sanh vi x ly (MPU) va vi ieu khien (MCU)
MPU:
-c thiet ke e thc hien chc nang CPU trong he may vi tnh.
- Tap lenh c sap xep e cho phep ma va mot lng ln d lieu c chuyen i
gia vi x ly vi bo nh va thanh ghi ngoai.
- Cac tac vu tac ong vi nhom bt khong nho hn 4 bit.
MCU :
-c thiet ke e lam viec vi mach ngoai toi thieu.
-Tap lenh n gian (khoang 255 lenh).
-Cac tac vu co the tac ong len tng bt.
MCU la may tnh vi tat ca trong mot chip :
13
MCU = CPU + Bo nh + Giao tiep I/O
S o khoi cua mot MCU
Microcontroller
Memory
Register
I/O
port
ALU
Counter
Timing
&
control
Interrupt
chip
Hnh 1.7 : S o khoi mot MCU

So vi MPU th MCU co them mot so mach lam cho MCU hoat ong nh
mot thiet b duy nhat. MCU lam viec vi cac d lieu c a vao qua cac cong
nhap noi tiep hoac song song c ieu khien bi phan mem c cat trong bo nh
chng trnh.
Cac MCU tieu bieu :
. 8051 (intel va cac hang khac) : la MCU the he th hai cua Intel.
. 68HC11 (Motorola va Toshiba) : co kien truc bo nh chung trong o cac lenh , d
lieu , I/O va cac mach nh th tat ca chia xe cung vung nh.
.PIC (Microchip) : Ho MCU RISC au tien ( 35 lenh).
14
1.7.Gii thiu chung v vi iu khin PIC.
1.7.1. Mc ch ca sch
Mc ch ca sch l dy bn lm sao xy dng mch iu khin s dng
thit b nh l nt nhn, bn phm, cm bin, led n, loa, led 7 on, iu ny c
thc hin bng cc th d.
Chng trnh c vit bng hp ng.
Chng ta cn mch np (loi JDM qua cng COM, hay loi qua cng USB) vit cc
lnh vo chip. Phn mm bin dch MPASM hay MPLAB chuyn vn bn m ngun
thnh m my.
1.7.2. B nh chng trnh
Bn trong vi iu khin chng trnh m chng ta vit c lu trong vng
nh EPROM (Electrically Programmable Read Only Memory), b nh ny khng bay
hi v c nh khi ngun b tt. Cc lnh m chng ta lp trnh vo vi iu khin lm
vic bng cc di chuyn v vn hnh d liu trong nh c bit nh l nh
(file) v thanh ghi (register). B nh ny gi RAM (Random Access Memory). Th d
trong iu khin nhit phng, chng ta o nhit phng bng cch bng vi iu
khin thng qua thanh ghi iu khin tng t sang s (ADCON0). S o lng th
c so snh vi d liu ca chng ta lu trong mt nh ngi dng (user file).
Thanh ghi trng thi s ch bo nu nhit l ln hn hay nh hn gi tr yu cu
v thanh ghi cng (port) s bt/tt l nhit tng ng. Bn b nh ca 16F877A
c cho chung sau.
Vi iu khin PIC l 8 bit, ngha l nh ngi dung v thanh ghi l 8 bit nh phn
nh hnh 2.1.
Bit 7
6
5
4
3
2
1
bit 0
1
0
1
1
0
0
1
0
Hnh 1.7.1: Dng thanh ghi v nh ngi dung.
Trong LSB l bit c trng s thp nht (bit 0), MSB l bit c trng s cao nht (bit
7).
1.7.3. Xung ng h vi iu khin
chy tng bc qua cc lnh, vi iu khin cn xung clock ng b vic
di chuyn d liu vng quanh mch in t. iu ny c cung cp bi hai t in v
thch anh hay bi mch dao ng bn trong.
Trong 16F84 c 4 la chn dao ng:
. Mch RC dao ng m cung cp gii php gi thnh thp.
. Dao ng LP, ngha l thch anh 32 KHz, m ti thiu ha tiu th nng lng.
. XT: cho cu hnh thch anh chun.
. HS l ty chn dao ng tc cao.
Cc tn s thch anh thng dng l: 32 Khz, 1 Mhz, 4 Mhz, 10 Mhz v 20 Mhz.
PIC 16F877A cn c them 4 la chn sau (tng cng l 8):
. EXTRC: in tr/t in ngoi.
. EXTRC in tr t in ngoi vi CLKOUT.
. INTRC in tr/t in 4 Mhz ni.
. INTRC in tr t in ni 4 Mhz vi CLKOUT.
1.7.4. H thng vi iu khin
15
S khi h thng vi iu khin c cho hnh 1.7.2.
Ng
vo
iu
khin
Ng
ra
Hnh 1.7.2: H vi iu khin c bn.

. Thnh phn ng vo gm c thit b s nh l cng tc, nt nhn, bn phm,.. v cm
bin nh l in tr ph thuc nh sang, thermixtor, cm bin gas, cm bin p sut,
. n v iu khin hin nhin l vi iu khin, vi iu khin s gim st ng vo v
nh l kt qu chng trnh s bt (turn on) ng ra hay tt (turn off) ng ra. Vi iu
khin lu chng trnh trong b nh v thc thi lnh di s iu khin ca mch
ng h (clock).
. Thit b ng ra c lm t led n, loa, ng c, hin th s, led 7 on, l nhit,
qut,
Chn la hin nhin nhiu nht cho vi iu khin l c bao nhiu ng vo s,
ng vo analog, v ng ra m h thng yu cu. iu ny ch ra s chn ti thiu vo
ra (I/O) m vi iu khin phi c. Nu ng vo analog c s dng th vi iu khin
phi c b chuyn i tng t -s (A/D).
Xem xt k tip l kch c b nh chng trnh l g. iu ny khng l vn ln
khi bt u . Cc chng trnh trong sch ph hp khng gian b nh chng trnh 1
KByte (16f84) ti 8 KByte (16f877a).
Tn s xung clock xc nh tc ti lnh c thc thi. iu ny l quan
trng nu bt k tnh ton di l c xem xt. Tn s xung clock cng cao th vi iu
khin hon thnh him v cng nhanh v chuyn sang nhim v khc.
Mt xem xt na l s ngt v s mch timer (nh th) c yu cu, b nh
d liu EEPROM yu cu l bao nhiu. Cc hot ng phc tp hn s c xem xt
sau.
Trong sch ny, chng trnh yu cu ng vo analog c hin thc
trn PIC 16F84 hay PIC16F 877A.
1.7.5. Cc loi vi iu khin
Danh sch cc loi vi iu khin PIC th c pht trin hang ngy. Chng bao
gm cc thit b cho tt c cc ng dng. Th d: 18F8722 c 64K b nh EPROM,
3938 byte RAM ( nh ngi dung), 1024 byte EEPROM, 16 knh A/D 10 bit, in
p tham chiu, 72 ng vo v ra (I/O), 3 timer 16 bit v 2 timer 8 bit.
V c bn c 2 loi vi iu khin: thit b Flash v thit b lp trnh mt ln (one
time programmable devices -OTP).
Thit b Flash c th lp trnh li trong mch np trong khi thit b lp trnh
mt ln khng th lp trnh li. Tt c thit b OTP tuy nhin c s phn loi ng
khung (windowed) m cho php chng b xa di nh sang tia cc tm trong khong
15 pht m chng c th lp trnh li. Thit b OTP dung cu hnh dao ng RC, LP,
XT hay HS.
Trong sch ny chng ta dung thit b Flash l PIC 16F84 hay PIC 16F877A.
1.7.6. c tnh ca vi iu khin
Bn ch ra mt thit b vi m nhn dng sn phm:
. S sn phm.
. Nu n l loi ng khung, OTP hay thit b Flash. Loi ng khung c ch ra bi
JW. Thit b OTP c ch ra bi tn s dao ng v thit b Flash c ch ra bi
ch F nh l 16F84.
16
. Tn s dao ng, thng l 04 cho cc thit b lm vic ln ti 4 Mhz, 10 cho thit b
lm vic ln ti 10 Mhz, hay 20 cho thit b ln ti 20 Mhz. Thit b 20 Mhz th t
tin hn thit b 4Mhz.
. Tm nhit , cho ng dng tng qut 0 oC70 oC l c ch ra.
H thng nhn dng sn phm cho vi iu khin PIC c minh ha hnh
1.7.3.
Part No.
XX
X
/XX
ng gi L= PLCC
P=PDIP (ng gi Plastic chun)
So=SOIC small outline IC
PQ=MQFP
JW=Windowed device (CERDIP)
Tm nhit - =0oC 70 oC
I = -40 oC+85 oC
E = -40 oC+125 oC
Phm vi tn s: 04= 4Mhz
10 = 10 Mhz
20 = 20 Mhz
Thit b, th d 16C711
Hnh 1.7.3. H thng nhn dng sn phm.
1.7.7. S dng vi iu khin
s dng vi iu khin trong mch, c hai lnh vc v c bn chng ta cn
hiu
1. Cch kt ni vi iu khin vi phn cng.
2. Cch vit chng trnh v np m vo vi iu khin
1.7.1. Phn cng vi iu khin:
Phn cng m vi iu khin cn hot ng th c minh ha hnh 1.7.4.
Thch anh v t in c ni vi chn 15 v 16 ca 16F84 to ra xung clock m
c yu cu vi iu khin i qua chng trnh v cung cp xung nh th.
17
16F84
+5V
14
V+
68 pF
16
MCLR
32 Khz
68pF
15
0V 5
Hnh 1.7.4: Mch vi iu khin

+5V
C3
0.1 uF
U1
C1
V+
OSC2/CLKOUT
Y1
68 pF
32 Khz
4
15
MCLR
OSC1/CLKIN
C2
68 pF
GND
RA0
RA1
RA2
RA3
RA4/TOCKI
RB0/INT
RB1
RB2
RB3
RB4
RB5
RB6
RB7
PIC16F84
Mch vi iu khin PIC 16F84
16
17
18
1
2
3
6
7
8
9
10
11
12
13
18
Mch vi iu khin PIC 16F877A

Ngun cung cp cho vi iu khin:
Ngun cung cp cho vi iu khin trong khong t 2v ti 6v. iu ny c th c
cung cp d dng t chn 6v nh hnh 1.7.5.
+
-
V+
16F84
0v
Hnh 1.7.5: Ngun cung cp cho vi iu khin.

Diode trong mch to ra p 0,7v trn n nn lm gim in p cung cp cn 5,3v. N
cung cp bo v cho vi iu khin nu ngun c ni sai tnh c. Trong trng hp
ny diode s phn cc ngc v khng c dng chy qua.
7805, mch n p:
19
Kt ni ngun cung cp thong dng nht cho vi iu khin l dung IC n p 7805 c 3
chn. Kt ni c minh ha hnh 1.7.6.
+5V
7805
Vin
Vout
0v
Hnh 1.7.6: Mch n p 7805
in p vo Vin cho 7805 l t 7v n 30v.
Cng sut tiu tn trong 7805:
S cn trng phi c xem xt khi s dng in p Vin cao a vo 7805. Th d nu
Vin=24v, ng ra 7805 l +5v, th th 7805 c 24v-5v=19v ri trn n. Nu n cung cp
dng 0,5A cho mch th cng sut tiu tn (volt x ampe) l: 19v x 0,5A=9,5 watt. B
n p s rt nng. Do ta phi c ming tn nhit (bng nhm).
Kt ni nt nhn vi vi iu khin:
Cch thong dng nht v mt nt nhn ti vi iu khin l thong qua in tr ko ln
ti +5V nh minh ha hnh 1.7.7.
+5V
Vi iu
khin
0v
Hnh 1.7.7: Kt ni nt nhn vi vi iu khin.
Khi nt nhn l h, logic 1 c ni vi vi iu khin.
Khi nhn nt, logic 0 c ni vi vi iu khin.
Mt s vi iu khin nh l 16F84, 16F818, v 16F877a c in tr ko ln
bn trong ni vi mt s chn I/O. Port B trong thit b trn.
Hnh 1.7.8 minh ha nt nhn c ni dung ko ln bn trong.
Vi iu
khin
0V
Hnh 1.7.8: Kt ni nt nhn s dng in tr ko ln bn trong.
Kt ni ng ra vi vi iu khin:
20
Vi iu khin c kh nng cung cp xp x 20-25 mA ti chn ng ra. Nh vy ti nh
l led n, hay rle nh c th c li trc tip. Ti ln hn yu cu giao tip thong
qua transistor i vi dc, hay triac i vi ac. Thit b cch ly quang (opto-coupled
device) l giao tip cch li gia vi iu khin v ti.
Kt ni led n vi vi iu khin c minh ha hnh 1.7.9.
Vi iu
khin
680 Ohm
0V
Hnh 1.7.9: Kt ni 1 led vi vi iu khin.
Logic 1: led sang
Logic 0: led tt.
16F877a RB0
470 Ohmx4
RB1
RB2
RB3
0V
Hnh 1.7.10: Kt ni 4 led vi PIC 16F877A

1.7.2.Lp trnh vi iu khin:
vi iu khin thc hin mt s hnh ng iu khin, bn cn giao tip
(truyn thong) vi n v yu cu vi iu khin nhng lnh phi lm g. Khi giao tip
vi ngi khc, chng ta dung ngn ng ni, khi giao tip vi vi iu khin chng ta
s dng ngn ng lp trnh (hp ng). Hp ng cho PIC s dng 35 lnh trong tp
lnh. Thm vi lnh c dung trong vi iu khin ln.
giao tip vi vi iu khin chng ta cn bit 35 lnh ny l g v cch s
dng chng. Khng phi tt c 35 lnh c dung trong sch ny. Thc t bn c th
vit chng trnh c ngha ch dung 5 hay 6 lnh.
IV.
Tng kt bi:
-Tm tt cc chnh trong bi.
-Chun b bi mi.
V. Cu hi v bi tp v nh:
Chng 1: Gii thiu chung v h vi x l. Gii thiu chung v PIC.
1.Cc h m dung trong my tnh. M BCD l g? M ASCII l g?
2.So snh my vi tnh vi cc th h my trc y.
21
3. Trnh by lch s pht trin ca cc b vi x l.
4. Trnh by cu trc v hot ng ca mt h vi x l.
5. Trnh by cu trc v hot ng ca mt CPU 8 bit.
6. B nh l g? Phn bit ROM v RAM. Phn bit MROM, PROM, EPROM,
EEPROM. Phn bit RAM tnh v RAM ng.
7. Thit b ngoi vi gm nhng g?
8. Gii thch cc t SSI, MSI, LSI v VLSI.
9. Trnh by s khi mt MCU (vi iu khin). So snh MCU v CPU (vi x l).
10. K tn cc h vi x l thong dng.
11. Trnh by h thng vi iu khin .
12. Cch s dng vi iu khin PIC: phn cng v vit chng trnh.
13.Cc thit b/dng c 3 trng thi l g? V ti sao chng li cn thit trong cc h
thng dung bus?
14.Cn bao nhiu byte lm thnh 1 word 32 bit?
15. Mt chip b nh c dung lng 2K (2048 byte). Hi s chn a ch ca chip nh
ny.
16. Hy nh v b nh 96 bit theo 3 cch.
17. Trnh by s khi ca Z80 CPU.
18. Nu cc phng php a ch ha ca Z80 CPU.
19. Neu mot chip bo nh co kch thc la 1024x 4 bits, ta phai can bao nhieu chip
nh vay e tao 2K (2048) byte bo nh ?
VI. Rt kinh nghim: (v thi gian, ni dung, phng php, chun b)
Ngy .thng..nm 2011

B mn
Ngy .thng..nm 2011

Ging vin son
22
Bi ging s 2: : Phn cng vi iu khin PIC 16F84 v PIC 16F877A( S tit: 5)
I.n nh lp:
.
II.Kim tra bi c:
..
..
..
III.Tn bi ging: : Phn cng vi iu khin PIC 16F84 v PIC 16F877A
III.1. Mc tiu:
- Vi iu khin 16F84.
- Vi iu khin 16F877A : s khi PIC 16F877A, b nh chng trnh, b
m chng trnh (PC) v ngn xp (stack), bn b nh d liu, cc thanh ghi chc
nng c bit (SFR),v thanh ghi trng thi.
-Phn trng, khn, bng, bt long, micro c dy(hay khng dy), my tnh, v n
chiu (hay my chiu).
vin.
Chng 2: Phn cng vi iu khin PIC 16F84 v PIC 16F877A.
2.1.Vi iu khin PIC 16F84
PIC 16F84A c cc c tnh:
-c 35 lnh, cu lnh ch cn 1 chu k my, cu lnh nhy cn 2 chu k my. Tn s: ti
a 20 Mhz v chu k my l 200 ns. B nh chng trnh 1k x 14 words, b nh RAM
l 68 byte, b nh d liu dng EEPROM l 64 byte. Chiu di cu lnh l 1 word 14
bit (1 t =14 bit). X l d liu dng 8 bit (1 byte). C 15 thanh ghi chuyn dng SFR
t trong b nh RAM.
-dng ngn xp ct gi a ch lnh, ngn xp su n 8 lp.
-c th truy cp b nh dung a ch trc tip, gin tip v tng i.
-C 4 dng ngt.
-13 chn xut nhp d liu (PORT A 5 chn, PORT B 8 chn).
-Mt ng h timer 0, dung hanh m 8 bit nn m c ti a 256 nhp.
23
S d chn: Hnh 2.1
U3
OSC2/CLKOUT
4
15
MCLR
OSC1/CLKIN
RA0
RA1
RA2
RA3
RA4/TOCKI
RB0/INT
RB1
RB2
RB3
RB4
RB5
RB6
RB7
16
17
18
1
2
3
6
7
8
9
10
11
12
13
PIC16F84
Hnh 2.1: S chn ca PIC 16F84

ngha cc chn:
- OSC1/CLKIN: l chn ng vo ca mch dao ng thch anh dung nh tn s
xung nhp v chn ny cng l ng vo ca xung nhp (clock input).
. OSC2/CLKOUT: l chn ng ra ca mch dao ng thch anh v l ng ra ca xung
nhp (clock output), y tn hiu xung nhp c khuch i.
. /MCLR: (Master clear) l chn reset. Tc dng ca lnh reset l tr chng trnh v
a ch u 0000h, v xc lp li trng thi cho cc thanh ghi c dng. Lnh c tc
dng mc thp.
. RA0, RA1, RA2: l cc chn xut nhp ca port A.
. RA4/T0CKI: l chn a nhim , va lm chn xut nhp ca portA v li l chn ly
xung cho thanh m ca ng h timer 0 (Timer 0 clock input). Chn ny c cc Drain
ca Fet h.
. RB0/INT: l chn a nhim, va lm chn xut nhp d liu ca portB v l chn
pht ng theo ngt ngoi. Cc chn ca portB c th c lp trnh c tr khng
ln dung lm ng vo, dung nhp trng thi ngoi PIC.
. RB1, RB2, RB3: l cc chn xut nhp d liu ca portB.
.RB4, RB5, RB6 v RB7: l cc chn xut nhp ca port B v s pht ng ngt khi s
thay i trng thi trn cc chn ny.
. RB6 l 1 chn xut nhp d liu ca portB v c tnh pht ng ngt theo s thay i
trng thi trn chn ny. N cn c th lp trnh dung chn ny pht xung nhp
(serial clock) dung cho truyn bit dng ni tip.
. RB7 l 1 chn xut nhp d liu ca portB v pht ng ngt theo s thay i trng
thi trn chn ny. N cn c th lp trnh dung chn ny trao i d liu (serial
data) dng cho truyn bit dng ni tip.
. Vss l chn ni mass (GND, 0V).
. VDD l chn ni vi VCC (PIC c th dung VCC t 2v n 5,5v).
S khi bn trong ca PIC 16F84A
24
Hnh 2.2: Cu trc bn trong ca PIC 16F84A.

2.2. Vi iu khin PIC 16F877A:
2.2.1. S khi PIC 16F877A v s cc chn v ngha
Gii thiu PIC 16F877A:
PIC l vit tt ca Programmable Intelligent Computer, c th dch l my
tnh thong minh lp trnh c, l mt sn phm do hang General Instruments t
cho dng sn phm u tin ca h l PIC 1650.
PIC l mt h vi iu khin RISC c sn xut bi cng ty Microchip
Technology. Dng PIC u tin l PIC 1650 c pht trin bi MicroElectronics
Division thuc General Instruments. Lc ny PIC 1650 c dung giao tip vi
cc thit b ngoi vi cho my ch CP 1600.
Hin nay PIC pht trin mnh, c rt nhiu loi PIC ra i. PIC 12 ( di m lnh
12 bit) nh l dng PIC 12Cxxx (th d : PIC 12F50x, PIC 12F675), PIC 5x (
16F54), PIC 14 nh dng PIC 16Fxxx (16F84, 16F818, 16F877A, 16F872), PIC 16
nh dng PIC 18Fxxx (PIC 18F4520, 18F2550).
PIC 16F877A l vi iu khin PIC thng dng, loi trung (mid- range) c c im:
-y l vi iu khin thuc h PIC 16Fxxx vi tp lnh gm 35 lnh c di 14
bit. Mi lnh u c thc thi trong mt chu k xung clock. Tc hot ng ti
a cho php l 20 Mhz vi mt chu k lnh 20 ms. B nh chng trnh Flash l
8k x 14 words, b nh d liu (RAM) l 368x8 byte, v b nh EEPROM vi dung
lng 256 x 8 byte. S port I/O l 5 vi 33 chn I/O.
Cc c tnh ngai vi bao gm cc khi chc nng sau:
-Timer 0: b m 8 bit b m vi h s t l trc.
-Timer 1: b m 16 bit, b m vi h s t l trc. C th c tng m thng
qua xung clock/ xung clock thch anh ngoi ch phng thc ct gi sleep.
25
-Timer 2: b m 8 bit vi thanh ghi chu k 8 bit, b m 8 bit ca h s t l trc,
h s t l sau.
-C hai b bt gi/so snh/iu rng xung.
-Cc cng giao tip ni tip ng b (SSP) vi SPI phng thc ch v I2C
(ch/t).
-B truyn nhn ni tip ng b , khng ng b (UASRT/SCL) c kh nng pht
hin 9 bit a ch.
-Cng ph song song vi 8 bit m rng, vi cc chn iu khin RD, WR, CS.
Cc c tnh analog:
-B chuyn i tng t-s 10 bit trn chip vi 8 knh vo.
-Hai b so snh,
Bn cnh l mt vi c tnh ca vi iu khin nh :
-B nh Flash vi kh nng ghi xa c 100000 ln.
-B nh d liu EEPROM vi kh nng ghi xa c 1000000 ln.
-D liu b nh EEPROM c th lu tr c 40 nm.
-Kh nng t np chng trnh vi s iu khin ca phn mm.
-Np c chng trnh ngay trn mch in ISP (in circuit programming) thong
qua 2 chn.
-B m xung thi gian (WDT-Watch dog timer) vi dao ng RC bn trong.
-C m chng trnh bo v (chc nng bo mt m chng trnh).
-C th hot ng hiu dng dao ng khc nhau.
Ch sleep (phng thc ct gi) tit kim nng lng.
-Cng ngh CMOS Flash/ eeprom vi ngun mc thp, tc cao.
-Di in th hot ng rng : 2V 5,5 V.
-Cng sut tiu th thp:
<0,6 mA vi 5V, 4Mhz.
20 A vi ngun 3V, 32 Khz.
<1 A vi ngun d phng.
-Kh nng ngt: ln ti 14 ngun ngt trong v ngt ngoi.
-Ngn xp c chia lm 8 mc.
-Truy cp b nh bng a ch trc tip hay gin tip.
-Ngun khi ng li (POR-Power on reset).
S khi vi iu khin PIC 16F877A c minh ha hnh 2.3.
26
Hnh 2.3: Cu trc bn trong ca PIC 16F877A.
27
S chn PIC 16F877A : hnh 2.4.
Hnh 2.4: S chn PIC 16F877A

ngha cc chn:
. OSC1/CLKI: chn nga vo mch dao ng, chn 13.
. OSC2/CLKO: chn ng ra ca mch dao ng, chn 14.
. /MCLR/Vpp: chn s 1, chn reset, tch cc mc thp v cn l xung lp trnh cho
ROM.
. RA0, RA1, RA2, RA3, RA4, RA5: chn 2-7, l cc chn xut nhp ca PORTA.
. RE0, RE1, RE2: chn 8-10, l cc chn xut nhp ca PORTE.
. Chn 2-7, 8-10 cn l ng vo analog AN0, AN1, AN2, AN3, AN4, AN5, AN6, AN7.
.RA4/T0CKI: va l chn xut nhp d liu ca port A, va l chn ly xung cho
thanh m ca timer 0 (timer 0 clock input).
. RE0/RD: cn l xung cho php c b nh (read), tch cc logic 0.
. RE1/WR: cn l xung cho php ghi b nh (write), tch cc logic 0.
. RE2/CS: cn l xung chn chip (chip select) , tch cc logic 0.
. RC0, RC1, RC2, RC3: chn 15-18, RC4, RC5, RC6, RC7:chn 23-26: l cc chn
xut nhp ca port C.
. RC0/T1OSO/T1KCI: cn l chn ly xung cho thanh m ca timer 1, v l chn
T1OSO.
. RC1/T1OSI: cn l chn T1OSI.
. RC2/CCP1, RC1/T1OSI/CCP2: cn l chn bt (capture), so snh (compare) v iu
rng xung (PWM). Moun giao tip vi timer 1 v timer 2.
28
Tn hiu bt: nhn khong thi gian ca s kin bn ngoi s dng mt chn ng vo,
dung vi timer 1.
Tn hiu so snh: thay i mt chn ng ra hay to ra mt ngt khi lng thi gian c
th tri qua , dung vi timer 1.
Tn hiu iu rng xung: to ra ng ra song vung, chu k bn phn xc lp v c th
cu hnh li ti mt tn s xc nh, dung vi timer 2.
Ton Toff
, PWM =
Ton
T
T
. RB0, RB1, RB2, RB3, RB4, RB5, RB6, RB7: chn 33-40 l cc chn xut nhp ca
PORTB.
. RB0/INT: cn l chn pht ng theo ngt ngoi.
. RC6/TX/CK: n c th c lp trnh dung chn ny pht xung nhp (serial clock)
dung cho truyn bit dng ni tip. y cn l chn pht TX (transmit data). Hai chn
ny dung cho thu pht bt ng b v ng b (USART) ,c th nh a ch.
. RC7/RX/DT: n c th c lp trnh dung chn ny trao i d liu (serial data).
y cn l chn thu d liu (receive data).
. RA3/AN3/Vref+, RA2/AN2/Vref-/Cref: l cc chn in p tham chiu cho b
chuyn i tng t-s (ADC) 10 bit.
. RC3/SCK/SCL: chn 18, cn l xung clock ni tip (Serial clock-SCK) cho SPI, v
l chn clock ni tip cho I2C.
RC4/SDI/SDA: chn 23, cn l chn d liu ni tip (serial data).
RC5/SDO: chn 24, cn l chn xut d liu ni tip (serial data out).
Mun ni tip ng b ch (Master synchronous serial port-MSSP) c th hot ng
hai ch :
-SPI (serial peripheral interface): giao tip ngoi vi ni tip. SPI dng 3 chn SDO,
SDI, SCK.
-I2C: (inter-integrated circuit): mch tch hp lien kt, dung 2 chn : SCL, SDA, c th
ch ch hon ton (full master mode) hay ch t (slave mode) (vi gi a ch
tng qut).
.RD0, RD1, RD2, RD3: chn 19-22, RD4, RD5, RD6, RD7: chn 27-30: l cc chn
xut nhp ca PORT D.
. VDD: chn 11, 32: l ngun dng Vcc t 2V n 6V (5,5 V).
. VSS: chn 12, 31, l chn t (mass, GND, 0V).
2.2.2. B nh chng trnh:
. T 8K cc i
-(8k x 14 bit/word)/1 byte= 14 Kbyte b nh.
. Vect reset 0000h
-B m chng trnh PC s n a ch ny khi reset.
. Vect ngt 0004h.
-B m chng trnh PC s n a ch ny da trn bt k ngt no.
29
Status register
Program
counter
Pages of proram memory
Bank of data memory
Mux
ADC
ALU
Timer 0
14 bit
working register
Instruction
register
USART
MSSP
peripherals
Hnh 2.5: S khi Mid-range PIC ( PIC 16F877A).

Reset vect
0000h
Interrupt vect
0004h
0005h
Page 0
07FFh
Page 1
0800h
Page 2
0FFFh
1000h
Page 3
17FFh
1800h
1FFFh
Hnh 2.6: B nh chng trnh.

2.2.3. B m chng trnh v ngn xp:
30
. rng 13 bit PC:
- byte thp nm thanh ghi PCL ALU result (8 bit) hay Opcode (11 bit). PCL l
thanh ghi c th c hay ghi c.
-PCH bit trang
. cp nht t PCLATH
. ch ra trong b nh chng trnh.
Bit cao PC<12:8> l khng c c , nhng c th ghi gin tip thong qua thanh ghi
PCLATH.
. 8 level deep stack ( stack 8 mc)
Ngn xp l mt vng nh lien tc c tnh cht vo sau ra trc (last in first out-LIFO).
Con tr ngn xp s gi a ch nh ngn xp.
-lu tr ni dung PC
. lnh push (ct ni dung vo nh ngn xp)
call/interrupt
. lnh pop(ly ni dung nh ngn xp ra )
return/retfie/retlw
PCLATH
PCH<12:8>
Call, return,
Retfie, retlw
Stack level 1
Stack level 8
Program memory
Hnh 2.7
2.2.4. Bn b nh d liu:
PCL
PC<12:0>
31
Thanh ghi
chc nng
c bit
(SFR)
128
byte
000h
SFR
01Fh
020h
080h
Thanh
ghi a
nng
0EFh
07Fh
Bank 0
70h-7Fh
truy xut
Bank 1
100h
0FFh
SFR
10Fh
110h
09Fh
0A0h
Thanh
ghi a
nng
Thanh ghi
a nng
SFR
18Fh
190h
Thanh
ghi a
nng
16Fh
70h-7Fh
truy xut
Bank 2
180h
1EFh
70h-7Fh
truy xut
17Fh
1FFh
Bank 3
Hnh 2.8
2.2.5. Cc thanh ghi chc nng c bit:
. Khi nim nh thanh ghi (register file ).
-T t c b nh d li u l ph n c a file thanh ghi, v v y b t k nh trong b
nh d li u c th ho t ng tr c ti p.
-T t c ngo i vi c nh x v o b nh d li u nh l chu i c c thanh ghi.
-T p l nh tr c giao: t t c c c l nh c th ho t ng tr n b t k v tr b nh
d li u.
-Khu n d ng l nh t d i cho ph p file thanh ghi c th nh a ch tr c ti p.
. c truy xut nh bt k thanh ghi khc.
. Mt s thanh ghi mang qua tt c cc bank (v d PCLATH, INTCON,).
Thanh ghi PORTB
Thanh ghi PORTC
Thanh ghi PORTD
Thanh ghi PORTE
Thanh ghi PORTA
Thanh ghi TRISA
Thanh ghi TRISB
Thanh ghi TRISC
Thanh ghi TRISD
Thanh ghi TRISE
Thanh ghi PCLATH
Thanh ghi INTCON
Thanh ghi PIR1
Thanh ghi PIR2
Thanh ghi PIE1
Thanh ghi PIE2
32
PORTA
05h
TRISA
85h
PORTB
06h
TRISB
86h
PORTC
07h
TRISC
87h
PORTD
08h
TRISD
88h
PORTE
09h
TRISE
89h
PCLATH
0Ah
PCLATH
8Ah
INTCON
0Bh
INTCON
8Bh
PIR1
0Ch
PIE1
8Ch
PIR2
0Dh
PIE2
Bank 0
Hnh 2.9
2.2.6. Thanh ghi trng thi : STATUS register
Bit 7 6
5
4
3
IRP
RP1
8Dh
RP0
/T0
/PD
Bank 1
2
DC
Bit 0
C
Hnh 2.10: Thanh ghi STATUS

Thanh ghi trng thi dung phn nh hot ng ca ALU trong CPU (nh php ton
c nh, trn, zero..) thong qua cc bit c (flags bit)
.Thanh ghi trng thi ca:
-trng thi s hc ca ALU (c nh, trn, zero..).
-trng thi reset.
-bit chn bank cho b nh d liu.
.Bit 6 v 5, RP1 v RP0 l bit chn bank ti a ch bank 0,1,2, v 3 chn thanh ghi
khc v nh ngi dung .
RP1 RP0
Chn
0
0
Bank 0
0
1
Bank 1
1
0
Bank 2
1
1
Bank 3
.IRP, bit 7: bit chn bank thanh ghi gin tip (dung cho nh a ch gin tip).
1= bank 2,3
0=bank 0,1
33
Thanh ghi trng thi cha kt qu ca php ton s hc hay logic ca chng trnh . 8
bit ca thanh ghi trng thi c minh ha hnh 2.10.
. C C (carry flag bit), bit 0: c nh. Bit ny l 1 nu c nh t lnh cng hay tr
(ADDWF, ADDLW, SUBLW, SUBWF).
Th d: nu 1 s 8 bit c cng vi s khc
1 0 1 1 0 0 1 1
+ 0 0 1 0 1 0 0 1
1 1 0 1 1 1 0 0
C=0: khng c nh ct ny.
Th d: Cng hai s 8 bit
1 0 1 1 0 0 1 1
+ 1 0 1 1 0 1 0 1
1 0 1 1
0 1 0 0
C=1 c nh ct ny ( bit 9 c a vo c C).

Nu kt qu ca php tr l +ve hay zero th c nh C=1 (bt).
Nu kt qu ca php tr l l ve th c nh C=0 (xa).
. Bit 2, c Z (zero flag bit): c zero. Bit ny c bt ln 1 nu kt qu ca php ton
logic hay s hc l 0, ngha l m xung v 0.
Th d: 0 1 0 0 1 1 0 0
+10 0 0 1 1 0 1
1 1 0 1 1 0 0 1 (khc 0)
C Z=0
Th d: 10100001
- 10100001
00000000 (l 0)
c Z=1
Mt s dng quan trng ca bit ny l kim tra nu mt bin trong b nh l bng vi
gi tr c nh, th d l nh CARS cha 150.
MOVLW .150; t 150 vo thanh ghi lm vic W
SUB CARS,W ; tr W t CARS, ngha l CARS-150
BTFSS STATUS,ZEROBIT; bit zero Z bt ln 1 nu CARS=150.
. Bit 1, c DC: bit nh/mn s cho lnh ADDWF, ADDLW, SUBLW, SUBWF. i
vi mng, cc tnh c gi.
1= c nh t bit 4 ca kt qu.
0=khng c nh t bit 4 ca kt qu.
Th d: 28 BCD
+ 38 BCD
tng ng
1
0010 1000
+0011 1000
0 1100000
c nh t bit 3 sang bit 4 nn c DC=1.
. Bit 4, /T0: time-out bit
34
1= sau khi bt in, lnh CLRWDT hay SLEEP
0=mt WDT time out din ra.
. Bit 3,/PD: power-down bit
1=sau khi bt in hay lnh CLRWDT
0= bng cch thc thi lnh SLEEP.
35
Bn b nh ca 16F84:
a ch
Tn nh (file name)
00
a ch gin tip Ind. Add
01
TMR0
02
PCL
03
STATUS
04
FSR
05
PORTA
06
PORTB
07
08
EEDATA
09
EEADR
0Ah
PCLATH
0Bh
INTCON
68 nh ngi dung (user
0Ch
files)
4Fh
Bank 0
Tn nh (File name)
a ch gin tip Ind. Add
OPTION
PCL
STATUS
FSR
TRISA
TRISB
EECON1
EECON2
PCLATH
INTCON
Bn b nh vi iu khin 16F877A
a ch
Tn nh bank 0 Tn nh bank Tn nh bank
1
2
00h
IND. Add a ch Ind. Add
Ind. Add
gin tip
01h
TMR0
OPTION
TMR0
02h
PCL
PCL
PCL
03h
STATUS
STATUS
STATUS
04h
FSR
FSR
FSR
05H
PORTA
TRISA
06H
PORTB
TRISB
PORTB
07H
PORTC
TRISC
08H
PORTD
TRISD
09H
PORTE
TRISE
0AH
PCLATH
PCLATH
PCLATH
0BH
INTCON
INTCON
INTCON
0CH
PIR1
PIE1
EEDATA
0DH
PIR2
PIE2
EEADR
0EH
TMR1L
PCON
EEDATH
0FH
TMR1H
EEDARH
10H
T1CON
Thanh ghi a
nng 96 byte
11H
TMR2
SSPCON2
12H
T2CON
PR2
13H
SSPBUF
SSPADD
14H
SSPCON
SSPSTAT
15H
CCPR1L
16H
CCPR1H
17H
CCP1CON
18H
RCSTA
TXSTA
Bank 1
Tn nh bank
3
Ind. Add
OPTION
PCL
STATUS
FSR
TRISB
PCLATH
INTCON
EECON1
EECON2
Thanh ghi a
nng 96 byte
36
19H
1AH
1BH
1CH
1DH
1EH
1FH
6FH
7FH
TXREG
SPBRG
RCREG
CCPR2L
CCPR2H
CCP2CON
ADRESH
ADRESL
ADCON0
ADCON1
Thanh ghi
a Thanh ghi a
nng 96 byte
nng 80 byte
37
*Thanh ghi PIE1 (a c 8CH)
Bit 7
PSPIE
6
ADIE
5
RCIE
4
TXIE
3
SSPIE
2
1
0
CCP1IE TMR2IE TMR1IE
Thanh ghi PIE1 cha cc bit cho php ring r cho cc ngt ngoi vi.
Bit 7 PSPIE: bit cho php ngt c /ghi port t song song.
1=cho php ngt c/ghi PSP.
0=cm ngt c ghi PSP.
Ch : PSPIE l dnh d tr trn thit b PIC 16F873A/876A; lun gi bit ny b xa.
Bit 6: ADIE: bit cho php ngt chuyn i A/D.
1=cho php ngt chuyn i A/D.
0= cm ngt chuyn i A/D.
Bit 5 RCIE: bit cho php ngt nhn (thu) USART.
1=cho
php
ngt
thu
USART.
0=cm ngt thu USART.
Bit 4: TXIE: bit cho php ngt pht USART.
1=cho php ngt pht USART.
0=cm ngt pht USART.
Bit 3 SSPIE: bit cho php ngt port ni tip ng b.
1=cho php ngt SSP.
0=cm ngt SSP.
Bit 2 CCP1IE: bit cho php ngt CCP1.
1=cho php ngt CCP1.
0=cm ngt CCP1.
Bit 1 TMR2IE: bit cho php ngt khp TMR2 ti PR2.
1= cho php ngt khp TMR2 ti PR2.
0=cm ngt khp TMR2 ti PR2.
Bit 0 TMR1IE: bit cho php ngt trn (overflow) TMR1.
1=cho php ngt trn TMR1.
0=cm ngt trn TMR1.
*Thanh ghi PIR1 (a ch 0CH)
Thanh ghi PIR1 cha cc bit c ring r cho cc ngt ngoi vi.
Bit 7
PSPIF
6
ADIF
RCIF
TXIF
SSPIF
CCP1IF
1
TMR2IF
0
TMR1IF
Bit 7 PSPIF: bit c ngt c /ghi port t song song.

1= mt tc v c hay ghi din ra (phi c xa bng phn mm).
0=khng c c hay ghi din ra.
Ch : PSPIF l dnh gi ch trn thit b PIC 16F873A/876A; lun gi bit ny b
xa.
Bit 6 ADIF: bit c ngt chuyn i A/D.
1=mt chuyn i A/D hon thnh.
38
0=chuyn i A/D khng hon thnh.
Bit 5 RCIF: bit c ngt thu USART.
1=b m nhn USART y.
0=b m nhn USART trng.
Bit 4 TXIT: bit c ngt pht USART.
1=b m pht USART trng.
0= b m pht USART y.
Bit 3 SSPIF: bit c ngt port ni tip ng b (SSP).
1=iu kin ngt SSP din ra v phi c xa bng phn mm trc khi tr v t
chng trnh phc v ngt (ISR). iu kin m thit lp bit ny(=1) l:
.SPI- mt s nhn/pht din ra.
.T I2C -mt s nhn/pht din ra.
.Ch I2C
-Mt s nhn/pht din ra.
-iu kin Start khi ng c hon thnh bi mun SSP.
-iu kin Stop khi ng c hon thnh bi mun SSP.
-iu kin Restart khi ng c hon thnh bi nun SSP.
-iu kin chp nhn khi ng c hon thnh bi mun SSP.
-iu kin Start din ra trong khi mun SSP l rnh ri (h thng a(nhiu) ch).
-iu kin Stop din ra khi mun SSP l rnh ri (h thng a ch).
0=khng c iu kin ngt SSP din ra.
Bit 2 CCP1IF: bit c ngt CCP1.
Ch bt gi:
1= Bt gi thanh ghi TMR1 din ra (phi c xa bng phn mm).
0= khng din ra bt gi thanh ghi TMR1.
Ch so snh:
1=Mt s khp so snh thanh ghi TMR1 din ra (phi c xa bng phn mm).
0=khng c din ra s khp so snh TMR1.
Ch PWM:
Khng c dung trong ch ny.
Bit 1 TMR2IF: bit c ngt khp TMR2 ti PR2.
1=khp TMR2 ti PR2 din ra.
0=khng din ra khp TMR2 ti PR2.
Bit 0 TMR1IF: bit c ngt trn TMR1.
1=thanh ghi TMR1 b trn (phi c xa bng phn mm).
0=Thanh ghi TMR1 khng c trn.
*Thanh ghi PIE2 (a ch 8DH)
Thanh ghi PIE2 cha cc bit cho php ring r cho ngt ngoi vi CCP2, ngt xung t
bus SSP, ngt tc v ghi EEPROM v ngt so snh.
Bit 7
-
6
CMIE
5
-
4
EEIE
3
BCLIE
Bit 7 Khng hin thc, c l 0.

Bit 6 CMIE: bit cho php ngt b so snh.
1=cho php ngt b so snh.
0=cm ngt b so snh.
2
-
1
-
0
CCP2IE
39
Bit 5 khng hin thc, c l 0.
Bit 4 EEIE: bit cho php ngt hot ng ghi EEPROM.
1=cho php ngt ghi EEPROM.
0= cm ngt ghi EEPROM.
Bit 3 BCLIE: bit cho php ngt xung t bus.
1=cho php ngt xung t bus.
0=cm ngt xung t bus.
Bit 2-1 khng hin thc, c l 0.
Bit 0 CCP2IE: bit cho php ngt CCP2.
1=cho php ngt CCP2.
0=cm ngt CCP2.
*Thanh ghi PIR2 (a ch 0Dh)
Thanh ghi PIR2 cha cc bit c cho ngt CCP2, ngt xung t bus SSP, ngt tc v
ghi EEPROm v ngt b so snh.
Bit 7
CMIF
4
EEIF
3
BCLIF
2
-
1
-
0
CCP2IF

Bit 6 CMIF: bit c ngt b so snh.
1=ng vo b so snh thay i (phi c xa bng phn mm).
0=ng vo b so snh khng i.
Bit 4 EEIF: bit c ngt tc v ghi EEPROM.
1=tc v ghi hon thnh (phi c xa bng phn mm).
0=tc v ghi khng hon thnh.
Bit 3 BCLIF: bit c ngt xung t bus.
1=Mt xung t bus din ra trong SSP khi cu hnh ch ch I2C.
0=Khng c xung t bus din ra.
Bit 2-1 Khng hin thc, c l 0.
Bit 0 CCP2IF: bit c ngt CCP2.
Ch bt gi:
1=Bt gi thanh ghi TMR1 din ra (phi c xa bng phn mm)
0=khng c din ra bt gi thanh ghi TMR1.
Ch So snh:
1=Mt s khp so snh thanh ghi TMR1 din ra.
0=khng c din ra khp so snh thanh ghi TMR1.
Ch PWM:
Khng s dng .
*Thanh ghi PCON: (a ch 8Eh)
Thanh ghi PCON cha cc bit c cho php s khc bit gia Reset lc bt in v
Reset lc mt ngt ngun.
Bit 7-2: khng hin thc, c l 0.
Bit 1 POR : bit trng thi reset lc bt in.
1=Khng c reset lc bt in din ra.
40
0=mt reset lc bt in din ra (phi c bt (=1) bng phn mm sau khi reset
lc bt in din ra).
Bit 0 BOR: bit trng thi reset lc mt ngt ngun.
1=Khng c reset Brown-out din ra.
0= Mt reset brown-out din ra (phi c bt bng phn mm sua khi reset brownout din ra).
IV.Tng kt bi:
-Chun b bi mi.
Chng 2: Phn cng vi iu khin PIC 16F84 v 16F877A
1.Trnh by cu trc v hot ng ca vi iu khin PIC 16F84.
2. Trnh by cu trc v hot ng ca vi iu khin PIC 16F877A.
3. Trnh by b nh chng trnh. T chc b nh ca PIC 16F877A/16F84 c c
im g? (lai Harvard hay Von Neumann).
4. B m chng trnh PC l g?
5. Ngn xp l g? Cng dng ca con tr nn xp. c im b nh ngn xp ca PIC
16F877A/16F84 (c my mc ).
6. Trnh by ngha cc chn ra ca PIC 16F84, 16F877A.
7. K tn v nu chc nng ca cc thanh ghi chc nng c bit (SFR).
8. Thanh ghi STATUS (trng thi) l g. Nu c in cc bit ca n.
9. Trnh by bn b nh d liu ca PIC 16F877A.
10. Trnh by 6 ng dng thc t ca b vi x l.
11. Cho bit c b nh gi a ch c ca b vi x l vi 20 ng a ch.
12. Minh ha lm th no chuyn ni dung a ch 20H vo thanh ghi tch ly W.
13. Sau y l mt lnh ca PIC 16F877A:
MOVWF 06h
a)M lnh 14 bit ca lnh ny l g?
b)Gii thch mc ch cc bit ca lnh ny.
c)Lnh ny tn bao nhiu chu k my thc thi?
d)Gi s PIC 16F877A dng thch anh 4 Mhz th my bao lu thc thi lnh ny?
14.Bus vi x l no l 2 chiu.
15. Nu nghi ng CPU b hng th qui trnh v nhng iu cn ch cn phi theo
sa cha l nh th no?
Ngy .thng..nm 2011

B mn
Ngy .thng..nm 2011

Ging vin son
41
Bi ging s 3: : Tp lnh ca vi iu khin PIC( S tit: 10)
III.1. Mc tiu:
-Gii thiu.
-Cc phng php a ch ha.
- Tp lnh ca vi iu khin PIC : tp lnh vi iu khin PIC, cc thanh ghi, tm
tt tp lnh.
-Cc ch th assembler.
-Phng php lp trnh: phng php lp trnh, chng trnh con.
-Phn trng, bng, khn, bt long, micro c dy(hay khng dy), my tnh, v n
chiu (hay my chiu).
Datasheet c a PIC 16F84 v 16F877A.
vin.
Chng 3: Tp lnh ca vi iu khin PIC
3.1.Gii thiu chung v lp trnh hp ng
3.1.1. Chng trnh :
Ma
nguon
Thong
dch/Bien
dch
Ngon ng
may
Hnh 3.1
CPU
Hanh
ong
42
-Chng trnh : la chuoi cac cau lenh bao cho may phai lam g, lam nh the nao
vakhi nao phai lam.
-Ngon ng may : la chuoi cac so 0/1 ma CPU thc hien. Ngon ng may c giai
quyet trc tiep bi mach ien t
-Ngon ng cap cao : gom co cac ngon ng sau
. Ngon ng lap trnh hng oi tng : C++
.Ngon ng lap trnh cap cao : C, Pascal, QBasic
.Ngon ng lap trnh logic : prolog
. Ngon ng lap trnh ham : lisp
. Thiet ke giao dien : Visual Basic, Borland Delphi va C++ Builder/Visual C++
- Bo phan bien dch : la nhng chng trnh dch ma nguon sang ma may
- Ngon ng assembly : dung hoa ngon ng cap cao va ngon ng may, ta dung ngon
ng assembly. Chng trnh se dung ma gi nh va dung cac lenh cua CPU
Ngon ng
assembly
Trnh
bien dch
Assembly language
Program
Assembler
Chng trnh
oi tng
Object program
Hnh 3.2: Qua trnh assembling 1 chng trnh nguon

V du : MOVWF 6 assembling 00 0000 1000 0110 (ma may)
d liu trong thanh ghi W c t vo PORT B.
3.1.2.Gii thieu qua trnh bien dch :

Phn mm MPLAB
MPASM.EXE : dch m ngun thnh m my , chy MS-DOS.
Trong mi trng Windows, cc tp tin cn c trn a l :MPASMWIN.EXE: ,
MPLINK.exe, v MPLIB.exe.
To ra d n dung MPLAB:
43
Prog1.asm
PxxFyy.inc
MPASM (assembler)
Prog1.obj
MPLIB(librarian)
MPLINK
(linker)
Sub.lib
Prog1.lst
Prog1.hex
Device.lkr
Prog1.map
Prog1.err
Hnh 3.3: File Project trong MPLAB.

Trong MPLAB, project (d n) l 1 nhm cc file (tp tin) c to ra hay nhn dng
bi IDE. Hnh 3.3 minh ha cu trc ca 1 d n hp ng.
3.1.3. Qui trnh xy dng chng trnh:
a. Nhn v nghe: vn g cn gii quyt, ci g cho, ci g cn tm, c th v mt
lu (flow chart) din t chng trnh hot ng nh th no.
b. Vit chng trnh theo ngn ng assembly (hp ng) s dng cc iu cho
gii quyt bi ton theo yu cu u ra.
c.Nhp chng trnh vo my tnh.
d. CHuyn m ng cho chng trnh (assembling-bin dch).
e. Cho chy chng trnh.
f. nh gi kt qu.
g. Bo tr.
V d: Vit chng trnh nhp mt s v in ra tr s tuyt i ca s .
V lu gii thut:
Bat au
Nhap 1 so
Tnh tr tuyet oi
In ket qua
Ket thuc
44
K hieu bat au/ket thuc

Nhap/xuat
Lenh/thao tac
Lenh re nhanh
Goi chng trnh con
3.1.4. Cu to lnh:
Mot lenh trong ngon ng assembly (hp ng) trong chng trnh gom co 4 khu
vc sau :
Nhan
Ma lenh
cac toan hang
ghi chu
LOOPA
MOVF
TMR0, W
; c TMR0 vo W
*Nhan (label field): la mot ten , dung cac ch cai (a-z), so (0-9) va dau gach di
Nhan dung cho tham khao , lam a ch , goi chng trnh con
*Ma lenh (Op-code) : la nhng ch viet tat, de gi nh c dung oi vi lenh cua
PIC 16F877A. V du : movf, movlw, addwf, subwf vv
*Toan hang (operand) : lenh co the la mot toan hang hoac hai toan hang. Trng
hp 2 toan hang th toan hang th 2 goi la toan hang en (destination operand) va
toan hang th 1 goi la toan hang nguon (source operand)
V d: IORWF 7,W ; ni dung nh 7 c OR vi W, kt qu c lu W
DECF 12
W : toan hang en, 7 : toan hang nguon
V du : lenh 1 toan hang : COMF 6; o bit (b) nh 6.
Lnh NOP ;khng c ton hng.
*Ghi chu (comment) : la nhng li chu thch cho cho lenh o bat au bang dau (;).
Chng trnh se bo qua
3.2.Phng php a ch ha (Phng thc tm kim a ch):
Truy xut b nh d liu:
a.Tm gin tip b nh
Phng thc tm loi ny thc hin thong qua INDF b nh v FSR.
a ch thc t trc tin t vo trong FSR thong qua vic truy cp INDF thc hin
gin tip c v vit s liu b nh.
Phng php tm a ch gin tip ch yu dng vit cc chng trnh cc bng
tra hoc l bng tr s thc ht sc tin li.
Th d: addwf INDF,<d>
b. Tm kim a ch s lp tc (tc thi).
S thao tc v s lp tc, c th nhn c trc tip t trong m lnh.
Th d: movlw <constant>
Movlw .122
c.Tm kim a ch trc tip.
45
C th phng vn truy cp tm kim a ch trc tip vi bt k b nh no, tc l trong
m lnh bao gm a ch ca b nh b truy cp.
Th d: addwf <data_address>,<d>
d. Tm kim a ch byte.
C th trc tip truy cp tm kim mt bit bt k no trong b nh bt k tc l trong
m lnh bao gm a ch ca b nh b truy cp ng thi bao gm a ch hang
s trong b nh .
Truy xut b nh chng trnh:
e. a ch tuyt i:
goto <program_address>
f. a ch tng i:
addwf PCL,f
*a ch trc tip thanh ghi:
Th d: khi ng bit 0-3 ca port B nh ng ra.
Thanh ghi W
F0h
9 bit a ch hin thc
0
RP1 RP0
7 bit t lnh
46
Bsf STATUS, RP0
Movlw b11110000
Movwf TRISB
Bcf STATUS,RP0
Clrf PORTB
*a ch gin tip thanh ghi:

2 file ( nh) : a ch gin tip (00h) v FSR (09h)
47
Th d: Xa tt c v tr RAM t 20h ti 7Fh.

Thanh ghi W
20h
9 bit a ch hin thc
0
IRP
FSR
Bcf STATUS,IRP
Movlw 0x20
Movwf FSR
loop clrf INDF
Incf FSR,f
Btfss FSR,7
Goto loop
<lnh k tip>
Lu s N vo thanh ghi file a nng: bn lu s N vo thanh ghi file 09h. iu ny l
a ch trc tip. tuy nhin, ta bo chng trnh chuuyn s N vo vo thanh ghi file X,
trong X gi gi gi tr 09h. iu ny l a ch gin tip. Thanh ghi file X thc s
c gi l thanh ghi chn file (FSR) (bi v n l thanh ghi file m chn la thanh
ghi file no chuyn s vo).
Th d: chuyn 00h vo nh 08h
movlw d08; np s 08 vo FSR
Movwf FSR
Clrf INDF ; xo a ch gin tip
*a ch tc thi:
Th d: movlw 0x20
48
*PC absolute addressing (a ch tuyt i PC):
Lnh call v goto:
13 12 11 10 9 8
7
6
5
4
Opcode
. a ch tuyt i PC (B nh chng trnh)

-Nhy ti 1 v tr b nh chng trnh khc ra khi chui tun t PC.
-Gi chng trnh con.
-11 bit ca a ch 13 bit yu cu c m ha trong lnh.
-2 bit them vo s n t thanh ghi PCLATH.
. c dung khi thc hin tc v goto tnh ton.
-a ch nhy l c tnh bi chng trnh.
-a ch c tnh ton l c ghi trc tip vo b m chng trnh.
Th d:
org 0x0000
molw HIGH chuongtrinhcon
movwf PCLATH
call chuongtrinhcon
.
org 0x1250
chuongtrinhcon <lm g c ch>
..
return
*a ch tng i PC:
49
ghi vo PC:
1)ghi byte cao vo PCLATH.
2)ghi byte thp vo PCL (PCH s c np vi gi tr t PCLATH).
Th d: movlw HIGH 0x1250
movwf PCLATH
movlw LOW 0x1250
movwf PCL
Th d: S dng bng tm kim vi a ch tng 61i ly mu bit hin th
con s trn led 7 on.
Org 0x0020; trang 0
Movlw HIGH sevensegdecode
Movwf PCLATH
Movlw .5
Call sevensegdecode
Movwf PORTB
org 0x1800; trang 3

sevensegdecode:
addwf PCL,f
retlw b00111111 ;0
retlw b00000110; 1
retlw b01011011; 2
retlw b01001111;3
retlw b01100110;4
retlw b01101101;5
retlw b01111101;6
retlw b00000111;7
retlw b01111111;8
retlw b01101111;9
50
3.3. Tp lnh ca PIC 16F84A v 16F877A
Tp lnh ca PIC bao gm 35 lnh. Mt lnh thc thi trong 1 chu k my, tr
cc lnh nhy l 2 chu k my.
Vi iu khin lm vic ch yu bng vn hnh d liu trong nh. Mt s
trong cc nh ny l thanh ghi c bit, ci khc l nh ngi dng. Trong ng
dng iu khin, d liu c th c c t port (cng) ng vo, vn hnh v chuyn
ti port ng ra.
s dng vi iu khin bn cn bit cch di chuyn v vn hnh d liu ny
trong b nh. C 35 lnh trong PIC 16F877A/16F84A cho php bn lm iu ny.
S dng vi iu khin l s dung nhng lnh ny trong chng trnh. Ging nh bt k
ngn ng m bn khng s dng tt c t tt c mi lc, i khi bn khng bao gi
dung ci khc ch by gi v lp li. Tp lnh ca PIC th ging iu ny, bn c th
qun l tt vi 15 lnh m thi.
Nhiu nht (a s) trong cc lnh bao gm vic s dng thanh ghi lm vic
(working register) hay W. Thanh ghi W l trung tm (tri tim) ca vi iu khin PIC.
di chuyn d liu t nh A (file A) sang nh B, bn phi di chuyn n t nh
A sang W v sau t W sang nh B, kh ging h thng in thoi dn hng
mt cuc gi ti ni khc thng qua tng i.
Thanh ghi W cng vn hnh php ton logic v s hc trn d liu.
3.3.1. Tp lnh vi iu khin PIC
lien lc (giao tip) vi vi iu khin PIC bn phi hc cch lp trnh n s
dng tp lnh ca PIC. PIC 16F84 c 1k x 14 bit word b nh chng trnh EEPROM,
68x8 bit thanh ghi a nng v 35 lnh . PIC 16F877A c 8kx14 bit word b nh
chng trnh Flash, 368x8 bit thanh ghi a nng v 35 lnh lm nn ba nhm lnh : bit,
byte v tc v iu khin v s.
Cc lnh ny c th c chia lm thnh 3 loi:
. lnh bit, m tc ng ln 1 bit trong nh (file).
. lnh byte, m tc ng ln 8 bit trong mt nh.
. Tc v iu khin v s , m hiu chnh nh vi cc bin hay iu khin s di
chuyn ca d liu t nh ny n ni khc.
a.Lnh bit:
Dng tng qut ca lnh:
Tc v thanh ghi file hng bit:
13
10 9
Opcode
7 6
b (bit#)
0
f(file#)
b=3 bit a ch bit.

f=7 bit a ch thanh ghi file.
Lnh bit tc ng trn bit c th trong mt nh, v vy lnh c th c theo sau bi
d liu m ch ra s nh v s bit.
Th d BSF 6,3. M ny khng c nhiu thong tin chng ta c th s dng iu g
ging nh BSF PORTB,BUZZER trong PORTB l nh 6 v BUZZER c
ni vi bit 3 ca port ng ra.
Trong phn tng ng chng ta s thy PORTB equ 6 v BUZZER equ 3.
* BCF bit ; xa trong nh.
51
Th d: GPIO equ 6; GPIO l nh 6
BCF GPIO,4; xo (0)bit 4 ca nh 6
* BSF bit; bt trong nh.
Th d: BSF GPIO,2; bt bit 2 ln 1.
* BTFSC bit; kim tra bit trong nh v b qua nu bit b xa (0).
Th d: CHK_ON BTFSC GPIO,0; kim tra bo ng
* BTFSS bit; kim tra bit trong tp tin ( nh) v b qua nu bit c bt (=1).
Th d: zerobit equ 2; zerobit l bit 2
STATUS equ 3; STATUS l nh 3.
BTFSS STATUS,zerobit
b)Lnh byte:
Dng tng qut ca lnh:
Tc v thanh ghi file hng byte:
13
Opcode
7
d
0
f(file#)
D=0 cho ch l thanh ghi W.

D=1 cho ch l nh f.
F= 7 bit a ch thanh ghi file.
Lnh byte lm vic trn tt c 8 bit trong nh. V vy mt lnh byte s c theo sau
bi s nh ph hp.
TH d: DECF 0Ch; lnh ny khng c nhiu thong tin chng ta s ch ra tn ca
nh nh l DECF COUNT. D nhin chng ta s cn khai bo phn tng ng m
COUNT l nh 0Ch bng lnh COUNT equ 0Ch.
* ADDWF cng W v F.
* ANDWF and logic W v F.
* CLRF xa nh .
* CLRW xa thanh ghi lm vic W.
* COMF ly b nh.
* DECF gim nh i 1.
* DECFSZ gim nh i 1, b qua nu bng khng (0).
* INCF tng nh ln 1.
* INCFSZ tng nh ln 1 v b qua nu bng khng (0).
* IORWF: I-xor W v F (inclusive or)
* MOVF di chuyn F vo W.
* MOVWF di chuyn W vo F.
* NOP khng lm g c.
* RLF quay tri nh 1 bit ( 1 v tr).
* RRF quay phi nh 1 bit.
* SUBWF tr W t F , ngha l F-W.
* SWAPF trao i 4 bit thp v 4 bit cao ca F.
* XORWF EXOR W v F (exclusive or).
c) Tc v iu khin v s:
Dng tng qut ca lnh:
52
Tc v iu khin v s:
13
8 7
Opcode
0
k(s)
K=gi tr tc thi 8 bit.

*Ch dung cho lnh CALL v GOTO:
13
Opcode
11 10
0
k(s)
k=11 bit gi tr tc thi.

f=00h7Fh.
Tc v s v iu khin vn hnh d liu v thc hin nhy (r nhnh) chng trnh.
* ADDLW cng s vi W.
* ANDLW AND logic s vi W.
* CALL gi chng trnh con.
* CLRWDT xa b m xung thi gian (b nh thi ch gi ca).
* GOTO nhy ti a ch.
* IORLW inclusive-or s vi W.
* MOVLW chuyn s vo W.
*
RETFIE
tr
v
t
ngt.
* RETLW tr v ni s trong W
*RETURN tr v t chng trnh con.
* SLEEP i vo ch ch (standby).
* SUBLW tr s t W, ngha l s-W.
* XORLW EXOR s v W.
Nhng lnh ny lm vic ch yu trn 2 thanh ghi 8 bit-thanh ghi lm vic W v
nh F m c th l mt trong 15 thanh ghi c bit ca 68 thanh ghi nh a dng
m to thnh b nh ngi d ng (RAM) ca 16F84 hay ca 368 byte RAM ca
16F877A.
Vi iu khin PIC l thit b 8 bit-iu ny c ngha l s cc i m c th lu tr
trong bt k v tr nh l 255. Mt s PIC nh l 17C43 c 454 byte b nh d liu.
nh v nh ln hn 255, tng trang hay bank c gii thiu. Bank 0 gi a
ch nh ln ti 255, trong khi bank 1 c th gi hn 255 v bank 2 hn 255,vv
Bn cn bit thanh ghi hay nh nm bank c th.
3.3.2. Thanh ghi:
Thanh ghi c to thnh t 8 bit nh minh ha hnh sau:
53
Bit 7 6
1
MSB .... LSB

Hnh: Cu to thanh ghi.
Bit 0 l bit c trng s thp nht (LSB-Least Significant bit) v bit 7 l bit c trng s
cao nht (MSB-Most Significant bit).
*Thanh ghi 00: thanh ghi nh a ch d liu gin tip.
Xem thanh ghi chn nh , thanh ghi 04.
*Thanh ghi 01: TMR0, thanh ghi m/nh th 0.
Thanh ghi ny c th c vit hay c ging nh bt k thanh ghi no khc. N
c dung cho m hay nh th s kin. Ni dung ca thanh ghi c th c tng
(cng 1) bi ng dng ca 1 xung bn ngoi p vo chn TOCKI, th d m xe i
vo bi u xe hay bi xung clock chu k lnh bn trong m chy ca tn s thch
anh ti s kin thi gian.
*Thanh ghi 02, PCL, b m chng trnh .
B m chng trnh t ng tng thc hin lnh chng trnh. Mt ng dng ca
s dng b m chng trnh l minh ha phn bng tm kim chng cc v d
lp trnh (chng 8).
*Thanh ghi 03h, thanh ghi trng thi (STATUS register).
*Thanh ghi 04 FSR, thanh ghi la chn nh.
Thanh ghi la chn nh c s dng kt hp vi thanh ghi 00. Chng c dung
trong a ch gin tip c hay ghi d liu khng phi t nh c th, nhng ti
hay t nh c ch ra bi d liu trong thanh ghi chn nh.
*Thanh gho 05 PORTA v thanh ghi 06 PORTB
Port l cc kt ni chn m cho php vi iu khin lin lc (truyn thng) vi th gii
xung quanh (bn ngai). PortA l port 5 bit 16F84 , ch c 5 bit thp c dng v
l port 6 bit 16F877A, ch c 6 bit thp c dng. Bit 0 ca portA c th dung
lp trnh l ng vo ng h (T0CKI). Port B l port 8 bit. thit lp port, TRIS
c dung. TRIS l vit tt ca 3 trng thi. Ba trng thi c th l ng vo tr khng
cao, ng ra mc cao (5V) hay ng ra mc thp (0V).
*Thanh 8Fh: thanh ghi iu khin dao ng (ch c 16F818)
Thanh ghi iu khin dao ng c dung chn tn s xung clock khi s dng dao
ng bn trong.
Bit 7
IRCF2
IRCF1
4
IRCF0
3
-
IOFS
Hnh : Thanh ghi iu khin dao ng.

Bit 6-4: IRCF2: IRCF0 : cc bit chn tn s dao ng bn trong.
IRCF2 IRCF1 IRCF0
1
1
1
8 Mhz (ngun 8 Mhz li xung clock).
1
1
0
4 Mhz
1
0
1
2 Mhz
1
0
0
1 Mhz
0
1
1
500 khz
0
1
0
250 khz
0
0
1
125 khz
54
0
0
0
31,25 khz (ngun INTRC li xung clock trc tip).
bit 2: IOFS: INTOSC bit n nh tn s.
*Thanh ghi W:
Thanh ghi W gi kt qu ca mt tc v hay truyn d liu bn trong. N nh l trao
i in thoi-d liu i vo thanh ghi W v c truyn ra ti mt nh khc.
*Thanh ghi tu chn : OPTION register
Thanh ghi ny c dung t l trc b m/ng h thi gian thc. Xung ng h
TMR0 chy tn s thch anh nhng c th c chia tn nh xung. bi h s t l
trc cho o khong thi gian di hn.
*Ngn xp (stack)
Ngn xp l mt vng nh lien tc c tnh cht vo sau ra trc (last in first out-LIFO).
Con tr ngn xp s gi a ch nh ngn xp.
Ngn xp l tn gn cho nh m gi vt ca a ch chng trnh khi lnh call
c thc hin. C 8 mc ngn xp trong 16F84A/16F877A, m ngha l chng trnh
c th nhy ti 1 chng trnh con v t nhy ti chng trnh con khc, lm
thnh 8 ln nhy tng cng v ngn xp s (c th) tr v n ngc ti chng trnh.
16C54 c ngn xp 2 mc.
3.3.3. Tm tt tp lnh
3.3.3.1. Lnh bit
a/BCF: xo bit trong nh F.
Th d: BCF 6,4 ; bit 4 c xa trong nh 6.
File 6 l PORTB, iu ny xa bit 4, ngha l bit 4 =0.
b/BSF
Bt bit trong nh F.
Th d: BSF 6,4;lnh ny bt bit 4 (=1) trong file 6, ngha l bit 4=1.
c/BTFSC:
kim tra bit trong nh v nhy (b qua) nu b xa (=0).
Th d: BTFSC 3,2 ; lnh ny kim tra bit 2 trong nh 3. Nu n b xa th lnh k
tip c b qua. nh 3 l thanh ghi trng thi STATUS, bit 2 l c zero Z. Nh vy
chng trnh nhy nu kt qu ca mt lnh l zero.
d/BTFSS:
kim tra bit trong nh v nhy (b qua) nu bit c bt ln 1.
Th d: BTFSS 3,2; nu bit 2 trong nh 3 l bt ln 1 th lnh k tip b b qua.
3.3.3.2. Lnh byte:
a/ADDWF:
Cng ni dung ca W vo F.
Th d: ADDWF 7; cng ni dung ca thanh ghi W v nh 7, ch l kt qu t
vo nh 7.
Gi s nh 7 cha s 5, thanh ghi W cha s 4. Kt qu lnh cng l nh 7 cha s
9
Th d: ADDWF 7,W; nh trn nhng kt qu c t W,w=9.
Trng thi nh hng c C, DC , v Z.
Th d: Cng 3h v 4h vi nh 20h cha 3h v nh 21h cha s 4h.
Movlw .0; np 0h vo thanh ghi W
Addwf 32,w; cng ni dung nh 20h (32) vi w, kt qu lu w
Addwf 33,w; cng ni dung nh 21h (33) vi w, kt qu lu w.
b/ANDWF:
Ni dung ca W c and (v) logic vi F.
55
Th d: ANDWF 12,W; ni dung ca nh 12 c and (v) logic vi ni dung ca
thanh ghi W. Ch l ni dung kt qu c t vo W.
nh 12: 0 1 1 0 0 0 1 0
W:
10010100
andwf
W:
11110110
Th d: ANDWF 12; nh trn nhng ni dung kt qu c t vo nh 12
(=11110110).
Trng thi nh hng c Z.
c/CLRF:
Lnh ny xa nh F, ngha l 8 bit trong nh F b xa (0).
Th d: CLRF 5; xa nh 5.
d/CLRW:
Lnh ny xa thanh ghi W.
Th d: CLRW
e/COMF
8 bit trong thanh ghi F c ly b, ngha l o li.
Th d: COMF 6; o bit (b) nh 6.
Gi s nh 6 l 1 0 1 0 0 0 0 1
Comf
01011110
f/DECF:
Tr i 1 t nh F (F-1). Lnh ny c ch cho m xung v 0.
Th d: DECF 12; s gim nh 12 i 1, kt qu s c lu trong nh 12.
Gi s nh 12 cha s 5, kt qu lnh decf cho nh 12 cha 4.
Th d: DECF 12,W; nh trn v s lu kt qu vo W (=4), li nh 12 khng
i.
g/DECFSZ:
Ni dung ca nh F c gim i 1 v lnh k tip c b qua nu kt qu bng 0.
Th d : DECFSZ 12
Hay
DECFSZ COUNT
h/INCF:
Cng 1 vo nh F. Gi tr ny sau c so snh vi ci khc xem nu gi tr
tng cng t c cha.
Th d: INCF 14; tng nh 14 ln 1
Hay
INCF COUNT
Gi s nh 14 cha s 2, sau khi thc hin lnh incf nh 14 cha s 3.
i/INCFSZ:
Cng 1 vo F nu kt qu bng 0 th b qua lnh k tip.
Th d: INCFSZ 19
Hay
INCFSZ COUNT
j/IORWF:
Ni dung ca thanh ghi W c OR (hoc ) logic vi (thanh ghi ) nh F.
Th d: IORWF 7,W; ni dung nh 7 c OR vi W, kt qu c lu W.
56
Th d: IORWF 7; nh trn nhng kt qu c lu nh 7.
k/MOVF:
Ni dung ca nh F c di chuyn vo thanh ghi W, t d liu c th c di
chuyn ti port ng ra.
Th d: MOVF 12,W; nh 12 c chuyn ti W.
Th d MOVF 12; nh 12 c chuyn ti nh 12? c zero b nh hng.
l/MOVWF:
Ni dung ca thanh ghi W c chuyn vo nh F.
Th d: MOVWF 6; d liu trong thanh ghi W c t vo PORTB.
W=11100010, sau lnh movwf th nh 6 cha 11100010.
m/NOP: (No operation)
Khng lm g c. iu ny ging nh tng khng tt nhng rt hu ch cho tr
hon nh. Lnh NOP to tr ca tc xung clock.
n/RLF:
Ni dung ca nh F c quay i 1 bit t tri qua phi thong qua c nh. Dch 1 bit
nh phn v bn tri c ngha l s c nhn vi 2. Lnh ny c ch khi nhn s
nh phn.
Th d: RLF 12,W; dch tri nh 12 qua c nh, kt qu c t vo W.
Th d: RLF 12; nh trn nhng kt qu c t vo nh 12.
S bn di minh ha nh 12 c dch tri
0
C C
nh 12 trc khi quay tri
C C
nh 12 sau khi quay
o/RRF:
Lnh ny quay phi ni dung nh F 1 bit v bn phi (Ni dung nh F c quay 1
v tr v bn phi.
Th d : RRF 12,W; dch phi nh 12 qua c nh, kt qu c t vo W.
Th d: RRF 12; nh trn nhng kt qu c t vo nh 12.
nh 12 trc khi quay phi
0
C C
57
nh 12 sau khi quay
1
C C
p/SUBWF:
Ni dung ca thanh ghi W c tr i t ni dung ca nh F.
Th d: SUBWF 14,W; thc hin F-W, kt qu c t vo W.
Th d: SUBWF 14; thc thi F-W, kt qu t vo F ( nh 14).
Ch : nu W>F th c C=0 v kt qu l m (-ve).
Nu W<F th c C=1 v kt qu l dng (+ve) hay zero.
Nu W=F th c Z=1, kt qu l zero.
Trng thi nh hng c nh C, DC, c zero Z.
q/SWAPF:
4 bit (nibble) thp v 4 bit cao ca nh (file) F c i cho nhau.
Th d: SWAPF 12,W; i 4 bit thp v 4 bit cao ca nh 12 cho nhau, kt qu c
t vo W.
Gi s nh 12 cha 36H, kt qu thc hin lnh Swapf l W=63H.
Th d: SWAPF 12; kt qu c t vo nh 12.
r/XORWF:
Ni dung ca thanh ghi W c EXOR (hoc loi tr) vi ni dung nh F. Nu mt
s trn port ng vo, ch bo nhit , l ging nh thanh ghi W th kt qu l zero (0)
v c zero Z=1. Ch l bn khng th EXOR port ng vo trc tip vi 1 nh
(file), bn phi lm iu ny bng cch np nh vo thanh ghi W bng lnh movf.
Th d: movf 12,w; np ni dung nh 12 vo w.
Xorwf 6,w; exor w vi nh 6, kt qu t w.
Th d: XORWF 17,W; ni dung ca file 17 c exor vi thanh ghi W, kt qu c
lu W.
nh 17: 1 0 1 0 0 0 1 1
W:
11000111
xorwf
W=
0 1 1 0 0 1 0 0.
Th d: XORWF 17; nh trn nhng kt qu c t file 17.
Bn ch thanh ghi W quan trng nh th no trong hot ng ca vi iu khin.
D liu khng th i trc tip t A n B, n i t A sang W v sau t W sang B.
3.3.3.3. Cc tc v s v iu khin:
a)ADDLW:
Cng mt s ti thanh ghi W.
Th d: ADDLW 7; s cng s 7 vo W, kt qu c t W.
S 7
7
W: 3
10
addlw
b)ANDLW:
Ni dung ca W c and (v) logic vi mt s 8 bit. Kt qu c t vo trong W.
58
Th1i d : ANDLW 12H
Hay ANDLW B00010010
Hay ANDLW .18
Gi s W= 0 0 1 0 1 0 1 0
12h=0 0 0 1 0 0 1 0
lnh andlw:
W=
0 0 0 0 0 0 1 0=02h
Thanh ghi W c and(v) vi s 12h. Kt qu l 02h c t vo W.
c)CALL:
Lnh ny s gi mt chng trnh con trong chng trnh chnh.
Th d: CALL WAIT1MIN; lnh ny s gi mt chng trnh con (bn vit) i
1 pht. C th l bt n trong mt pht v sau tr li chng trnh chnh.
d)CLRWDT:
B nh thi watchdog (b m xung thi gian) b xa. B m xung thi gian
l thit b an ton trong vi iu khin nu chng trnh lm b m xung thi gian ht
thi gian v sau khi ng li chng trnh.
Trng thi nh hng c T0, PD.
e)GOTO:
y l lnh nhy khng iu kin ti mt v tr c th trong chng trnh.
Th d: GOTO SIREN
Th d: GOTO MAIN
f)IORLW:
Ni dung ca thanh ghi W c OR (hoc) logic vi mt s.
Th d: IORLW 27
W= 1 0 0 1 1 0 1 1
L (s)= 0 0 0 1 1 0 0 1
iorlw
L+W = 1 0 0 1 1 0 1 1
iu ny l cc rt hu ch xc nh nu bt k bit no trong nh c bt ln 1,
ngha l bng cch OR mt nh vi 00000000 nu tt c cc bit l zero, kt qu OR
l zero v bit c zero c bt trong thanh ghi trng thi.
g) MOVLW:
S 8 bit c di chuyn trc tip vo W.
Th d: MOVLW .127; chuyn s 127 vo W
h)RETFIE.
Lnh ny c dung tr v t ngt.
i)RETLW:
Lnh ny c dung cui mt chng trnh con tr v chng trnh chnh
theo sau lnh CALL. Gi tr s c t trong thanh ghi W. Lnh ny c th c
dung vi bng tm kim.
Th d: RETLW 0
j)RETURN:
Lnh ny c dung tr v t chng trnh con.
k)SLEEP
Khi thc hin lnh ny, chip vi iu khin c t vo ch ngh (sleep). Bit
trng thi gim cng sut b xa, trng thi ht hn (timeout) c bt ln 1, b m
xung thi gian v b chia tn t l trc c xa v b li dao ng b tt. B m
xung thi gian vn cn chy t xung clock bn trong ca n.
59
Th d: SLEEP
Trng thi nh hng c T0, PD.
l)SUBLW:
Ni dung ca thanh ghi W c tr t 1 s.
Th d: SUBLW 14; thc hin 14-W, kt qu c t vo W. Bi c nh C v c zero
Z trong thanh ghi trng thi (STATUS) b nh hng.
Ch : nu W>14 th c C=0 v kt qu l ve (m).
Nu W<14 th c C=1, kt qu l +ve (dng) hay zero
Nu W=14 th c Z=1, kt qu l 0.
iu ny l iu kin rt hu ch. tm ra nu iu g din ra 14 ln tr 14 t
nhng s din ra nu kt qu l zero (0).
Trng thi nh hng c C, DC v Z.
m) XORLW:
Ni dung ca thanh ghi W c EXOR vi mt s. Nu kt qu l zero th ni dung
gn kt, ngha l nu mt s trn port ng vo, ch th nhit , l ging vi s th kt
qu l zero v bit c zero Z c bt ln 1 (Z=1).
Ngha l :
0 0 =0
0 1 = 1
1 0= 1
1 1= 0
Th d: XORLW 67
h)lnh OPTION:
dung cho b nh thi (timer).
ni dung ca W c np vo thanh ghi OPTION. Lnh ny c dung chia t l
trc, ngha l bt tc nh thi TMR0
60
*Chng trnh nhn hai s nh phn 8 bit:

Start
Xo ACC v 2 nh cha kt qu
Np b m vi 8.
Dch tri cha s nhn.
No
C=1?
Yes
Xo c carry (A)=(A)+(20h)
No
B m =0?
Quay phi ACC v nh 30h
Gim b m (X=X-1)
yes
End
20h: s b nhn.
21h: s nhn.
Sauk hi chng trnh chy xong, kt qu s c gi vo 2 : 30h cha kt qu byte
thp v 31h cha kt qu byte cao.
Chng trnh nhn 2 s 16 bit s cho kt qu 32 bit. Cch thc hin cng ging nh
php nhn 2 s 8 bit.
3.4.Cac ch th assembler : (assembler directive)
Cac ch th assembler la cac lenh hng vao chng trnh assembly ch
khong phai do CPU thc hien. Chng trnh ta viet se bao gom cac ch th assembler,
tuy nhien cac ch th assembler nay se khong c dch ra ma may.
V du : ORG, EQU, vv
Moi ch th assembler gom co 4 khu vc :
Ten Ch th
Argument
Ghi chu
Pi
equ
3.14
;xac nh gia tr so pi
* Ten : dung cac k hieu nh ch, so giong nh nhan, bat au bang ch cai
* Ch th : ten viet tat ch th assembler, giong nh op-code
* Khu vc oi (argument) : cha 1 a ch nh hoac 1 so e s dung cung vi d lieu
va do d lieu xac nh
V du : DT=pi*R^2
61
CV=2*pi*R
* Ghi chu : comment
Mot so ch th assembler :
1.Ch dan ieu khien trang thai assembler
- ORG (originate) : khi au
Ch th org dung e at con tro lenh vao v tr khi au cua chng trnh trong bo
nh.
V du : org 100h ; chng trnh bat au v tr nh 0100h
- END : phai la phat bieu cuoi cung trong tap tin nguon. Ta khong c s dung
nhan trc ch dan END. Nhng g sau ch dan END se khong c x ly.
2. Ch dan nh ngha ky hieu
- EQU(equate) , can bang hay SET
c dung e lien ket 1 ten vi mot so hoac mot k hieu tng trng khac.
V du : pi equ 3.14
DT=2*pi*R, trong chng trnh assembler se thay pi=3,14
Th du : N38 SET 30
TMR0 EQU 1; TMR0 l file 1
STATUS EQU 3; STATUS l file 3
3. Ch dan khi tao tr trong bo nh
4. Ch dan danh cho trong bo nh
5. Ch dan lien ket chng trnh
3.5. Phng phap lap trnh :
3.5.1. Phng phap lap trnh
-Phan tch he thong
-Lu o giai thuat
-Viet chng trnh
Khi phai viet nhng chng trnh dai va hoan chnh th van e to chc cau
truc tr nen rat quan trong. Mot phng phap to chc la xay dng e cng . Co the
dung e cng e chia bai toan thanh nhng phan nho. Nhng phan nay phai theo
th t e giai quyet bai toan 1 cach chnh xac. Mot phng phap lam e cng cho
bai toan la ve lu o.
Bai toan : xay dng 1 lu o cho chng trnh ngon ng assembly e ieu
khien bao ong mot tram can xe ch hang. Neu xe ch qua 1 trong lng nao o th
se co am thanh bao ong, con neu gap c xe di hang qui nh th khong co bao
ong va cho phep xe i qua
Data_in : trong lng xe vao
Data_out : gia tr xuat e ieu khien , 00h :ngat bao ong, FFh : bao ong
Data_in <= max_wt data_out=00h
Data_in > max_wt data_out=FFh=11111111b
V trong lng cc ai la 10 tan nen max_wt=10=Ah
62
Lu o :
Bat au
nh ngha bien
at gii han trong lng
Ngat bao ong
oc trong lng data_in

So sanh
<= ngatbao ong
>
NEXT
Xuat bao ong
STATUS equ 3
CARRY equ 0
Data_in equ 20h
Data_out equ 21h
Max_wt equ 0Ah
Alarm_off : movlw .0
Movwf data_out
NEXT : movf data_in,w; nh 20h vo w

Sublw Max_wt; 10-w
BTFSC STATUS,CARRY
goto Alarm_off
Alarm_on : movlw b11111111
Movwf Data_out
Goto NEXT
Hnh 3.4:Bang lu o chng trnh cua tram kiem soat trong lng xe
3.5.2.Chng trnh con : (subroutine)
-Chng trnh con la mot phan nho cua chng trnh , dung e thc hien mot nhiem
vu rieng biet. Thng nhiem vu chng trnh con thc hien la loai lap lai trong
chng trnh
-Cu phap : Call ni en
Lenh e chung ta chuyen sang chng trnh con la lenh call. Khi ket thuc
chng trnh con, muon quay ve chng trnh chnh th dung lenh RETLW/RETURN.
Ni en cua chng trnh con co the la 1 nhan, 1 a ch . Lenh RETURN thng
khong co toan hang kem theo, RETLW c tr v s.
Khi CPU thc hien lenh call th a ch ke tiep cua chng trnh c gi cat
vao ngan xep (stack). Neu khong lam nh vay th CPU khong biet quay ve au trong
chng trnh chnh. Lenh call se ay noi dung ang hien dien trong con tro lenh PC
vao ngan xep, tiep theo CPU se a a ch nh cua chng trnh con vao con tro
lenh PC.
Qua trnh xay ra nh sau :
- Lenh call c CPU oc va giai ma
- Con tro lenh c tang len e ch vao lenh ke tiep trong chng trnh chnh
- Tiep theo noi dung cua con tro lenh c ay vao trong ngan xep
- a ch xuat phat cua chng trnh con c nap vao con tro lenh
63
Chng trnh con c thc hien
Lenh retlw/RETURN la lenh cuoi trong chng trnh con se ay bat a ch quay
ve cua chng trnh chnh ra khoi ngan xep
- a ch quay ve c nap vao con tro lenh va chng trnh chnh c tiep tuc
V du : Call Delay ; goi chng trnh con delay
nh ngha chng trnh con Delay :
Delay: clrf tmr0; bt u timer 0

Loopa movf tmr0,w; c tmr0 vo w
Sublw .32;time-32
Btfss 3,2; kim tra time-32=0
Goto loopa; time khng bng 32
Retlw 0; time l 32 , tr v
Chng trnh con weight:
Chng trnh tram can xe 3 thang o : hnh 3.5
start
nh ngha d lieu
at max_wt
call
nap data_in1
call weight
nap data_in2
ngat bao ong

call
ret
bao ong
ret
call weight
nap data_in3
call
ret
call weight
call
jump
ret
weight
Hnh 3.5
IV.Tng kt bi:
-Chun b bi mi.
Chng 3: Tp lnh ca PIC 16F877A v 16F84
64
1.Chng trnh l g? Nu c im ca ngn ng my, hp ng v ngn ng cp cao.
2. Qu trnh bin dch : cch to d n dung MPLAB.
3. Trnh by cc bc (qui trnh) xy dng chng trnh.
4. Mt lnh hp ng y gm cc b phn no?
5. Phng php xc nh v tr ca mt ton hng c gi l g?
6.Trnh by cc phng thc a ch ha. Cho v d.
7.Tp lnh ca PIC c chia lm my nhm. K tn.
8. Gii thch ngha ca lnh MOVF 12,W.
9. Ch th EQU dung lm g.
10. Cho mt th d v ngn ng lp trnh my tnh bc cao.
11. Ngn ng lp trnh my tnh bc cao dung. dch cc lnh ra m my.
12. Assember l g? Phn mm MPLAB ( Windows) hay MPASM ( DOS) dung
lm g?
13. Nu cc lnh bit v cho v d.
14. Nu c lnh v byte v cho v d.
15. Nu cc lnh v iu khin v s. Cho v d.
16. Vit cng trnh cng 4H vo 3H dng thanh ghi W, nh 20H (gi gi tr 4H) v
21H (gi gi tr 3H). Np kt qu vo a ch nh 22H mang nhn STORE (HD:
STORE EQU 22H).
17.Vit chng trnh tnh 1+2+3+4 dng lnh ADDWF v INCF dung thanh ghi W v
nh 20H. Kt qu lu W.
18. Vit chng trnh tnh Z=A.B+(not)C trong dung nh 20H cho lu gi tr
A, nh 21H lu gi tr B, nh 22H lu gi tr C. Lu kt qu ca Z trong v tr nh
23H mang nhn STORE.
19. Vit chng trnh nhn hai s nh phn 8 bit. nh 20H cha s b nhn, nh
21H cha s nhn. Kt qu tch s 16 bit cha trong 2 nh 22H (byte thp) v 23H
(byte cao).
20. Lnh COMF 12 cho kt qu nh th no nu nh 12 cha ni dung FFH.
21. Trnh by cc ch th assembler.
22. Vit chng trnh pht m thanh bo ng khi nhit ca mt t lnh vt qu
50 F. V lu i vi chng trnh v gii thch chng trnh ang lm g bng
cc ch gii. Bo m c c cc ch th assembler cn thit.
23. Vit chng trnh cho bi ton trm cn xe.
24. S khc nhau gia lnh v ch th assembler.
25. nh ngha chng trnh con.
26. Mot cong tac DIP 4 bit va 1 LED 7 oan anode chung c noi vi PIC 16F877A
nh hnh ve. Viet 1 chng trnh oc lien tuc ma 4 bit t cong tac DIP va cap nhat
cac led e hien th ky t hexa thch hp. Th du, neu ma 1100B c oc vao, ky t
hexa C se xuat hien. Nh vay, cac segment (oan) a en g, tng ng se la ON,
OFF, OFF, ON, ON, ON, va OFF
. Chu y rang at 1 chan port pic
16f877a len 1 lam LED tng ng ON. (xem hnh ve)
65
PIC 16F877A
RA0
RA1
RA2
RA3
RB0
RB1
RB2
RB3
RB4
RB5
RB6
RB7
74LS244
LED 7 oan +5V

a
b
A
c F
b
G
d
c
e E
D
f
g
h
8x220 ohm
Hnh : Giao tiep vi cong tac DIP va LED 7 oan
27.Thit k mt mch m m v hin th trn led 7 on (loi catt chung), s ln
mt nt nhn c n ti 10. M nh phn li led 7 on nh sau:
S
PORTB
B7
B6
B5
B4
B3
B2
B1
B0
0
0
1
1
1
0
1
1
1
1
0
1
0
0
0
0
0
1
2
0
0
1
1
1
0
1
1
3
0
1
1
0
1
0
1
1
4
0
1
0
0
1
1
0
1
5
0
1
1
0
1
1
1
0
6
0
1
1
1
1
1
0
0
7
0
1
0
0
0
0
1
1
8
0
1
1
1
1
1
1
1
9
0
1
0
0
1
1
1
1
Xt mch in nh sau:
Hnh: S mch ca iu khin led 7 on.
66
M rng chng trnh cho PIC 16F877A.
28.Hay viet chng trnh ngon ng assembly e thc hien chc nang logic trong 8
lan
X0
Y0
Z0
.
.
.
x7
y7
W0
z7
W0
vi X=x7..x0
Y=y7..y0
Z=z7..z0
W=w7..w0
29.Viet cac chng trnh e thc hien cac phep toan logic ch hnh :
RB0
RB4
RB5
RB6
RB1
RB7
RC7
RB7
Hnh : Cac van e lap trnh cong logic: (a) NOR 3 ngo vao (b) NAND 8 ngo vao
30. Vit chng trnh xa 20 nh RAM ni c a ch bt u l 30H.
31.Neu bon lenh chuyen d lieu va cho v d oi vi moi loai
32.Neu mot v du ve viec s dung lenh so hoc
a. mode a ch gin tip b.mode a ch trc tip
c.mode a ch tc thi
67
68
Bi ging s 4: Vo ra. B nh thi. Lp trnh vi iu khin PIC ( S tit: 5)
I.n nh lp:
.
II.Kim tra bi c:
..
..
..
III.Tn bi ging: : Vo ra. nh thi. Lp trnh vi iu khin PIC.
III.1. Mc tiu:
-Vo ra ca vi iu khin(I/O)
- nh thi vi vi iu khin:timer 0, timer 1, v timer 2
-Lp trnh vi iu khin: nhp d liu, tiu cho 16F84 v 16F877A,th d
chng trnh, lu v bin dch chng trnh: gii thiu phn mm MPLAB, mch np
vi iu khin PIC v chng trnh WinPIC800, lu lp trnh, v bi ton: chp tt
hai led n, tp tin tiu cho PIC 16F877A
chiu (hay my chiu).
vin.
Chng 4: Vo ra. nh thi. Lp trnh vi iu khin PIC.
4.1. Vo/ra ca vi iu khin:
Vi iu khin l mt chip rt linh hot v c th c lp trnh hot ng
trong mt s cu hnh khc nhau. 16F84 c 13 thit b I/O, m ngha l n c 13 ng
vo v ng ra. I/O c th c cu hnh trong bt k kt hp no, ngha l 1 ng vo
12 ng ra, 6 ng vo 7 ng ra, 13 ng ra ty thuc vo ng dng ca bn. Nhng I/O
ny c ni vi h gii bn ngoi thng qua thanh ghi c gi l port. 16F84 c 2
port, PORTA v PORTB. PortA l port 5 bit, n c 5 ng I/O v port B c 8 I/O.
16F877A c 33 thit b I/O. 16F877A c 5 port port A l port 6 bit n c 6
ng I/O, port B c 8 I/O, port C c 8 I/O, port D c 8 I/O, v port E c 3 I/O.
4.1.1.PortA v thanh ghi TRISA
69
PortA l port 2 chiu , 6 bit. Thanh ghi nh hng d liu tng ng v
TRISA. Bt bit TRISA (=1) s lm cho cc chn portA tng ng l ng vo (input)(
ngha l t b iu khin (driver) ng tng ng trong ch tng tr cao Hi-Z). Xa
bit TRISA (=0) s lm cho chn portA tng ng l ng ra (output) (ngha l t ni
dung ca mch ci ng ra trn chn c chn).
Vic c thanh ghi portA l c trng thi ca cc chn, trong khi ghi ra n s
ghi ra mch ci port. Tt c tc v ghi l tc v c -hiu chnh ghi. V th, mt s ghi
ra port m ch rng chn port l c, gi tr c hiu chnh v sau c ghi ra
mch ci d liu port.
Chn RA4 c hp knh vi ng vo clock mun timer 0 tr thnh chn
RA4/T0CKI. Chn RA 4/T0CKI l ng vo Smith-trig (Schmitt-trigger) v nga ra
cc mn h. Tt c chn khc ca port A c mc TTL v b li ng ra CMOS
y.
Chn khc ca portA l hp knh vi ng vo analog v ng vo Vref analog cho c
b chuyn i A/D (tng t-s) v b so snh. Tc v ca mi chn c chn bi
xa/bt bit iu khin ph hp trong thanh ghi ADCON1 v CMCON.
Ch : Khi power on reset, cc chn ny c cu hnh nh ng vo analog v c
l0. B so snh l off (tt) (trng thi).
Thanh ghi TRISA iu khin hng ca ccchn port thm ch khi chng c dng l
ng vo analog. Ngi s dng phi m bo cc bit trong thanh ghi TRISA l bo tr
(gi nguyn) khi dng chng nh l ng vo analog.
Th d: khi ng portA
BCF STATUS,RP0;
BCF STATUS,RP1; bank 0
CLRF PORTA; khi ng PORTA bng cch xa mch ci d liu ng ra
BSF STATUS,RP0 ; chn bank 1
MOVLW 0x06; cu hnh tt c cc chn nh l ng vo s
MOVWF ADCON1
MOVLW 0xCF; gi tr c dng hi ng hng d liu
MOVWF TRISA; bt RA<3:0> nh l ng vo, RA<5:4> nh l ng ra
; RA<7:6> lun c l 0.
5.1.2. PORTB v thanh ghi TRISB
PortB l port 2 chiu, 8 bit. Thanh ghi nh hng d liu tng ng l
TRISB. Bt bit TRISB (=1) s lm cho cc chn portB tng ng l ng vo (ngha
l t b li ng ra tng ng ch tng tr cao Hi-Z). Xa bit TRISB (=0) s
lm cho cc chn portB tng ng l ng ra (ngha l t ni dung ca mch ci ng
ra trn chn c chn).
Ba chn ca port B c hp knh vi g ri trong mch (in-circuit debugger)
v chc nng lp trnh in p thp (low-voltage programming): RB3/PGM, RB6/PGC
v RB7/PGD. Chc nng ca cc chn ny c m t sau.
Mi chn ca portB c th c ko ln bn trong yu. Mt bit iu khin c th bt
(turn on) tt c ko ln. iu ny c th thc hin bng cch xa bit /RBPU (thanh
ghi OPTION<7>). Ko ln yu t ng b tt (turn off) khi cc chn port c cu
hnh nh ng ra. Cc ko ln b cm khi reset lc bt in (power on reset).
Bn chn port B, RB7-RB4, c c im ngt trn thay i (interrupt on change). Ch
c chn c cu hnh nh ng vo c th gy ra ngt (ngha l bt c chn
RB7:RB4 c cu hnh nh l ng ra th rt khi so snh ngt trn thay i).
Chn ng vo (ca RB7:RB4) c so snh vi gi tr c ci trn vic c cui ca
portB. Ng ra khng khp (mismatch) ca RB7:RB4 l OR (hoc) vi nhau to
ra ngt thay i port RB vi bit c RBIF (INTCON<0>).
70
Ngt ny c th nh thc thit b t ch ngh SLEEP. Ngi s dng, trong
chng trnh phc v ngt ISR, c th xa ngt theo cch sau:
a) bt k vic c hay ghi ca portB. iu ny s kt thc iu kin khng khp.
b)xa bit c RBIF.
iu kin khng khp s tip tc bt c RBIF. c portB s kt thc iu kin
khng khp v cho php bit RBIF b xa.
c im ngt trn thay i c khuyn co cho lm thc dy trn hot ng nhn
phm v hot ng portB ch c dng cho c im ngt trn thay i. Vic
hi vng (polling) ca portB th khng c khuyn co trong khi s dng c im
ngt trn thay i.
c im ngt trn thay i ny, cng vi cc ko ln cu hnh bng phn mm trn 4
chn ny, cho php giao tip d dng vi bn phm v lm n c th dng nh thc
trn nhn phm.
RB0/INT l chn ng vo ngt ngoi v c cu hnh s dng INTEDG bit (thanh
ghi OPTION <6>). RB0/INT c tho lun k chng ngt.
4.1.3. PortC v thanh ghi TRISC
PortC l port 2 chiu, 8 bit. Thanh ghi nh hng d liu tng ng l
TRISC. Bt bit TRISC (=1) s lm cho cc chn portC tng ng l ng vo (ngha
l t b li ng ra tng ng ch tng tr cao Hi-Z). Xa bit TRISC (=0) s
lm cho cc chn portB tng ng l ng ra (ngha l t ni dung ca mch ci ng
ra trn chn c chn).
PortC c hp knh vi nhiu chc nng ngai vi (bng 1). Chn portC c
m ng vo Schmitt-trigger.
Khi mun I2C c cho php, chn portC <4:3> c cu hnh vi mc I2C
chun (thng thng) hay vi mc SMBus, bng cch dng bit CKE (SSPSTAT<6>).
Khi cho php chc nng ngai vi, iu cn trng lu l nh ngha bit TRIS
cho mi chn portC. Mt s ngai vi ln bit TRIS lm cho chn (pin) l ng ra,
trong khi ngoi vi khc ln bit TRIS lm cho chn l ng vo. V vic ln bit
TRIS l trong nh hng trong khi ngoi vi c cho php, lnh c- hiu chnh- ghi
(BSF, BCF, XORWF) vi TRISC nh l ch n, nn b cm (trnh).
Ngi s dng nn tham kho ti phn ngoi vi tng ng thit lp bit
TRIS ng n.
4.1.4. PortD v thanh ghi TRISD
PortD l port 8 bit vi m ng vo Schmitt-trigger. Mi chn cu hnh ring bit
nh l ng vo hay ng ra.
PortD c th c cu hnh nh mt port vi x l 8 bit (port ph(t) song song)
bng cch bt bit iu khin PSPMODE (TRISE<4>). Trong mode (ch ) ny, b
m ng vo l TTL.
Ch : PortD v TRISD khng c hin thc trn thit b 28 chn.
4.1.5. PortE v thanh ghi TRISE
Ch : PortE v TRISE khng c hin thc trn thit b 28 chn.
PortE C 3 CHN (RE0/RD/AN5, RE1/WR/AN6, RE2/CS/AN7) m c th
c cu hnh ring bit nh l ng vo hay ng ra.
Chn port E tr thnh ng vo iu khin I/O cho port vi x l khi bit
PSMODE (TRISE<4>) c bt (=1). Trong ch ny, ngi s dng phi m
bo rng bit TRISE <2:0> c bt (=1) v rng cc chn c cu hnh nh ng vo
s. Cng vy, m bo rng ADCON1 c cu hnh cho I/O s. Trong ch ny,
b m ng vo l TTL.
71
Thanh ghi TRISE c minh ha v cng iu khin tc v port t song song
(xem di). Chn portE l a hp vi ng vo analog, khi chn cho ng vo analog,
nhng chn ny s c l 0.
TRISE iu khin hng ca cc chn RE, thm cnh khi chng c dng nh
ng vo analog. Ngi s dng phi m bo gi cc chn c cu hnh ng ng vo
khi s dng chng nh l ng vo analog.
Ch : khi reset lc bt in, nhng chn ny c cu hnh nh ng vo
analog v c l 0.
Thanh ghi TRISE (a ch 89H)
Bit 7
6
5
4
3
2
1
bit 0
IBF
OBF
R-0
R-0
IBOV PSPMODE
R/W-0
R/W-0
U-0
R/W-1 R/W-1
R/W-1
R/W-1 R/W-1 R/W-1
Bit iu khin /trng thi port t song song:

Bit 7: IBF: bit trng thi b m ng vo y
1=mt t c nhn v ang i c bi CPU.
0=khng c t no c nhn.
Bit 6: OBF: bit trng thi b m ng ra y.
1=b m ng ra vn gi t c ghi trc .
0=b m ng ra c c.
Bit 5: IBOV: bit d tm b m ng vo trn.
1=vic ghi din ra khi 1 t ng vo trc cha c c (phi b xa bng
phn mm).
0=khng c trn xy ra.
Bit 4: PSPMODE: bit chn ch port t song song.
1=portD c chc nng (lm vic) trong ch port t song song.
0=portD lm vic trong ch I/O a nng.
Bit 3: khng hin thc, c l 0.
Bit nh hng d liu:
Bit 2: bit iu khin hng cho chn RE2/CS/AN7:
1=ng vo (input)
0=ng ra (output)
Bit 1: bit iu khin hng cho chn RE1/WR/AN6
1=ng vo.
0=ng ra.
Bit 0: bit iu khin hng cho chn RE0/RD/AN5
1=ng vo.
0=ng ra.
Ch thch:
R=bit c th c W=bit c th ghi
-n=gi tr cho port
1=bit c bt 0=bit b xa
x=bit cha bit
U=bit khng hin thc, c l 0.
4.2. nh thi vi vi iu khin:
Tt c vi iu khin c mch nh thi trn chip; mt s c 4 timer khc nhau. Vi iu
khin 16F84 c mt thanh ghi timer gi l timer 0. Cc timer ny chy tc cua
72
xung ng h h thng. Nh vy nu chng ta s dng thch anh 32,768 Khz, timer
32,768
= 8192 Hz. Nu chng ta mun bt led sng trong 1 giy
bn trong s chy
4
chng hn th chng ta cn m 8192 xung. y l rt nhiu xung . Tht l may mn
bn trong vi iu khin c 1 thanh ghi gi l thanh ghi OPTION, m cho php chng
ta lm gim (chm) nhng xung ny bng cc h s 2, 4, 8, 16, 32, 128 v 256. Thanh
ghi OPTION c tho lun trong phn tp lnh . Thit lp b t l trc , nh l n
c gi chia 256 trong thanh ghi OPTION ngha l xung nh th ca chng ta by
gi l 8192/256=32 Hz, ngha l 32 xung trong 1 giy. Nh vy bt led sng trong 1
giy, chng ta ch cn m 32 xung trong timer 0 hay 16 cho 0,5 giy, hay 160 cho 5
gis6y (sec),vv...
Thanh ghi OPTION:
Lnh option: ni dung ca W c np vo thanh ghi OPTION. Lnh ny c dng
chia t l trc, ngha l bt tc nh thi TMR0 nh hnh sau:
Bit 7
/RPBU INTEDG TOCS
TOSE
PSA
PS2
PS1 PSO
Gi tr b chia t l trc
* PS2
PS1 PS0
tc TMR0
tc WDT
0
0
0
1:2
1:1
0
0
1
1:4
1:2
0
1
0
1:8
1:4
0
1
1
1:16
1:8
1
0
0
1:32
1:16
1
0
1
1:64
1:32
1
1
0
1:128
1:64
1
1
1
1:256
1:128
* PSA : bit gn b chia h s t l trc: 0=TMR0
1=WDT
*TOSE: cnh tn hiu TMR0
0=cnh ln trn chuyn i t thp cao chn TOCKI.
1=cnh xung trn chuyn i t cao thp.
*TOCS: ngun tn hiu TMR0
0=clock chu k lnh chn CLKOUT (dng clock bn trong).
1=chuyn i chn TOCKI (dng clock bn ngoi chn TOCKI).
*/RBPU: bit cho php ko ln port B.
1=ko ln b cm.
0=ko ln c cho php.
Bit 6, bit 7: lun l 00
Bit 6 INTEDG: bit chn cnh ngt
1=ngt cnh ln ca chn INT.
0=ngt cnh xung ca chn INT.
t 1 s vo thanh ghi OPTION, trc tin bn phi np s vo thanh
ghi W, v sau vit lnh OPTION. Lnh ny t ng ly s t thanh ghi W v
chuyn n vo thanh ghi file OPTION.
Th d: S no nn c di chuyn vo thanh ghi OPTION c th dng TMR0 hiu
qu m tun t s m ca giy m c chuyn.
73
Gii:
Bit 7 , bit 6 lun l 00.
TMR0 l m ln bn trong, vy bit 5 (TOCS) l 0.
TMR0 l kch cnh ln hay cnh xung: ty nn chn TOSE=0 (cnh ln).
H s t l trc cho TMR0 c yu cu, vy bit 3 (PSA) l 0.
T l trc cc i l 256, vy bit 2 ti bit 0 (PS2-PS0) l 111.
Vy s cn chuyn vo thanh ghi OPTION l 00000111.
Lnh nh sau:
Movlw b00000111; thit lp TMR0 m
Option; m bn trong, t l trc bi 256
Th d: To thi gian tr 1 giy, 0,5 giy, 0,1 giy v 5 giy.
Status equ 3
Tmr0 equ 1
Zerobit equ 2
Option_r equ 81h
Bsf status,5;bank 1
Movlw b00000111
Movwf option_r;thit lp b chia t l trc l 1/256 cho tmr0
Delay5 clrf tmr0;khi ng timer 0
Loop
movf tmr0,w; c tmr0 vo w
Sublw .160; 160-w
Btfss status,zerobit; wkhng bng 160
Goto loop
Retlw 0
Th d : Vit chng trnh to sng vung c chu k T=10 sec chn PORTB,0 (RB0)
dng timer 0.
;phn tng ng
Status equ 3
Tmr0 equ 1
Zerobit equ 2
Option_r equ 81h
Portb equ 6
Trisb equ 86h
;************************
list p=16f877a; chng ta dng PIC 16F877A
org 0; a ch u l 0
goto start;nhy n start
;bit cu hnh
__config h3ff0; chn dao ng LP, WDT off, PUT on, bo v m b cm
;phn chng trnh con
Delay5 clrf tmr0;khi ng timer 0
Loop
movf tmr0,w; c tmr0 vo w
Sublw .160; 160-w
Btfss status,zerobit; wkhng bng 160
Goto loop
Retlw 0
;phn cu hnh
start Bsf status,5;bank 1
Movlw b00000000
Movwf trisb;portb l xut
74
Movlw b00000111
Movwf option_r;thit lp b chia t l trc l 1/256 cho tmr0
Bcf status,5;bank 0
Clrf portb;xa portb
;chng trnh chnh bt u
Main bsf portb,0
Call delay5
Bcf portb,0
Call delay5
Goto main
End
B timer 1:
B timer 1 c th l b m hoc b nh thi vi u im sau:
+16 bit cho b m hoc nh thi (gm hai thanh ghi TMR1H v TMR1L).
+c kh nng c v vit.
+c th chn xung ng h bn trong hoc ng h bn ngoi.
+c th ngt khi trn FFFFh v 0000h.
Timer 1 c 1thanh ghi iu khin, l thanh ghi T1CON. B timer 1 c hot ng hay
khng hot ng l nh vic t xa bit TMR1ON (T1CON<0>).
Hot ng ca b timer 1:
N c th hot ng mt trong cc ch sau:
+ l 1 b nh thi 16 bit.
+l mt b m c ng b.
+l mt5 b m khng c ng b.
Phng thc hot ng ca b ny c xc nh bi vic chn xung vo timer 1.
Ngun xung ng h c chn bi vic t hoc xa bit TMR1CS(T1CON<1>).
ch nh thi , u vo l clock trong fosc/4, bit ng b T1SYNC (T1CON<2>)
khng c tc dng v clock trong lun ng b. Ch b m hot ng hai ch :
c ng b xung vo xo bit T1SYNX (T1CON<2>), khng ng b xung vo set bit
T1SYNC(T1CON<2>), timer 1 tng sn ln xung u vo.
Khi b dao ng timer 1 cho php hot ng th cc chn RC1/T1OSI/CCP2,
RC0/T1OSO/T1Cki tr thnh u vo. ch m c ng b b m tng mim
khi sn ln ca chn RC0 hoc chn RC1 nu bit T1OSCEN xa v xung vo phi
ng b vi clock trong, ch ny b m khng tng trong trng thi SLEEP.
ch m khng ng b timer 1tng mi khi sn ln chn RC0 hoc chn
RC1 nu bit T1OSCEN xa, ch ny b m tip tc tng trong trng thi SLEEP
v c kh nng trn gy ra ngt khi b x l c nh thc.
Dao ng ca timer 1:
Mch dao ng thch anh c xy dng gia 2 chn T1OSI v T1OSO. Khi dao
ng c cung cp ch cng sut thp th tn s cc i ca n s l 200 Khz
v trong khi n ch SLEEP n cung cp tn s 32 Khz.
Ngt ca b timer 1:
Cp thanh ghi TMR1H v TMR1L tng t gi tr 0000h n FFFFh, n gi tr ny
tip tc tng th trn v quay li 0000h, v ngt xut hin khi trn qu gi tr FFFFh,
khi ny c ngt TMR1F s c bt (t ln 1). Ngt c th hot ng hoc khng
hot ng nh vic t hoc xa bit TMR1IE.
*Thanh ghi iu khin T1CON:
T1CON: timer 1 control register (a ch 10h)
75
U-0 U-0 R/W-0
Bit 7 6
5
-
R/W-0
4
R/W-0
3
R/W-0
2
R/W-0
1
R/W-0
0
T1CKPS1 T1CKPS0 T1OSCEN T1SYNC TMR1CS TMR1ON
-bit 7,6: khng s dng.

-bit 5,4: T1CKPS1: T1CKPS0 : la chn h s chia xung vo.
T1CKPS1
T1CKPS0
H s chia
0
0
1:1
0
1
1:2
1
0
1:4
1
1
1:8
-bit 3: T1OSCEN bit iu khin b dao ng timer 1.
1= b dao ng hot ng.
0=b dao ng khng hot ng.
-bit 2: bit iu khin xung clock ngoi ng b khi TMR1CS=1
Bit 2=0 :c ng b clock ngoi.
1= khng ng b clock ngoi.
Khi TMR1CS=0 bit ny khng c tc dng.
-bit 1: TMR1Cs bit la chn ngun xung clock vo.
TMR1CS=1 clock t chn RC0/T1OSO/T1CKI (sn ln).
TMR1CS=0 clock trong fosc/4.
-bit 0: bit bt tt timer.
1= cho php timer.
0=cm timer.
Th d: Thit lp timer 1 :
-Cho php timer 1 hot ngT1OSCEN=1.
-H s t l trc: 1/8 T1CKPS1:T1CKPS0=11.
-Clock bn trong l fosc/4TMR1CS=0.
Bit T1SYNC khng c tc dng
-Bt timer 1: TMR1ON=1
Gi tr thanh ghi T1CON l 00111101
Lnh: T1CON_R equ 10h
Movlw b00111101
Movwf T1CON_R
B timer 2:
B timer 2 c nhng c tnh sau y:
+ 8 bit cho b nh thi
+8 bit vng lp (thanh ghi PR2).
+c kh nng c v vit c 2 thanh ghi ni trn.
+c kh nng lp trnh bng phn mm t l trc.
+c kh nng lp trnh bng phn mm t l sau.
Ch SSP dng u ra ca TMR2 to clock. Timer 2 c mt thanh ghi iu khin
l thanh ghi T2CON. Timer 2 c th vit tt bng vic xa bit TMR2CON ca thanh
ghi T2CON.
Hot ng ca b timer 2:
Timer 2 c dng ch yu phn iu ch rng xung ca b CCP, thanh ghi
TMR2 c kh nng c v vit, n c th xa bng vic reset li thit b. u vo ca
76
xung c th chn cc t l sau: 1:1, 1:2, 1:16, vic chn cc t l ny c th iu khin
cc bit sau T2CKPS1 v bit T2CKPS0.
Ngt ca b timer 2:
B timer 2 c thanh ghi 8 bit PR2. Timer 2 tng t gi tr 00h cho n khp vi PR2 v
tip theo n s reset li gi tr 00h v lnh k tip thc hin. Thanh ghi PR2 l mt
thanh ghi c kh nng c v kh nng vit. Thanh ghi PR2 bt u t gi tr FFh u
ra ca TMR2 l ng dn ca cng truyn thng ng b, n c dng pht cc
xung ng h.
*Thanh ghi T2CON:
T2CoN: timer 2 control register (a ch 12h)
U-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
- TOUTPS3 TOUTPS2 TOUTPS1 TOUTPS0 TMR2ON T2CKPS1 T2CKPS0

Bit 7
6
5
4
3
2
1
-Bit 7: khng s dng.
-bit 63: TOUTPS3TOUTPS0 bit la chn h s u ra timer 2.
TOUTPS3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
TOUTPS2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
TOUTPS1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
TOUTPS0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
-bit 2: TMR2ON bit bt tt hot ng timer 2.

1=cho php (enable).
0= cm (disable).
-bit 10:T2CKSP1T2CKSP0 chn h s chia u vo
T2CKSP1
T2CKSP0
H s chia u vo
0
0
1:1
0
1
1:4
1
X
1:16
H s u ra
1:1
1:2
1:3
1:4
1:5
1:6
1:7
1:8
1:9
1:10
1:11
1:12
1:13
1:14
1:15
1:16
77
4.3. Lp trnh vi vi iu khin:

lp trnh vi iu khin chng ta cn:
. vit lnh trong mt chng trnh.
. Chuyn i vn bn thnh m lnh m vi iu khin hiu c s dng mt cng c
phn mm c gi l b bin dch (th d MPASM, MPLAB, CCS,vv...).
. a d liu vo b nh Flash /EPROM ca vi iu khin s dng b np (th d
mch np PIC qua cng COM loi JDM Programmer hay mch np qua cng USB).
Chng ta hy xem xt nhim v u, vit chng trnh. Cng vic ny c thc hin
bt k phn mm son tho no, th d Notepad ca Windows. Ti thch s dng b
son tho c cung cp bi nh ch to vi iu khin Microchip. Phn mm ny
c gi l MPLAB v c th ti min ph website http://www.microchip.com/
Nh bn thy trn , chng ta cn cu hnh I/O v thit lp b h s t l
trc cho nh thi. Nu chng ta khng thit lp chng th iu kin mc nhin l tt
c cc bit PORT l ng vo. Vi iu khin khng c ng ra th khng s dng c
nhiu. Mc nh cho b chia t l trc l tc clock c chia bi 2.
Chng trnh cng cn bit thit b g m n d nh dng v a ch bt u
trong b nh l g.
Nu iu ny bt u c v bi ri-xin ng lo lng. Ti vit mt chng trnh
tiu (header program), m thit lp tt c iu kin trn cho bn s dng. Cc iu
kin ny c th thay i sau ny khi bn hiu nhiu v nhng g bn lm.
Tiu cho PIC 16F84 thit lp 5 bit ca portA nh l ng vo v 8 bit ca
portB nh l ng ra. N cng thit lp b chia h s t l trc chia cho 256. Chng
ta s dng thch anh 32,768 Khz, nh vy nh thi ca chng ta l 32 xung trn 1
giy. Lnh chng trnh s chy ca 32,768 KHz, ngha l 8192 lnh trn giy (1
chu k my=4xchu k clock). Tiu cng thm vo 2 chng trnh con nh th
bn s dng chng l DELAY1-tr hon 1 giy v DELAY5-tr hon 0,5 giy. Chng
trnh con l mt phn on m m c th gi khi cn, tit kim vit n ln na. i
vi c ny, ng lo v lm sao b tiu hay chng trnh con lm vic. Chng ta s
lm vic thng qua chng sau.
4.4. Nhp d liu:
Xem xt s thp phn 37, s ny c gi tr thp lc phn (hex) l 25 hay gi tr
nh phn l 00100101. B bin dch s chp nhn iu ny l .37 dng thp phn
(ch du . khng l du chm thp phn) hay 25H dng s hex hay B00100101
dng s nh phn .
S 181 thp phn c nhp nh l .181 dng thp phn hay 0B5H dng s
hex hay B10110101 dng nh phn. Nu s hex bt u l ch th ta ghi 0B5h, ch
khng l B5h.
Ch : c s mc nh ca chng trnh bin dch MPASM/MPLAB l s hex.
Vi iu khin PIC l vi iu khin 8 bit. iu ny c ngha l v tr b nh,
ngha l file ca ngi s dng v thanh ghi cha 8 bit. Nh vy s nh nht 8 bit l
00000000, m tng ng s 0 thp phn. S ln nht 8 bit l 11111111 m tng
ng s 255 thp phn. s dng s ln hn 255 chng ta phi kt hp nh. Hai
nh kt hp cho ra 16 bit vi s ln ti 65536. Ba nh kt hp cho ra s ln ti
16777215,vv Nhng s ln ny c gii thiu sau.
4.5. Tp tin tiu cho 16F84, tp tin Header84.asm
78
Chng trnh di y minh ha cho vi iu khin 16F84. Ti ngh cho bn
bt u tt c cc chng trnh ,vi chip ny 16F84, bng tiu ny, hay phin bn
hiu chnh. Gii thch y s c trnh by sau.
; Header84.asm iu ny thit lp portA l ng vo (1 l vo), portB l ng ra ( 0 l ra)
;thanh ghi OPTION c thit lp chia 256 cho ra xung nh th 1/32 ca 1 giy.
;tr hon 1 giy v 0,5 giy c a vo chng trnh con
;***************************************
;phn tng ng
TMR0 EQU 1; ngha l TMR0 l file 1 ( nh 1)
STATUS EQU 3; ngha l STATUS l nh 3.
PORTA EQU 5;ngha l portA l nh 5.
PORTB EQU 6;ngha l portB l nh 6.
TRISA EQU 85H; TRISA (chn I/O portA) l nh 85H
TRISB EQU 86H; TRISB (chn I/O portB) l nh 86H
OPTION_R EQU 81h; thanh ghi OPTION l nh 81h.
ZEROBIT EQU 2; ngha l zerobit l bit 2.
COUNT EQU 0Ch; COUNT l nh 0Ch, thanh ghi m s kin.
;***************************************
LIST P=16F84 ; chng ta ang dng 16F84
ORG 0
; a ch bt u l 0
GOTO START; nhy n START
;***************************************
;Bit cu hnh
__CONFIG H3FF0 ; chn dao ng LP, WDT off, PUT on, bo v m b cm.
;Phn chng trnh con
;tr hon 1 giy
DELAY1
CLRF TMR0; bt u TMR0
LOOPA MOVF TMR0,W; c TMR0 vo W
SUBLW .32; TIME-32
BTFSS STATUS, ZEROBIT; kim tra TIME-W=0
GOTO LOOPA; time khng bng 32
RETLW 0; time l 32, tr v.
;tr hon 0,5 giy.
DELAY5
CLRF TMR0 ; khi ng TMR0
LOOPB
MOVF TMR0,W ; c TMR0 vo W
SUBLW .16 ;TIME-16
BTFSS STATUS,ZEROBIT;kim tra TIME-W=0
GOTO LOOPB ; TIME khng bng 16
;Phn cu hnh.
START BSF STATUS,5; tr li bank 1
MOVLW B00011111; 5 bit ca port A l I/R (ng vo)
MOVWF TRISA
MOVLW B00000000
MOVWF TRISB ; PortB l output (ng ra)
MOVLW B00000111;b chia t l trc l /256
MOVWF OPTION_R; timer l 1/32sec, c th dng lnh OPTION
BCF STATUS,5 ;tr li bank 0
CLRF PORTA ; xa PORTA
CLRF PORTB ;xa PORTB
79
END; dng ny lun lun t cui chng trnh.
Ch : du ; theo sau l li ch thch. Chng trnh dch s b qua.
Phn ny c lu l Header84.asm. Bn c th dng n bt u tt c chng trnh
16F84 ca bn. Header84 l phn tn v ASM l phn m rng.
4.6. Th d chng trnh

Cch tt nht hiu cch s dng vi iu khin l bt u vi v d n gin v xy
dng trn n.
Xem xt mch in sau:
6
16F84 B0
V+
68 pF
16
+5V
14
MCLR 4
TOCKI
3
32 Khz
68pF
15
0.1 F
0V
Hnh 4.1: Mch vi iu khin

Xt chng trnh chp tt led (led on v off) trong khong 0,5 giy.
Dng Notepad son tho v lu li tn CH51.ASM. CHng ta c th dung MPLAB
son chng trnh ngun.
Chng trnh CH51.ASM
;***************************************
;phn tng ng
COUNT EQU 0Ch; COUNT l nh 0Ch, thanh ghi m s kin.
;***************************************
ORG 0
; a ch bt u l 0
80
;***************************************
;Bit cu hnh
;Phn chng trnh con
;tr hon 1 giy
DELAY1
SUBLW .32; TIME-32
BTFSS STATUS, ZEROBIT; kim tra TIME-W=0
;tr hon 0,5 giy.
DELAYP5
LOOPB
SUBLW .16 ;TIME-16
;Phn cu hnh.
MOVLW B00011111; 5 bit ca port A l I/R (ng vo)
MOVWF TRISA
MOVLW B00000000
BEGIN BSF PORTB,0 ; bt bit B0=1
CALL DELAYP5 ; i 0,5 s
BCF PORTB,0 ; tt B0=0
CALL DELAYP5; i 0,5 s
GOTO BEGIN
END; bn phi kt thc.
Gii thch:
. Chng trnh gm 5 dng bt u t BEGIN (l nhn) chp tt led. BEGIN l
nhn (label), nhn c dng nh a ch nh chng trnh nhy ti .
. Dng 1 l lnh BSF v d liu l PORTB, 0: ngha l bt bit trong file PORTB,
bit 0 l bit c chn v led sng.
Ch : khng c khong trng nhn, lnh hay d liu.
.Dng 2: call delayp5: lnh gi chng trnh con tn l delayp5 v to tr hon (delay)
0,5 giy.
. Dng 3 BCF PORTB,0 l ngc li dng 1, ngha l xa bit trong file PORTB, bit
0. CHn 6 hnh 4.1 l 0V lm led tt.
.Dng 4: call delayp5 l tr hon 0,5 giy.
.Dng 5 goto begin: gi chng trnh tr ngc li nhn BEGIN lp li qu trnh
chp tt led on v off.
Bt k 8 ng ra c th c bt (ON) hay tt (OFF) s dng 2 lnh BSF v BCF.
81
TH d: BSF PORTB,3; lm bit 3 ca PORTB (chn 9) ln 5V (logic 1)
BCF PORTB,7 ; lm bit 7 ca PORTB xa v 0 , 0V (logic 0).
Bi tp: 1/Chng trnh tiu HEADER877A.ASM v bi ton chp tt led:sinh vin
t vit.
Th d: iu khin led dung portA v portE:
Son tp tin led.asm dung NotePad. Hoc dung MPLAB nh sau:
;***********************************************************
; Tp tin:
led.asm
; M t :
M t hot ng c bn ca Port A and E
; MCU :
PIC16F877(A)
;************************************************************
LIST P=16F877,W=-302
__CONFIG 0x3D32
; HS MODE,WDT OFF
PORTA
PORTE
EQU 0x05
EQU 0x09
;Bank0
TRISA EQU 0x85 ; Bank1

TRISE EQU 0x89
ADCON1
EQU 0x9F
X
EQU 0x70 ; RAM
Y
EQU 0x71
Z
EQU 0x72
ROUND
EQU 0x73
;************************************************************
ORG 0x0000
BANKSEL
MOVLW
MOVLW
MOVWF
MOVLW
MOVWF
MOVLW
MOVWF
ADCON1
; Select ADCON1 <bank1>
B'00000111' ; PORTA,PORTE = digital port
B'00000000' ; PORTA,PORTE = analog port
ADCON1
B'00110000' ; RA3:RA0
TRISA
B'00000000' ; PORTE = output
TRISE
BANKSEL PORTA
; Select PORTA <bank0>
START
CLRF PORTA
; Clear PORTA
CLRF PORTE
; Clear PORTE
MOVLW
.3
MOVWF
ROUND
BSF PORTA,3
CALL DELAY
LOOP1
RRF PORTA,1
CALL DELAY
DECFSZ
ROUND,1
GOTO LOOP1
CLRF PORTA
82
MOVLW
.2
MOVWF
ROUND
BSF PORTE,2
CALL DELAY
LOOP2
RRF PORTE,1
CALL DELAY
DECFSZ
ROUND,1
GOTO LOOP2
GOTO START
DELAY
CLRF
CLRF Y
MOVLW
MOVWF
DECFSZ
GOTO $-1
DECFSZ
GOTO $-3
DECFSZ
GOTO $-5
RETURN
; Delay ~500 ms
.13
Z
X,1
Y,1
Z,1
END
4.7.Lu v bin dch m:

Tp tin trn c lu li vi tn led.asm
Ci t MPLAB: Vo th mc D:\MPLAB660, nhp p chut vo tp tin
MPLABV~1.exe v qu trnh ci t din ra. Kt thc ci t MPLAB V6.60 thnh
cng v shortcut c to ra trn desktop.
Hnh 4.2
83
Khi ng MPLAB: nhp p chut vo biu tng MPLAB IDE.
Chng trnh trn c lu l led.asm. Bc k tip l bin dch m vn bn ny
thnh tp tin .hex m vi iu khin hiu c.
Bc 1: M MPLAB.
Bc 2: Ta M file led.asm dung menu File, Open. Trng hp to tp tin mi ta chn
File, New. G ni dung vo nh sau:
Hnh 4.3
-Lu tp tin Untitled thnh tn mi l led.asm dung lnh File, Save hay File, Save As.
Hnh 4.4
T menu Configure, Select device chn PIC 16F877A v nhp Ok.
84
Hnh 4.5
Ty chn Configure, Configure Bit nh hnh 4.6
Hnh 4.6
Cu hnh bit ca chng ta, chn dao ng HS, tt Watch dog timer (off), bt Power up
Timer (on), v tt Code protect (off). Ch gi tr cu hnh ny l 3FF2h. M l
__CONFIG 0x3FF2 ; HS mode, WDT off, power up timer on, code protect off.
Chuyn sang file .hex: led.hex. Chn Project, Quickbuild led.asm nh hnh 4.7
85
Hnh 4.7
Nu c li MPLAB s bo. Nu khng c li, MPLAB bo Quickbuild succeeded nh
hnh 4.8.
Hnh 4.8
Chng trnh bo li l dng START CLRF PORT; select PORTA <bank 0>.
Chng trnh khng hiu PORT l g. ng l PORTA
86
Hnh 4.9
Xem qu trnh dch chn View, program memory.
Hnh 4.10
4.8.Mch np vi iu khin PIC v phn mm WinPIC800
Gii thiu B np PIC GTP-USB
Chng ta s dng b np GTP-USB PIC programmer , np qua cng USB
np tp tin .hex (nh phn) vo b nh chng trnh Flash hay EPROM ca vi iu
khin PIC. B np ny h tr tt c cc PIC c bi phn mm np WinPIC800, chy
trn my tnh c ci Windows 95/98/2000/ME/Xp.
Xt mch np PIC qua cng COM, loi JDM Programmer ( bo mch np ca RIXIN,
tham kho: sp N6 ch in t Nht To, Nguyn Kim, Qun 10, Tp. HCM)
-Kt ni phn cng mch np vi my tnh qua cng COM. Bt in.
-Chy chng trnh WinPic800.Vo th mc D:\WinPic800_V359, nhp p chut vo
tp tin WinPic800_V3_59.exe, qu trnh ci t din ra. Mn hnh nh sau (hnh 4.16):
87
Hnh 4.11
Nhp p chut vo biu tng WinPic800 trn desktop khi ng.
Hnh 4.12
-Chn IC : loi PIC F v chn PIC 16F877A.
-Chn Settings, Hardware chn phn cng l JDM Programmer, sau nhp vo
Apply Edits.
-Chn Device, Haedware test kim tra phn cng.
-Chn tp tin .hex np : menu File, Open v chn tp tin cn np, th d led.hex,
nhn Open.
Nhn nt Program All np hay menu Device, Program All. Nu np thnh cng ,
my bo OK , cn c li s thong bo li.
88
Mun xa ni dung chn Device, Erase All.
c ni dung chn Device, Read All.
Kim tra chn Device, Verify All.
Khi np file.hex thnh cng, vi iu khin sn sang s dng.
Nhng s dng tng tng ca bn. C 35 lnh trong ngn ng vi iu khin ca bn.
Tm vi iu khin PIC bao gm thit b vi 64KB b nh chng trnh EPROM, 3938
byte RAM b nh d liu, 1024 byte b nh EEPROM, 72 chn vo ra, 11 ngt, b
A/D 10 bit c 15 knh vo, xung clock 20 Mhz, tp lnh 55 t. Xem ph lc 2 bit
chi tit.
Xt mch np PICSTARTPLUS:
Nu bn khng c mch np th ti khuyn co b np PICSTARTPLUS ca
Arizona Microchip. Khi Arizona mang n mt b vi iu khin mi nh h thng
lm, phn mm iu khin c cp nht v c th download min ph trn internet
http://www.microchip.com/.
Mt khi c ci trn my tnh PC ca bn, n c m t MPLAB chuyn qua b np
PICSTARTPLUS.
Chn Programmer, Select Programmer, PICSTART Plus nh hnh 1.
Hnh 1: Chn b np PICSTART Plus.

Chn Enable Programmer t Programmer Box nh hnh 1.
Giai on cui l lp trnh on m ca chng ta vo chip. lm iu ny ta nhp
chut vo biu tng lp trnh nh hnh 2 hay thong qua menu trn Programmer,
Program.
89
Hnh 2: Biu tng lp trnh.

Sau mt lc th thong bo thnh cng xut hin trn mn hnh. M c np thnh
cng vo chip v sn sang s dng.
Nu qu trnh np tht bi, bn hy kim tra chip c gn ng vo socket ( cm)
cha, nu c th th li mt ln na.
By gi chng ta c th s dng vi iu khin bt led v tt led.
Mch np Microchip MPLAB ICD 2 LE (In Circuit Debugger)
Chn Programmer, Select Programmer, MPLAB ICD 2 nh hnh 3.
Hnh 3
Qu tr nh c i t MPLAB ICD 2 di n ra
90
H nh 4.
Nh p chu t v o Next
Ch n c ng COM 1 v t c baud l 19200 baud.
H nh 5
Nh p chu t v o Next.
C p ngu n cho MPLAB ICD 2. Ch n ngu n cung c p ri ng hay t MPLAB ICD 2
91
H nh 6
Ch n cho ph p k t n i t ng . c th kh ng d ng n u b n c s d ng m ch
n p kh c ngo i ICD 2.
H nh 7
Nh p chu t v o Next. Ch n cho ph p t ng n p h i u h nh.
92
H nh 8
Nh p v o Next. Hi n ra b ng t m t t
H nh 9. Nh p v o Finish k t th c.
N u ch a g n v i chip PIC 16F877A th MPLAB hi n ra th ng b o:
93
H nh 10.
H nh 11
Tip theo chng ta lp trnh on m ca chng ta vo chip. lm iu ny ta nhp
chut vo biu tng lp trnh nh hnh 2 hay thong qua menu trn Programmer,
Program.
94
4.9. Lu lp trnh.
M MPLAB
Tp tp tin
CH51.ASM
Quickbuild CH51.ASM
Sa li
To c li?
S
Lp trnh (np) vi
iu khin
Hnh 4.18
4.10. Bi ton: chp tt 2 led

Xem xt mch in sau:
7
B1
16F84
B0
680
680
+5V
V+
68 pF
16 MCLR
T0CKI
14
4
3
32 Khz
68pF
15
0.1 F
0V
95
Hnh 4.19: Mch in chp tt 2 led.
Bi tp:
Vit chng trnh m s chp tt 2 led (on v off) lun phin nhau. t led 1 B1 v
led 0 B0.
Ch : Bn c th dung chng trnh CH51.asm v ch them 2 dng. Sau lu li vi
tn CH52.ASM.
C gng ng nhn vo p n bn di trc khi bn c gng tm ra li gii.
p n nh sau:
; phn tiu ( trnh by).
;Chng trnh chnh bt u.
BEGIN BSF PORTB,0 ; bt B0, led 0 sng.
BCF PORTB,1 ; tt B1, led 1 tt
CALL DELAYP5 ; tr hon 0,5 giy.
BCF PORTB,0 ;tt B0, led 0 tt.
BSF PORTB,1 ; bt B1, led 1 sng
CALL DELAYP5; tr hon 0,5 giy
GOTO BEGIN
END
Bi tp: 1/ Vit chng trnh chp tt 4 led, 2 led sang (on) v 2 led tt (off).
2/Vit chng trnh 8 led chy ui:
00000001
00000010
00000100
00001000
00010000
00100000
01000000
10000000
4.11.Tp tin tiu ca PIC 16F877A: HEADER877.ASM.
; Header877.asm iu ny thit lp portA l ng vo (1 l vo), portB l ng ra ( 0 l
ra), ;portC l ng vo, portE ng vo, portD ng ra.
;***************************************
;phn tng ng
PORTC EQU 7
PORTD EQU 8
PORTE EQU 9
TRISC EQU 87H
TRISD EQU 88H
TRISE EQU 89H
CARRY EQU 0
96
EEADR EQU 10Dh
EEDATA EQU 10Ch
EECON1 EQU 18Ch
EECON2 EQU 18Dh
RD EQU 0
WR EQU 1
WREN EQU 2
ADCON0 EQU 1Fh
ADCON1 EQU
9FH
ADRES EQU 1EH
ADRESL EQU 9EH
CHS0 EQU 3
GODONE EQU 2
COUNT EQU 20; COUNT l nh 20H, thanh ghi m s kin.
;***************************************
LIST P=16F87A ; chng ta ang dng 16F877A
ORG 0
; a ch bt u l 0
;***************************************
;Bit cu hnh
;Phn chng trnh con
;tr hon 1 giy
DELAY1
SUBLW .32; TIME-W
BTFSS STATUS, ZEROBIT; kim tra TIME-W=0 (32-W=0)
RETLW 0; tr v sau khi time l 32 (TMR0=32).
;tr hon 0,5 giy.
DELAY5
LOOPB
SUBLW .16 ;TIME-W
;Phn cu hnh.
MOVLW B11111111; 6 bit ca port A l I/P (ng vo)
MOVWF TRISA
MOVLW B00000000
MOVLW B11111111
MOVWF TRISC; portC l ng vo
MOVLW B00000000
MOVWF TRISD; PortD l output (ng ra)
MOVLW B11111111; 3 bit ca port E l I/P (ng vo)
MOVWF TRISE
97
MOVLW B00000000
MOVWF ADCON1; portA bit 0,1,2,3, v 5 l analog
BSF STATUS,6; bank 3
BCF EECON1,7; b nh d liu EEPROM on
BCF STATUS,6
BSF ADCON0,0; bt A/D
CLRF PORTC ;xa PORTC
CLRF PORTD ;xa PORTD
CLRF PORTE ;xa PORTE
Gii thch ca HEADER877.ASM
*Phn tng ng:
. CHng ta c 5 port. PortC l nh 7 v nh TRIS tng ng, TRISC nh 87H
bank 1. nh TRIS thit lp hng I/O ca cc bit port.
. a ch nh d liu EEPROM c them vo. EEADR l nh 10Dh bank 2,
EEDATA l 10Ch bank2, EECON1 l nh 18Ch bank 3, EECON2 l nh
18Dh bank 3.
. Bit d liu EEPROM c thm vo, bit c RD l bit 0, bit ghi WR l bit 1, WREN
,bit cho php ghi l bit 2.
. nh analog ADRES, ADCON0, v ADCON1 c them vo nh c bit tng
ng CHS0, bit chn knh 0, bit 3 v bit GODONE, bit 2.
*Phn lit k:
. Phn ny d nhin ch ra vi iu khin ang c dung , 16F877A v v tr nh u
tin l 0. trong a ch 0, lnh GOTO START hng dn vi iu khin b qua phn
chng trnh con v nhy ti phn cu hnh ti nhn START.
*Phn chng trnh con:
. Phn ny bao gm chng trnh con tr hon DELAY1 v DELAYP5 nh trc y
(1 giy v 0,5 giy).
*Phn cu hnh:
. Nh trc y, chng ta cn chuyn sang bank 1 nh v nh TRIS cu hnh
I/O. Port A c thit lp nh ng vo vi 2 lnh:
MOVLW B11111111
MOVWF TRISA
portB, portC, portD, v portE c cu hnh theo cch tng t s dng TRISB,
TRISC, TRISD v TRISE.
. Thanh ghi OPTION c cu hnh vi lnh sau:
MOVLW B00000111
MOVWF OPTION_R
Hay lnh sau:
MOVLW B00000111
Option
. Thanh ghi A/D c cu hnh vi lnh:
MOVLW B00000000
MOVWF ADCON1
thit lp portA bit 0,1,2,3 v 5 nh l g vo analog.
98
.Chng ta tr v bank 3 bng cch chn bit BSF STATUS,6 (bit 5 vn cn l 1) m
chng ta c th nh v EECON1, thanh ghi iu khin d liu EEPROM. BSF
EECON1 s cho php truy xut b nh chng trnh EEPROM khi yu cu.
. Chng ta sau tr li bank 0 bng cch xa bit 5 v bit 6 ca thanh ghi trng thi
(STATUS) v xa cc port A, B, C, D, E.
ng dng ca 16F877A: iu khin ngi nh xanh.
IV.Tng kt bi:
-Chun b bi mi.
Chng 4: Vo ra. Hot ng b nh thi. Lp trnh cho vi iu khin PIC.
1.Vit chng trnh chp tt 1 led.
Hnh: kt ni 1 led vi vi iu khin dung chn RB0.

Logic 1: led sang.
Logic 0: led tt.
2. Vit chng trnh chp tt 2 led.
3. Vit chng trnh chp tt 4 led.
Hnh: kt ni 4 led vi vi iu khin dung RB0 RB3.

4. Vit chng trnh n chy ui (8 led) dung PORTB iu khin 8 led.
5. Vit chng trnh n sang dn (8 led) dung portB iu khin 8 led.
6. Vit chng trnh n tt dn (8 led) dung portB iu khin 8 led.
7. Vit chng trnh n chy 2 ba vo ra (8 led) dung portB iu khin 8 led.
8. Vit chng trnh to sng vung c tn s 100Khz chn RB0 dng cc lnh BSF,
BCF, NOP v GOTO (khng dung timer 0).
9. Vit chng trnh to thi gian tr 1 giy dung TMR0.
99
10. Vit chng trnh to thi gian tr 0,5 giy.
11. Vit chng trnh to song vung c tn s 10 Khz chn RB0 dng timer 0.
12. Vit chng trnh to song vung c tn s 1 Khz chn RB0 dng timer 0.
13. Vit chng trnh to xung vung c chu k 2 sec (giy) chn RB1 dng timer 0.
14. Vit chng trnh to song vung c tn s 500 Hz RB1 vi chu k bn phn
T
Ton
D=30 % dng timer 0 . Chu k bn phn D = on =
T
Ton + Toff
15.Viet chng trnh 8051 e tao song vuong 12 Khz P1.2 dung timer 0.
16.Thiet ke ng dung turnstile dung timer 0 e xac nh khi ngi th 250 i vao
1 san. Gia s (a) cam bien turnstile noi vao T0 va tao ra 1 xung moi lan turnstile
quay, va (b) en c noi vao chan RB7 (PORTB, 7) ma se sang khi RB7=1 va tat
neu ngc lai. em cac s kien T0 va lam sang en RB7 khi ngi th 250
i vao san (xem hnh ve)
turnstile
(1 xung/ 1 lan quay)
PIC 16F877A
T0
RB7
(RA4/T0CKI)
0=off
1=on
en
Ngy .thng..nm 2011

B mn
Ngy .thng..nm 2011

Ging vin son
100
Bi ging s 5: Truyn d liu ng b v khng ng b (USART)( S tit: 3)
III.1. Mc tiu:
- Truyn nhn d liu ng b, khng ng b: Gii thiu USART, Thanh ghi
TXSTA, RCSTA, b to tc baud USART, ch bt ng b, ch ch ng b,
ch t ng b.
- B thu v pht radio.
-truyn thong ni tip PIC ti PIC, mch giao tip RS232C PIC ti PC.
chiu (hay my chiu).
vin.
Chng 5: Truyn d liu ng b v khng ng b
1. Gii thiu USART:
USART vit tt cho Universal Aynchronous Asynchronous Receiver Transmitter (B
thu pht bt ng b ng b a nng) v cho php vi iu khin PIC giao tip vi mt
tm rng cc thit b khc t chip nh ring bit v LCD hin th tinh th lng, ti
my tnh! iu ny bao gm gi hay nhn gi d liu 8 bit hay 9 bit (ngha l 1 byte
hay 1 byte cng them bit chn l). Bit chn l l bit ph gi km vi d liu m gip
kim tra li. Nu c 1 s l s 1 trong byte d liu (th d b00110100), bit parity s l
1 v nu c mt s chn s 1 (th d b00110011) th bit parity s l 0. Trong bi
ging ny, nu c li (v d lt bit) din ra u trong gia lc gi 1 byte v nhn
n bit parity s khng cn khp loi d liu. Bn nhn s bit rng c g sai st
v n yu cu gi li byte. Nu c 2 bit li xy ra trong mt vic truyn, bit parity s
101
xut hin ng, tuy nhin c th hai li din ra l nh hn, v v vy iu ny thng
b b qua.
Ch USART c 2 ch (mode) chnh: hot ng ng b v bt ng b.
Trong hot ng bt ng b, chn pht (TX-transmitter) t 1 thit b c ni vi
chn thu (RX-Receiver) ca thit b kia v d liu c hon i (c gi l song
cng-full duplex). Trong ch ng b, xung clock (CK) v ng d liu (DT) l
chia x gia mt s thit b (mt l ch (master) v mt hay nhiu t (Slaves)). Ch
chu trc nhim to ra xung clock. Trong c hai trng hp, tc ti d liu c
gi bi b pht (v ti n c mong i bi b thu) c bit n nh l tc
baud.
C hai thanh ghi kim sot vic nhn v pht d liu: RCSTA v TXSTA.
D liu m c c thnh cng c lu vo thanh ghi RCREG, v d liu m c
gi i nn c t trong thanh ghi TXREG. Tc baud c t s dng thanh
ghi SPBRG (c bng them vo trong datasheet minh ha lm th no chn tc baud
cho trc tn s dao ng).
Trong ch bt ng b, USART ly k t 8 bit hay 9 bit gi, v them 1
bit bt u (start bit) (1 zero,0) u, v bit dng (1 bit) vo cui to nn chui 10
hay 11 bit. iu ny c chuyn vo thanh ghi dch m quay bit vo chn pht (TX)
nh hnh 5.1
Mun nhn s lien tc kim tra trng thi ca chn thu RX, m s bnh thng l
mc cao. Nu n d thy chn RX xung mc thp (bit start), n s lm them 3 mu
trong gia bit (cho php ln v xung chm cc ln) v ly gi tr chnh ca ba . Nu
gi tr chnh l 0, n khng nh y thc s l bit bt u v tin hnh ly mu cc bit
tun t vi 3 mu gia mi bit. Thi gian ca mu ny c ch ra bi tc baud.
Khi n t n ci l bit dng, n phi c mt (1), ngc li n s khng nh k t
thu c ng khung ti v ng k mt li.
Nh rng vi thit lp ph hp trong TXSTA v RCSTA, tt c iu ny c thc
hin cho bn bi mun USART.
b00101101
Byte gi
Thanh ghi dch
1001011010
TX pin
in p trn TX
time
1
Start bit
0
Stop bit
102
Hnh 5.1.
Bn c th dung ch bt ng b giao tip vi port ni tip RS232 trn
my tnh PC. Cch n gin gi byte thong qua port ni tip ca PC l thong qua
mt chng trnh i km Microsoft Windows c gi l Hyper Terminal (Start
MenuProgramsAccessoriesCommunications). Bn c th to ra mt kt ni vi
cng ni tip (v d COM 1), chn tc baud, s bit, thit lp parity.. Khi Hyper
Terminal kt ni vi port ni tip, bt k k t m bn g s c gi (nh l m
ASCII) thong qua port ni tip. K t m c nhn c hin th ln mn hnh.
C hai ch ng b v bt ng b h tr c tnh c bit nh l d tm a ch
m cho php mt s thit b c kt ni. Khi gi d liu, mt byte a ch phi c
gi i u tin nhn din ni nhn d nh.
2.Thanh ghi TXSTA: thanh ghi iu khin v trng thi pht, a ch 98H.
R/W-0 R/W-0 R/W-0
R/W-0 U-0 R/W-0
R-1
CSRC TX9
SYNC
TRMT
TXEN
BRGH
R/W-0
TX9D
Bit 7
bit 0
Bit 7 CSRC: bit chn ngun xung clock.
ch bt ng b: khng quan tm.
ch ng b:
1= ch ch (xung clock c to ra bn trong t BRG).
0=ch t (xung clock t ngun bn ngoi).
Bit 6 TX9: bit cho php truyn 9 bit.
1=chn s truyn 9 bit.
0= chn s truyn 8 bit.
Bit 5 TXEN: bit cho php truyn (pht).
1= cho php truyn (pht).
0= cm pht.
Ch : SREN/CREN ln TXEN trong ch ng b.
Bit 4 SYNC : bit chn ch USART.
1= ch ng b.
0= ch bt ng b.
Bit 3 : khng dung, c l 0.
Bit 2 BRGH: bit chn tc baud cao.
ch bt ng b:
1=tc cao.
0=tc thp.
ch ng b:
khng c dung trong ch ny.
Bit 1 TRMT: bit trng thi thanh ghi dch pht.
1=TSR (thanh ghi dch pht) trng.
0=TSR y.
Bit 0 TX9D: bit th 9 ca d liu pht, c th l bit chn l (parity bit).
Ch thch:
R=bit c th c
W=bit c th ghi
U=bit khng dung , c l 0.
-n=gi tr ti POR 1 =bit c bt 0=bit b xa x= bit cha bit.
103
3.Thanh ghi RCSTA: thanh ghi iu khin v trng thi nhn , a ch 18H.
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
R-0
R-0
R-x
SPEN
Bit 7
RX9
SREN
CREN
ADDEN
FERR
OERR RX9D
bit 0
Bit 7 SPEN: bit cho php port ni tip.

1= cho [php port ni tip (cu hnh RC7/RX/DT v RC6/TX/CK nh l cc
chn cng ni tip).
0=port ni tip b cm.
Bit 6 RX9: bit cho php nhn 9 bit.
1=chn s nhn 9 bit.
0= chn s nhn 8 bit.
Bit 5 SREN: bit cho php nhn n.
ch bt ng b:
khng quan tm.
ch ng b-ch:
1=cho php nhn n l.
0= cm nhn n l.
bit ny b xa sau khi vic nhn hon thnh.
ch ng b-t:
khng quan tm
Bit 4 CREN: bit cho php nhn lien tc.
ch bt ng b:
1= cho php nhn lien tc.
0= cm nhn lien tc.
ch ng b:
1=cho php nhn lien tc cho ti khi bit CREN b xa (CREN SREN).
0= cm nhn lin tc.
Bit 3 ADDEN: bit cho php d a ch.
ch bt ng b 9 bit (RX9=1):
1=cho php d tm a ch, cho php ngt v np b m nhn khi RSR<8>
c bt (=1).
0= xa d tm a ch, tt c cc byte c nhn v bit th 9 c th dung
nh bit parity (chn l).
Bit 2 FERR: bit li khung .
1= li khung (c th c cp nht bng cch c thanh ghi RCREG v nhn
byte hp l k tip).
0= khng c li khung
Bit 1 OERR: bit li overrun (chy qu).
1= li overrun (c th c xa bng cch xa bit CREN).
0=khng c li overrun.
Bit 0 RX9D: bit th 9 ca nhn d liu (c th l bit parity nhng phi c tnh bi
phn do(firmware) ca ngi s dng).
4.B to tc baud USART:
B to tc baud h tr c ch bt ng b v ng b ca USART. N l b to
tc baud 8 bit. Thanh ghi SPBRG (a ch 99H) iu khin chu k ca b nh th 8
104
bit chy t do. Trong ch bt ng b bit BRGH (TXSTA<2>) cng kim sot tc
baud. Trong ch ng b, bit BRGH b b qua.
Cng thc tc baud:
SYNC
BRGH=0 (low speed)
BRGH=1(high speed)
0
tc baud (bt ng Tc
b)=Fosc/(64(X+1))
baud=Fosc/(16(X+1))
1
tc
baud(ng N/A
b)=Fosc/(4(X+1))
X: gi tr trong SPBRG (0 n 255).
5.Ch bt ng b USART:
a.B pht bt ng b USART:
S khi b pht bt ng b c minh ha hnh:
Hnh 5.2: S khi pht bt ng b USART.

Trong mode ny, USART s dung dng NRZ (Non-Return to-Zero)chun (mt bit
bt u(start), 8 hay 9 bit d liu, v mt bit dng(stop)). Dng d liu thong dng
nht l 8 bit. Mt b to tc baud 8 bit c sn trn chip c th c dung to tn
s tc baud chun t tn s thch anh ca h thng. USART pht v nhn bit LSB
trc tin. B pht v thu l c lp chc nng nhng s dng chung dng d liu v
tc baud. B to tc baud to ra xung clock , hoc l x16 hay x64 ca tc
dch bit ph thuc vo bit BRGH (TXSTA<2>). Chn l (parity) khng c h tr bi
phn cng nhng c th hin thc bng phn mm (v c lu nh l bit d liu th
9). Mode bt ng b b dng trong khi Sleep.
Mode bt ng b c chn bng cch xa bit SYNC (TXSTA<4>).
Mun bt ng b USART gm c cc phn t quan trng sau y:
.B to tc baud.
.Mch ly mu.
.B pht bt ng b .
. B thu bt ng b.
Khi thit lp s pht bt ng b, bn theo cc bc sau:
. Khi ng thanh ghi SPBRG cho tc baud ph hp. Nu tc baud tc cao l
mong mun th ta bt (ln 1) bit BRGH.
. Cho php port ni tip bt ng b bng cch xa bit SYNC v bt bit SPEN.
. Nu ngt l mong mun, th ta bt bit cho php TXIE.
. Nu s truyn 9 bit l mong mun , th ta bt bit truyn TX9.
. Cho php truyn bng cch bt bit TXEN m s bt bit TXIF.
. Nu s truyn 9 bit c chn, bit th 9 s c np bo bit TX9D.
. Np d liu vo thanh ghi TXREG (bt u truyn).
105
.Nu dng ngt, m bo rng GIE v PEIE (bit 7 v 6) ca thanh ghi INTCON c
bt.
Cc thanh ghi c dung trong pht bt ng b USART:
Hnh: Thanh ghi 16F87x c dung trong pht bt ng b.

b. B thu bt ng b USART:
S khi b thu c minh ha hnh:
Hnh 5.3: S khi thu USART.

D liu c nhn trn chn RC7/RX/DT v li khi phc hi d liu. Khi khi phc
d liu thc cht l b dch tc cao, hot ng 16x tc baud, trong khi b
dch ni tip thu chnh hot ng tc bit hay Fosc.
Khi thit lp s thu bt ng b , bn theo cc bc sau:
. Khi ng thanh ghi SPBRG cho tc baud ph hp. Nu tc baud tc cao
c chn, th ta bt bit BRGH..
.Nu ngt l mong mun, th ta bt bit cho php RCIE.
. Nu s nhn 9 bit l mong mun, th ta bt bit RX9.
106
. Cho php nhn bng cch bt bit CREN.
.Bit c RCIF c bt (=1) khi s nhn hon thnh v ngt s to ra nu bit cho php
RCIE c bt.
. c thanh ghi RCSTA nhn bit th 9 (nu cho php) v xc nh xem c li no
xy ra trong qu trnh nhn (thu).
. c d liu nhn 8 bit bng cch c thanh ghi CRREG.
.Nu c li xy ra, xo li bng cch xa bit cho php CREN.
. Nu dung ngt, m bo rng GIE v PEIE (bit 7 v 6) ca thanh ghi INTCON c
bt.
c. Thit lp mode 9 bit vi d tm a ch.
Khi thit lp mt s thu bt ng b vi d tm a ch cho php:
. . Khi ng thanh ghi SPBRG cho tc baud ph hp. Nu tc baud tc cao
c chn, th ta bt bit BRGH..
.Nu ngt l mong mun, th ta bt bit cho php RCIE.
. Bt bit RX9 cho php s nhn 9 bit .
.Bt ADDEN cho php d tm a ch.
. Cho php nhn bng cch bt bit CREN.
.Bit c RCIF c bt (=1) khi s nhn hon thnh v ngt s to ra nu bit cho php
RCIE c bt.
. c thanh ghi RCSTA nhn bit th 9 (nu cho php) v xc nh xem c li no
xy ra trong qu trnh nhn (thu).
. c d liu nhn 8 bit bng cch c thanh ghi CRREG xc nh xem nu thit
b ang c nh a ch.
.Nu c li xy ra, xo li bng cch xa bit cho php CREN.
. Nu thit b c nh a ch, xa bit ADDEN cho php byte d liu v byte a
ch c cvo b m thu v ngt CPU.
Cc thanh ghi c dung trong thu bt ng b USART:
Hnh: Thanh ghi c dung trong thu bt ng b.

6. Ch ch ng b.
Trong mode ch ng b, d liu c truyn theo cch bn song cng (halfduplex)(ngha l pht v thu khng din ra cng mt thi im).Khi pht d liu, s
nhn (thu) b cm v ngc li. Mode ng b a vo bng cch bt bit,
SYNC(TXSTA<4>). Hn na, bit cho php SPEN (RCSTA<7>) c bt (=1) cu
107
hnh chn RC6/TX/CK v RC7/RX/DT ti ng CK (clock) v DT (d liu-data)
tng ng. Mode ch ch ra rng b x l pht clock ch trn ng CK. Mode ch
c a vo bng cch bt bit CSRC (TXSTA<7>).
a.Pht ch ng b USART
S khi b pht USART c minh ha hnh:
Hnh 5.4: S khi thu USART.

b.Thu ch ng b USART
7. Ch t ng b USART
a.Pht t ng b USART
b.Thu t ng b USART.
8. B thu pht radio:
H thng truyn d liu radio:
+5V
B0
10K
A0
B0
16F877A
TX
RX
470
A0
16F877A
108
Hnh 5.4: H thng truyn d liu radio.
Phn ny m t chi tit vi s dng moun thu v pht radio 418 Mhz (RT1-418 v
RR3-418). Chng khng cn bn quyn hot ng v c nhiu thay i cho php.
B pht ch c 3 kt ni, 2 ngun cung cp v 1 ng vo d liu, anten pht c tch
hp vo n v. B thu c 4 kt ni, 2 ngun cung cp, 1 anten vo v 1 ng ra. Anten
thu ch cn l mu dy di 25 cm.
S mch c bn ca h thng radio c minh ha hnh 5.4.
Vi iu khin to ra d liu v sau chuyn xung d liu ti b pht. B thu nhn
xung d liu v vi iu khin gii m thong tin v x l n.
H thng radio-vi iu khin c th o nhit bn ngoi v gi nhit ny hin
th trn n v bn trong.
Phn sau c trch dn t sch Microcontroller programming the microchip PIC ca
tc gi Julio Sanchez, Maria P. Canton.
Mch truyn thong ni tip PIC ti PIC:
Thc t, h thng c yu cu cho mt PIC c d liu v gi ni tip kt qu ti mt
PIC khc m xut d liu c th xem nh hai mch c lp. Mt mch c dung
c trng thi 8 cng tc DIP v gi d liu ni tip ti mt mch PIC khc m hin
th kt qu. Hnh sau minh ha 2 mch da trn PIC.
109
Hnh 5.5: Mch truyn thong ni tip PIC ti PIC.
Thanh ghi dch : 74HC165 l thanh ghi dch song song ra ni tip v 74HC164 l thanh
ghi dch ni tip ra song song.
IC thu pht RS-232C: dung IC Max 232 v phin bn nng cp Max202. IC Max 233
v Max 203 khng yu cu t ngoi.
Mch giao tip RS-232C PIC ti PC:
minh ha truyn ni tip vi giao thc RS232C, chng ta pht trin mch
gm bn phm 4x4 v LCD hin th 20 k t trn 2 dng. K t c n trn bn phm
v c chuyn thnh m ASCII cho tp hp s hexa, ngha l cc s 0-9 v ch A n
F. Khi mt phm c nhn, m ASCII tng ng c hin th trn LCD v truyn
thong qua port ni tip ti ng dng PC. K t c nhn thong qua ng truyn ni
tip l c hin th trn LCD.
Hnh 5.6: Mch truyn thong USART vi PIC 16F877.

Chng trnh khi to PIC 16F877:
110
on chng trnh sau minh ha s khi to mun UART trong PIC 16F877 cho tc
truyn 2400 baud, 8 bit d liu, khng c bit chn l v 1 bit dng. Khng c ngt
c dung trong th d ny.
Tc baud c tnh nh sau:
ABR=Fosc/(S*(x+1))
Trong x l gi tr trong thanh ghi SPBRG, S l 64 nu bit BRGH trong thanh ghi
iu khin TXSTA b xa, v S=16 nu bit BRGH=1. thit lp tc 9600 baud s
dng thch anh 4 Mhz tc baud tc cao (BRGH=1), cng thc l:
4000000 4000000
=
= 9615 baud (sai s 0,16 %).
16(25 + 1)
416
tc thp (BRGH=0):
4000000 4000000
=
= 2403,85 (sai s 0,16%).
64(25 + 1)
1664
;Th tc khi ng USART
Initserial BCF STATUS, RP1
BSF STATUS, RP0 ; chn bank 1
Movlw b11000000; bit cho Tx v RX
Iorwf TRISC,f; OR vo thanh ghi TRISC
Movlw spbrgVal; gi tr trong spbrgVal=25
Movwf SPBRG ; t vo b to tc baud
Movlw 0x20; gi tr thit lp b00100000 cho TXSTA
Movwf TXSTA;cho php truyn v tc baud cao
BCF STATUS, RP0; bank 0
Movlw 0x90; gi tr thit lp b10010000 cho RXSTA
Movwf RCSTA; cho php port ni tip v nhn lien tc.
Clrf errorflags; xa thanh ghi c li cc b
Return
;Th tc pht v nhn USART

Chng trnh pht kh n gin. Chng trnh kim tra bit TXIF trong thanh ghi PIR1.
Nu bit ny l 1, d liu c pht bng cch lu byte d liu trong thanh ghi TXREG.
Th tc sau thc hin tc v c yu cu.
;Pht d liu
;Kim tra thanh ghi pht trng v pht d liu trong W.
SerialSend BCF STATUS, RP1
Wait
BTFSS PIR1,TXIF; kim tra xem b pht c bn khng
Goto Wait ; i cho ti khi b pht khng bn
Movwf TXREG; v pht d liu
Return
Thu d liu th phc tp hn pht d liu. Mt l do l m phi c kim tra v qun l
nhiu li m c th xy ra trong qu trnh nhn (thu). on chng trnh sau minh ha
bin cc b v x l c yu cu cho nhn d liu n gin.
;bin cc b trong b nh RAM (d liu) ca PIC
cblock 0x20; bt u khi
;bin truyn thong
111
newData ; khng l 0 nu d liu mi c nhn
ascVal
errorFlags
endc
;th tc nhn d liu USART
;th tc kim tra ng truyn cho nhn d liu v tr gi tr trong W. Li khung v
;Overrun c d tm v nh trong bin errorFlags.
SerialRcv
CLRF newData;xa thanh ghi nhn d liu mi
BCF STATUS,RP1
BTFSS PIR1,RCIF;kim tra cho d liu nhn. Bit RCIF=0 nu b m thu
; trng. Nu vy, d liu khng c nhn
Return; v thot nu khng c d liu
;ti thi im ny, d liu c nhn, u tin phi loi b li: li khung v Overun.
BTFSC RCSTA,OERR;kim tra li Overrun
Goro OverErr; b kim sot li
BTFSC RCSTA,FERR; kim tra li khung
Goto FrameErr; b kim sot li
;ti thi im ny khng cn li, nhn d liu trong thanh ghi RCREG
movf RCREG,W; nhn d liu
BSF newData,7; bt bit 7 ch ra d liu mi
Clrf erroeFlags; xa c li
Return
;b kim sot li
;li Overrun c tm thy
OverErr BSF errorFlags,0; bit 0 l li Overrun
errExit
BCF RCSTA,CREN; xa bit nhn lien tc
BSF RCSTA,CREN;bt bit (1) ti s nhn cho php li
Return
;Li khung. Bit li khung FERR c bt
FrameErr
BSF errorFlags,1; bit 1 l li khung
Movf RCREG,W; c v b d liu xu
Goto errExit
IV.Tng kt bi:
-Chun b bi mi.
Chng 5: Truyn ni tip bt ng b v ng b
1.USART l g?
2.Giao tip RS-232.
3. Thanh ghi iu khin nhn v pht d liu: RCSTA v TXSTA.
4. Thanh ghi RCREG (lu d liu c c vo) v TXREG (lu d liu c pht i),
v SPBRG (thit lp tc baud).
5. Thu v pht radio dung PIC 16F84 hay 16F877A.
112
113
Bi ging s 6: Ngt ( S tit: 3)

III.1. Mc tiu:
- Ngun ngt.
- Thanh ghi iu khin ngt.
- Chng trnh s dng ngt.
chiu (hay my chiu).
vin.
Chng 6: Ngt
Chng ta u bit ngt l g v chng ta khng thch b ngt. Chng ta bn rn
lm iu g v in thoi reng hay ai bc vo ca.
Nu chng t among i ai, chng ta c th nhn ra ngoi ca s xem c ai
ti hay khng hay l chng ta tin hnh vi nhng g chng ta ang lm cho ti khi
chung ca reo ln. C 2 cch nhn ngt. Th nht khi chng ta tip tc kim tra bng
phn mm gi l hi vng (polling), th hai khi chung reo l tng ng ngt phn
cng.
Khi xy ra ngt chng ta cn nh ni dung ca file l g, ngha l thanh ghi
trng thi STATUS, thanh tch ly W, TMR0 v thit lp PORT m khi tr v t
ngt, cc thit lp c lu tr li (restored). Nu chng ta khng nh cc thit lp,
chng ta khng th tip tc u chng ta ri b, bi v ngt s tt tt c ng ra v
thanh ghi W b nh hng ti ln gn nht.
6.1. Ngun ngt
114
16F84 c 4 ngun ngt:
. Thay i cnh ln hay cnh xung ca PORTB,0.
.TMR0 trn t FFh v 00h.
. PORTB bit 4-7 thay i.
.Ghi d liu EEPROM hon thnh.
16F877A c 15 ngun ngt. Ngoi 4 ngun ngt nu trn, cc ngt them vo l:
. Chuyn i A/D hon thnh.
. Ngt port ni tip ng b.
. TMR1 trn.
.TMR2 trn.
.Ngt iu ch rng xung, bt gi v so snh.
Nhng ngt ny c th c cho php (enable) hay cm theo yu cu bi bit cho
php/cm ngt. Cc bit ny c th c tm thy trong thanh ghi iu khin ngt
INTCON cho 16F84/16F877A.
6.2. Thanh ghi iu khin ngt INTCON:
Thanh ghi iu khin ngt INTCON, file 0Bh c minh ha hnh 6.1.
Bit 7
GIE
EEIE
T0IE
INTE
3
RBIE
2
T0IF
bit 0
INTF
RBIF
Hnh 6.1: Thanh ghi iu khin ngt INTCON cho 16F84/16F877A.

Thanh ghi iu khin ngt ghi yu cu ngt ring r vo bit c. N cng c bit cho php
ngt ton cc v ring r.
Ch : bit c ngt ring r c bt (=1) bt chp trng thi ca bit mt n tng ng
hay bit GIE.
Bit cho php ngt ton cc GIR (INTCON<7>), cho php (nu bt bit ln 1) tt c cc
ngt khng che (unmasked interrupt) hay cm (nu b xa 0) tt c cc ngt.
Bit 6 trong thanh ghi ny c gn nh l bit cho php ngt ngoi vi PEIE(peripheral
interrupt enable bit) cho 16f818/819.
Trc khi bit cho php ngt ring r c th chuyn qua ON (bt) th bit cho php bgt
ton cc GIE, bit 7, phi c bt , ngha l 1, cho php tt c cc ngt khng che
c v GIE=0 s xo tt c cc ngt.
Bit 6 EEIE (16F84/16F877A) l bit cho php ngt vic ghi d liu eeprom hon thnh.
1=cho php ngt.
0= cm ngt.
Bit 6 PEIE (16F818/19): l bit cho php kh nng ca bit ngoi vi ngoi.
Bit 5: T0IE l bit cho php ngt TMR0 trn.
1=cho php ngt ny.
0=cm ngt.
Bit 4 INTE l bit cho php ngt RB0/INT (bit 0 ca PORTB)
1=cho php n gt.
0=cm ngt
Bit 3 RBIE l bit cho php ngt thay i portB (B4-B7).
1=cho php ngt.
0=cm ngt.
Bit 2 T0IF l c , m ch ra TMR0 b trn to ra mt ngt.
1=ch ra TMR0 b trn.
115
0=TMR0 khng trn.
Bit ny phi c xo bng phn mm.
Bit 1 INTF l bit c ngt RB0/INT m ch ra s thay i trn PORTB,0
1=ch ra mt s thay i din ra.
0=ch ra khng c s thay i.
Bit 0 RBIF l bit c ngt thay i PORTB (B4-B7).
1=ch ra rng mt trong bn chn ng vo PORTB, 4-7 c s thay i trng thi. Bit
ny phi c xa bng phn mm.
0=ch ra khng c bit no PORTB,4-7 c thay i.
Lnh RETFIE (return from interrupt), tr v t ngt, thot khi chng trnh phc v
ngt, cng nh thit lp GIE bit, m cho php li ngt.
C ngt ngoi vi c cha trong thanh ghi chc nng c bit PIR1 v PIR2. Bit cho
php ngt tng ng c cha trong thanh ghi chc nng c bit , PIE1 v PIE2, v
bit cho php ngt ngoi vi cha trong thanh ghi INTCON.
C ngt chn RB0/INT, c ngt thay i portB (B4-B7) v c ngt trn TMR0 c
cha trong thanh ghi INTCON.
Khi mt ngt c p ng, bit GIE b xa cm cc ngt khc, a ch tr v c
ct vo ngn xp v thanh ghi b m chng trnh PC c np gi tr 0004h. Mt khi
trong chng trnh phc v ngt, ngun ca ngt c th c xc nh bng cch bit c
ngt. Bit c ngt phi c xa bng phn mm trc khi cho php li ngt trnh
ngt qui.
Trong phn ny, chng ta xem xt ngt gy ra bi cnh ln hay cnh xung ca chn
PORTB,0. Cho php ngt RB0/INT bng lnh
BSF INTCON,GIE; bit cho php ngt ton cc
BSF INTCON,INTE;cho php ngt do RB0
6.3. Chng trnh s dng ngt:
Nh l mt v d lm th no ngt hot ng, chng ta hy xem xt th d sau:
Gi s chng ta c 4 led sang tun t mi 5 giy. Mt nt nhn c ni vi B0 hot
ng nh mt ngt m khi B0 logic 0, mt chng trnh ngt c gi. Chng
trnh ngt ny chp tt c 4 led sang (on) v tt (off) 2 ln trong mt giy v tr v
chng trnh chnh gi s nt nhn B0 l logic 1.
Chng ta dung 16F877A trong v d ny.
S mch cho ng dng ny hnh 6.2
116
Xem xt mch in sau:
B1
B0 16F877A
B2
33
SW
B3
B4
34 680
35
680
36
680
37
680
+5V
Vcc
22 pF
13
MCLR
11
1
32Khz
22pF
14
0.1 F
12
Hnh 6.2: Mch in chp tt 4 led.

Mt iu cn ch t mch l chip 16F877A c in tr ko ln bn trong PORTB
nn B0 khng cn in tr ko ln cng tc SW.
Ngt chng ta s dng l thay i trn B0, v vy chng ta quan tm n cc
bit sau trong INTCON: bit 4 INTE, bit cho php ngt do RB0/INT v bit 1 INTF, bit c
minh ha B0 c thay i, v d nhin bit 7 GIE, bit cho php ngt ton cc.
Hot ng ca chng trnh:
Khi B0 to ra mt ngt, chng trnh r nhnh ti chng trnh phc v ngt .
u? v tr 4 b nh chng trnh bo cho vi iu khin nhy ti ni tm chng trnh
phc v ngt.
V tr nh s 4 ca b nh chng trnh th c lp trnh s dng lnh sau:
ORG 4; ghi lnh k tip vo nh 4 b nh chng trnh.
GOTO ISR;nhy ti chng trnh phc v ngt.
Chng trnh phc v ngt:
Chng trnh phc v ngt c vit ging nh chng trnh con v c minh
ha di y:
;chng trnh phc v ngt:
ISR MOVWF W_TEMP; lu W
SWAPF
STATUS,W
MOVWF STATUS_T;lu STATUS
MOVF TMR0,W
MOVWF
TMR0_T; lu TMR0
MOVF PORTB,W
MOVWF PORTB_T; lu PORTB
117
MOVLW 0FFh
MOVWF PORTB; bt tt c ng ra
CALL DELAY1; tr hon 1 giy
MOVLW 0
MOVWF PORTB; tt tt c ng ra
CALL DELAY1 ; tr hon 1 giy
MOVLW 0FFh
MOVWF PORTB;bt tt c ng ra
MOVLW 0
MOVWF PORTB;tt tt c ng ra
SW_HI BTFSS PORTB,0
GOTO SW_HI; i cho nt nhn mc 1
SWAPF STATUS_T,W
MOVWF STATUS;phc hi STATUS
MOVF TMR0_T,W
MOVWF TMR0;phc hi TMR0
MOVF PORTB_T,W
MOVWF PORTB;phc hi PORTB
MOVF W_TEMP,W;phc hi W
BCF INTCON,INTF;reset c ngt
RETFIE ; tr v t ngt
Hot ng ca chng trnh phc v ngt:
Chng trnh phc v ngt hot ng theo cch sau:
. Khi mt ngt c th hin th cho php ngt ton cc b xa t ng (=0, cm)
tt tt c cc ngt khc. Chng ta khng mun b ngt khi chng ta ang b ngt.
. Thanh ghi W, STATUS, TMR0 v PORTB c lu trong v tr tm W_TEMP,
STATUS_T, TMR0_T, v PORTB_T.
. Chng trnh ngt c thc thi , led chp sang v tt 2 ln. y l chui tch bit
hn trc y minh ha ngt ngt dng chng trnh thong thng. Ch l
chng trnh khng nhn vo cng tc m to ra ngt.
. Chng ta i cho ti khi cng tc tr v vit tr Hi (mc cao).
. nh tm W_TEMP, STATUS_T, TMR0_T, v PORTB_T c phc hi vo W,
STATUS, TMR0 v PORTB.
. C ngt PORTB,0 thanh ghi INTCON l INTF b xo, sn sang ch ra ngt khc
na.
. Chng ta tr v t ngt, bit cho php ngt ton cc t ng c bt ln 1 cho php
ngt khc na.
Chng trnh minh ha ngt:
on m y cho chng trnh ny c minh ha di y vi tn
INTFLASH.ASM
;INTFLASH.ASM chp tt led dung ngt bng nt nhn trn B0 dng 16F877A
; Header877.asm iu ny thit lp portA l ng vo (1 l vo), portB,0 l ng vo, cn
B1-B7 l ng ra ( 0 l ra), ;portC l ng vo, portE ng vo, portD ng ra.
;***************************************
;phn tng ng
118
PORTC EQU 7
PORTD EQU 8
PORTE EQU 9
TRISC EQU 87H
TRISD EQU 88H
TRISE EQU 89H
CARRY EQU 0
INTCON EQU 0BH; thanh ghi iu khin ngt
GIE EQU 7; bit ngt ton cc
INTE EQU 4;bit cho php ngt B0
INTF EQU 1; c ngt B0
ADCON0 EQU 1Fh;thanh ghi cu hnh A/D 0.
ADCON1 EQU
9FH;thanh ghi cu hnh A/D 1.
ADRESH EQU 1EH
ADRESL EQU 9EH
COUNT EQU 20H ;COUNT l nh 20H, thanh ghi m s kin.
TMR0_T EQU 21H; nh tm TMR0
W_TEMP EQU 22H; nh tm W
STATUS_T EQU 23H; nh tm STATUS
PORTB_T EQU 24H; nh tm PORTB
COUNTA EQU 25H;COUNTA l thanh ghi m s kin
;***************************************
ORG 0
; a ch bt u l 0
ORG 4;ghi ti nh 4
GOTO ISR;v tr 4 nhy ti ISR
;***************************************
;Bit cu hnh
;Phn chng trnh con
;tr hon 0,1 giy, thc s 0,099968s
DELAYP1
LOOPB MOVF TMR0,W; c TMR0 vo W
SUBLW .3; TIME-3
BTFSS STATUS, ZEROBIT; kim tra TIME-3=0 (3-W=0)
GOTO LOOPB; time khng bng 3
NOP
;them tr hon
NOP
RETLW 0; tr v sau khi time l 3
;tr hon 5 giy.
DELAY5
MOVLW .50
MOVWF COUNTA
119
LOOPC
CALL DELAYP1
DECFSZ COUNTA
GOTO LOOPC
RETLW 0
;tr hon 1 giy
DELAY1
MOVLW .10
MOVWF COUNT
LOOPA
CALL DELAYP1
DECFSZ COUNT
GOTO LOOPA
RETLW 0
;chng trnh phc v ngt:
ISR MOVWF W_TEMP; lu W
SWAPF
STATUS,W
MOVWF STATUS_T;lu STATUS
MOVF TMR0,W
MOVWF
TMR0_T; lu TMR0
MOVF PORTB,W
MOVWF PORTB_T; lu PORTB
MOVLW 0FFh
MOVWF PORTB; bt tt c ng ra
MOVLW 0
MOVWF PORTB; tt tt c ng ra
CALL DELAY1 ; tr hon 1 giy
MOVLW 0FFh
MOVWF PORTB;bt tt c ng ra
MOVLW 0
MOVWF PORTB;tt tt c ng ra
SW_HI BTFSS PORTB,0
GOTO SW_HI; i cho nt nhn mc 1
SWAPF STATUS_T,W
MOVWF STATUS;phc hi STATUS
MOVF TMR0_T,W
MOVWF TMR0;phc hi TMR0
MOVF PORTB_T,W
MOVWF PORTB;phc hi PORTB
MOVF W_TEMP,W;phc hi W
BCF INTCON,INTF;reset c ngt
RETFIE ; tr v t ngt
;Phn cu hnh.
START BCF STATUS,6
BSF STATUS,5; tr li bank 1
MOVWF TRISA
MOVLW B00000110
MOVWF ADCON1; portA l s (digital)
120
MOVLW B00000001
MOVWF TRISB ; PortB,0 l I/P (ng vo)
MOVLW B11111111
MOVLW B00000000
MOVWF TRISE
BCF STATUS,6
BSF INTCON,GIE; cho php ngt ton cc
BSF INTCON, INTE;cho php ngt B0
BEGIN MOVLW B00000010; bt B1 led 1 sng
MOVWF PORTB
CALL DELAY5; i 5 giy
MOVLW B00000100
MOVWF PORTB;bt B2, led 2 sng
MOVLW B00001000
MOVWF PORTB;bt B3 , led 3 sng
MOVLW B00010000
MOVWF PORTB;bt B4, led 4 sng
CALL DELAY5;tr hon 5 giy
GOTO BEGIN
4 led chp sng v tt chm (khong 5 giy) m bn c th ngt cch qung
thng qua B0 mc thp dng nt nhn. Khi tr v t ngt, B0 mc cao tr li,
chng trnh g t lc n b i.
IV.Tng kt bi:
-Chun b bi mi.
Chng 6: Ngt
1.Ngt l g? Cc ngun ngt ca 16F84 v ca 16F877A.
2. Thanh ghi INTCON.
3. Gi s chng ta c 4 led chp(sang v tt) tun t. Mt nt nhn ni vi B0 lm
vic nh 1 ngt m khi B0 l logic 0 mt chng trnh ngt c gi. Chng
trnh ngt ny chp tt c 4 led sang(ON) v tt (OFF) hai ln khong thi gian 1
giy v tr v chng trnh cung cp nht nhn B0 l logic 1. Hy vit chng
trnh trn.
121
122
Bi ging s 7: B chuyn i tng t-s ( S tit: 3)

III.1. Mc tiu:
- Thc hin vic c A/D.
- Cu hnh thit b A/D.
-Tiu tng t cho PIC 16F877A.
- Th d chuyn i A/D: chuyn mch (switch) cm bin nhit .
-. M chng trnh
chiu (hay my chiu).
vin.
Chng 7: B chuyn i tng t-s (ADC)
Cho ti nay chng ta xt ng vo nh l s hot ng ngha l ng vo l 0 hay 1.
Nhng gi s chng ta o nhit , ch khng ch l nng hay lnh (1 hay 0). Chng ta
c th yu cu:
(a)Pht ra buzzer (ci h) nu nhit xung di freezing (ng).
(b) Bt l ln nu nhit di 18 C.
(c) Bt qut ln nu nhit trn 25 C.
(d)Bo ng nu nhit trn 35 C.
Gii php tt l s dng mt ng vo ni vi b chuyn i tng t sang s (ADC)
v o nhit vi A/D.
Hnh 7.1 minh ha s mch c bn o nhit . N gm c in tr c nh ni tip
vi thermistor (in tr nhit bn dn).
123
in tr ca thermistor (tec-mix-to) thay i theo nhit gy ra 1 in p ti im X
hnh 8.1
+5V
Tec-mix-to
0C
X
22k
0V
Hnh 7.1: Mch o nhit .
Khi nhit tng in p ti X tng.
Khi nhit gim , in p ti X gim.
Chng ta cn bit quan h gia nhit ca tec-mix-to vi in p ti X. Cch n
gin lm iu ny l t tec-mix-to trong ly nc si (100 C) v o in p ti X.
Khi nc ngui tng ng vic c nhit v in p c th o c. Nu cn thit,
th ca nhit v vic c in p c v ra.
7.1. Thc hin vic c A/D.
Trong th d trn chng ta hy gi s:
. 0 C cho c in p l 0,6V.
Vi iu khin s c cc in p ny v chuyn i chng thnh s 8 bit trong
0V l 0 v 5V l 255, ngha l vic c 51/volt hay phn gii l 1/51, ngha l 1
bit l 19,6 mV.
Nh vy 0 C=0,6V=c l 31 (0,6vx51=30,6)
18 C=1,4V=71 (1,4v x 51=71,4)
25 C=2,4v= 122 (2,4v x 51=122,4)
30 C= 3,6 v= 184(3,6V x 51=183,6)
PIC 16C773 v PIC 16C773 c ADC 12 bit v c 4096 im nhit khc
nhau.
ADC c gii thiu PIC vi h gi l 16C7X nh l 16C71, 16C73 v
16C74. H ny hin nay c thay bng 16F87X nh l 16F870,
16F871/872/873/874/876/16F877. Ngoi ra cn c 16F818/819.
124
PIC 16F877A c 8 ng vo analog AN0, AN1, AN2, AN3, AN4, AN5, AN6,
AN7 v AN8 vi b chuyn i tng t-s (A/D) 10 bit c 8 knh vo. (PIC 16F877
c ADC 10 bit vi 5 knh vo).
7.2. Cu hnh thit b A/D:
thc hin o lng analog th ta phi cu hnh thit b . HEADER877A.ASM phi
c phn cu hnh thay i lm cho mt s ng vo port A l ng vo analog, portB
c thit lp ng ra.
cu hnh 16F877A cho o lng A/D, 3 thanh ghi cn c thit lp:
. ADCON0.
.ADCON1.
.ADRESH v ADRESL
Thanh ghi iu khin A/D 0: ADCON0, a ch 1FH
u tin l thanh ghi A/D, ADCON0 l thanh ghi iu khin tng t sang s th 0.
ADCON0 c dung:
. Bt ln chuy n i A/D v i ADCON0, bit 0. Bit ny bt chuyn i A/D khi n
c bt ln 1 v tt A/D khi n b xa v 0. Khi A/D c bt, n c th c ON
(bt) sut thi gian nhng n li dng 90A, so snh vi phn cn li ca vi iu khin
m li dng 15A.
. Ra lnh vi iu khin thc thi chuyn i bng cch bt bit GO/DONE, bit 2. Khi bit
GO/DONE=1 th vi iu khin thc hin chuyn i A/D. Khi chuyn i hon
thnh, phn cng xa bit GO/DONE. Bit ny c th c c khi kt qu l sn sang.
. Thit lp knh c th (ng vo) thc hin o lng. iu ny c thc hin vi 3
bit chn knh CHS0, CHS1 v CHS2, bit 3,4, v 5.
Bit 7
ADCS1 ADSC0 CHS2
4
CHS1
CHS0 GO/DONE - ADON
Hnh 7.2: Thanh ghi ADCON0.

.Bit 7 v 6, ADCS1 v ADCS0: bit chn clock chuyn i A/D.
ADCS2
ADCS1 ADCS0
Tc chuyn i
(ADCON1)
0
0
0
Fosc/2
0
0
1
Fosc/8
0
1
0
Fosc/32
0
1
1
FRC (clock ly t mch RC A/D bn trong)
1
0
0
Fosc/4
1
0
1
Fosc/16
1
1
0
Fosc/64
1
1
1
FRC
125
.Bit 5,4 v 3: CHS2, CHS1, v CHS0 :chn knh A/D.
CHS2 CHS2
CHS0
Chn knh A/D
0
0
0
knh 0, AN0
0
0
1
knh 1, AN1
0
1
0
knh 2, AN2
0
1
1
knh 3, AN3
1
0
0
knh 4, AN4
1
0
1
knh 5, AN5
1
1
0
knh 6, AN6
1
1
1
knh 7, AN7
Thanh ghi iu khin A/D 1: ADCON1, a ch 9FH
Trong ADCON1, thanh ghi chuyn i tng t-s th 1, ch c cc bit 0,1,2, v 3
c dung.
Chng l cu hnh port, PCFG1, PCFG2 v PCFG3 m xc nh chn no ca port A s
l ng vo analog v chn no l s.
Thanh ghi ADCON1 c minh ha trong hnh 7.3 v ng vo analog v ng vo s
c minh ha bng 7.4.
Bit 7
ADFM ADCS2
PCFG3
PCFG2
Hnh 7.3: Thanh ghi ADCON1.

Bng 7.4: Cu hnh port ADCON1.
PCFG AN7-5 AN4
AN3
AN2
0000
AAA A
A
A
0001
AAA A
Vref+ A
0010
DDD A
A
A
0011
DDD A
Vref+ A
0100
DDD D
A
D
0101
DDD D
Vref+ D
011x
DDD D
D
D
1000
AAA A
Vref+ Vref1001
DDD A
A
A
1010
DDD A
Vref+ A
1011
DDD A
Vref+ Vref1100
DDD A
Vref+ Vref1101
DDD D
Vref+ Vref1110
DDD D
D
D
1111
DDD D
Vref+ Vref-
AN1
A
A
A
A
A
A
D
A
A
A
A
A
A
D
D
AN0
A
A
A
A
A
A
D
A
A
A
A
A
A
A
A
1
PCFG1
Vref+
Vdd
AN3
Vdd
AN3
Vdd
AN3
AN3
Vdd
AN3
AN3
AN3
AN3
Vdd
AN3
Bit 7, ADFM : bit chn khun dng kt qu A/D.

1=chnh phi. 6 bit trong s cao nht ca ADRESH l c l 0.
0=chnh tri. 6 bit trng s thp nht ca ADRESH l c l 0.
Bit 6, ADCS2: bit chn clock chuyn i A/D.
A=analog (tng t) , D= digital (s)
C/R=# ca knh vo analog/# ca tham chiu in p A/D.
0
PCFG0
VrefVss
Vss
Vss
Vss
Vss
Vss
AN2
Vss
Vss
AN2
AN2
AN2
Vss
AN2
C/R
8/0
7/1
5/0
4/1
3/0
2/1
0/0
6/2
6/0
5/1
4/2
3/2
2/2
1/0
1/2
126
Nh cp trc y, vi iu khin d chuyn i mt in p analog gia 0 v 5V

thnh mt s gia 0 v 255. Nhng gi s vic c analog ca chng ta l, nhit i
t 0,6V th hin 0 C ln ti 3,6V th hin 30 C. N c ngha c tm in p
analog i t 0,6V n 3,6V. Chng ta c th thit lp iu ny bng cch dung 2 in
p tham chiu. Mt thit lp thp 0,6V c gi l Vref-,ni vi AN2. Thit lp kia
ca 3,6V cho Vref+, ni vi AN3. Hai ct bn phi ch ra rng PCFG thit lp l 1000
s thit lp cu hnh A/D s dng AN3 nh l in p tham chiu. Trong i ging ny,
ti khng s dng in p tham chiu m dung 5V cho Vdd v 0V cho Vss l tham
chiu.
ADRES:
Thanh ghi th ba l ADRES, thanh ghi kt qu A/D. y l cc nh m kt qu
chuyn i A/D c lu tr. Nu nhiu o lng yu cu lu tr th s trong
ADRES cn c chuyn ti nh ngi dng trc khi n b bi o lng k tip.
PIC 16F877A c A/D 10 bit. 8 bit cao c lu trong ADRESH v 2 bit thp hn
c lu trong ADRESL. Trong bi ging ny, ti ch s dng 8 bit v gi nh
ADRES (chnh l ADRESH).
7.3.Tp tin tiu cho 16F877A: xem chng 4.
7.4.Chuyn i A/D. V d chuyn mch nhy cm nhit :
gii thiu s lm vic ca b chuyn i A/D, chng ta s xem xt v d n gin,
ngha l bt led khi nhit trn 250C v tt led khi nhit thp hn 250C.
S mch cho chuyn mch nhit c minh ha hnh 7.4.
*Ly vic c gi tr A/D:
B chuyn i A/D c chuyn sang bt (ON) trong tp tin tiu v n t ng
nhn vo knh 0. thc hin o lng, bit GO/DONE, bit 2 c bt ln 1 v chng
ta i cho ti khi n b xa bng lnh:
BSF ADCON0,2; thc hin o, bt GO/DONE
WAIT
BTFSC ADCON0,2; i cho ti khi GO/DONE b xa
GOTO WAIT
Vic o lng ny s c t thanh ghi kt qu A/D, ADRES.
127
+5V
B0
16F877A
33 680
Thermistor
2
A0
+5V
Vcc
22 pF
13
MCLR
11
1
32Khz
22pF
14
0.1 F
12
Hnh 7.4
.
*Xc nh xem nhit l trn hay thp hn 25 C.
Gi s in p trn ng vo analog, knh 0, A0 l 2,4V khi nhit l 25 C. Gi tr
c A/D yu cu cho 2,4V l 2,4 x 51=122. V vy chng ta cn bit khi c A/D l
trn hay thp hn 122, ngha l trn hay thp hn 25 C.
Truc y chng ta xem xt cch yu cu mt gi tr bng gi tr khc bng cch
tr v xem bit zero trong thanh ghi trng thi.
C 1 bit khc, bit 0 trong thanh ghi trng thi c gi l bit c nh C, m ch ra kt
qu ca php tr l +ve (dng) hay ve(m). Nu bit c C=1 (bt) th kt qu l
+ve, nu bit c nh C=0 (b xa), kt qu l ve. V vy chng ta c th yu cu 1 s
l ln hn hay thp hn 1 gi tr nh ngha trc.
M cho iu ny l:
MOVF ADRES,W; chuyn kt qu analog vo W
SUBLW .122; thc hin 122-ADRES, ngha l 122-W
BTFSC STATUS,CARRY;kim tra c nh C, xa nu ADRES>122, ngha l ve.
GOTO TURNOFF; chng trnh con tt led
GOTO TURNON; chng trnh con bt led
Vic o lng c chuyn t ADRES vo W, chng ta c th tr n t 122 (122W). Ch l php tr lun thc hin gi tr-W.
Bit c nh bo cho ta kt qu A/D l trn hay di 122.
Ch : Nu kt qu ca php tr l zero th bit c nh cng l 1. N phi l 1 hay 0. L
+ve (dng) hay 0 khng thnh vn trong th d ny.
Chng ta tm ra kt qu l bng hay trn 122, hay kt qu thp hn 122.
128
Khi vic o lng c thc hin, chng ta i ti mt trong hai chng trnh con,
TURNON v TURNOFF. Cc chng trnh con ny khng ln nhng chng c th d
dng phc tp hn , thm ch di hang trm dng.
7.5.M chng trnh:
M y cho chng trnh chuyn mch nhy cm nhit c minh ha di
vi tn TEMPSENS.ASM
;TEMPSENS.ASM chng trnh ny thit lp PORTA l ng vo analog /s. PORTB
; l ng ra. Dao ng 32 Khz c chn. Thanh ghi OPTION c thit lp chia
; cho xung nh th 32,768 ms.
;chng trnh con tr hon 1 giy v 0,5 giy.
;************************************
;phn khai bo tng ng
PORTC EQU 7
PORTD EQU 8
PORTE EQU 9
TRISC EQU 87H
TRISD EQU 88H
TRISE EQU 89H
CARRY EQU 0
ADCON0 EQU 1Fh
ADCON1 EQU
9FH
ADRES EQU 1EH
ADRESL EQU 9EH
CHS0 EQU 3
GODONE EQU 2
COUNT EQU 20H; COUNT l nh 20H, thanh ghi m s kin.
;***************************************
ORG 0
; a ch bt u l 0
;***************************************
;Bit cu hnh
;Phn chng trnh con
;tr hon 1 giy
DELAY1
SUBLW .32; TIME-W
BTFSS STATUS, ZEROBIT; kim tra TIME-W=0 (32-W=0)
;tr hon 0,5 giy.
129
DELAY5
LOOPB

SUBLW .16 ;TIME-W
;phn chng trnh con
TURNON BSF PORTB,0;bt led trn B0
GOTO BEGIN;tr v chng trnh chnh
TURNOFF BCF PORTB,0;tt led trn B0
GOTO BEGIN;tr v chng trnh chnh
;Phn cu hnh.
START BCF STATUS,6
BSF STATUS,5; tr li bank 1
MOVWF TRISA
MOVLW B00000100
MOVWF ADCON1; A0, A1 v A3 l ng analog
MOVLW B00000000
MOVLW B11111111
MOVLW B00000000
MOVWF TRISE
BCF STATUS,6
BCF STATUS,5; tr v bank 0
BSF ADCON0,0; bt A/D ln
BEGIN BSF ADCON0,2;thc hin o lng, bt bit GO/DONE=1
WAIT
BTFSC ADCON0,2; i cho ti khi GO/DONE b xa
GOTO WAIT
MOVF ADRES,W; chuyn kt qu analog vo W
SUBLW .122; thc hin 122-ADRES, ngha l 122-W
BTFSC STATUS,CARRY;kim tra c nh C, xa nu ADRES>122.
GOTO TURNOFF; chng trnh con tt led
GOTO TURNON; chng trnh con bt led
IV.Tng kt bi:
130
-Chun b bi mi.
Chng 7: B chuyn i tng t-s (ADC)
1.Chuyn i A/D l g?
2. Thanh ghi iu khin tng t-s: ADCON0, ADCON1 v thanh ghi kt qu A/D :
ADRES.
3. Vit chng trnh iu khin bt led khi nhit trn 25 C v tt led khi nhit
di 25 C.
Hnh: Mch chuyn mch nhit .

Vit li chng trnh cho PIC 16F84.
Ngy .thng..nm 2011

B mn
Ngy .thng..nm 2011

Ging vin son
131
Bi ging s 8: B nh d liu EEPROM. Bt gi/so snh/ iu rng xung (PWM).
MSSP(SPI/I2C) ( S tit: 4)
I.n nh lp:
.
II.Kim tra bi c:
..
..
..
III.Tn bi ging: : B nh d liu EEPROM. Bt gi/so snh/ iu rng xung
(PWM). MSSP(SPI/I2C)
III.1. Mc tiu:
- B nh d liu EEPROM: gii thiu, th d s dng EEPROM
- Bt gi/So snh/iu rng xung (PWM).
- MSSP: SPI/I2C.
chiu (hay my chiu).
vin.
Chng 8: B nh d liu EEPROM. Bt gi/so snh/ iu rng xung (PWM).
MSSP(SPI/I2C)
8.1. Gii thiu
Mt trong cc im c bit ca 16F84 v 16F877A v mt s vi iu khin
khc l b nh d liu EEPROM. y l phn b nh khng c trong khng gian b
nh thong thng. N l mt khi d liu ging file ( nh) ca ngi dung, nhng
khng ging nh ngi dung, d liu trong b nh d liu EEPROM c lu khi
vi iu khin b tt i, ngha l n l b nh khng bay hi. Gi s chng ta ang m
xe vo v ra trong bi u xe v chng ta mt ngun ti mch ca chng ta. Nu chng
ta lu tr s m trong EEPROM th chng ta c th np nh s m vi d liu
ny v tip tc khng c mt d liu, khi in tr li.
132
truy xut d liu, ngha l c v ghi vo nh EEPROM, chng ta phi ra
lnh vi iu khin. C 64 byte EEPROM trn 16F84, 128 byte 16F818, 256 byte
16F819 v 256 byte EEPROM 16F877A. V vy chng ta phi yu cu (bo) vi iu
khin a ch no chng ta yu cu v chng ta c hay ghi vo n.
Khi c chng ta nhn dng a ch t 0 n 3FH ,hay 063 (i vi 16F84)
v 0-367 i vi 16F877A dung thanh ghi EEADR. D liu sau l dung c trong
thanh ghi EEDATA.
Khi ghi vo b nh d liu EEPROM chng ta phi ch ra d liu trong thanh
ghi EEDATA v v tr trong thanh ghi EEADR.
Hai nh khc c dung cho php qu trnh, chng l EECON1 v
ECON2, hai thanh ghi iu khin EEPROM.
Thanh ghi EECON1 c minh ha hnh 8.1.
Ngoi ra cn c 2 nh khc l EEDATH v EEADRH. Khi giao tip vi khi b nh
chng trnh , thanh ghi EEDATA v EEDATH to thnh mt word (t) 2 byte m gi
d liu 14 bit cho c/ghi v EEADR v EEADRH to thnh t 2 byte m gi a ch
13 bit ca nh chng trnh c truy xut. Cc thit b ny c 4 hay 8K t ca b
nh chng trnh Flash, vi tm a ch t 0000h n 0FFFh cho PIC 16F873A/74A v
0000h ti 1FFFh cho PIC 16F876A/877A.
B nh d liu EEPROM cho php c mt byte. B nh chng trnh Flash
cho php c tng t v ghi khi 4 t. Hot ng ghi b nh chng trnh t ng
thc hin vic xa trc khi ghi trn khi 4 t. Ghi 1 byte vo b nh d liu
EEPROM t ng xa nh v ghi d liu mi (xa trc khi ghi).
Thi gian ghi c iu khin bi timer trn chip. in p ghi/xa c to
bi b bm np trn chip.
Khi thit b l bo v m, CPU c th tip tc c v ghi b nh d liu
EEPROM. Ty thuc vo thit lp ca bit chng ghi, thit b c th hay khng th ghi
mt s khi ca b nh chng trnh, tuy nhin vic c b nh chng trnh l c
php. Khi bo v m thit b lp trnh c th khng cn truy xut b nh d liu v
chng trnh. iu ny khng cm vic c ghi bn trong.
Thanh ghi EECON1 (a ch 18CH)
Bit 7
EEPGD
WRERR
2
WREN
WR
RD
Hnh 8.1: Thanh ghi EECON 1.

Bit 0, RD c bt ln 1 thc hin c. N c xa bi vi iu khin khi vic c
hon thnh.
Bit 1, WR c bt ln 1 thc hin vic ghi. N c xa bi vi iu khin khi vic
ghi hon thnh.
Bit 2, WREN (EEPROM write enable)
1= cho php chu k ghi.
0=cm ghi vo EEPROM.
Bit 3, WRERR, bit c sai EEPROM, c l 1 nu vic ghi khng hon thnh, c l 0
nu vic ghi hon thnh thnh cng.
Bit c ngt, EEIF trong thanh ghi PIR2, c bt ln 1 khi vic ghi hon thnh. N
phi c xa bng phn mm.
133
Bit 7, EEPGD (Program /Data EEPROM Select bit)(khng dung 16F84). Bit ny cho
php hoc l b nh chng trnh hay b nh d liu.
0=chn b nh d liu.
1=chn b nh chng trnh.
8.2. Th d s dng EEPROM
Nh thng l, Ti ngh cch tt nht hiu b nh ny lm vic nh th no
l nhn vo th d n gin sau y.
Gi s chng ta mun m s kin, ngi i vo mt ta nh, xe i vo mt bi
u xe. Nh vy, nu chng ta b mt ngun ti mch, th d liu vn cn lu gi.
Mch cho th d ny c minh ha hnh 8.2.
EEPROM.
Hnh 8.2: Mch m nhn nt.

Nt nhn 1 c dung m phng qu trnh m v 8 led trn PORTB hin
th s m dng nh phn. (iu ny l c hi tt thc hnh m nh phn). Cng
tc d nhin l chng di.
Hy nh tng ca mch ny, chng ta ang m s kin v hin th s m
trn PORTB. Nhng nu chng ta b mt ngun-khi ngun c li chng ta mun gi
tr m nh th khng c g xy ra.
Nh vy khi chng ta chuyn mch, chng ta phi di chuyn d liu EEPROM
trc vo nh COUNT.
Lu c minh ha hnh 8.3.
Mt vi im trc khi chng ta nhn vo chng trnh:
134
1/Tht l tt m bo rng b nh d liu EEPROM c reset ti im bt u.
iu ny c thc hin bng cch ghi 00h ti a ch 00h d liu EEPROM khi
chng ta np chng trnh vo chip. iu ny c thc hin vi ccdng lnh sau:
ORG 2100H
DE
00H
2100H l a ch ca b nh d liu EEPROM u tin, ngha l 00H.
DE l nh ngha b nh d liu EEPROM, v vy chng ta khi ng n vi 00h, v
d nhin 2100H l a ch EEPROM u tin.
D liu c th c ghi vo EEPROM dung MPLAB, vi View, EEPROM v
ghi d liu trong hp EEPROM nh minh ha trong hnh 8.4.
2/c v ghi vo d liu EEPROM khng thng tin nh nh ngi dung, bn c th
kim chng iu ny. C mt khi on m bn cn s dng- ch them n vo chng
trnh ca bn theo yu cu.
Khi c d liu EEPROM ti a ch 0 ti nh COUNT th CALL READ.
Chng trnh con c vit trong tiu .
Khi ghi nh COUNT ti a ch d liu EEPROM th 0, bn hy CALL
WRITE.
Di chuyn d liu EEPROM ti COUNT
N
Nt nhn c nhn ?
Y
INCF COUNT
Chuyn COUNT ti PORTB
Chuyn COUNT ti d liu

EEPROM
Hnh 8.3. Lu m vic nhn nt.
135
Hnh 8.4: Ghi d liu EEPROM.

*M chng trnh EEPROM:
Chng trnh hon chnh EEDATAWR.ASM c minh ha di y:
;EEDATAWR.ASM Chng trnh ny s m v hin th s nhn nt.
;Gi tr m c lu khi ngn b mt v tip tc khi ngun c tr li.
;***************************************
;phn tng ng
CARRY EQU 0
EEADR EQU 9h
EEDATA EQU 8h
EECON1 EQU 8h
EECON2 EQU 9h
RD EQU 0
WR EQU 1
WREN EQU 2
COUNT EQU 0CH; COUNT l nh 0CH, thanh ghi m s kin.
;***************************************
ORG 2100H; a ch EEADR 0
136
DE 00H; t 00H trong EEADR 0
ORG 0
; a ch bt u l 0
;***************************************
;Bit cu hnh
;Phn chng trnh con
;tr hon 0,1 giy.
DELAYP1
LOOPB
SUBLW .3 ;TIME-W
; t EEDATA 0 vo nh COUNT
READ MOVLW 0; c EEDATA t EEADR
MOVWF EEADR
BSF EECON1,RD
BCF STATUS,5;bank 0
MOVF EEDATA,W
MOVWF COUNT
RETLW 0
;Ghi COUNT vo EEDATA 0
WRITE BSF STATUS,5;bank 1
BSF EECON1,WREN; bt cho php ghi
BCF STATUS,5;bank 0
MOVF COUNT,W;chuyn COUNT vo EEDATA
MOVWF EEDATA
MOVLW 0;bt EEDATA 0 nhn
EEDATA
MOVWF EEADR
BSF STATUS,5;bank 1
MOVLW 55H; 55 v AA khi ng chu k ghi
MOVWF EECON2
MOVLW AAH
MOVWF EECON2
BSF EECON1,WR;ghi d liu ti EEADR 0
WRDONE BTFSC EECON1,WR
GOTO WRITE; i cho chu k ghi hon thnh
BCF EECON1,WREn
BCF STATUS,5;bank 0
RETLW 0
;Phn cu hnh.
MOVWF TRISA
MOVLW B00000000
137
BCF STATUS,6
CLRF COUNT ;xa COUNT
CALL READ; c d liu EEPROM vo COUNT
MOVF COUNT,W
MOVWF PORTB;hin th COUNT trc (nu c th)
PRESS BTFSC PORTA,0; i cho nhn nt
GOTO PRESS
CALL DELAYP1;chng di
RELEASE BTFSS PORTA,0; i cho nt nhn c nh
GOTO RELEASE
CALL
DELAYP1;chng
INCF COUNT;cng 1 vo COUNT
MOVF COUNT,W; t COUNT vo W
MOVWF PORTB;chuyn W (COUNT) ra PORTB hin th
CALL WRITE;ghi COUNT ti a ch EEPROM 0
GOTO PRESS;tr v v i nhn nt
di

Microchip tip tc m rng phm vi (loi) vi iu khin v mt h mi ca vi
iu khin Flash c gii thiu, c tn l 16F87X, c th l 16F877A, m gm c 8
Kx14 bit/word b nh chng trnh, 368 byte RAM ngi dung v 256 byte b nh d
liu EEPROM v b chuyn i A/D 10 bit 8 knh ng vo . Nh vy by gi o lng
analog c th c lu tr trong b nh d liu EEPROM!
Chng trnh hon chnh EEDATAWR.ASM c minh ha di y:
;EEDATAWR.ASM Chng trnh ny s m v hin th s nhn nt.
;Gi tr m c lu khi ngn b mt v tip tc khi ngun c tr li.
; Header877.asm iu ny thit lp portA l ng vo (1 l vo), portB l ng ra ( 0 l
ra);portC l ng vo, portE ng vo, portD ng ra.
;***************************************
;phn tng ng
PORTC EQU 7
PORTD EQU 8
PORTE EQU 9
TRISC EQU 87H
TRISD EQU 88H
138
TRISE EQU 89H
CARRY EQU 0
EEADR EQU 10Dh
EEDATA EQU 10Ch
EECON1 EQU 18Ch
EECON2 EQU 18Dh
RD EQU 0
WR EQU 1
WREN EQU 2
COUNT EQU 20H; COUNT l nh 20H, thanh ghi m s kin.
;***************************************
ORG 2100H; a ch EEADR 0
DE 00H; t 00H trong EEADR 0
ORG 0
; a ch bt u l 0
;***************************************
;Bit cu hnh
;Phn chng trnh con
;tr hon 0,1 giy.
DELAYP1
LOOPB
SUBLW .3 ;TIME-W
; t EEDATA 0 vo nh COUNT
READ MOVLW 0; c EEDATA t EEADR
MOVWF EEADR
BSF EECON1,RD
BCF STATUS,5;bank 0
MOVF EEDATA,W
MOVWF COUNT
RETLW 0
;Ghi COUNT vo EEDATA 0
WRITE BSF STATUS,5;bank 1
BSF EECON1,WREN; bt cho php ghi
BCF STATUS,5;bank 0
MOVF COUNT,W;chuyn COUNT vo EEDATA
MOVWF EEDATA
MOVLW 0;bt EEDATA 0 nhn
EEDATA
MOVWF EEADR
BSF STATUS,5;bank 1
MOVLW 55H; 55 v AA khi ng chu k ghi
MOVWF EECON2
139
MOVLW AAH
MOVWF EECON2
BSF EECON1,WR;ghi d liu ti EEADR 0
WRDONE BTFSC EECON1,WR
GOTO WRITE; i cho chu k ghi hon thnh
BCF EECON1,WREn
BCF STATUS,5;bank 0
RETLW 0
;Phn cu hnh.
MOVWF TRISA
MOVLW B00000000
MOVLW B11111111
MOVLW B00000000
MOVWF TRISE
BCF EECON1,7; b nh d liu EEPROM on
BCF STATUS,6
CLRF COUNT ;xa COUNT
CALL READ; c d liu EEPROM vo COUNT
MOVF COUNT,W
MOVWF PORTB;hin th COUNT trc (nu c th)
PRESS BTFSC PORTA,0; i cho nhn nt
GOTO PRESS
CALL DELAYP1;chng di
RELEASE BTFSS PORTA,0; i cho nt nhn c nh
GOTO RELEASE
CALL
DELAYP1;chng
INCF COUNT;cng 1 vo COUNT
MOVF COUNT,W; t COUNT vo W
MOVWF PORTB;chuyn W (COUNT) ra PORTB hin th
CALL WRITE;ghi COUNT ti a ch EEPROM 0
GOTO PRESS;tr v v i nhn nt
Thanh ghi EECON2 khng l thanh ghi vt l.
di
140
c b nh d liu EEPROM:
Cc bc c b nh d liu EEPROM l:
1/Ghi a ch ti EEADR. m bo rng a ch l khng ln hn kch thc b nh
ca thit b.
2/Xa bit EEPGD ch ti b nh d liu EEPROM.
3/Bt bit RD bt u tc v c.
4/c d liu t thanh ghi EEDATA.
Th d: c d liu EEPROM
BSF STATUS,RP1
MOVF DATA_EE_ADDR,W; b nh d liu
MOVWF EEADR; a ch c
BSF STATUS,RP0; bank 3
BCF EECON1,EEPGD;ch ti b nh d liu
MOVF EEDATA,W;W=data
Ghi ra b nh d liu EEPROM:
Cc bc ghi ra b nh d liu EEPROM l:
1/Nu bc 10 khng hon thnh, kim tra bit WR xem vic ghi ang tin hnh.
2/Ghi a ch ti EEADR. m bo rng a ch khng ln hn kch c b nh ca
thit b.
3/Ghi gi tr d liu 8 bit lp trnh vo thanh ghi EEDATA.
4/Xa bit EEPGD ch ti b nh d liu EEPROM.
5/Bt bit WREN cho php tc v ghi.
6/Cm cc ngt (nu c th).
7/Thc thi chui 5 lnh c bit:
. Ghi 55h ti EECON2 trong 2 bc (u tin ti W, sau ti EECON2).
.Ghi AAh ti EECON2 trong 2 bc (u tin ti W, sau ti EECON2).
. Bt bit WR.
8/Cho php cc ngt (nu ang s dng ngt).
9/o bit WREN cm tc v lp trnh.
10/Ti s hon thnh ca chu k ghi, bit WR b xa(=0) v bit c ngt EEIF c
bt)(=1)(EEIF phi c xa bng phn do (firmware)). Nu bc 1 l khng hon
thnh, th phn do s kim tra cho EEIF c bt, hay WR b xa, ch ra kt thc
chu k ghi.
Th d: ghi d liu EEPROM
BSF STATUS,RP1
BSF STATUS,RP0;bank 3
BTFSC EECON1,WR; i cho ghi
GOTO $-1; hon thnh.
BCF STATUS,RP0;bank 2
MOVF DATA_EE_ADDR,W;b nh d liu
MOVWF EEDAR; a ch ghi
MOVF DATA_EE_DATA,W;gi tr b nh d liu
MOVWF EEDATA; ghi
BSF STATUS,RP0;bank 3
BCF EECON1,EEPGD; ch ti b nh d liu
BSF EECON1,WREN; cho php ghi
BCF INTCON,GIE;cm cc ngt.
MOVLW 55h; chui 5 lnh
141
MOVWF EECON2;ghi 55h
MOVLW AAh
MOVWF EECON2; ghi AAh
BSF EECON1,WR; bt bit WR bt u ghi
BSF INTCON,GIE;bt cho php cc ngt
BCF EECON1, WREN;cm ghi.
8.3. Bt gi/So snh/iu rng xung (PWM)
Mi moun Bt gi/So snh/PWM (CCP -Capture/Compare/PWM) cha mt
thanh ghi 16 bit m c th hot ng nh
.Thanh ghi nm gi 16 bit.
.Thanh ghi so snh 16 bit.
.Thanh ghi chu k bn phn ch t PWM.
C hai mun CCP1 v CCP2 l ging nhau v hot ng , vi ngoi l l hot ng
ca trigger s kin c bit. Bng 8-1 v 8-2 minh ha ngun v giao tip ca mun
CCP. Trong phn sau hot ng ca mun CCp c m t ng vi mun CCP1.
CCP2 hot ng ging nh CCP1 ngoi tr ghi ch.
Bng 8-1: Ch CCP-ngun timer c yu cu.
Ch CCP
Ngun timer
Bt gi
Timer 1
So snh
Timer 1
iu rng xung (PWM)
Timer 2
Bng 8-2: Giao tip ca 2 mun CCP.

CCPx Mode
CCPy mode
Bt gi
Bt gi
Bt gi
So snh
So snh
So snh
PWM
PWM
PWM
PWM
Bt gi
So snh
Giao tip
C s thi gian TMR1 ging nhau.
So snh nn c cu hnh cho trigger
s kin c bit m xa TMR1.
So snh c cu hnh vi trigger s
kin c bit m xa TMR1.
PWM s c cng tn s v tc cp
nht (TMR2 ngt).
khng
Khng.
Mun CCP1 :
Thanh ghi bt gi/So snh/iu rng xung (PWM) th 1 (CCPR1) gm hai thanh ghi 8
bit: CCPR1L (byte thp) v CCP1RH (byte cao).
Thanh ghi CCP1CON iu khin hot ng ca CCP1. Trigger s kin c bit c
to bi b khp so snh v s reset timer 1.
Mun CCP2:
Thanh ghi bt gi/so snh/PWM s 2 (CCPR2) gm c 2 thanh ghi 8 bit: CCPR2L
(byte thp) v CCPR2H (byte cao). Thanh ghi CCP2CON iu khin hot ng ca
CCP2. Trigger s kin c bit to bi b khp so snh v s reset timer 1 v bt
u chuyn i A/D (nu mun A/D c cho php).
Thanh ghi CCP1CON/ thanh ghi CCP2CON (a ch 17H/ a ch 1DH)
142
Bit 7
CCPxX CCPxY
CCPxM3 CCPxM2 CCPxM1 CCPxM0
Hnh 8.5: Thanh ghi CCP1CON/CCP2CON

Bit 7-6: c l 0.
Bit 5-4: CCPxX:CCPxY: bit trng s thp nht PWM
ch bt gi: khng dung.
ch so snh: khng dung.
ch PWM: cc bit ny l 2 bit LSB ca chu k bn phn PWM. Tm bit MSB
c tm trong CCPRxL.
Bit 3-0: CCPxM3: CCPxM0: bit chn ch CCPx.
0000= bt gi/so snh/PWM b xa (reset moun CCPx).
0100=ch bt gi, mi cnh xung.
0101=ch bt gi, mi cnh ln.
0110=ch bt gi, mi cnh ln th 4.
0111=ch bt gi, mi cnh ln th 16.
1000=ch so snh, bt ng ra trn khp (CCPxIF l 1).
1001=ch so snh, xa ng ra trn khp (CCPxIF=1).
1010=ch so snh, to ra ngt mm trn khp (CCPxIF=1, chn CCPx l khng
nh hng).
1011=ch so snh, s kin c bit trigger (CCPxIF=1, chn CCPx khng nh
hng); CCP1 reset timer 1, chn CCP2 reset timer 1 v khi ng chuyn i A/D.
11xx= ch PWM.
Ch bt gi (capture):
Trong ch b t gi , TMR1 ch y li n t c v c n p khi i u ki n v ch n
CCPx kh p v i i u ki n ch ra b i CCPxM3: CCPxM0. Khi b t gi di n ra th
m t y u c u n gt c th c hi n.
143
Hnh 8.6: S khi ca mch bt CCP.

Ch so s nh(compare) c dung cho chc nng lp thi gian hay xc nh di
ca xung PWM. Nu mt xung PWM c o thi gian , th khi gi tr khi ng c
np, cc tnh c o ngc ti cui ca xung. Khi o thi gian xung PWM, clock
TMR1 phi nhanh ly gi tr c ngha vi phn gii cao m c s th hin
chnh xc ca nh thi.
Ch bt gi thay i trng thi ca chn CCPx ca vi iu khin PIC khi ni dung
ca TMR1 khp gi tr trong cc thanh ghi CCPRxH v CCPRxL hnh 8.7. Ch
ny c dung kch khi hay iu khin phn cng bn ngoi sau mt tr hon c th.
Hnh 8.7: S khi ca mch so snh CCP

Hot ng PWM:
Trong ba hot ng ca CCP, ti thy to tn hiu PWM l hu ch. Ch ny xut ra
xung PWM s dng TMR2 khi ng li (reset) ti mt kh nng gi tr c th.
144
Hnh 8.8: S khi mch to PWM CCP.

Phng trnh sau dung tnh chu k bn phn PWm trong thi gian:
Chu k bn phn PWM=(CCPR1L:CCP1CON<5:4>)*Tosc*(gi tr t l trc TMR2)
CCPR1L v CCP1CON<5:4> c th c ghi ti bt k lc no, nhng gi tr chu k
bn phn khng c ci vo CCPR1H cho ti khi mt s khp gia PR2 v TMR2
din ra (ngha l chu k hon thnh).
thit lp to xung PWM tn s 20 Khz c chu k bn phn 65% thc hin trong vi
iu khin PIC c thch anh 4 Mhz, cc bc sau c thc hin: u tin gi tr
CCPRxH v PR2 c tnh cho TMR2; b chia t l trc 4:1 phi c np kt qu
cho delay l:
Delay=(PR2+1)*4/(tns/4)
PR2=delay*tn s -1
=5ms* 4 Mhz-1
=200-1
=199
Tip , 65% ca 200 l 130 s c np vo CCPRxM.
M to ra xung PWM tn s 20 Khz c chu k bn phn 65% l:
Movlw .199
Movwf PR2; thit lp hot ng TMR2
Movlw (1<<TMR2on)+1
Movwf T2CON; bt u n chy chu k 50 ms.
Movlw .130 ;65% ca chu k
Movwf CCPRxH
Movlw (1<<DCxB1)+0x00F
Movwf CCPxCON; bt u PWM
;PWM hot ng.
145
Phn s
0,00
0,25
0,50
0,75
DCXB1-DCXB0
00
01
10
11
Bng 8.3: nh ngha bit CCP DCXBX (CCPxX:CCPxY).

8.4.MSSP: SPI v I2C.
Mun port ni tip ng b ch (MSSP)
Gii thiu:
Mun port ni tip ng b ch l giao tip ni tip, c ch cho truyn thong vi thit
b vi iu khin hay ngoi vi khc. Nhng thit b ngoi vi ny c th l EEPROM ni
tip, thanh ghi dch, b hin th, b chuyn i A/D,vvM un MSSP c th hot
ng trong hai ch :
. Giao tip ngai vi ni tip (SPI).
. Mch tch hp lin kt (I2C)
-Ch ch hon ton.
-Ch t (vi gi a ch tng qut).
Giao tip I2C h tr cc ch sau trong phn cng:
.Ch ch.
.Ch a (nhiu) ch.
. Ch t.
Thanh ghi iu khin:
Mun MSSP c a thanh ghi kt hp. Chng bao gm thanh ghi trng thi (SSPSTAT)
v hai thanh ghi iu khin (SSPCON v SSPCON2). Vic s dng nhng thanh ghi
ny v bit cu hnh ring r khc nhau ng k, ph thuc vo mun MSSP hot
ng ch SPI hay I2C.
Ch SPI:
Ch SPI cho php 8 bit d liu c pht ng b v nhn ng thi. Tt c 4 ch
ca SPI c h tr. hon thnh truyn thng, ba chn tiu biu c dng:
. D liu ra ni tip (SDO)-RC5/SDO.
.D liu vo ni tip (SDI)-RC4/SDI/SDA.
.Clock ni tip (SCK)-RC3/SCK/SCL.
Hnh 8.9 minh ha s khi ca mun MSSP khi hot ng ch SPI:
146
Hnh 8.9: S khi MSSP (ch SPI).

Ch I2C:
Mun MSSP trong ch I 2C hin thc tt c chc nng ch v t (bao gm h tr
gi tng qut) v cung cp cc ngt trn bit Start b bit Stop xc nh bus trng
(ch a ch). Mun MSSP hin thc c t chun, cng nh a ch 7 bit v 10
bit.
Hai chn c dung cho truyn d liu:
.Clock ni tip (SCL)-RC3/SCK/SCL.
.D liu ni tip (SDA)-RC4/SDI/SDA.
S khi MSSP ch I2C c minh ha hnh 8.10.
147
Hnh 8.10: S khi MSSP (ch I2C).

a.Thanh ghi:
Mun MSSP c 6 thanh ghi cho hot ng I2C. Nhng thanh ghi ny l:
. Thanh ghi iu khin PSSP (SSPCON).
.THanh ghi iu khin MSSP 2 (SSPCON2).
.Thanh ghi trng thi MSSP (SSPSTAT).
. Thanh ghi b m thu/pht ni tip (SSPBUF).
. Thanh ghi dch MSSP (SSPSR)-khng truy xut trc tip.
.Thanh ghi a ch MSSP (SSPADD).
CCPCON, SSPCON2 v SSPSTAT l cc thanh ghi iu khin v trng thi trong
hot ng ch I2C. Thanh ghi SSPCON v SSPCON2 c th c v ghi c. Su
bit thp hn ca SSPSTAT l ch c. Hai bit cao hn ca SSPSTAT l c/ghi c.
SSPSR l thanh ghi dch c dung cho dch d liu vo hay ra.
SSPBUF l thanh ghi b m m byte d liu c ghi vo hay c t .
Thanh ghi SSPADD gi a ch dng c t khi SSP c cu hnh trong ch t
I2C. Khi SSP c cu hnh trong ch ch, by bit thp ca SSPADD hot ng
nh l b to tc baud np li gi tr.
Trong hot ng nhn, SSPSR v SSPBUF cng nhau to ra b thu m kp. Khi
SSPSR nhn mt byte hon thnh, n truyn ti SSPBUF v ngt SSPIF c bt (=1).
Trong qu trnh pht, SSPBUF khng l m kp. Vic ghi ra SSPBUF s ghi ra c
SSPBUF v SSPSR.
*Thanh ghi SSPSTAT: thanh ghi trng thi MSSP (ch I2C) (a ch 94h).
148
Bit 7
SMP
CKE
D/A
R/W
1
UA
0
BF
Bit 7 SMP: bit iu khin tc qut (Slew rate)

Trong ch t hay ch:
1=iu khin tc qut b cm cho ch tc chun (100 Khz hay 1Mhz).
0=iu khin tc qut c cho php cho ch tc cao (400 Khz).
Bit 6 CKE: bit chn SMBus.
Trong ch t hay ch:
1=Cho php ng vo c th SMBus.
0=Cm ng vo c th SMBus.
Bit 5 D/A: bit d liu/a ch.
Trong ch ch:
D tr.
Trong ch t:
1=ch ra rng byte cui c nhn hay truyn l d liu.
0=ch ra rng byte cui c nhn hay pht l a ch.
Bit 4 P: bit dng.
1=ch ra rng bit dng (stop bit) c d tm cui cng.
0=bit dng khng c d tm cui cng.
Bit 3 S: bit bt u (start bit).
1=ch ra rng mt bit bt u c d tm cui cng.
0=bit bt u khng c d tm cui cng.
Bit 2 R/W: thong tin bit c /ghi (ch ch I2C).
Trong ch t:
1=c
0=ghi
Ch : bit ny gi thong tin bit R/W theo khp a ch cui cng. Bit ny ch cn gi
tr t khp a ch ti bit bt u k tip, bit dng hay khng l bit /ACK.
Trong ch ch:
1=pht trong tin trnh.
0=pht khng trong tin trnh.
Ch : Vic hoc logic (OR) bit ny vi SEN, RSEN, PEN, RCEN hay ACKEN s ch
ra nu MSSP l ch rnh ri.
Bit 1 UA: a ch cp nht (ch c ch t 10 bit).
1=ch ra rng ngi s dng cn cp nht a ch trong thanh ghi SSPADD.
0=a ch khng cn c cp nht.
Bit 0 BF: bit trng thi b m y.
Trong ch pht:
1=thu hon thnh, SSPBUF y.
0=thu khng hon thnh, SSPBUF trng.
Trong ch thu:
1=pht d liu ang trong tin trnh (khng gm ACk v bit dng), SSPBUF y.
0=pht d liu hon thnh (khng gm ACK v bit dng), SSPBUF trng.
*Thanh ghi SSPCON1: thanh ghi iu khin MSSP 1 (ch I2C) (a ch 14h).
149
Bit 7
WCOL SSPOV SSPEN
4
CKP
SSPM3 SSPM2 SSPM1 SSPM0
Bit 7 WCOL: bit d tm xung t ghi.

Trong ch pht ch:
1=VIc ghi ra thanh ghi SSPBUF c c gng trong khi iu kin I2C khng c
gi tr cho vic pht bt u. (phi c xa bng phn mm).
0= Khng c xung t.
trong ch pht t:
1=Thanh ghi SSPBUF c ghi trong khi n vn cn pht t trc . (phi c
xa bng phn mm).
0=khng c xung t.
Trong ch thu (ch ch hay t)
y l bit ty (1 hay 0 cng c, khng quan tm).
Bit 6 SSPOV: bit ch th trn nhn.
Trong ch thu:
1=Mt byte c nhn trong khi thanh ghi SSPBUF hy cn gi byte trc .
(phi c xa bng phn mm).
0=khng c trn.
Trong ch pht:
y l bit khng quan tm (1 hay 0 cng c) trong ch pht.
Bit 5 SSPEN: bit cho php port ni tip ng b.
1= cho php port ni tip v cu hnh chn SDA v SCL nh l chn port ni tip.
0=cm port ni tip v cu hnh nhng chn ny nh chn I/O.
Ch : khi c cho php, chn SDA v SCL phi c cu hnh hp l nh l ng
vo hay ng ra.
Bit 4 CKP: bit iu khin th SCK.
Trong ch t:
1=th clock .
0=gi clock thp (clock stretch). (c dng m bo thi gian thit lp d liu).
Trong ch ch:
Khng dung trong ch ny.
Bit 3-0 SSPM3:SSPM0: bit chn ch port ni tip ng b.
1111= ch I2C t, 10 bit a ch vi ngt bit bt u v bit dng c cho php.
1110=ch t I2C, 7 bit a ch vi ngt bit bt u v bit dng c cho php.
1011= ch ch I2C c iu khin bng phn do (t rnh ri).
1000= ch ch I2C, clock= Fosc/(4*(SSPADD+1)).
0111= ch t I2C, 10 bit a ch.
0110= ch t I2C, 7 bit a ch.
*Thanh ghi SSPCON2: Thanh ghi iu khin MSSP 2 (ch I2C)( a ch 91h).
150
Bit
GCEN ACKSTAT ACKDT ACKEN
RCEN PEN ESEN
0
SEN
Bit 7 GCEN: bit cho php gi tng qut (ch ch t).

1=cho php ngt khi mt a ch gi tng qut (0000h) c nhn trong SSPSR.
0= a ch gi tng qut b cm.
Bit 6 ACKSTAT: bit trng thi chp nhn (ch ch pht ch).
1=s chp nhn khng c nhn t t.
0=s chp nhn c nhn t t.
Bit 5 ACKDT: bit d liu chp nhn (ch ch nhn ch).
1=khng chp nhn.
0=chp nhn.
Ch : gi tr m s c pht khi ngi s dng khi ng chui chp nhn cui
vic thu.
Bit 4 ACKEN: bit cho php chui chp nhn (ch ch thu ch).
1=khi ng chui chp nhn trn chn SDA v SCL v pht bit d liu ACKDT.
0=chui chp nhn rnh ri.
Bit 3 RCEN: bit cho php nhn (ch ch ch).
1=cho php ch nhn cho I2C.
0=nhn rnh ri.
Bit 2 PEN : bit cho php iu kin dng (ch ch ch).
1=khi ng iu kin dng trn chn SDA v SCL. T ng b xa bi phn mm.
0=iu kin dng rnh ri.
Bit 1 RSEN: bit cho php iu kin bt u lp li (ch ch ch).
1= khi ng iu kin bt u lp li trn chn SDA v SCL. T ng b xa bng
phn mm.
0=iu kin bt u lp li rnh ri.
Bit 0 SEN: bit cho php kp di/cho php iu kin bt u.
Trong ch ch:
1=khi ng iu kin bt u trn chn SDA v SCL. T ng b xa bng phn
mm.
0=iu kin bt u rnh ri.
Trong ch t:
1=ko di clock (clock stretching) c cho php cho c pht t v thu t (ko di
c cho php).
0=ko di clock c cho php ch cho pht t (PIC 16F87X ).
b. Hot ng
c.Ch t.
. a ch.
.Thu.
.Pht.
d.Ko di clock.
e.H tr a ch gi tng qut
f.Ch ch.
IV.Tng kt bi:
151
-Chun b bi mi.
Chng 8: B nh d liu EEPROM. So snh/Bt gi/iu rng xung. MSSP:
SPI v I2C.
1.B nh d liu EEPROM l g?
2. Thanh ghi EECON1, EECON2, EEADR, v EEDATA.
3. Vit chng trnh m s kin s ngi i vo to nh. Nt nhn 1 minh ha qu
trnh m v 8 led trn PORTB hin th s m s nh phn. S dng b nh d liu
EEPROM.
Hnh: Mch m nhn nt.

4.So snh v bt gi l g? Trnh by So snh v bt gi trong PIC 16F877A.
5.iu rng xung PWM l g? Trnh by PWM trong PIC 16F877A.
6. Vit chng trnh iu khin chuyn mch bin i dn nh sng n dng PWM
PIC 16F877A.
7. MSSP l g? Trnh by SPI v I2C.
152
Ngy .thng..nm 2011

B mn
Ngy .thng..nm 2011

Ging vin son
153
Bi ging s 9: Thit k h vi x l v h pht trin vi iu khin ( S tit: 7)
I.n nh lp:
.
II.Kim tra bi c:
..
..
..
III.Tn bi ging: : Thit k h vi x l v h pht trin vi iu khin
III.1. Mc tiu:
-Gii thiu phn cng v kit pht trin: gii m a ch, thit k kit vi x l gm
kit n gin v kit m rng, PPI 8255, giao din RS232C , .
- Mt s ng dng.
chiu (hay my chiu).
vin.
Chng 9: Thit k h vi x l v h pht trin vi iu khin
9.1. GIAI MA A CH
9.1.1.Bo nh :
154
Mot vi mach nh thng co cau truc tieu bieu sau :

Tn hieu
Tn hieu d lieu
A0
D0
a ch
A1
D1
A2
D2
/WR
Am
WE
Dn
CS
OE
Chon chip /RD

S o khoi mot vi mach nh
Nhom tn hieu a ch (A1-Am): cho phep xac nh o nh can truy xuat
V du : eprom 2716 co 11 ng a ch t A0-A10, nen dung lng bo nh 211=
2x210=2KB
Nhom tn hieu d lieu cho phepbo nh trao oi thong tin vi ben ngoai (D0-Dn)
Tn hieu /CS (chip select) : cho phep hoac khong cho phep bo nh hoat ong,
thng /CS c noi vi ngo ra cua mach giai ma a ch.
/CS=0 : bo nh hoat ong , co the oc ghi
/CS=1 : bo nh khong hoat ong , khong the oc ghi
Tn hieu /WE (write enable) : tn hieu vao tch cc mc thap, /WE la tn hieu
ieu khien ghi bo nh.
Neu /CS=0 va /WE=0 : thong tin D0-Dn c lu vao o nh co a ch xac nh bi
A0-Am
Tn hieu /OE (output enable) :tn hieu vao, tch cc mc thap la tn hieu ieu
khien oc bo nh
Neu /CS=0 va /OE=0 th noi dung o nh co a ch xac nh bi A0-Am xuat hien
data bus D0-Dn
Gii thieu mot so bo nh thng dung :
EPROM : cac bo nh eprom thong dung ton tai di kieu mach khac nhau hoac
27xx. Co cac loai mach sau :
2708 = 1Kx8 bit
2764 = 8Kx8 bit
2716 = 2Kx8bit
27128 = 16Kx8 bit
2732 = 4Kx8bit
27256 = 32Kx8 bit
Bo nh Ram tnh : TMS 4016 (2Kx8 bit), 6116 (2Kx8 bits)
Bo nh Ram ong : TMS 4464 (64Kx4 bit)
EPROM 2716 / 2732:
Bang hoat ong
Gian o thi gian chu ky oc ROM
Gian o thi gian lap trnh cho eprom 2716
RAM 6116 :
Bang hoat ong cua ram 6116
Gian o thi gian chu ky oc ram 6116
Gian o thi gian chu ky ghi ram
155
9.1.2.Giai ma a ch :
Moi vi mach nh oi vi CPU can c CPU xac nh chnh xac khi thc hien
thao tac oc ghi, do o moi vi mach nh phai co 1 vung a ch rieng biet nam trong
khong gian a ch tong the cua bo nh.
Viec gan a ch cu the cho mach nh c thc hien nh 1 xung chon chip
lay t mach giai ma a ch.
Mach giai ma a ch la mach cho phep xac nh vung a ch cua cac thiet b
nh hay ngoai vi trong ban o a ch cua vi x ly.
Ve nguyen tac, mot bo giai ma a ch co cau tao nh sau :
Tn hieu a
ch
Mach giai
ma a
ch
Tn hieu
ieu khien
CS1
CS2
CSn
au vao cua mach giai ma a ch la cac tn hieu a ch va cac tn hieu ieu

khien, cac tn hieu a ch gom cac bit a ch co quan he nhat nh vi chip select
(CS), tn hieu ieu khien thng la tn hieu IO/M e giup CPU phan biet bo nh hay
ngoai vi.
Ban o bo nh : cho phep phan chia tam a ch ROM, RAM , I/O, ngat. Da vao
ban o nay ta xay dng mach giai ma a ch.
To chc bo nh: t le ROM/RAM co the la , 1/3, , 1/8, 1/16, 1/32, vv
V du : Chon bo nh 32 KB gom 8 KB ROM va 24 KB RAM, th trng ch co 8Kx8
bit.
A0
A12
A0
A12
A0
A12
A0
A12
ROM
RAM
1
RAM
2
RAM
3
0000h
ROM 8k
1FFFh
0000h
1FFFh
0000h
1FFFh
0000h
1FFFh
RAM 1
8k
RAM 2
8k
RAM 3
8k
Ban o bo nh
Co 2 phng phap giai ma a ch :
0000h
1FFFh
2000h
3FFFh
4000h
5FFFh
6000h
7FFFh
156
1-Giai ma toan phan ( full address decoding) : Moi ngoai vi c gan cho mot a ch
duy nhat. Tat ca cac bit a ch c dung e nh ngha v tr c tham chieu.
2- Giai ma mot phan (partial address decoding): Khong phai tat ca cac bit c dung
cho viec giai ma a ch. Cac ngoai vi co the ap ng cho tren mot a ch. Phng
phap lam giam o phc tap trong mach giai ma a ch. Thong thng cac he thong
nho s dung giai ma mot phan.
Mach giai ma ay u giai ma cho tat ca cac ng a ch, moi o nh co duy
nhat 1 a ch. Cach giai ma nay c dung trong hethong hoan chnh. V du : may
tnh co RAM 256KB nhng c giai ma ay u 1MB e khi can co the lap thembo
nh vao.
Mach giai ma khong ay u la mach giai ma bo qua mot so ng a ch
cao, mot o nh co nhieu a ch(ve mat logic), nhng khong the co 1 a ch chon
nhieu o nh trong mach giai ma. Mach giai ma phai mang tnh kinh te va kha thi.
1.Giai ma a ch bang cong logic :
V du : Hay giai ma a ch sao cho eprom 2764 co a ch la A000h-BFFFh
A15A14A13A12A11A10A9A8A7A6A5A4A3A2A1A0
1 0 1
0 0 0 0 0 0 0 0 0 0 0 0 0 A000h
.......
1 0 1
1 1 1 1 1 1 1 1 1 1 1 1 1 BFFFh
a ch khong thay oi
a ch thay oi theotng IC nh
a vao mach giai ma
a vao IC nh
address bus cua

16F877A
A13
A14
LS00
CS
A0-A12
data bus cua 16F877A
EPROM
2764
CE OE
GND
A15
Mach giai ma n gian dung cong NAND, a ch A000h-BFFFh
Trong mach giai ma n gian cho eprom nay, xung chip select se tac ong khi ta oc
a ch A000h -> BFFFh, 3 bit a ch phan cao A13=0, A14=0 va A15 =1 c a
vao cong NAND e tao xung chon vung nh 8KB, at tai a ch cao trong khong
gian a ch cua PIC 16F877A. Moi o nh cu the cua vi mach nh eprom 2764 se do
cac bit thap con laiA0-A12 chon ra.
157
2. Giai ma a ch bang mach giai ma (decoder) va cac cong logic:
Vi mach 74LS138 : giai ma 38
A
/Y0
Chon
cac au ra cua mach giai ma
B
/Y1
au vao
C
74LS138
cac au vao
G2a
cho phep
G2b
G1 /Y7
74LS139: 2 bo giai ma 2 4
oi vi he PIC 16F877A neu ta muon ket noi nhieu EPROM va/ hoac nhieu RAM
th can phai co mach giai ma a ch. Th du neu ta s dung cac EPROM 8KB va
RAM 8KB th bus a ch phai c giai ma e chon cac IC nh theo cac vung 8K
: 0000H-1FFFH, 2000H-3FFFH,vv..
Thng ngi ta dung IC giai ma 74LS138 vi cac ngo ra cua no noi vi cac ngo
vao chon chip tren cac IC nh. Hnh 2. 13 minh hoa he thong s dung cac EPROM
8KB 2764 va cac RAM 8KB 6264. Chu y la do co cac ng cho phep rieng ( /RD
va /WR cho bo nh d lieu) nen 16F877A co the truy cap en 64KB cho moi
EPROM va RAM.
V du : Gia thiet trong he PIC 16F877A ta can ghi bo nh 64 KB cho cac vi mach
nh eprom 8KB(8xIC 2764). Hay thiet ke mach giai ma dung IC 74LS138 e thc
hien.
0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0000h
0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 1 0001h
.......
0 0 0
0 0 1
0 0 1
.......
1
0
0
1
0
0
1 1 1 1 1 1 1 1 1 1 1 1FFFh
0 0 0 0 0 0 0 0 0 0 0 2000h
0 0 0 0 0 0 0 0 0 0 1 2001h
0 0 1
.
1 1 1
1 1 1
.......
1 1 1 1 1 1 1 1 1 1 3FFFh
0
0
0
0
0
0
0 0 0 0 0 0 0 0 0 0 E000h
0 0 0 0 0 0 0 0 0 1 E001h
1 1 1
khong oi
1 1 1 1 1 1 1 1 1 1 1 1 FFFFh
thay oi theo tng IC nh eprom 2764
A0-A12
S o mach giai ma a ch :
158
A0-A12
D0-D7
CS 1
0v
CS ROM 2
A13
A14
A15
A0-A12
D0-D7
OE
A
Y0
B
Y1
EPROM1
C
8K
74LS138 cac chan chon chip2764
cho 7 IC eprom2764
G2a
G2b
+5V
G1
Y7
CS ROM 8 : FE000h-FFFFFh
Hnh 2.13a
V du : Gia thiet trong he PIC 16F877A ta can oc ghi bo nh 64 KB cho cac vi mach
nh RAM 8KB(8xIC 6264). Hay thiet ke mach giai ma dung IC 74LS138 e thc
hien.
0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0000h
0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 1 0001h
.......
0 0 0
0 0 1
0 0 1
.......
1
0
0
1
0
0
1
0
0
1 1 1 1 1 1 1 1 1 1 1FFFh
0 0 0 0 0 0 0 0 0 0 2000h
0 0 0 0 0 0 0 0 0 1 2001h
0 0 1
.
1 1 1
1 1 1
.......
1 1 1 1 1 1 1 1 1 1 3FFFh
0
0
0
0
0
0
0 0 0 0 0 0 0 0 0 0 E000h
0 0 0 0 0 0 0 0 0 1 E001h
1 1 1
khong oi
1 1 1 1 1 1 1 1 1 1 1 1 FFFFh
thay oi theo tng IC nh RAM 6264
A0-A12
S o mach giai ma a ch :
159
A13
A14
A15
+5V
A0-A12
D0-D7
CS 1
RD
CS 2 WR
A0-A12
D0-D7
OE
A
Y0
WE
B
Y1
RAM 1
C
8K
74LS138 cac chan chon chip6264
cho 7 IC RAM 6264
G2a
G2b
G1
Y7
CS RAM 8 : FE000h-FFFFFh
Hnh 2.13b
V du : Thiet ke mach giai ma a ch 12KB bo nh , trong o 1 ROM 2KB + 1
SRAM 4KB + 3 SRAM 2KB
Ban o bo nh : 0000h 2FFFh
0000h
ROM 2K
07FFh
0800h
0FFFh
1000h
17FFh
1800h
1FFFh
2000h
RAM 1,
2K
RAM 2,
2K
RAM 3,
2K
A11
A12
A13
A14
A15
+5V
A
B
C
G2a
G2b
G1
/Y0
/Y1
/Y2
/Y3
/Y4
/Y5
/Y6
/Y7
CSrom
CSram1
CSram2
CSram 3
CSram4
RAM 4,
2FFFh 4K
9.2. Thiet ke kit vi x ly

9.2.1.Thiet b phat trien dung vi x ly:
Ta trnh bay vai phng phap phat trien va hieu chnh chng trnh trc khi nap
no vao PROM.
Phan phoi bo nh ien hnh cua may vi tnh thong thng (hnh 1)
Phan phoi bo nh trong thiet b phat trien dung may vi tnh cho tren hnh 2.
160
a ch
FFFFH
Khi ong lai
Con tro ngan xep
0000H
Bo nh
a ch khi ong lai
a ch ngat
Chng trnh cua ngi s dung (PROM)
.
.
.
Thiet b vao ra cua ngi s dung
Ngan xep cua ngi s dung
So lieu cua ngi s dung
Hnh 1 : May vi tnh thong thng

He thong monitor bao gom 1 vung ROM e cha chng trnh service, mot vung
RAM e cha tam thi thong tin va chng trnh vao/ra. Thanh phan quan trong
nhat cua chng trnh hng dan la chng trnh vao ra thong tin.
+ Chng trnh vao.
+ Chng trnh oc.
+ Ch th noi dung o nh
+Ghi so lieu vao o nh.
Phan phoi bo nh trong thiet b phat trien dung may vi tnh cho tren hnh 2.
a ch
Bo nh
161
FFFFH
a ch khi ong lai

Chuyen mach
Khi ong lai
a ch ngat
------------------------------------------------Chng trnh cua ngi s dung (RAM)
Khi ong lai Monitor
.
.
.
Chng trnh hng dan (Monitor ROM)
Ngan xep cua monitor
Con tro ngan xepcua

Monitor
RAM cua monitor

Vao ra cua monitor
Con tro ngan xep
Thiet b vao ra cua ngi s dung

Ngan xep cua ngi s dung
0000H
So lieu cua ngi s dung (RAM)

Hnh 2 : Thiet b phat trien dung may vi tnh
Hnh 3 :Ch th sau khi goi a ch o nh FC00H va a vao so 8E

9.1.2. He thong phat trien vi x ly:
Bo nh
a
Vao ra
Thiet b phat trien

dung may vi tnh
May lap trnh e

nap chng trnh
vao rom
Hnh 4: Cau truc cua mot he phat trien

Ngon ng Assembly va trnh bien dch Assembler: MPLAB, CCS C
162
Kit vi x ly n gian
Mach ien toi thieu dung vi PIC 16F877A
Kit vi x ly m rong
Hnh 5: He thong toi thieu
Mot v du thiet ke kit vi x ly: gom CPU 16F877A, EPROM 8KB, RAM 8KB co
tam a ch , 8255
ROM : 0000H-1FFFH, RAM : 2000H-3FFFH
8255: 4000h-5FFFh (ch dung 4000h-4003h)
Phng phap thiet ke :
1/ Thiet ke mach nguon
2/Thiet ke clock
3/Mach Reset
4/Thiet ke mach giai ma
5/S o kit vi x ly
3.1.3.S Kit vi iu khin:
163
Hnh 6: H pht trin vi iu khin PIC 16F877A.

(Tham kho: Sp N6 , ch in t Nht To, Nguyn Kim, Qun 10, Tp. HCM).
Kit ph t tri n c a t c gi D. W. Smith t i website: http://www.slelectrotech.com/.
164
Hnh 7 : Kit pht trin vi iu khin PIC (Tham kho trong sch [1]).
9.3. PPI 8255
8255 co 3 cong song song A, B, C, moi cong 8 bit, thng c chia ra :
A : 8 bit , PA0-PA7
B : 8 bit , PB0-PB7
CL : 4 bit , PC0-PC3
CH : 4 bit, PC4-PC7
Co 3 mode (che o hoat ong )
-mode 0 : xuat nhap n gian
dung A,B,C
-mode 1 : xuat nhap co ieu kien
-mode 2: la bus 2 chieu (dung A)
9.3.1.Tong quat : Cau truc khoi cua 8255
a.Bo em truyen d lieu : bo em 8 bit, 2 chieu , 3 trang thai dung e
giao tiep 8255 vi CPU. D kien c phat hay nhan bi bo em khi thc hien lenh
IN, OUT bi CPU. Cac t ieu khien cung truyen qua d kien
b.Phan kiem soat oc/ghi : chc nang cua khoi nay la kiem soat tat ca
cac s truyen at ben trong va ngoai cua t ieu khien va d kien. No nhan ngo vao
t tuyen a ch va ieu khien cua CPU, phat ra cac lenh can thiet cho ca 2 nhom
ieu khien A va B.
165
/CS : ngo vao =0 cho phep truyen tin gia 8255 va CPU
//RD: =0 cho phep 8255 gi d kien en CPU tren tuyen d kien chu yeu la cho
phep CPU oc d kien t 8255
WR : =0 CPU xuat t ieu khien hay d lieu ra 8255
A0 va A1 : e chon cong A,B,C
A1 A0
chon ca
0
0
port a
0
1
port b
1
0
port c
1
1
t ieu khien
RESET : =1 xoa tat ca cac thanh ghi ben trong gom thanh ghi ieu khien va cac cong
A,B,C mode nhan.
c.ieu khien nhom A va B
Cau hnh hoat ong cua moi nhom c lap trnh bi phan mem, chu yeu la,
CPU xuat t ieu khien en 8255. T ieu khien gom cac thong tin nh che o
(mode), bit set, bit reset, vv se khi ong cau hnh hoat ong cua 8255.
Thanh ghi t ieu khien ch co the viet vao ma khong the oc ra.
d.Cac ca (port) A, B, C :
8255 gom 3 cong A, B, C. Moi cong gom 8 bit. Cac cong nay co the lap trnh
bi phan mem e co the hoat ong che o thch hp.
Cong A : gom bo em, cai ngo ra 8 bit va cai ngo vao 8 bit.
Cong B : gom bo em, cai ngo ra 8 bit va cai ngo vao 8 bit.
Cong C : em va cai ngo ra 8 bit va em 8 bit ngo vao (khong cai).
Ca C co the chia lam 2 phan, moi phan 4 bits cho ieu khien mode.
Moi phan c dung ket hp vi ca A hay B e tao nen cac tn hieu ieu
khien.
166
ieu
khien
nhom 1
(group A)
Port
PA0-PA7
A
CH
D0-D7
PC4-PC7
em d
lieu
CL
PPC0-PC3
Giao RD
Tiep WR
ieu khien
oc ghi
ieu
khien
nhom 2
(group B)
A1
A0
Reset
Port
B
PB0-PB7
CS
Hnh 8: S o khoi cua 8255

Bang lam viec cua 8255
A1 A0 /RD /WR /CS

Hoat ong
Nhap 0 0
0
1
0
A
data bus
0 1
0
1
0
B
data bus
1 0
0
1
0
C
data bus
Xuat 0 0
1
0
0
data bus A
0 1
1
0
0
data bus
B
1 0
1
0
0
data bus
C
1 1
1
0
0
data bus t ieu khien
1 1
0
1
0
tong tr cao
x x
x
x
1
cua data bus
9.3.2.Mo ta chi tiet
a.Lap trnh xuat nhap e chon che o (Mode) :
Co ba che o hoat ong c ban thiet lap do phan mem :
167
Mode 0 : vao ra c ban
Mode 1 : vao ra bat tay (ch cho phep 1 trong 2 chieu)
Mode 2: truyen d lieu 2 chieu
Khi reset, tat ca cac cong c thiet lap che o nhap (input), tc la ca 24
ng eu 3 trang thai.Sau khi reset, 8255 co the duy tr che o nhap ma khong
can khi ong g them. Trong khi thc hien chng trnh he thong, co the chon bat k
mode nao bang cach xuat en 8255 t ieu khien. ieu nay cho phep ch can 1 8255
ma co the phuc vu nhieu kieu thiet b ngoai vi.
Cac che o cua cong A va B co the nh ngha rieng biet. Con cong C c
chia lam 2 phan cho 2 nhom tuy yeu cau nh ngha che o cong A va B. Ta co t
ieu khien cho 8255 nh sau :
Control word :
D7 D6 D5 D4 D3 D2 D1 D0
Mode set flag
1=
active
Nhom B
Port C
1 : in
(phan thap) 0 : out
port B 1 : in
0 : out
Chon che o 0 : mode 0
1 : mode 1
Nhom A
Port C (phan cao) : 1 : in
0 : out
port A : 1 : in
0 : out
Chon mode 00 : mode 0
01 : mode 1
1x : mode 2
V du : 8255 mode 0, port A la nhap, port B,C xuat.
T ieu khien : 100100002= 90h
Khi CS=0 8255 c chon th port A co a ch 300h
Port B co a ch 301h
Port C co a ch 302h
T ieu khien : 303h
Lenh xuat nhap :
Out &h303, &h90 ; xuat 90h ra t ieu khien
Out &h301, &hFF ; xuat FFh ra cong B
Inp (&h300) ; nhap so lieu t cong A
Mov dx, 301h
Out dx, 0ffh
Mov dx, 300h
In ax, dx
168
b.ac tnh xoa/thiet lap bit cho ca C khi no dung lam tn hieu trang
thai/ieu khien cho ca A/B :
Ta dung lenh OUT xuat ra t ieu khien trong o bit D7=0
Khi chon mode 2 cho port A, cac bit D3, D4, D5 khong con y ngha na. Luc
o port A la 2 chieu, con phan cao cua C se lam tn hieu ieu khien va trang thai cho
port A
mode 1 : CH ieu khien cong A, con CL ieu khien cong B. Khi giao tiep
thiet b ngoai vi, cong C lam viec che o dang bit.
Bit set va reset flag, phan con lai cua t ieu khien co y ngha nh sau :
D7
D6 D5 D4 D3
X
x
Bit set/reset flag
0=active
D2
D1 D0
Bit set/reset
0 : reset
1 : reset
Bit select
0 1 0 1 0 1 0 1
0 0 1 1 0 0 1 1
0 0 0 0 1 1 1 1
Moi lan xuat ra 1 t ieu khien en 8255 vi D7=0, ch tac ong en ch 1 bit
cua port C( c chon bi bit select)
c.Chc nang kiem soat ngat quang
Khi 8255 c lap trnh mode 1 hay 2, cac tn hieu ieu khien c cung
capco the c dung e yeu cau ngat quang CPU. Tn hieu yeu cau ngat quang phat
ra t port C co the b cam hay cho phepbang cach set hay reset flip-flop INTE tng
ng, dung chc nang set/reset bit cua port C.
Chc nang nay cho phep CPU cam hay cho phep cac thiet b I/O a xac nh
ngat quang CPU ma khong lam anh hng cac thiet b khac trong cau truc ngat
quang.
9.3.3.Cac che o hoat ong
a.Mode 0 : Vao/ra c ban , n gian
Khong co bat tay, d lieu c ghi va oc 1 cach n gian en hay t 1 ca
a ch ra.
Cac ac tnh c ban mode 0 :
.2 cong 8 bit va 2 cong 4 bit
.Bat k cong nao cung co the la ra hay vao
.Ngo ra c cai
.Cho phep 16 dang vao/ra mode
V du : t ieu khien 83h xac nh port A ra, B vao
Phan cao cua C : ra, phan thap cua C : vao
b.Mode 1 : Vao/ra co bat tay, dung cho port A, port B
169
mode 1, cong A va B dung nhng ng ca C e phat hay nhan cac tn
hieu bat tay. A va B xuat nhap co ieu kien.
* che o nhap :
-STB (strobe input) ngo vao, =0 :cai d lieu vao 8255
-IBF (input buffer full) ngo ra, =1 :a co d lieu, thong bao cho biet vung em a
ay. Noi cach khac, mc thap cua STB se thiet lap IBF=1, va IBF b xoa bi canh
len cua RD.
-INTR (interrupt request) :ngo ra = 1 e yeu cau ngat quang
CPU.INTR c set bi STb=1 va IBF=1, INTE=1
-INTR b reset bi canh xuong cua RD
-INTE A kiem soat bi bit set/reset PC4
-INTE B kiem soat bi bit set/reset PC2
*Cong B : STBB=PC2 (input)
IBF = PC1
INTR = PC0
INTEB = PC2 (output)
Cong A
PA0-PA7
INTEA
PC4
PC5
RD
PC3
STBa
IBF
INTR a
I/O
ve CPU
PC6,7
INTE a=PC4 (xoa/lap bit)
* che o xuat :
-OBF (output buffer full) :ngo ra, =0 a co d lieu(c set bi canh len cua xung
WR t CPU)
bao la CPU va xuat 1 byte ra cong o, va b reset bi ACK=0 do
ngoai vi (tc la mc khong tch cc)
-ACK (Acknowledge input) :=0 a lay d lieu, thong bao cho 8255 biet thong tin t
A hay B a nhan bi ngoai vi.
-INTR (interrupt request) : mc 1 ngo ra dung e yeu cau ngat quang CPU khi
ngoai vi a nhan d lieu phat bi CPU.
INTR c set bi ACK=1 va OBF=1, INTE=1
-INTR b xoa bi canh xuong cua xung WR
-INTE A kiem soat bi bit set/reset PC6
-INTE B kiem soat bi bit set/reset PC2
*Cong B : OBFB=PC1
170
ACK = PC2
INTR = PC0
INTEB = PC2
Cong A
PA0-PA7
PC7
INTEa
PC6
WR
PC3
PA0-PA7
OBFa
ACKa
INTR a
I/O
PC4 5
INTE a =PC6 (xoa / lap bit)
c.Mode 2 : Xuat nhap tuyen 2 chieu, bat tay
Cac ac tnh c ban cua mode 2:
. Ch dung cho nhom A
. 1 ca 2 chieu 8 bit (A) va 1 cong ieu khien 5 bit (C) cho cong A
. Ca ra/vao eu co cai
Cong A
PA0-PA7
PA0-PA7
INTRa
PC3
OBFa
PC7
ACKa
INTE1PC6
WR
RD
PC4
INTE2
PC5
STBa
IBFa
T ieu khien :
1 x
x 1/0 1/0 1/0

PC2-0 0 :in
1 : out
Port B 0: in
1 : out
Group B Mode
0 : mode 0
1 : mode 1
nh ngha cac tn hieu ieu khien xuat nhap 2 chieu :
*INTR (interrupt request)
Mc 1 ngo ra nay bao cho CPU biet yeu cau ngat quang cho phep nhap hay
xuat (chung)
171
*Phep xuat :
-OBF (output buffer ful) output
OBF xuong 0 e bao cho ngoai vi biet CPU a ghi d lieu ra ca A
-ACK (acknowledge) input
Mc 0 t ngoai vi cho phep bo em ra 3 trang thai cua ca A m e phat d
lieu, ngc lai, bo em ra 3 trang thai
-INTE 1 (INTE F-F lien quan vi OBF)
Kiem soat bi bit set/reset PC6
*Phep nhap :
-STB : mc thap ngo vao nay cai data vao mach cai ngo nhap
-IBF (input buffer full) output
Mc 1 thong bao cho CPU biet d lieu a nap vao mach cai nhap
-INTE 2 (lien quan vi IBF)
Kiem soat bi bit set/reset PC4
Ket hp mode 2 va cac mode khac :
Mode 2 va mode 0 (in) : t ieu khien : 1 1 x x x 0 1 1/0
Mode 2 va mode 0 (out) : t ieu khien : 1 1 x x x 0 0 1/0
Mode 2 va mode 1 (in) : t ieu khien : 1 1 x x x 1 1 x
Mode 2 va mode 1 (out) : t ieu khien : 1 1 x x x 1 0 x
S ket hp cac mode ac biet :
Co 1 so to hp cac mode ma khong phai tat ca ca C eu dung lam ieu
khien hay trang thai. Cac bit con lai c dung nh sau :
Neu lap trnh la ngo vao :
Tat ca cac ngo vao c truy xuat qua phep oc ca C bnh thng
Neu lap trnh la ngo ra :
Cac bit phan cao ca C (C4-C7) phai c truy xuat rieng re dung chc
nang bit set/reset
Cac bit phan thap ca C(C0-C3) co the truy xuat dung chc nang bit
set/reset nh nhom 3 bang cach ghi ra ca C
oc trang thai port C :
mode 0, port C truyen d lieu en hay t ngoai vi khi 8255 c lap trnh
mode 1 hay mode 2, ca C tr nen cac tn hieu ieu khien bat tay cho port A hay B
oc noi dung ca C cho phep ngi lap trnh kiem tra trang thai cua moi thiet b
ngoai vi va thay oi chieu chng trnh tng ng
Khong co lenh ac biet e oc thong tin trang thai t C. Phep oc bnh
thng port C dung e thc hien chc nang nay
Ta co dang t trang thai mode 1 :

D7 D6 D5 D4
D3
D2
D1
D0
I/O I/O IBFa INTEa INTRa INTEb IBFb INTRb

Nhom A
Nhom B
Mode 1 (input)
172
OBFa INTEa 1/0 1/0 INTRa INTEb OBFb INTRb

Nhom A
Nhom B
Mode 1 (output)
OBFa INTE1 IBFa INTE2 INTRa

Nhom A
Mode 2
Nhom B
nh ngha bi chon mode 0 hay 1
9.3.4. ng dung cua 8255

ng dung cua 8255 gom co :
1. Ghep noi vi ban phm .V du : ieu khien ban phm (mode 0)
2. Mode 0 : ieu khien en bay oan
3. Ghep noi 8255 vi ADC, DAC
4. ieu khien motor bc , motor DC
5. Truyen so lieu :
-truyen noi tiep bat ong bo : (RS232) . V du : cong COM1 , COM 2
-truyen song song ong bo : cong ghep noi vi may in (LPT1, LPT2)
-xuat nhap song song dung IC 74LS373/374, 74LS245/244
-giao tiep may tnh.
S o chan 8255
173
U4
34
33
32
31
30
29
28
27
5
36
9
8
35
6
D0
D1
D2
D3
D4
D5
D6
D7
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
RD
WR
A0
A1
RESET
CS
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
PC0
PC1
PC2
PC3
PC4
PC5
PC6
PC7
4
3
2
1
40
39
38
37
18
19
20
21
22
23
24
25
14
15
16
17
13
12
11
10
8255
Hnh 9.
9.4. GIAO TIEP NGOAI VI NOI TIEP:
9.4.1.Gi thieu ve truyen d lieu noi tiep :
So sanh gia truyen d lieu song song va truyen d lieu noi tiep :
- Truyen d lieu song song ( v du vi may in)
. Nhanh , nhng khoang cach khong ln.
. at tien.
. Truyen t 2 bit tr len.
- Truyen d lieu noi tiep ( v du qua ng day ien thoai)
.Khoang cach truyen xa
.Re tien hn
. Truyen tng bit mot
174
Sender
Receiver
(a)
Sender
City A
Receiver
one bit/data line City B
(b)
Hnh (a) Truyen d lieu song song va (b) truyen d lieu noi tiep
Bat ong bo va ong bo
Co hai phng phap truyen d lieu noi tiep
ong bo (synchronous) : moi lan truyen mot khoi d lieu (cac ky t) vi toc o
khong oi.
-Bat ong bo (asynchronous): moi lan truyen 1 byte.
8051 co san mot UART ben trong
Duplex (song cong va) simplex ( n cong)
PC
Tx and Rx
PC
PC
(a)
Only Tx
Printer
(b)
Hnh : Duplex (a) va Simplex (b)
-Duplex la truyen d lieu ma hai ben eu co the phat/thu.

-Simplex la truyen d lieu ma ch co mot ben phat va ben kia thu.
Trong duplex lai c chia thanh hai loai :
-Full duplex (song cong): d lieu c truyen ong thi theo hai chieu.
-Half duplex (ban song cong) : d lieu c truyen moi lan theo mot chieu.
Truyen d lieu noi tiep:
-Trong giao tiep noi tiep, d lieu song song c oi ra thanh chuoi bit lien tiep va
tao thanh 1 day xung khong nhat nh.
-Cach oi d lieu song song ra noi tiep ma ngi ta thng dung la nh mot thanh
ghi dch tac ong theo canh cua 1 xung ong bo (goi la xung truyen hay xung nhan)
-Nh vay van e quan trong nhat trong truyen noi tiep la thi iem bat au d lieu
va o rong cua moi bit
-o rong bit cung the hien toc o truyen d lieu. Chang han, d lieu truyen i co o
rong bit c tnh la 20ms th trong 1 giay (sec) truyen c 1/(20.10-3)=50 bit. Luc
175
o ngi ta noi toc o truyen la 50 bit/s hay la 50 bauds (n v o toc o truyen
trong giao tiep noi tiep)
-Theo hnh ve sau, neu xung truyen tac ong theo canh xuong th ta thay ngay o
rong bit chnh bang chu k xung truyen. Suy ra toc o truyen bang tan so xung
truyen.
-Ch can xac nh sai 1 trong 2 yeu to tren la khong the nhan ung d lieu c
CLK
Data
o rong bit
Dang truyen d lieu noi tiep
-Tuy theo cach xac nh thi iem bat au co d lieu ma ngi ta chia giao tiep noi
tiep ra thanh phng phap truyen noi tiep ong bo hay bat ong bo
a. Truyen ong bo :
Trong cach truyen ong bo, d lieu c truyenlien tuc thanh khoi va co kiem
tra theo tong kiem tra (checksum)
Neu kem theo d lieu, ngi ta truyen ca xung clock th goi la ong bo cng. Luc
o ni nhan se dung xung clock e lay mau d lieu. Nh vay, ng vi moi bit d
lieu, ngi ta gi kem theo 1 xung clock au bit.
-Ngi ta co the dung cach ong bo khac ma khong phai gi xung clock theo, ch gi
d lieu thoi. Cach nay goi la ong bo mem. Luc o viec ong bo thc hien
bang cac k t ac biet goi la k t ong bo( SYN)
-D lieu truyen i theo tng khoi va co k t Syn au khoi
-Ky t SYN c chon sao cho khong trung vi k t nao trong d lieu
-Neu khong the chon c ky t SYN th co the dung 2 ky t SYN1 va SYN2 vi
ieu kien to hp SYN1 va SYN2 i lien nhau khong co trong d lieu.
SYN
SYN
Khoi d lieu
Tong kiem tra
Khoi d lieu noi tiep ong bo mem

-Ni nhan phai tien hanh do tmk t SYN(1 hoac 2 k t). Sau khoang thi gian bang
o rong bit, d lieu noi tiep c dch vao va oi ra song song. D lieu song song
nay c so sanh vi k t SYN va qua trnh nay c lap lai cho en khi phat hien
ra k t SYN la coi nh a ong bo va se bat au lay d lieu ngay sau k t SYN
b. Truyen bat ong bo :
-D lieu c at vao mot khung truyen nhan gom co them bit bat au (start bit), bit
kiem tra chan le(parity bit) va cac bit ket thuc (stop bit)
176
-Theo chuan RS232C, giao tiep gia cac ng lien lac noi tiep cua 2 may tnh ,
khung d lieu gom co 1 bit bat au, khong co hoac co 1 bit kiem tra (ma co the chon
chan hoac le), d lieu dai t 5 en 8 bit va so bit ket thuc co the la 1, 1 1/2, hoac 2
bit nh hnh ve sau :
1
Start bit
58
Data bit
1 1, 1+1/2, 2
Parity bit
Stop bit
Khung d lieu noi tiep bat ong bo

Start bit
Data bit(5-8)
1 LSB
Parity bit
Stop bit
MSB 0-1 1, 1+1/2, 2

Chieu dai 1 ky t
Dang xung cua khung d lieu noi tiep bat ong bo

9.4.2. Chuan giao tiep noi tiep RS-232
Chuan giao tiep noi tiep RS232 c qui nh bi EIA (electronics industries
association= Hiep hoi cong nghiep ien t ) vao nam 1960 va cac chuan noi tiep
RS232 co sa oi la RS232A (nam 1963), RS232B (nam 1965) va RS232C (nam
1969). Hai ch au ES co ngha la recommended standard.
RS 232 c qui nh trc khi xuat hien ho logic TTL, do o cac mc ien ap cua
no khong tng thch vi TTL (ho TTL ra i vao nam 1968).
a. Giao tiep noi tiep bat ong bo
Giao tiep noi tiep bat ong bo la giao tiep ma cac bit lan lt c gi ra
ng truyen va xung ong bo ni phat khong nhat thiet phai ong bo vi xung ong
ho ni thu
Ngoai cac bit d lieu muon phat th tren ng truyen con co them cac bit e
bat tay va e kiem tra ngi ta goi la thong tin khung
1-2 bit dng
Bit khi ong
bit kiem tra chan le
Trong thc te bit khi ong ngc vi trang thai ng truyen, bit dng cung
vi trang thai ng truyen
So bit dng : 1; 1,5; 2 bit
o dai ky t : 5, 6, 7, 8 bit
177
Vi x
ly 1
Khoi
Khoi
Vi x
ghep noi
ghep noi
ly 2
song
noi tiep
Cac IC chuyen dung e thu phat bat ong bo : 6402, 6850, 8251, 8250
b. Giao dien RS-232
Khi muon truyen thong tin i khoang cach xa, chung ta khong the truyen trc
tiep mc TTL (0v-5v) v :
-Do suy giam ni thu , kho phan biet c mc tn hieu 0 va 1
-Do lan nhieu ni thu
V vay ngi ta phai :
-ieu che tn hieu phat khi bang mot song mang t b suy giam tren ng day
-Tang mc ien ap TTL
-S dung ng day ien thoai
oi vi mach trao oi thong tin khoang cach xa v mc ien ap TTL cua cac
thiet b so khac vi mc ng day ien thoai, do o can phai co cac khoi ghep noi
chuan. Tuy toc o trao oi tin, khoang cach va cac loai modem cung nh ng day
truyen ma ta co cac phoi hgep chuan khac nhau : RS232C, RS 449, RS423A
Vi x
ly
Khoi
ghep noi
song
song- noi
tiep
RS2
32C
Mo
dem
Vi x
ly
Mo
dem
RS2
32C
Khoi
ghep noi
noi tiepsong song
+Thong so ky thuat cua chuan RS-232C

Chuan RS232C ap dung cho toc o truyen so lieu toi a la 20kbps va khoang
cach cc ai la 15 m
o la khoi ghep noi chuyen mc TTL (0-5v) len mc ien the cua ien thoai
(+/-15v)
Trong o cac ng truyen so lieu dung mc logic am :
-tn hieu logic 1 gia 5v - -15v
-tn hieu logic 0 gia +5v - +15v
Tuy nhien tn hieu ieu khien dung tn hieu logic dng
+S o chan cua RS232C :
Chot ra o 9 chan
1
2
Chot ra o 25 chan
8
3
Chc nang
DCD :data carrier detect

RXD :receive data
178
3
4
5
6
7
8
9
2
20
7
6
4
5
22
TxD :transmit data

DTR : data terminal ready
GND : mass
DSR :data set ready
RTS :request to send
CTS :clear to send
RI :ring indicator
-Cac ng d lieu
TxD: d lieu c truyen t modem tren ng truyen
RxD : d lieu c thu bi modem tren ng truyen
-cac ng bao hieu thiet b san sang
DSR:bao modem a san sang
DTR:bao rang thiet b au cuoi a san sang
-Cac ng bat tay ban song song
RTS:tn hieu bao thiet b au cuoi yeu cauphat d lieu
CTS :modem ap ng nhu cau gi d lieu cua thiet b au cuoi
-Cac ng trang thai song song va tn hieu ien thoai
CD:modem bao cho thiet b au cuoi biet rang a nhan c mot song mang hp le
t ng truyen
RI: modem t ong tra li (bao rang a phat tn hieu chung t ng truyen)
9.4.3. MAX232
Mach lai ng day : cac IC thong dung la MAX232, MC 1488 va MC 1489, DS275
Trong cac he phat trien se c trnh bay, viec ghep noi vi may tnh c thc
hien qua cong noi tiep. Thong thng, co 2 cach ghep noi bo vi x ly vi cong noi
tiep.
1/ Cach n gian la dung transistor lam bo em.
2/ Ghep noi cac ng truyen va nhan (TxD va RxD, chan 10 va 11) cua bo vi x ly
vi bo em /nhan dung vi mach, chang han loai MAX232 cua hang MAXIM.
Vi mach MAX232 chuyen oi mc TTL loi vao thanh mc +10V hoac
10V pha truyen va cac mc +3V+15V hoac 3V-15V thanh mc TTL pha
nhan.Hnh sau mo ta cach sap xep chan va s o cau truc vi mach MAX232.
179
U2
13
8
11
10
1
3
4
5
2
6
R1IN
R2IN
T1IN
T2IN
12
9
14
7
R1OUT
R2OUT
T1OUT
T2OUT
C+
C1C2+
C2V+
VMAX232
(a)
5V
+
+5V +10V
--------------------+10V -10V
Loi vao
DTR
RTS
Loi ra
TTL/CMOS
Loi ra
Loi vao
RS232
(b)
Hnh :Sap xep chan (a ) va s o cau truc (b) cua vi mach MAX232
ng dan TxD dan trc tiep en chan 11 cua vi mach MAX232, con bo
em loi ra chan 14 c noi trc tiep vi chan 2 cua cong noi tiep.
Viec sap xep chan cong noi tiep c la chon sao cho co the dung 1 cap
noi trc tiep cua he phat trien vi cong noi tiep cua may tnh , thng dung COM2.
Vi ng dan RxD, moi viec cung dien ra tng t, chan 13 cua vi mach
c noi vi chan 3 cua cong noi tiep.
Vi mach MAX232 co 2 bo em va 2 bo nhan. ng dan ieu khien loi vao CTS,
ieu khien viec xuat ra d lieu cong noi tiep khi can thiet, c noi vi chan 9
cua vi mach MAX232. Con chan RTS ( chan 10 cua MAX) noi vi ng dan bat tay
e ieu khien qua trnh nhan. Thng th cac ng dan bat tay c noi vi cong
180
noi tiep qua nhng cau noi, e khi khong dung en co the e h mach cac cau nay.
Cach truyen d lieu n gian nhat en may tnh PC la ch dung 3 ng dan : TxD,
RxD va GND ( hoac mass).
+12V
TTl level
RS-232 output
1488
/TxD
-12 V
UART
TTL level
/RxD
RS-232 input
1489
Hnh : V du mach lai ng day dung MC 1488 va MC1489

V du ket noi gia cac thiet b
V du : May tnh va modem
Computer (DTE)
TxD 2
RxD 3
Modem (DCE)
TxD 2
RxD 3
RTS 4
RTS 4
CTS 5
CTS 5
DSR 6
DSR 6
GND 7
GND 7
DCD 8
DCD 8
DTR 20
DTR 20
RNG 22
RNG 22
Hnh : Giao tiep gia may tnh va modem
Chuoi s kien truyen thong:

1- Xac nhan DTr- Toi ang ON. Ban cung ang ON phai khong?
2- i DSR Vang, toi ang ON
3- Xac nhan RTS- Toi co the gi d lieu c khong ?
4- i CTS- Vang , ban co the.
5- Truyen (phat)- Bat au truyen d lieu
181
Ket noi PIC 16F877A vi RS232
PIC
16F877A
TX
RX
25(RC6)
11
MAX232
T1 in T1 out
26 (RC7)
12
R1 out R1 in
DB-9 (RS232 con)

14
2 RxD
13
3 TxD
GND
9.5.ng dng:
9.5.1. iu khin led n
Th d 1: iu khin led s dng port A v port E: xem chng th d chng 4.
Th du 2: chng trnh ieu khien 8 led chay uoi d ng PORTB. PIC 16F877A c
Fosc l 4 Mhz.
Logic 0: led sang.
Logic 1: led tt.
PORTC EQU 7
PORTD EQU 8
PORTE EQU 9
TRISC EQU 87H
TRISD EQU 88H
TRISE EQU 89H
COUNT EQU 20; COUNT l nh 20H, thanh ghi m s kin.
;***************************************
ORG 0
; a ch bt u l 0
;***************************************
;Bit cu hnh
__CONFIG H3FF2 ; chn dao ng HS, WDT off, PUT on, bo v m b cm.
;Phn chng trnh con
;tr hon 500 microgiy
delay500us movlw .166
movwf count
again decfsz count
182
goto again
return
; tr hon 10 miligiy
delay movlw .20
movwf count
again1 call delay500us
decfsz count
goto again1
return
;Phn cu hnh.
MOVWF TRISA
MOVLW B00000000
MOVLW B11111111
MOVLW B00000000
MOVWF TRISE
BCF STATUS,6
loop movLw 0FEh
movwf portb
call delay
movLw 0FDh
movwf portb
call delay
movLw 0FBh
movwf portb
call delay
movLw 0F7h
movwf portb
call delay
movLw 0EFh
movwf portb
call delay
movLw 0DFh
movwf portb
call delay
183
movLw 0BFh
movwf portb
call delay
movLw 7Fh
movwf portb
call delay
goto loop
END
Ch : ch ng tr nh con delay500us t o tr 500s, c n delay t o tr 10 ms.
9.5.2. iu khin LCD:
S m ch k t n i LCD t i 16F84 c minh h a h nh. C u h nh n y l cho
b i u khi n LCD HD44780 v c th c d ng v i b t k hi n th s d
ng chip n y.
PIC 16F84 i u khi n hi n th LCD.

Cau tao, hoat ong cua LCD
GND +5V
-5V
7 8
9 10
11
12
13
14
D0 D1
D2 D3
D4
D5
D6
D7
RS
R/W EN
184
Bt
RS
0
R/W
0
D7
0
D6
0
D5
0
D4
0
D3
0
D2
0
D2
0
D0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
I/O
0
S
S/C
R/L
DL
a ch k t
Loai ky t
Loai ky t
Hien th a ch d lieu
Mach ket noi:

RB1 noi vi RS.
RB2 noi vi R/W.
RB3 noi vi EN.
RB4RB7 noi vi D4D7.
Chc nang
Xoa LCD va bonh, con tro hien
tai.
Ch xoa va con tro hien tai.
Tac ong man hnh nh hien th
ky t c viet.
I/O=1/0: con tro R/L, man hnh
L/R.
S=1/0: dch man hnh/con tro.
D=1/0: man hnh on/off.
C=1/0: con tro on/off.
B=1/0: con tro nhap nhay/khong
nhap nhay.
S/C=1/0: man hnh/con tro
R/L: dch mot khoang trong R/L.
DL=1/0: 8/4 bit tren k t.
N=1/0:2/1 dong k t.
F=1/0: 5x10/5x7 cham(dot)/ky
t.
Ghi ti a cha Ram k t sau
ieu nay.
Ghi ti a cha Ram hien th
sau nay.
Ghi byte vi RAM cuoi c
chon.
oc byte vi RAM cuoi c
chon.
185
Hnh : Kt ni LCD vi vi iu khin:
Vi t ch ng tr nh hi n th ch HANOI tr n LCD d ng PIC 16F84.
Vi t ch ng tr nh hi n th ch HANOI tr n LCD d ng PIC 16F877A.
9.5.3. iu khin led 7 on:
*Trng hp led 7 on loi catt chung:
Thit k mt mch m m v hin th trn led 7 on (loi catt chung), s ln mt
nt nhn c n ti 10. M nh phn li led 7 on nh sau:
S
PORTB
B7
B6
B5
B4
B3
B2
B1
B0
0
0
1
1
1
0
1
1
1
1
0
1
0
0
0
0
0
1
2
0
0
1
1
1
0
1
1
3
0
1
1
0
1
0
1
1
4
0
1
0
0
1
1
0
1
5
0
1
1
0
1
1
1
0
6
0
1
1
1
1
1
0
0
7
0
1
0
0
0
0
1
1
8
0
1
1
1
1
1
1
1
9
0
1
0
0
1
1
1
1
Xt mch in nh sau:
Hnh: S mch ca iu khin led 7 on.

Dp g f e d c b a
B7 B3 B2 B4 B5 B6 B0 B1
0 0 1 1 1 1 1 1 s 0 ( m 77h)
Xt mch sau:
186
Hnh: Kt ni vi iu khin vi led 7 on trong ch multiplex.

Vit chng trnh hin th s 30 trn hai led.
M rng cho PIC 16F877A.
*Tr ng h p led 7 o n lo i anod chung: D ng port B k t n i 7 thanh, c n port A
i u khi n ch n led (c p i n).
N u RA0=0 th transistor d n l m Vc=VE=+5V v anod c a led 0 c c p i n,
portB n i v i c c thanh a,b,..,g,dp.
RA7 RA6 RA5 RA4 RA3 RA2 RA1 RA0
1
1
1
1 1
1
1
0
RB7 RB6 RB5 RB4 RB3 RB2 RB1 RB0
Dp g
f
e
d
c
b
a
1
1
0
0
0
0
0
0
+5V
RA0
Led 0
b0 B1 B7
FEh (ch n led 0)
C0H (s 0)
187
Vi t ch ng tr nh hi n th s 0 tr n led 0.
Vi t ch ng tr nh hi n th ch HUI tr n 3 led ( led 0, led 1, led 2).
9.5.4. iu khin led ma trn:
S o nguyen l: Phan tch s o ieu khien ma tran led.
Hnh : S o nguyen ly led ma tran. (Hnh ve c trch dan t sach Th nghiem vi

x l cua tac gia Pham Quang Tr, HCN Tp. HCM).
Ma tran gom 8 hang va 8 cot(red-col. va green col.). Dung port C hang, port B/Port
D-column red (ct ).
-Nguyen ly mot led sang :PortB quet coat, PortC quet hang; th du led(1,1) sang th
Va>Vk , ngha la PortC,0=0 va PortB,0=0. Khi o Vk=0,8v; TST PNP Q1 dan
lam VaVE=5V.
Neu muon PortC,0=0 va PortB,0=1 (ct tch cc mc logic 1) led sang th ta
dung bo em ao cot , con hang khong em ao.
-Nguyen ly 1 day led sang : Th du ch L
Phng phap quet cot (khong co em ao) (ACT=0) va hien th hang
(ACT=0): tuan t cho cot tch cc mc 0 va xuat d lieu hang .
Th du: ch T, PortB quet cot, PortC quet hang.
Quet cot 0: PortB,0=0 ;PortC,0PortC,7=0 : ma hang, cot la (00h, Feh).
Quet cot 1: PortB,1=0 ;PortC,0PortC,7=0 : ma hang, cot la (00h, FDh).
Quet cot 2: PortB,2=0 ;PortC,3=0 va PortC,4=0 : ma hang, cot la (E7h, FBh).
Quet cot 3: PortB,3=0 ;PortC,3=0 va PortC,4=0 : ma hang, cot la ( E7h, F7h).
Quet cot 4: PortB,4=0 ;PortC,3=0 va PortC,4=0 : ma hang, cot la (E7h, EFh).
Quet cot 5: PortB,5=0 ;PortC,3=0 va PortC,4=0 : ma hang, cot la (E7h, DFh).
Quet cot 6: PortB,6=0 ;PortC,3=0 va PortC,4=0 : ma hang, cot la (E7h, BFh).
Quet cot 7: PortB,7=0 ;PortC,3=0 va PortC,4=0 : ma hang, cot la (E7h, 7Fh).
Phng phap quet cot (co em ao) (ACT=1) va hien th hang (ACT=0): tuan
t cho cot tch cc mc 1 va xuat d lieu hang .
TH du : Hien ch T, dung PortB qut ct, portC qut hng
188
Chng trnh led matrix:
dung e tao ch, so va cac ky hieu.
9.5.5. iu khin nt nhn, b n ph m:
iu khin nt nhn:
S mch ca nt nhn vi iu khin.

Vit chng trnh iu khin nt nhn (dng PIC 16F84).
-i cho nt nhn SW1 ng.
-Bt led 1.
-i cho SW1 nh.
-Tt led 1.
-Lp li.
Bi tp: lm li th d trn s dng vi iu khin PIC 16F877A.
-Qu t b n ph m:
189
K t n i b n ph m v i vi i u khi n.
Port B: RB0, RB1, RB2 n i v i c t C1,C2,C3 v RB3, RB4, Rb5, RB6 n i v i h
ng R1,R2,R3,R4.
B n ph m g m 4 h ng v 3 c t.
C t 1, C1
C t 2, C2
C t 3, C3
H ng 1, R1
1
2
3
H ng 2, R2
4
5
6
H ng 3, R3
7
8
9
H ng 4, R4
*
0
#
Vi t ch ng tr nh (d ng PIC 16F84) hi n th ph m nh n: khi ph m 1 c nh n
hi n th s nh ph n 1 tr n port A., khi ph m 2 c nh n hi n th s nh ph n
2 tr n port A.
B i t p: l m l i th d tr n d ng PIC 16F877A.
Khoi ban phm, nut nhan va cong tac:
Phan tch s o ieu khien :
-Nut nhan:
190
Hnh : S o nguyen ly nut nhan. (Hnh ve c trch dan t sach Th nghiem vi x
l cua tac gia Pham Quang Tr, HCN Tp. HCM).
Gi s portB i u khi n 8 n t nh n SW0-SW7.
Khi nh n n t SW0, bit nh n c l logic 0 : RB0=0 .
Khi nh nh t nh n SW0, bit nh n c l logic 1, RB0=1.
-Cong tac:
Hnh : S o nguyen ly cong tac. (Hnh ve c trch dan t sach Th nghiem vi x

-Ban phm:
191
Hnh : S o nguyen ly ban phm. (Hnh ve c trch dan t sach Th nghiem vi x

Bai tap : Chng trnh ieu khien ban phm va hien th ma cua phm nhan tren 8 led
n di dang so nh phan.
dung port B (RB0 RB3 : hang, RB4 RB7: cot) xuat tuan t cho tng cot bang 0.
Sau o kiem tra mc logic cua 4 ngo nhap e xem co phm nhan: khi co phm nhan
th hang cot chap nhau, ngo nhap mc logic 0, t o ta tnh ra ma quet cua phm
o.
Giai thuat ieu khien ban phm:
Quet phm
i=0
Cot i=0
Co phm nhan?
S
Ma
phm
I=i+1
I=4
C C=0
Thoat
192
Ma phm
Hang 0
Mp+0
Mp+4
S
Hang 1
S
Hang 2
Mp+8
S
Hang 3
Mp+12
S
C
C=0
C C=1
End
Chng trnh:
D n
D n 1: iu khin tc motor DC loi nh
Vit chng trnh iu khin motor DC loi nh:
S khi cho iu khin tc ca ng c mt chiu loi nh s dng

vi iu khin PIC 16F877A: (hnh 1)
Yu cu l s dng vi iu khin iu khin tc ng c DC theo
chiu thun v ngc v hin thc hai tc (nhanh v chm). Cng tc
(nt nhn) c dung to ra hai tc v tc ng quay ngc.
S khi c minh ha hnh 1, s dng vi iu khin PIC 16F877A.
Phng php iu khin tc l bng iu rng xung (PWM) dung PIC
16F877A. t chn 7 RC1=0 (logic 0) v p dng PWM vo chn RC2
lm cho ng c quay thun. Vic iu khin quay thun hay nghch t
c bng thit k cu ca mch iu khin ng c. Nu nt nhn khng
193
c nhn th ng c vn n nh. Gi s nt nhn 1 c thit lp

PWM t s 6:4 v nt 2 c thit lp PWm vi t s 9:1.
PWM =
Ton
Ton
=
T
Ton + Toff
PIC 16F877A
ng c chy
Mch li
ng c
ng c
Ngc chiu
Tc 1
Tc 2
Ngc chiu
Nt nhn 1
Nt nhn 2
Nt nhn 3
Hnh 1
Nt nhn dng RA0, RA1, RA2
T s 6:4 c chu k tng T=6+4=10 v 6 chu k mc cao (1), 4 mc
thp (0). T s 9:1 c T=10, v 9 mc 1, v 1 mc 0.
194
Hnh 2: Mch iu khin cu s dng ng vo t chn RC2 v RC1

iu khin tc ng c mt chiu th nhat v hng quay.
ng c ngng (off) khi RC2 v RC1 logic 0, cc C ca T1 v T6 mc
cao. V vy T2 v T4 s dn (on) trong khi T3 v T5 tt (off)(khng dn)
v khng c dng dn qua ng c gia 5V v t (GND, mass).
ng c quay(on): khi RC1=0, cc C ca T6 s cao, T4 dn v T5 tt.
Nu tn hiu PWM p dng vo RC2 th khi PWM logic 1, T1 dn, cc
C ca T1 mc thp; v vy T2 tt v T3 dn. Do dng in dn qua
t thong qua transistor T3, ng c Dc v qua transistor T4 ln ngun
+5V.
ng c quay ngc(reverse): Nu RC2=0 (logic 0) th T2 dn v T3 tt.
Nu tn hiu PWM p dng vo RC1 th khi PWM l logic cao (1),
transistor T4 tt v T5 dn, to ra dng in dn ngc thong qua T5,
ng c v T2.
2/Vit chng trnh iu khin ng c bc.
D n 2: iu khin tc ca ng c bc
Yu cu l dung vi iu khin li ng c bc trong c hai chiu
quay thun v ngc v hin thc sp xp hai tc (nhanh v chm).
Nt nhn c dng to ra hai tc v o chiu quay. Hnh v c
minh ha hnh 3, s dng vi iu khin PIC 16F877A.
PIC 16F877A
ng c chy RB7
RB6
RB5
RB4
Tc 1
Mch li
ng c
ng c
Nt nhn 1
Tc 2
Nt nhn 2
Ngc chiu
Nt nhn 3
Hnh 3: S khi ca iu khin ng c bc s dng vi iu khin PIC

16F877A.
195
Mch iu khin cho ng c bc
Hnh 4: Sp xp mch ph hp cung cp mch li cho ng c bc.

Trnh t xung iu khin:
RB7 RB6 RB5
RB4
1
0
0
0
0
1
0
0
0
0
1
0
0
0
0
1
Nu u A c RB7=logic 1 th transistor Q1 dn, c dng in Ic qua cun
dy v cun dy thnh nam chm in, tng tc vi nam chm vnh cu
rotor lm ng c quay mt gc. Tng t cho u B, C, D (bit RB6, RB5,
RB4 tng ng).
3/Mch bo trm.
4/ Ht sc sc in t.
5/B timer mch phn ng.
IV.Tng kt bi:
-Chun b bi mi.
Chng 9: Thit k h vi x l v h pht trin vi iu khin
Giai ma a ch :
1.Thiet ke mach giai ma a ch sao cho bo nh
196
12 KB = 1 ROM 2KB + 1 SRAM 4KB + 3x SRAM 2KB
a ch : 0000h 2FFFh
2. Thiet ke mach giai ma a ch cho he vi x ly gom :
1 EPROM 2764, 1 RAM 6264, 2 PPI 8255. Vung a ch nh sau :
EPROM : 0000h-1FFFh, RAM : 2000h-3FFFh
8255(1) : A000h-BFFFh (ch dung A000h-A003h)
8255(2) : E000h-FFFFh (ch dung E000h-E003h)
3.Thiet ke mach giai ma a ch : 8x 1 KB (8 IC EPROM 1KB)
4. Thiet ke mach giai ma a ch 8 KB trong o 2x ROM 2 KB va 4xSRAM 1KB
5. Thiet ke mach giai ma a ch 8 KB trong o 1Rom 2Kb + 2xSRAM 1Kb +
1xSRAM 4KB
6. Hay giai ma a ch sau cho EPROM 2764 co a ch la A000h-BFFFh dung
cong logic hay IC 74LS138
8. Thiet ke mach giai ma a ch cho e s dung vi cac thiet b 1 : 8000H9FFFH va thiet b 2 : 0000H-1FFFH.
9. Giao tiep vi bo nh RAM HM6264 va ROM 27C256, hai so au trong cac
thiet b nay ch RAM(62) hoac ROM(27). Cac so tiep theo e ch dung lng
theo K bits, co the co cac bo nh 4, 8, 16, 32 va 64KB ( ngha la cac so theo sau
62/27 la 32, 64, 128, 256 va 512).
10. Thiet ke mach giao tiep bo nh 64KB (t 8 chip EPROM moi chip 8KB) vi
8031/8051.
11. Thiet ke mach giai ma a ch cho bang bo nh sau :
0000H-BFFFH la tam a ch cua 48 KB RAM (moi chip RAM 8KB)
C000H-DFFFH la tam a ch cong xuat 1 bit.
E000H-FFFFH la tam a ch cong nhap 1 bit
Thiet ke kit vi x ly :
1.Thiet ke kit x ly gom CPU PIC 16F877A, RAM 8KB, EPROM 8KB,
2xIC8255
2.Thiet ke kit vi x ly CPU PIC 16F877A, RAM 16KB, EPROM 16KB,
2xIC8255
3.Thiet ke kit vi x ly CPU PIC 16F877A, RAM 64KB, EPROM 64KB,
2xIC8255
4. Kit vi iu khin ti thiu v kit m rng l g?
Thiet ke ngoai vi:
1. Trnh bay cau truc s o khoi vi mach giao tiep song song 8255.
2. Lap trnh 8255 sao cho port A, port B, port C la xuat, mode 0.
3. So sanh giao tiep ngoai vi song song va giao tiep ngoai vi noi tiep.
4. Truyen d lieu noi tiep la g? ong bo va bat ong bo? Song cong va n
cong?
5. Chuan RS232 la g?
6. Ket noi gia may tnh va modem.
7. Ket noi gia PIC 16F877A va RS232
8. Ve mach truyen d lieu gia may tnh va vi ieu khien PIC 16F877A s dung
MAX232/MAX233
197
9. Thiet ke mach giao tiep PIC 16F877A vi led 7 oan
10. Thiet ke ban phm 16 key giao tiep vi PIC 16F877A s dung
a)port B cua 16F877A
b) port A cua 8255
Lap trnh ieu khien :
1. ieu khien led n chay uoi, sang dan, tat dan va hai ba vao ra.
2. ieu khien ong nha rle.
3. ieu khien hien th led 7 oan.
4. ieu khien ma tran led hien th ch HANOI, DHCN.
5. ieu khien ban phm.
D n
1/D n 1: iu khin tc motor DC loi nh
Vit chng trnh iu khin motor DC loi nh:
2/D n 2: iu khin tc ca ng c bc
Vit chng trnh iu khin ng c bc.
3/Mch bo trm.
4/ Ht sc sc in t.
5/B timer mch phn ng.
198
Ti liu tham kho:
1. D.W. Smith, PIC in Practice: A project-based approach, 2nd ed., Elsevier, 2006.
2. Ti liu PIC ca b mn in t Cng nghip, trng HCN Tp. HCM.
3. Datasheet ca PIC 16F84A, 16F877A. Website: http://www.alldatasheet.com/.
4. Website : http://www.microchip.com/
Phn mm MPLAB IDE v6.60 (lp trnh hp ng), Phn mm CCS : PCW C
Compiler IDE v3.227 (gm PCB, PCM, PCH) (lp trnh C).
Phn mm np WinPic800.
Phn mm PICC Lite, Hi-Tech C for PIC 10/12/16 MCUs: users guide.
MPLAB C18 C Compiler for PIC 18 MCUs.
5. H Trung M, Vi x l, NXB HQG Tp. HCM, 2003.
6. Trng Trc, Chip n PIC16C84 v ng dng ca chng, Tp ch in t
(Electronic Fan) t s 117 (thng 7/2003) n s 122 (thng 12/2003).
7. Myke Predko, Programming and customizing the PIC microcontroller, 3rd
edition, Tab Electronics, McGrawHill, 2008(Ebook).
8. Nebojsa, Dragan Andric, PIC microcontrollers.
9. Vn Th Minh, K thut vi x l, NXB GD, 1997.
10. Douglass V.Hall, Microprocessors and interfacing: Programming and
Hardware, 2nd ed., Macmillan/McGraw-Hill, 1992.
11. John Morton, The PIC microcontroller: your personal introductory course, 3rd
ed., Newnes, 2005.
12. Nigel Gardner, PICmicro MCU C: An introduction to programming the
microchip PIC in CCS C, Copyright Bluebird Electronics 2002.

Tham Khao Baigiang - Pic

Uploaded by

Document Information

Original Title

Copyright

Available Formats

Share this document

Share or Embed Document

Sharing Options

Did you find this document useful?

Is this content inappropriate?

Copyright:

Available Formats

Tham Khao Baigiang - Pic

Uploaded by

Copyright:

Available Formats

Trng i hc Cng nghip Tp.

Bi ging s 1: Gii thiu chung v h vi x l . Gii thiu chung v vi iu khin

Bng chuyn i gia s nh phn, thp phn v thp lc phn:

Cac thanh ghi

Cach nh a ch thanh ghi.

1.4.3. Cc thit b ngoi vi.

1.4.4. H thng bus.

Hnh 1.7 : S o khoi mot MCU

Hnh 1.7.2: H vi iu khin c bn.

Hnh 1.7.4: Mch vi iu khin

Mch vi iu khin PIC 16F84

Mch vi iu khin PIC 16F877A

Hnh 1.7.5: Ngun cung cp cho vi iu khin.

Hnh 1.7.10: Kt ni 4 led vi PIC 16F877A

VI. Rt kinh nghim: (v thi gian, ni dung, phng php, chun b)

Ngy .thng..nm 2011

Ngy .thng..nm 2011

Hnh 2.1: S chn ca PIC 16F84

Hnh 2.2: Cu trc bn trong ca PIC 16F84A.

Hnh 2.3: Cu trc bn trong ca PIC 16F877A.

Hnh 2.4: S chn PIC 16F877A

Hnh 2.5: S khi Mid-range PIC ( PIC 16F877A).

Hnh 2.6: B nh chng trnh.

Hnh 2.10: Thanh ghi STATUS

C=1 c nh ct ny ( bit 9 c a vo c C).

Bit 7 PSPIF: bit c ngt c /ghi port t song song.

Bit 7 Khng hin thc, c l 0.

Bit 7 Khng hin thc, c l 0.

Ngy .thng..nm 2011

Ngy .thng..nm 2011

Bi ging s 3: : Tp lnh ca vi iu khin PIC( S tit: 10)

Hnh 3.2: Qua trnh assembling 1 chng trnh nguon

3.1.2.Gii thieu qua trnh bien dch :

Hnh 3.3: File Project trong MPLAB.

K hieu bat au/ket thuc

Th d: khi ng bit 0-3 ca port B nh ng ra.

*a ch gin tip thanh ghi:

Th d: Xa tt c v tr RAM t 20h ti 7Fh.

. a ch tuyt i PC (B nh chng trnh)

org 0x1800; trang 3

b=3 bit a ch bit.

D=0 cho ch l thanh ghi W.

K=gi tr tc thi 8 bit.

k=11 bit gi tr tc thi.

MSB .... LSB

Hnh : Thanh ghi iu khin dao ng.

nh 12 trc khi quay tri

nh 12 sau khi quay

nh 12 trc khi quay phi

nh 12 sau khi quay

*Chng trnh nhn hai s nh phn 8 bit:

at gii han trong lng

Ngat bao ong

oc trong lng data_in

Xuat bao ong

NEXT : movf data_in,w; nh 20h vo w

Delay: clrf tmr0; bt u timer 0

ngat bao ong

LED 7 oan +5V

Hnh: S mch ca iu khin led 7 on.

R/W-1 R/W-1 R/W-1

Bit iu khin /trng thi port t song song:

/RPBU INTEDG TOCS