VLSI DSP Test 3

1. Write an expression for computing forward 4-point DCT.

(2)
2. Obtain 2-point DCT matrix.
(3)
3. Draw the structure to be used in DCT architecture with three multipliers only for realizing
the expressions ax+by and bx-ay where x, y are inputs and a,b are multipliers.
(5)
2

4. Find y =

c (n) x (n )
n=0

using distributed arithmetic algorithm given x(0)=111, x(1)=101 ,

x(2)=100 and c(0)=3, c(1)=1 and c(2)=4.

(5)
5. Assuming the starting vector to be x(0)=0.60875 and y(0)=0; compute x(1) and y(1) in
CORDIC algorithm for calculating sine(-45deg).
(5)
6. Write the condition to be satisfied by the propagation delays in the presence of positive
clock skew in an edge triggered pipelined circuit. Derive the clock period T clk to be used in
this circuit the presence of +ve and ve clock skews respectively.
(5)

VLSI DSP Test 3

1. Write an expression for computing forward 4-point DCT.
(2)
2. Obtain 2-point DCT matrix.
(3)
3. Draw the structure to be used in DCT architecture with three multipliers only for realizing
the expressions ax+by and bx-ay where x, y are inputs and a,b are multipliers.
(5)
2

4. Find y =

c (n) x (n )
n=0

using distributed arithmetic algorithm given x(0)=111, x(1)=101 ,

x(2)=100 and c(0)=3, c(1)=1 and c(2)=4.

(5)
5. Assuming the starting vector to be x(0)=0.60875 and y(0)=0; compute x(1) and y(1) in
CORDIC algorithm for calculating sine(-45deg).
(5)
6. Write the condition to be satisfied by the propagation delays in the presence of positive
clock skew in an edge triggered pipelined circuit. Derive the clock period T clk to be used in
this circuit the presence of +ve and ve clock skews respectively.
(5)

VLSI DSP Test 3

1. Write an expression for computing forward 4-point DCT.
(2)
2. Obtain 2-point DCT matrix.
(3)
3. Draw the structure to be used in DCT architecture with three multipliers only for realizing
the expressions ax+by and bx-ay where x, y are inputs and a,b are multipliers.
(5)
2

4. Find y =

c (n) x (n )
n=0

using distributed arithmetic algorithm given x(0)=111, x(1)=101 ,

x(2)=100 and c(0)=3, c(1)=1 and c(2)=4.

(5)

5. Assuming the starting vector to be x(0)=0.60875 and y(0)=0; compute x(1) and y(1) in
CORDIC algorithm for calculating sine(-45deg).
(5)
6. Write the condition to be satisfied by the propagation delays in the presence of positive
clock skew in an edge triggered pipelined circuit. Derive the clock period T clk to be used in
this circuit the presence of +ve and ve clock skews respectively.
(5)