Virtual University of Pakistan

Spring 16

CS704 Advanced Computer Architecture-II

Due Date: 11th May, 2016

Assignment 1

Instructions to Solve Assignments

The purpose of assignments is to give you hands on practice. It is
expected that students will solve the assignments themselves.
Following rules will apply during the evaluation of assignment.
Cheating from any source will result in zero marks in the
assignment.
Any student found cheating in any two of the assignments
submitted will be awarded "F" grade in the course.
No assignment after due date will be accepted.

Virtual University of Pakistan

Spring 16

Question 1: Total Points (10)

In reg-mem architecture, clock cycle is 10 ns wide. It is proposed that
reg-reg architecture be used instead, that reduces the clock cycle by 2
ns. However, it requires an additional load instruction, in some cases!
Will the new processor be more efficient, if so under what
circumstances? Quantify your answer.

Question 2: Total Points (15)

Three enhancements with the following speedups are proposed for a
new architecture.
Speedup1 = 30
Speedup2 = 20
Speedup3 = 15
Only one enhancement is usable at a time.
a. If enhancement 1 and 2 are each usable for 25% of the time,
what fraction of the time must enhancement 3 be used to
achieve an overall speedup of 10?
b. Assume, for some benchmark, the fraction of use is 15% for each
of enhancement 1 and 2 and 70% for enhancement 3. We want
to maximize performance. If only one enhancement can be
implemented, which one should it be, to achieve the best overall
performance?
c. Assume the enhancement can be used 25%, 35%, and 10% of
the time for enhancement 1, 2, and 3, respectively. For what
fraction of the reduced execution time is no enhancement in
use?

Question 3: Total Points (10+15= 25)

Read the research paper titled TransARM: An Efficient Instruction Set
Architecture Emulator, and answer the following questions.
a. How TransARM works?
b. How TransARM deals with implementation issues like executable
and linking format resolution, architecture mapping and system
call emulation?