S-Edit v13.

Tanner EDA Division

Tanner Research, Inc.
825 South Myrtle Avenue
Monrovia, CA 91016-3424
Tel: (626) 471-9700
()
102-0083 3-5-2
BUREX 6
Tel: 03-3239-2853 Web: www.tanner.jp


......................................................................................................................... 4

1.

...............................................................................................................................................5

1.1.

2.

................................................................................. 6

3.

S-EDIT ....................................................................................................... 7
...................................................................................................................................8
...........................................................................................................................9
........................................................................................................11
.............................................................................................................15

3.1.
3.2.
3.3.
3.4.

............................................................................................... 19

4.

........................................................................................................21

4.1.

5.

............................................................................................................... 23

6.

........................................................................................................... 25

7.

....................................................................................................... 26
.........................................................................................................................26

7.1.
7.1.1.
7.1.2.
7.1.3.
7.1.4.

............................................................................................................................... 26
........................................................................................................................................................... 28
........................................................................................................... 31
.................................................................................... 33

.....................................................................................................................34

7.2.
7.2.1.
7.2.2.

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....................................................................................................................................... 34

8.

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9.

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10.

................................................................................... 40

10.1.
10.2.

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.................................................................................................42

11.

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12.

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13.

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S-Edit Tutorial Version 13.0

RINGVCO

S-Edit Tutorial Version 13.0

1.
S-Edit

S-Edit Tutorial Version 13.0

1.1.

S-Edit

Courier

S-Edit
V12.6 S-Edit
Setup > Preferences > General Language Japanese

S-Edit Tutorial Version 13.0

2.
S-Edit

S-Edit [Setup]

MyDocuments\Tanner EDA\Tanner Tools v12.6\S-Edit\Tutorial

S-Edit [Help] >
[Setup Examples and Tutorial] Windows [] [
] > [S-Edit] > [Setup Examples and Tutorial]

[Help] > [Setup Examples and Tutorial] [Modify] [Repair]
[Remove] [Repair]

S-Edit Tutorial Version 13.0

3. S-Edit
1.
[File] > [Open] > Open Design [Open Design]
(
)
RingvcoRingvco.tanner
MyDocuments\Tanner EDA\Tanner Tools v12.6\SEdit\Tutorial [Open
Design] [OK]

2. RingVCO S-Edit
Library
Command/Log Properties

Properties

Library

Command /
Log

3. Ringvco
Devices, Misc, SPICE_Commands, SPICE_Elements
Library

S-Edit Tutorial Version 13.0

3.1.

4. Library

[Shift] [Ctrl]

[Filter]
[Filter] MOS
MOS

Library [Filter] Top-level

Top-level
[Filter]

[Filter] Leaves Leaves

[Filter]

[Filter] Filter

Preview

Library Preview /

5. /

/+/-

[Home]

S-Edit Tutorial Version 13.0

3.2.

6.

7. VCO RingVCO

DiffCell 1

Library
Open View

4 NMOS
NMOS
Devices

NMOS NMOS

Library [Open]

DiffCell [Open]

[Open]

control

[Cell] > [Open View]

RingVCO_TestBench

S-Edit Tutorial Version 13.0

[Ctrl]

View Symbol ( ) View Schematic ( )

DiffCell
View Symbol
DiffCell

Back Forward (
)
Forward
Back
RingVCO_TestBench. RingVCO
RingVCO DiffCell
1 Back
Forward

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10

3.3.

8. PMOS
PMOS

SD
GB

/
spice

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11

9.

S-Edit Tutorial Version 13.0

12

Properties
AD (AS) (L)
Properties
/
Properties

Add
[Delete]

L 0.25u W
2.50u PMOS , TW, M W
$PMOS TW TW=M*W
T W

TW= 1*2.50u=2.5u { }

${W} $W

ADASPDPS "if (c,a,b)", "fmod(x,y)", "floor(x)"

T-Spice Chapter 4: Input Conventions Expressions
L
WM GatePerimeterFactor
Calc.Odd Calc.OuterArea Calc
.

/
AD
(+) Display Hidden
Hidden
HiddenVisibleValuOnly
AD (+) AD
L Display Visible
/Hidden Visible/ValueOnly
Display

Display.WhenNotEvaluated
Hidden, Visible, ValueOnly

PMOS W L M Display
Visible ANNOTATE.Drain, ANNOTATE.Gate, ANNOTATE.Source
Display ValueOnly Hidden

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13

TW Display Visible
Display.WhenNotEvaluated Hidden

W
[Cancel]

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14

3.4.

10. DiffCell

2
1

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15

11. DiffCell

Library

Ringvco Devices
DiffCell Gnd 1 NMOS 2
PMOS 4 Vdd 1

12.

NMOS N1 N1
Properties

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16

NMOS Visible ValueOnly

N1

Properties

N1 L 2.00u
0.25u

Properties Reset
Properties N1
L Reset 2.00u (

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17

) 0.25u
Ctrl-Z

NMOS 2 N1 N2 Properties

L 10u

2.00u

Library

Library

PMOS
PMOS
Find PMOS

Ctrl

[Cancel]

Ctrl
Ctrl

RingVCO_TestBench

S-Edit Tutorial Version 13.0

18

4.
13. 3.3

*/** sin()
cos()

%T ( %{T}) T
(10.2

$P

TW=$W*$M
Cadence iPar()

?P 1

Cadence pPar()

@P (@{P})P
TOP MID MID
BOT BOT P
MIDINST.P MIDSYM.P
BOTINST.PBOTSYM.P

4 PMOS
TW=${W}*${M} TW $

DiffCell P4 ()
Properties W ?W
?W 1 DiffCell
W DiffCell W
?WP RingVCO
1 WP 5.00u
P4 W 5.00u

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19

Push into context (

Pop context ( )
RingVCO_TestBench VCO
Push into context VCO
VCO
VCO 3 DiffCell
Xa3

RingVCO_TestBench
RingVCO X1 DiffCell
Xa3
RingVCO_TestBench/X1/Xa3

Display Evaluated Properties

(
) P4 W
5u Properties
Properties

P1 ( PMOS ) ADASPDPS

Display Evaluated Properties

<property is not evaluated>

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20

4.1.

14.

DC
DC
DC

2 3 DC

3 4 PMOS

ANNOTATE.Source = [annotate port S]

ANNOTATE.Drain = [annotate port D]
ANNOTATE.Gate = [annotate port G]
ANNOTATE.Bulk = [annotate port B] (4 PMOS )

i)
ii)
annotate port
4 PMOS

annotate ()
DC DC DC

Display Evaluated Properties

RingVCO_TestBench Tools > Design Checks

VCO VCO
DiffCell Xa3
Display Evaluated Properties
( Name
)ANNOTATE S,G,D
B Display Hidden

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21

Display Evaluated Properties Net annotate

Vdd, X1/Vb1, X1/Vb2,
X1/Xa3/N_1, and X1/Xa3/N_20

None

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22

5.
15. tcl
tcl

4 PMOS
LCheckSpecificDimension

DiffCell P1
L 0.25u L 0.25 u

CheckSpecificDimension

proc CheckSpecificDimension {
nMinMaxBoth sMinimumDimension
{ sProcName "" } } {
global dMfgGrid
global gdTOLERANCE
set dMinimumDimension [
set dMaximumDimension [
set dDimension [ stod [

sDimensionName sPropertyName
sMaximumDimension

stod $sMinimumDimension ]
stod $sMaximumDimension ]
property get $sPropertyName ] ]

set dSnappedDimension [ gNearestMultiple $dDimension

$dMfgGrid ]
if { [expr abs($dDimension-$dSnappedDimension) ] >
$gdTOLERANCE } {
set sMsg "$sDimensionName is not on the
manufacturing grid. $sDimensionName has been
snapped to [dtos $dSnappedDimension]"
tk_messageBox -message $sMsg -type ok -icon error
property set $sPropertyName -value [dtos

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23

$dSnappedDimension ]
set dDimension $dSnappedDimension
}
set sMsg ""
if { ($nMinMaxBoth == 0) && ($dDimension <
$dMinimumDimension) } {
set sMsg "$sDimensionName is too small. [dtos
$dMinimumDimension] <= $sDimensionName"
} elseif { ($nMinMaxBoth == 1) && ($dDimension >
$dMaximumDimension) } {
set sMsg "$sDimensionName is too big.
$sDimensionName <= [dtos $dMaximumDimension]"
} elseif { ($nMinMaxBoth == 2) && (($dDimension <
$dMinimumDimension) || ($dDimension >
$dMaximumDimension)) } {
set sMsg "$sDimensionName is out of range.
[dtos $dMinimumDimension] <= $sDimensionName
<= [dtos $dMaximumDimension]"
}
if { $sMsg != "" } {
tk_messageBox -message $sMsg -type ok -icon error
return $sMsg
}
if { $sProcName != "" } {
eval $sProcName
}
}

S-Edit

tcl

scripts\open.design
GeneralCallbacks.tcl
Devices \scripts\open.design\

S-Edit

S-Edit

S-Edit Tutorial Version 13.0

C:\Documents and Settings\<username>\Application

Data\Tanner EDA\scripts\open.design
C:\Documents and Settings\<username>\Application
Data\Tanner EDA\scripts\startup
C:\Documents and Settings\<username>\Application
Data\Tanner EDA\scripts\shutdown

24

6.
16.

[File] > [Save]

[File] > [Save] > [Save Design DesignName]

[File] > [Save] > [Save Design DesignName and Its Libraries]

[File] > [Save] > [Save # Selected Design/Libraries] Library

/

[Save Copy of ] Library

[Save
Copy of ] [Save As]

S-Edit Tutorial Version 13.0

25

7.
7.1.

17.
inverter_finished

Inverter [Cell] > [New View]

Ringvco
[New View]
Design:
Cell:
View type:
View name:
Interface name:

7.1.1.

Ringvco
Inverter
schematic
view_1
view_1

[OK]

Devices PMOS
[Instance] [Instance Cell]
+/-
/

[Instance Cell]
Instance Name
P1
PMOS4 (4
PMOS)

PMOS
(0.000, 0.000)

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26

[Instance Cell]

PMOS
HV
R

[Instance Cell] 1
PMOS

[Instance Cell] Instance Name

[Instance Cell] Design Cell name

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27

[Instance Cell] NMOS N1

NMOS4
PMOS 1 2
NMOS

NMOS Gnd
PMOS Vdd Gnd Vdd
Misc

[ESC] [Instance Cell]

[Done]

Vdd

PMOS

NMOS

Gnd

7.1.2.

2 MOSFET (G)
Wire (
)

S-Edit Tutorial Version 13.0

28


[ESC]

2 PMOS

NMOS

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29

PMOS Vdd NMOS

Gnd

PMOS
Vdd

NMOS

Gnd

S-Edit Tutorial Version 13.0

30

7.1.3.

/
In Port
( )

AOrientation West[OK]

Enable Auto-repeat

[Confirm text of each object]

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31

[Confirm text of each object]

[ESC]
Auto-repeat

Y2
)
(
Right

S-Edit Tutorial Version 13.0

32

7.1.4.

18. SEdit

PMOS
Vdd
Select ( )

[Draw] > [Force Move([ALT] + M

)
[Force Move] PMOS

[Edit] > [Undo] (Ctrl+Z)

S-Edit Tutorial Version 13.0

33

7.2.

19.

[Cell] > [New View] Ringvco

Inverter Symbol [View
name] [Interface name] view_1

[OK]

7.2.1.

S-Edit [Cell] >

[Update Symbol] S-Edit

[Update Symbol]

[Update
Symbol]

7.2.2.

S-Edit Tutorial Version 13.0

34

 Path ( )
All Angle ( )

[Update Symbol] Select

( ) (
)[Delete]

Properties

S-Edit Tutorial Version 13.0

35

8.
20. S-Edit

1

21. RingVCO_TestBench

inverter_finished

RingVCO_TestBench Inverter

inverter

S-Edit Tutorial Version 13.0

36

Out Inverter

PrintVoltage
Inverter
PrintVoltage Buffered

[Tools] > [Design Checks] Design Checks (

)

# CHK : : RingVCO_TestBench "A" ( "Buf"# CHK : :

RingVCO_TestBench "Y" ( "Buf")
# CHK : : RingVCO_TestBench Out
# CHK : : RingVCO_TestBench Buffered
# CHK : : RingVCO_TestBench : "Buffered" :

# SED : Ringvco and 0 libraries, ,2 0

5

A /

Out inverter
Buffered PrintVoltage

S-Edit Tutorial Version 13.0

37

9.
22.

RingVCO_TestBench
VCO
In

In

VCO

DiffCell Xa9

S-Edit Tutorial Version 13.0

38

DiffCell Outp

RingVCO Outm [Tools] > [Highlight

Net] Highlight Net ( )

[Highlight Net]

[Command]
find net Vtune Vtune

S-Edit Tutorial Version 13.0

39

10.
23. T-Spice Spice

RingVCO_TestBench

RingVCO_TestBench DC
AC
Print

Simulation Setup [Simulation Setup]

DC Operating Point AnalysisTransient
Analysis

Transient Analysis
Stop Time 100nStep Time 100p Start Time 0s
Powerup Startup

S-Edit Tutorial Version 13.0

40

10.1.

[Simulation Setup] [OK]

Simulate ( )
W-Edit PrintVoltage

S-Edit Tutorial Version 13.0

41

10.2.

Probe Voltage ( )

W-Edit *.dat

Probe Voltage RingVCO_TestBench

OutP OutP W-Edit

Voltage Probe
VCO (x1 )

Probe
RingVCO

(Outp) Probe

S-Edit Tutorial Version 13.0

42

 Outp

Probe DiffCell 3
(Xa3) Probe
Push into context (
Pop context (

W-Edit

S-Edit Tutorial Version 13.0

43

Probe Current , (
)

N1

W-Edit

S-Edit Tutorial Version 13.0

44

)
Probe Charge , (

PMOS

Spice T-Spice
T-Spice
RingVCO_TestBench TSpice (

S-Edit Tutorial Version 13.0

45

11.
24. RingVCO_TestBench
VCO DiffCell 3
Xa3
DC
(

)
Display Evaluated Properties Voltage
DC

Display Evaluated Properties Current

DC

S-Edit Tutorial Version 13.0

46

12.
25. S-Edit

ID

array_name<n1:n2:step>
array_name<n> n
n1 n2 step
Step 1
U<0:7> U<1>U<2>U<7>
2

U<n1:n2:step1><n3:n4:step2>
2
U<0:7><0:3>

U<0><0>, U<0><1>, U<0><2>, U<0><3>,

U<1><0>, U<1><1>, U<1><1>, U<1><3>,
U<2><0>, U<2><1>, U<2><1>, U<2><3>,

U<7><0>, U<7><1>, U<7><1>, U<7><3>

bus_name<n1:n2:step> bus_name<n>
n n1 n2
Step Step
1 A<0:7>
A<1>A<2> A<7> 8
2 bus_name
<n1:n2:step1><n3:n4:step2>
2

26.

RingVCO_ArrayBus RingVCO
RingVCO_ArrayBus
DiffCell RingVCO

S-Edit Tutorial Version 13.0

47

DiffCell DiffCell<0:8> 9
DiffCell Outm,
N<0:7> DiffCell inp N<0:7>,
Outm DiffCell Outm
bus_name<n1:n2, step>

RingVCO_TestBench RingVCO
RingVCO_ArrayBus

T-Spice (
)
RingVCO_TestBench Spice Spice

T-Spice Simulate T-Spice

27. S-Edit
C:\Documents and Settings\<username>\My
Documents\Tanner EDA\Tanner Tools v12.6\S-Edit\Examples

S-Edit Tutorial Version 13.0

48

13.
28. [Setup]

MajorMinorSnap

(mmcm)

tcl

Allow Edit

Selection

Text Editor

[Setup] > [Technology] > [Schematic Colors]

S-Edit Tutorial Version 13.0

49

WiresGraphics

[To/From folder] {project setup folder} [Save]

[Setup]

S-Edit Tutorial Version 13.0

50