Professional Documents
Culture Documents
Selva Digital
Selva Digital
Binary logic consists of binary variables and logical operations. The variables are designated
by the alphabets such as A, B, C, x, y, z, etc., with each variable having only two distinct values: 1
and 0. There are three basic logic operations: AND, OR, and NOT.
7). Define logic gates?
Logic gates are electronic circuits that operate on one or more input signals to produce an
output signal. Electrical signals such as voltages or currents exist throughout a digital system in
either of two recognizable values. Voltage- operated circuits respond to two separate voltage levels
that represent a binary variable equal to logic 1 or logic 0.
8).Define duality property.
Duality property states that every algebraic expression deducible from the postulates of
Boolean algebra remains valid if the operators and identity elements are interchanged. If the dual of
an algebraic expression is desired, we simply interchange OR and AND operators and replace 1s by
0s and 0s by 1s.
9).Find the complement of the functions F 1= xyz + xyz and F2= x(yz + yz) by applying De
Morgans theorem as many times as necessary.
F1 = (xyz + xyz) = (xyz)(xyz) = (x + y + z)(x + y +z)
F2 = [x(yz + yz)] = x + (yz + yz) = x + (yz)(yz)
= x + (y + z)(y + z)
10).Find the complements of the functions F1 = xyz + xyz and F2 = x(yz + yz) by taking
their duals and complementing each literal.
F1= xyz + xyz. The dual of F1 is (x + y + z)(x + y + z).
Complementing each literal: (x + y + z)(x + y + z)
F2= x(yz + yz). The dual of F2 is x + (y + z)(y + z).
Complement of each literal: x + (y + z)(y + z)
11).State De Morgans theorem.
De Morgan suggested two theorems that form important part of Boolean algebra. They are,
1) The complement of a product is equal to the sum of the complements. (AB) = A + B 2) The
complement of a sum term is equal to the product of the complements. (A + B) = AB
12).Reduce A.AC
A.AC = 0.c [A.A = 1] = 0
13). Reduce A(A + B)
A(A + B) = AA + AB = A(1 + B) [1 + B = 1] = A.
14. Reduce ABC + ABC + ABC
ABC + ABC + ABC = AC(B + B) + ABC = AC + ABC [A + A = 1]
= A(C + BC) = A(C + B) [A + AB = A + B]
15.) Reduce AB + (AC) + ABC(AB + C)
AB + (AC) + ABC(AB + C) = AB + (AC) + AABBC + ABCC
= AB + (AC) + ABCC [A.A = 0]
= AB + (AC) + ABC [A.A = 1]
= AB + A + C =ABC [(AB) = A + B]
= A + B + C + ABC [A + AB = A + B]
= A + BC + B + C [A + AB = A + B]
= A + B + C + BC
=A + B + C + B
=A + C + 1
= 1 [A + 1 =1]
56. Find the excess -3 code and 9s complement of the number 403 10
403
010000000011
001100110011+
0 1 1 1 0 0 1 1 0 1 1 0 excess 3 code
9s complement 1 0 0 0 1 1 0 0 1 0 0 1
57. Write the names of basic logical operators.
1. NOT / INVERT 2. AND 3. OR
58. Simplify the following expression
y = (A + B) (A = C) (B + C)
= (A A + A C + A B + B C) (B + C)
= (A C + A B + B C) (B + C)
= AB C + AC C + AB B + AB C + B B C + B C C
= AB C = AB C
59. Show that the NAND connection is not associative
The NAND connection is not associative says that
A . B . C A . B. C
A. B + C A+ B C
AB + C A + BC
60. What is a Logic gate?
Logic gates are the basic elements that make up a digital system. The electronic gate is a
circuit that is able to operate on a number of binary inputs in order to perform a particular logical
function.
61. Write the names of Universal gates.
1. NAND gate 2. NOR gate
62. Why are NAND and NOR gates known as universal gates?
The NAND and NOR gates are known as universal gates, since any logic function can be
implemented using NAND or NOR gates.
63. Define combinational logic
When logic gates are connected together to produce a specified output for certain specified
combinations of input variables, with no storage involved, the resulting circuit is called
combinational logic.
64. Explain the design procedure for combinational circuits
The problem definition The determination of number of available input variables &
required O/P variables. Assigning letter symbols to I/O variables Obtain simplified boolean
expression for each O/P. Obtain the logic diagram.
65. Define half adder and full adder
The logic circuit which performs the addition of two bits is a half adder. The circuit which
performs the addition of three bits is a full adder.
66. Define Decoder?
A decoder is a multiple - input multiple output logic circuit which converts coded inputs into
coded outputs where the input and output codes are different.
67. What is binary decoder?
A decoder which has an n-bit binary i/p code and a one activated output out of 2l. output
code is called binary decoder. It is used when it is necessary to activate exactly one of 2 n out puts
based on an n - bit input value.
10
11
3.
4.
5.
6.
7.
8.
12
2.
3.
5.
7.
Design an asynchronous sequential circuit that has two inputs X1 and X1 and one output Z.
When X1=0, the output Z is 0. The first change in X2 that occurs while X1 is 1 will cause
output Z to be 1. The output Z will remain 1 until X1 returns to 0. (Refer pg: 6.18-6.21 in
Godse)
Design a pulse mode circuit having two input lines X1 and X2 and one output line Z. The
circuit should produce an output pulse to coincide with the last input pulse in the sequenceX1,
X2, X2. No other input sequence should produce an output pulse. (Refer pg: 6.34 6.35 in
Godse)
Draw the state diagram and obtain the primitive flow table for a circuit with two inputs x1 and
x2 and two outputs z1 and z2 that satisfies the following conditions.
1. When x1x2=00, output z1z2=00.
2. When x1=1 and x2 changes from 0 to 1, the output z1z2=01.
3. When x2=1 and x1 changes from 0 to 1, output z1z2=10.
4. Otherwise output does not change. ( Refer pg: 6.26, 6.27 in Godse)
Define the following: i) asynchronous sequential circuits, ii) Cycles, iii) critical race,
iv) non- critical race v) race vi) flow table vii) primitive flow table viii) stable state ( Refer
notes)
An asynchronous sequential circuit has two internal states and one output. The excitation and
output function describing the circuit are as follows.
Y1=x1x2+x1y2+x2y1
Y2=x2+x1y1y2+x1y1
Z=x2+y1 (refer 6.24 6.26 in Godse)
UNIT IV
1.
2.
3.
4.
5.
6.
7.
8.
Design a combinatorial circuit using ROM and PLA. The circuit accepts 3-bit number and
generates an output binary number equal to square of input number. (Refer pg: S.6, S7 in
Godse)
Write a descriptive note on memories. (Refer pg: 71, 72 in Godse)
Discuss on the concept and applications of ROM, PROM and EPROM (Refer pg: 7.2 7.6 in
Godse)
Discuss on the working of FPGA, PLA, PAL, PROM ( Refer section 8.2,3,4,5 in Godse)
Give the comparison between PROM, PLA, and PAL (Refer pg: 8-31 in Godse)
Implement the following Boolean function using PAL (Refer pg: 8.19-8.21 in Godse)
W(A,B,C,D) = m(0,2,6,7,8,9,12,13)
x(A,B,C,D) = m(0,2,6,7,8,9,12,13,14)
y(A,B,C,D) = m(2,3,8,9,10,12,13)
z(A,B,C,D) = m(1,3,4,6,9,12,14)
Realize the functions given using a PLA with 6 inputs, 4 outputs and 10 AND gates
f1(A,B,C,D,E,F) = m(0,1,7,8,9,10,11,15,19,23,27,31,32,33,35,39,40,41,47,63)
f2(A,B,C,D,E,F) = m(8,9,10,11,12,14,21,25,27,40,41,42,43,44,46,57,59) (Refer pg: 8.42
8.44 in Godse)
Draw the circuit of a CMOS two input NAND gate and NOR gate and explain its operation.
(Refer pg: 9.38 9.41 in Godse)
13
9.
10.
Expalin about basic circuit and NOR gate of ECL with its characteristics. (Refer pg: 9.48
9.50 in Godse)
Explain about TTL, its wired logic and about the totem pole output, three state output TTL
with its characteristics. (Refer pg: 9.13 9.36 in Godse)
UNIT V
1.
2.
3.
4.
5.
6.
7.
8.
Expalin the block diagram of a typical processor unit with control signals and Arithmetic unit
( Refer pg: 10.38 10.40 and 10.26 10.29 in Godse)
Design ALU, Shift register and Shifter with its logic Diagram. (Refer pg: 10.30 -10.38 in
Godse)
Design Simple Computer with its Block diagram. (Refer pg: 10.21 -1010.25 in Godse)
Write an HDL program for full adder and 4-bit Comparator (Refer pg: 11.62, 11.67-11.68 in
Godse)
Write an HDL behavioural description of JK flip-flop using if-else statement based on the
value of the present state. (Refer pg: S.8 in Godse)
Write a VHDL code for a serial adder (Refer Notes)
Write a VHDL code for a T flip-flop (Refer Notes)
Write a VHDL code for FSM. (Refer Notes)