Microcontrollers

Mahesh G S
E&E-Dept,
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REVA ITM, Bangalore
Application

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HyperTerminal based Home Automation

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COMPUTER

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MICROCONTROLLER

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 Introduction to microcontrollers

• Microcontrollers
• CPU + I/O + Timer(s) [+ ROM] [+ RAM]
• Low to moderate performance only
• Limited RAM space, ROM space and I/O pins
• EPROM version available
• Low chip-count to implement a small system
• Low-cost at large quantities
• Development tools readily available at reasonable cost

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Summary of features of the standard 8051

1. 4K bytes internal ROM (program)

2. 128 bytes internal RAM (data)
3. Four 8-bit I/O ports
4. Two 16-bit timers
5. Serial interface
6. 64K external code memory space
7. 64K external data memory space
8. 210 bit-addressable locations
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Different Microcontrollers

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VON NEUMANN ARCHITECTURE AND
HARVARD ARCHITECTURE

•A microprocessor that fetches instruction and

data using a single bus is called Von Neumann or
Princeton architecture.

•In Von Neumann architecture, data memory

(RAM) and Program memory (ROM) are
connected by using single address and data bus.

•In Harvard architecture, program memory and

data memory are connected using separate
address and data bus to achieve fast execution
speed for a given clock rate.

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VON NEUMANN ARCHITECTURE

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HARVARD ARCHITECTURE

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 RISC AND CISC MACHINES

• The microcontrollers with small instruction set are

called Reduced Instruction Set Computer (RISC)
machines and those with complex instruction set are
called Complex Instruction Set Computer (CISC)
machines.

• Intel 8051 microcontroller is an example of CISC

machine and Microchip PIC16F87X is an example of
RISC machine.

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COMPARISON OF RISC AND CISC

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Block Diagram of Microcontroller 8051

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 8051 Port bit latches

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Port 0 and Port 1 Port 2 and Port 3
Pin diagram of 8051

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Memory Space

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Bit Addressable RAM

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Register Banks

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8051 ADDRESSING MODES AND INSTRUCTION SET
INSTRUCTION SYNTAX

•Label :The label is the symbolic address for the instruction. As the program is
assembled, the label will be given the value of the address in which the instruction is
stored.

•This facilitates referencing of the instruction at any point in the given program.
Of course, not all instructions will have labels.

•It is not necessary to define a symbol for the address of an instruction, unless that
address is needed by a branch statement elsewhere in the program.

•A label can be any combination of upto8 letters (A–Z), numbers (0–9) and period
(.).

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 INSTRUCTION SYNTAX
•Opcode: The opcode field contains a symbolic representation of the operation.
The operation tells the assembler what action the statement has to perform. The
8051 assembler converts the opcode into a unique machine language (binary
code) that can be acted on by the 8051 internal circuitry.

•Operand: The opcode specifies what action to perform, whereas the operand
indicates where to perform the action. The operand field contains the address of
the operand or the operand.

•Comment: To improve program clarity, a programmer uses comments

throughout the program. A comment always begins with a semicolon (;) and
wherever we code it, the assembler assumes that all characters to its right are
comments.

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8051 DATA TYPES

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 SUBROUTINES
SUBROUTINES•Good program design is based on the concept of modularity,the
partitioning of a large program into subroutines.

•A subroutine is a sequence of instructions stored in the memory at a specified

address for performing repeatedly needed tasks. Subroutines are usually handled
by special instructions, CALL and RET.

•The CALL instruction is of the form CALL address. The address refers to the
address of the subroutine. When CALL instruction is executed, the contents of the
program counter are saved in the stack and the program counter is loaded with the
address, which is a part of CALL instruction.

•The RET instruction is usually the last instruction in the subroutine. When this
instruction is executed, the return address previously saved in the stack is retrieved
and is loaded into the program counter. Thus, the control is transferred to the
calling program.

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SUBROUTINE PROCESSING

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 ADDRESSING MODES
A microcontroller provides, for the convenience of the programmer, various
methods for accessing data needed in the execution of an instruction.

The various methods of accessing data are called addressing modes. The 8051
addressing modes can be classified into the following categories

1.Immediate addressing 6.Absolute addressing

2.Register addressing 7.Long addressing

3.Direct addressing 8.Indexed addressing

4.Indirect addressing 9.Bit inherent addressing

5.Relative addressing 10.Bit direct addressing

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 IMMEDIATE ADDRESSING
• Immediate addressing means that the data is provided as part of the
instruction (which immediately follows the instruction opcode).

Syntax : MOV Rn, #DATA

Examples :
MOV A, # 20H
MOV R2, # 60H
MOV DPTR ,# 32H

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 REGISTER ADDRESSING
•Register addressing mode involves the use of registers to hold the data to be
manipulated. The lowest 32 bytes of the 8051 internal RAM are organized as four
banks of eight registers. Only one bank is active at a time. Using names, R0 to R7
can access any active register. One of the eight general registers (R0 to R7) can
be specified as the instruction operand. The assembly language documentation
refers to a register generically as Rn.

Syntax : MOV Rn,A and MOV A,Rn

Example : MOV A,R2
MOV R3,A

MOV R1,R2 Invalid Instruction

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 DIRECT ADDRESSING
Direct addressing mode is provided to allow us access to internal data memory,
including Special Function Register (SFR). In direct addressing, an 8 bit internal
data memory address is specified as part of the instruction and hence, it can
specify the address only in the range of 00H to FFH. In this addressing mode, data
is obtained directly from the memory.

Syntax : MOV A, addr

Exaples :
MOV A,30H
MOV R1,75H
MOV 52H,#22H

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 INDIRECT ADDRESSING
Indirect addressing provides a powerful addressing capability, which needs to be
appreciated. The indirect addressing mode uses a register to hold the actual
address that will be used in data movement. Registers R0, R1, and DPTR are the
only registers that can be used as data pointers. Indirect addressing cannot be used
to refer to SFR registers. Both R0 and R1 can hold 8 bit address and DPTR can
hold 16 bit address

Syntax : MOV Rn,# data

MOV @Rn, A
MOV A, @Rn
MOV @Rn, addr

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 INDEXED ADDRESSING
•In indexed addressing, a separate register—either the program counter (PC), or the
data pointer (DTPR) is used to hold the base address, and the A is used to hold the
offset address.
•Adding the value of the base address to the value of the offset address forms the
effective address.
•Indexed addressing is used with JMP or MOVC instructions. Look up tables are easily
implemented with the help of index addressing.

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 RELATIVE ADDRESSING
•Relative addressing is used only with conditional jump instructions. The relative
address, often referred to as an offset, is an 8 bit signed number, which is
automatically added to the PC to make the address of the next instruction.

•The 8 bit signed offset value gives an address range of +127 to –128 locations. The
jump destination is usually specified using a label and the assembler calculates the
jump offset accordingly.

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 ABSOLUTE ADDRESSING
•Absolute addressing is used only by the AJMP (Absolute Jump) and ACALL
(Absolute Call) instructions.
•These are 2 bytes instructions. The absolute addressing mode specifies the lowest
11 bit of the memory address as part of the instruction.
•The upper 5 bit of the destination address are the upper 5 bit of the current program
counter.
•Hence, absolute addressing allows branching only within the current 2 K byte page
of the program memory.

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LONG ADDRESSING AND BIT INHERENT ADDRESSING

•The long addressing mode within the 8051 is used with the instructions LJMP
and LCALL. These are 3 byte instructions.

•The address specifies a full 16 bit destination address so that a jump or a call
can be made to a location within a 64 K byte code memory space.

•Bit Inherent: In this addressing, the address of the flag which contains the
operand, is implied in the opcode of the instruction

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BIT DIRECT ADDRESSING
•The RAM space 20H to 2FH and most of the special function registers are bit
addressable. Bit address values are between 00H to 7FH.

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ASSEMBLER DIRECTIVES
The following are the widely used 8051 assembler directives.

ORG (origin)

EQU

DB (define byte)

END

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Stack Pointer
• Stack pointer (SP) is an 8-bit register at address 81H

• It contains the address of the data item currently on top of the stack.

• Stack operations include pushing data on the stack and popping data
off the stack

• Pushing increments SP before writing the data

• Popping from the stack reads the data and decrements the SP
• 8051 stack is kept in the internal RAM

• Depending on the initial value of the SP, stack can have different sizes

• Example: MOV SP,#5FH

• On 8051 this would limit the stack to 32 bytes since the

uppermost address of on chip RAM is 7FH.

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Stack and Data Pointers
• The default value of SP (after system reset) is 07H.

• This result in the first stack write operation to store data in location 08H
which means that register bank 1 (and possible 2 and 3) are not available

• User may initialize the SP to avoid this

• Data pointer (DPTR): is used to access external data or code

• DPTR is a 16 bit register at addresses 82H (low byte) and 83H (high byte)
• Example: the following instructions write 55H into external

RAM location 1000H:

MOV A,#55H

MOV DPTR,#1000H

MOVX @DPTR,A

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Look-Up Tables
• MOVC loads the accumulator with a byte from code (program) memory

• The address of the byte fetched is the sum of the original unsigned 8-bit
accumulator contents and the content of a 16-bit register (either the data
pointer or PC). In the latter case, the PC is incremented to the address of
the following instruction before being added to the accumulator

MOVC A, @A+DPTR
MOVC A,@A+PC

• This instruction is useful in reading data from LUT’s.

• DPTR or PC is initialized to the beginning of the LUT and the index

number of the desired entry is loaded into the accumulator.

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Boolean Instructions
• 8051 contains a complete Boolean processor for single-bit operations.

• All bit accesses use direct addressing

• Bits may be set or cleared in a single instruction

• Example: SETB P1.7 CLR P1.7

• Carry bit in PSW is used as a single-bit accumulator for Boolean operations.

• Bit instructions that refer to carry bit as C are assembled as carry specific
Instructions

• Carry also has a mnemonic representation (CY) which can be used in

connection with non-carry-specific instructions.

• Example:
CLR C
CLR CY
Both do the same. First one is 1 byte and the second one is 2-bytes
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Conditional Jump
• The 8051 offers a variety of conditional jump instructions

• JZ and JNZ tests the accumulator for a particular condition

• DJNZ (decrement and jump if not zero) is a useful instruction for

building loops

• To execute a loop N times, load a register with N and terminate the

loop with a DJNZ to the beginning of the loop

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• CJNE (compare and jump if not equal) is another conditional jump
instruction

• CJNE: two bytes in the operand field are taken as unsigned integers. If the
first one is less than the second one, the carry is set

• Example: It is desired to jump to BIG if the value of the accumulator is

greater than or equal to 20H
CJNE A,#20H,$+3
JNC BIG
– $ is an assembler symbol representing the address of the current
Instruction

– Since CJNE is a 3-byte instruction, $+3 is the address of next instruction

JNC

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Program to exchange the lower nibble of data present in external memory

6000H and 6001H

ORG 0000H ;Set program counter 0000h

MOV DPTR , # 6000H ;copy address 6000h to DPTR

MOVX A, @DPTR ;copy contents to A

MOV R0, #45H ; load R0 = 45H

MOV @R0, A : Copy contents of A in RAM

INC DPL : increment lower order address of DPTR

MOVX A, @DPTR :copy contents of 6001H into A

XCHD A, @R0 :exchange the lower nibble of A and R0

MOVX @DPTR, A ;Store in contents of A in 6001H

DEC DPL ; decrement lower order of DPTR

MOV A, @R0 ;copy contents of @R0 into A

MOVX @DPTR, A :Store in 6000H 49
END
Time Delay Calculations
Example : If 8051 microcontroller is operated with 12MHz oscillator,
find the execution time for the following 4 instructions

(a)ADD A, 45H (b) SUBB A, #55H (c) MOV DPTR, #2000H (d)
MUL AB

Sol : Since the oscillator frequency is 12MHz ,the clock period is

Clock period = 1/12 MHz = 0.0833E-6 sec
Time for 1 Machine cycle = 0.0833e-6 x 12 = 1e-6 sec

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Instruction Execution time in machine cycle Execution Time

ADD A, 45H 1 Machine cycles 1E-6 sec

SUBB A, #55H 2 Machine cycles 2E-6 sec

MOV DPTR, #2000H 2 machine cycles 2E-6 sec

MUL AB 4 Machine cycles 4E-6 sec

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Example 2 :Calculate the delay provided by the given 8051 assembly language
program with a crystal frequency of 11.0592MHz.

Sol: Machine cycle

MOV R0, # 80H 2
HERE : DJNZ R0, HERE 2 x 80H

Total Machine cycles 258

Total Time taken to execute these instructions is

=12 X (1/crystal frequncy ) X Total machine cycles

= 12 X (1/11.0598 MHz) X 258

= 280 E-6 sec

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Example Project

•Keyless Door lock

–The door is opened by a 4 digit password entered via a keypad
–2 LED’s show the status of the lock
–A solenoid is used to open/close the door latch

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 Keil C51 Cross Compiler
•ANSI C Compiler
–Generates fast compact code for the 8051 and it’s derivatives

•Advantages of C over Assembler

–Do not need to know the microcontroller instruction set
–Register allocation and addressing modes are handled by the compile
–Programming time is reduced
–Code may be ported easily to other microcontrollers

•C51 supports a number of C language extensions that have been

added to support the 8051 microcontroller architecture e.g.
–Data types
–Memory types
–Pointers
–Interrupts

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 Basic microcontroller in C Programming
C is a high level programming language that is portable across many hardware
architectures. This means that architecture specific features such as register
definitions, initialization and start up code must be made available to your program
via the use of libraries and include files.

For the 8051 chip you need to include the file reg51.h

#include <reg51.h>

These files contain all the definitions of the MC8051 registers.

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Basic C program structure

// Basic blank C program that does nothing

//-------------------------------------------------
// Includes
//-------------------------------------------------

#include <reg51.h>
void main (void)
{
// variable declaration and initialization

// code
}

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//program to add 2 8-bit variables

void main( )
{
unsigned char data num1, num2, result;
num1 = 10;
num2 = 25;
result = num1 + num2;
}

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 C51 Data Types

Data Type Bits Range

Bit 1 0,1

unsigned char 8 0 to 255

signed char 8 -128 to +127

unsigned int 16 0 to 65535

signed int 16 -32768 to +32767

unsigned long 32 0 to 4294967296

signed long 32 -2147483648 to + 2147483647

Sbit 1 0,1

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 C51 Memory Types

•Memory type extensions allow access to all 8051 memory types.

–A variable may be assigned to a specific memory space

•code
–Program memory.
–unsigned char code const1 = 0x55;//define a constant
–char code string1[ ] = “hello”;//define a string

•data
–Lower 128 bytes of internal data memory
–unsigned int data x;//16-bit variable x

•idata
–All 256 bytes if internal data memory

•bdata
–Bit addressable area of internal data memory

•xdata
–External data memory (512 bytes of on-chip auxiliary data RAM)
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//program to flash an LED connected to Port 2 pin 0 every second

#include <reg51.h>
sbitLED = P2^0;
void delay();

void main()
{

while (1)
{
LED = 0;//LED off
delay();
LED = 1;//LED on
delay();
}
}
//Delay function
void delay()
{
……. 60
}
Relational Operators

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Logical Operator

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Bitwise Logical Operator

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Timers/Counters
The 8051 comes equipped with two timers, both of which may be controlled, set,
read, and configured individually. The 8051 timers have three general functions:

1) Keeping time and/or calculating the amount of time between events,

2) Counting the events themselves, or

3) Generating baud rates for the serial port

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Timer SFRs
the 8051 has two timers which each function essentially the same way. One
timer is TIMER0 and the other is TIMER1. The two timers share two SFRs
(TMOD and TCON) which control the imers, and each timer also has two
SFRs dedicated solely to itself (TH0/TL0 and TH1/TL1).

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The TMOD SFR
The TMOD SFR is used to control the mode of operation of both timers.
Each bit of the SFR gives the microcontroller specific information concerning
how to run a timer. The high four bits (bits 4 through 7) relate to Timer 1
whereas the low four bits (bits 0 through 3) perform the exact same
functions, but for timer 0.
The individual bits of TMOD have the following functions:

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Four bits (two for each timer) are used to specify a mode of operation. The
modes of operation are:

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13-bit Time Mode (mode 0)
Timer mode "0" is a 13-bit timer. When the timer is in 13-bit mode, TLx will
count from 0 to 31. When TLx is incremented from 31, it will "reset" to 0 and
increment THx. Thus, effectively, only 13 bits of the two timer bytes are being
used: bits 0-4 of TLx and bits 0-7 of THx. This also means, in essence, the
timer can only contain 8192 values. If you set a 13-bit timer to 0, it will
overflow back to zero 8192 machine cycles later.

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16-bit Time Mode (mode 1)
Timer mode "1" is a 16-bit timer. This is a very commonly used mode. It
functions just like 13-bit mode except that all 16 bits are used. TLx is
incremented from 0 to 255. When TLx is incremented from 255, it resets to 0
and causes THx to be incremented by 1. Since this is a full 16- bit timer, the
timer may contain up to 65536 distinct values. If you set a 16-bit timer to 0, it
will overflow back to 0 after 65,536 machine cycles.

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8-bit Time Mode (mode 2)
Timer mode "2" is an 8-bit auto-reload mode. What is that, you may ask?
Simple. When a timer is in mode 2, THx holds the "reload value" and TLx is the
timer itself. Thus, TLx starts counting up. When TLx reaches 255 and is
subsequently incremented, instead of resetting to 0 (as in the case of modes 0
and 1), it will be reset to the value stored in THx. For example, let’s say TH0
holds the value FDh and TL0 holds the value FEh.

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Split Timer Mode (mode 3)
Timer mode "3" is a split-timer mode. When Timer 0 is placed in mode 3, it
essentially becomes two separate 8-bit timers. That is to say, Timer 0 is TL0
and Timer 1 is TH0. Both timers count from 0 to 255 and overflow back to 0. All
the bits that are related to Timer 1 will now be tied to TH0.

While Timer 0 is in split mode, the real Timer 1 (i.e. TH1 and TL1) can be put
into modes 0, 1 or 2 normally--however, you may not start or stop the real timer
1 since the bits that do that are now linked to TH0. The real timer 1, in this
case, will be incremented every machine cycle no matter what.

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INTERRUPTS
1. Interrupt is an input to a processor, whereby an external device or a
peripheral can inform the processor that it is ready for
communication.

2. When peripheral devices activate an interrupt signal, the processor

branches to a program called interrupt service routine.

3. This program is written by the user for performing tasks that the
interrupting device wants the processor.

Note :The interrupts are enabled using the IE register.

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INTERRUPT SERVICE SUBROUTINE
•When peripheral devices interrupt the processor, branching takes place to
interrupt service subroutine. Before branching, the actions taken by the
processor are as follows:

1. It completes the execution of current instruction.

2. Program status word register value is pushed onto the stack.

3. Program counter value is pushed onto the stack.

4. Interrupt flag is reset.

5. Program counter is loaded with Interrupt Service Subroutine

(ISS) address.

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INTERRUPT SERVICE SUBROUTINE PROCESSING

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Differences between RET and RETI instructions
## Both return the control to the calling program main Program) by popping off

the top two bytes of the stack into the program counter. RETI has the extra job of

clearing the interrupt flags (TF0/TF1 for timers and IE0/IE1 for edge triggered
interrupts)

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Classification of Interrupts

1. Vectored Interrupts
In this method, the starting address of the interrupt service routine is
predefined when the microcontroller is designed. These types of interrupts are
called vectored interrupts.

2. Non Vectored Interrupts

In this method, when the microcontroller receives the interrupt signal from the
external devices, the processor completes the current instruction and sends a
signal called INTA interrupt acknowledge (active low).

•After receiving the INTA signal, external hardware sends the interrupt vector
to the microcontroller. These types of interrupts are called non-vectored
interrupts.

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77
IE (INTERRUPT ENABLE) REGISTER

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INTERRUPT PRIORITY REGISTER

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8051 SERIAL COMMUNICATION

SERIAL AND PARALLEL DATA TRANSFER

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SIMPLEX, HALF DUPLEX AND
FULL DUPLEX DATA TRANSFER

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TYPES OF SERIAL DATA COMMUNICATION

Synchronous Serial Data Communication In synchronous serial data

communication, transmitter and receiver are synchronized.
•It uses a common clock signal to synchronize the receiver and the transmitter.The
transmission of data; first the sync character and then, the data is transmitted.

•This format is generally used for high-speed transmission.

Asynchronous Serial Data Communication In asynchronous serial data

communication, different clock sources are used for transmitter and receiver.

•In this mode, data is transmitted with start and stop bits.
•Transmission begins with start bit, followed by data and then stop bit.
•The transmission of 10 bit in the asynchronous format: one startbit, eight data bit and
one stop bit. For error checking purpose, parity bit is included just prior to stop bit.

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SYNCHRONOUS TRANSMISSION FORMAT

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ASYNCHRONOUS TRANSMISSION FORMAT

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BAUD RATE

•The rate at which the bits are transmitted (bits/second) is called baud
or transfer rate.
•The baud rate is the reciprocal of the time to send 1 bit. In
asynchronous transmission, baud rate is not equal to number of bits
per second.

•This is because, each byte is preceded by a start bit and followed by

parity and stop bit.

•For example, in synchronous transmission, if data is transmitted with

9600 baud, it means that 9600 bits are transmitted in one second.

•For one bit, transmission time = 1 second/9600 = 0.104 ms.

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8051 SERIAL COMMUNICATION

•The 8051 supports a full duplex serial port. Full duplex means that it can
transmit and receive a byte simultaneously.

•The 8051 has TXD (pin 11 or P3.1) and RXD (pin 10 or P3.0) pins for
transmission and reception of serial data respectively. These pins are TTL
compatible.

•The 8051 transfers and receives data serially with different baud rates.
Three special function registers support serial communication, namely,
SBUF Register, SCON Register and PCON Register.

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SPECIAL FUNCTION REGISTERS

•SBUF RegisterSBUF is an 8 bit register. It has separate SBUF registers for data
transmission and for data reception. These two registers are accessed by the
same name, SBUF.

•One of the registers is write only and used to hold data to be transmitted via
TXD pin. The other is read only and holds the received data from external
source via RXD pin.

•For a byte of data to be transferred via the TXD line, it must be placed in the
SBUF register. Similarly, SBUF holds the 8 bit data received by the RXD pin.

•SCON RegisterThis register contains mode selection bits, serial port interrupt
bit (TI and RI) and also the ninth data bit for transmission and reception (TB8
and RB8).

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SERIAL CONTROL REGISTER (SCON)

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INTERFACE OF TWO MICROCONTROLLERS WITH MINIMUM SIGNALS

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RS232

•RS232 is the most widely used serial I/O interfacing standard. The RS232
standard was published by the Electronic Industry Association (EIA) in 1960.

•The COM1 and COM2 ports in IBMPC are RS232 compatible ports. In RS232, 1 is
represented by –3 to –25 V and 0 is represented by +3 to +25 V.

•In a microcontroller, serial TXD and RXD lines are TTL compatible i.e. 1 and 0 are
represented by +5 V and 0 V.

•For this reason, in order to connect a microcontroller to RS232 bus, voltage

converters are used.

•MAX 232 IC is commonly used to convert the TTL logic levels to the RS232
voltage levels.

•The significance of the 232 is that 2 is transmission line, 3 is receiving line,

and 7 (2+3+2) is signal ground line.

•In RS232, ground line is common to the transmitter and receiver, and they are
usable up to one meter without any shield. 90
Stepper Motors

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INTERFACING STEPPER MOTOR

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EXAMPLE

•The step angle and the stepping code can be obtained from the stepper
motor manufacturer, and the rotation speed depends on the delay program
between the stepping codes.

•The circuit to interface stepper motor is as shown in Fig. 6.15. The stepper
motor can be driven directly by the transistors. Transistors are used to
supply higher current to the motor.

•The microcontroller outputs the drive pattern to make the motor rotate. The
diodes in Fig. 6.15 are called fly back diodes and are used to protect the
transistors from reverse biases.

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HALF STEP OPERATION OF STEPPER MOTOR

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DRIVER CIRCUIT AND PORT INTERFACE FOR STEPPER

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INTERFACING DC MOTOR

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CIRCUIT OPERATION

•DC motor speed and direction of rotation is controlled using port pins—P2.4
and P2.5. The circuit utilizes complementary pair NPN/PNP, transistors T4/T5
and T2/T3.

•Motor is on, if a PWM signal is applied to P2.4; and if P2.5 is held at logic 0,
when the PWM is at logic 1, T6 collector will be low; so T4 is OFF and T5 is
ON.

•Since P2.5 is held at logic 0, the collector of T1 will go high,so T2 is ON and

T3 is OFF.

•The motor rotates in reverse direction, if P2.4 is held at logic0; and if a PWM
signal is applied to P2.5, then T4 will be ON and T5 will be OFF.

•When PWM is at logic 1, transistor T2 is OFF and T3 is ON giving a reverse

conduction path. Motor is OFF if both P2.4 and P2.5 are held at logic 0.

•The diodes in the figure are used to protect the transistors from reverse 97
biases.
98